mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/gic.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file gic.c
bogdanm 0:9b334a45a8ff 3 * @brief Implementation of GIC functions declared in CMSIS Cortex-A9 Core Peripheral Access Layer Header File
bogdanm 0:9b334a45a8ff 4 * @version
bogdanm 0:9b334a45a8ff 5 * @date 19 Sept 2013
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
bogdanm 0:9b334a45a8ff 10 /* Copyright (c) 2011 - 2013 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #include "MBRZA1H.h"
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 #define GICDistributor ((GICDistributor_Type *) Renesas_RZ_A1_GIC_DISTRIBUTOR_BASE ) /*!< GIC Distributor configuration struct */
bogdanm 0:9b334a45a8ff 40 #define GICInterface ((GICInterface_Type *) Renesas_RZ_A1_GIC_INTERFACE_BASE ) /*!< GIC Interface configuration struct */
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 /* Globals for use of post-scatterloading code that must access GIC */
bogdanm 0:9b334a45a8ff 43 const uint32_t GICDistributor_BASE = Renesas_RZ_A1_GIC_DISTRIBUTOR_BASE;
bogdanm 0:9b334a45a8ff 44 const uint32_t GICInterface_BASE = Renesas_RZ_A1_GIC_INTERFACE_BASE;
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 void GIC_EnableDistributor(void)
bogdanm 0:9b334a45a8ff 47 {
bogdanm 0:9b334a45a8ff 48 GICDistributor->ICDDCR |= 1; //enable distributor
bogdanm 0:9b334a45a8ff 49 }
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 void GIC_DisableDistributor(void)
bogdanm 0:9b334a45a8ff 52 {
bogdanm 0:9b334a45a8ff 53 GICDistributor->ICDDCR &=~1; //disable distributor
bogdanm 0:9b334a45a8ff 54 }
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 uint32_t GIC_DistributorInfo(void)
bogdanm 0:9b334a45a8ff 57 {
bogdanm 0:9b334a45a8ff 58 return (uint32_t)(GICDistributor->ICDICTR);
bogdanm 0:9b334a45a8ff 59 }
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 uint32_t GIC_DistributorImplementer(void)
bogdanm 0:9b334a45a8ff 62 {
bogdanm 0:9b334a45a8ff 63 return (uint32_t)(GICDistributor->ICDIIDR);
bogdanm 0:9b334a45a8ff 64 }
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target)
bogdanm 0:9b334a45a8ff 67 {
bogdanm 0:9b334a45a8ff 68 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPTR[IRQn / 4]);
bogdanm 0:9b334a45a8ff 69 field += IRQn % 4;
bogdanm 0:9b334a45a8ff 70 *field = (uint8_t)cpu_target & 0xf;
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 void GIC_SetICDICFR (const uint32_t *ICDICFRn)
bogdanm 0:9b334a45a8ff 74 {
bogdanm 0:9b334a45a8ff 75 uint32_t i, num_irq;
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 //Get the maximum number of interrupts that the GIC supports
bogdanm 0:9b334a45a8ff 78 num_irq = 32 * ((GIC_DistributorInfo() & 0x1f) + 1);
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 for (i = 0; i < (num_irq/16); i++)
bogdanm 0:9b334a45a8ff 81 {
bogdanm 0:9b334a45a8ff 82 GICDistributor->ICDISPR[i] = *ICDICFRn++;
bogdanm 0:9b334a45a8ff 83 }
bogdanm 0:9b334a45a8ff 84 }
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 uint32_t GIC_GetTarget(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 87 {
bogdanm 0:9b334a45a8ff 88 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPTR[IRQn / 4]);
bogdanm 0:9b334a45a8ff 89 field += IRQn % 4;
bogdanm 0:9b334a45a8ff 90 return ((uint32_t)*field & 0xf);
bogdanm 0:9b334a45a8ff 91 }
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 void GIC_EnableInterface(void)
bogdanm 0:9b334a45a8ff 94 {
bogdanm 0:9b334a45a8ff 95 GICInterface->ICCICR |= 1; //enable interface
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 void GIC_DisableInterface(void)
bogdanm 0:9b334a45a8ff 99 {
bogdanm 0:9b334a45a8ff 100 GICInterface->ICCICR &=~1; //disable distributor
bogdanm 0:9b334a45a8ff 101 }
bogdanm 0:9b334a45a8ff 102
bogdanm 0:9b334a45a8ff 103 IRQn_Type GIC_AcknowledgePending(void)
bogdanm 0:9b334a45a8ff 104 {
bogdanm 0:9b334a45a8ff 105 return (IRQn_Type)(GICInterface->ICCIAR);
bogdanm 0:9b334a45a8ff 106 }
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 void GIC_EndInterrupt(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 109 {
bogdanm 0:9b334a45a8ff 110 GICInterface->ICCEOIR = IRQn;
bogdanm 0:9b334a45a8ff 111 }
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 void GIC_EnableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 114 {
bogdanm 0:9b334a45a8ff 115 GICDistributor->ICDISER[IRQn / 32] = 1 << (IRQn % 32);
bogdanm 0:9b334a45a8ff 116 }
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 void GIC_DisableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 119 {
bogdanm 0:9b334a45a8ff 120 GICDistributor->ICDICER[IRQn / 32] = 1 << (IRQn % 32);
bogdanm 0:9b334a45a8ff 121 }
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 void GIC_SetPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 124 {
bogdanm 0:9b334a45a8ff 125 GICDistributor->ICDISPR[IRQn / 32] = 1 << (IRQn % 32);
bogdanm 0:9b334a45a8ff 126 }
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 void GIC_ClearPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 129 {
bogdanm 0:9b334a45a8ff 130 GICDistributor->ICDICPR[IRQn / 32] = 1 << (IRQn % 32);
bogdanm 0:9b334a45a8ff 131 }
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133 void GIC_SetLevelModel(IRQn_Type IRQn, int8_t edge_level, int8_t model)
bogdanm 0:9b334a45a8ff 134 {
bogdanm 0:9b334a45a8ff 135 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDICFR[IRQn / 16]);
bogdanm 0:9b334a45a8ff 136 int bit_shift = (IRQn % 16)<<1;
bogdanm 0:9b334a45a8ff 137 uint8_t save_byte;
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 field += (bit_shift / 8);
bogdanm 0:9b334a45a8ff 140 bit_shift %= 8;
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 save_byte = *field;
bogdanm 0:9b334a45a8ff 143 save_byte &= ((uint8_t)~(3u << bit_shift));
bogdanm 0:9b334a45a8ff 144
bogdanm 0:9b334a45a8ff 145 *field = save_byte | ((uint8_t)((edge_level<<1) | model)<< bit_shift);
bogdanm 0:9b334a45a8ff 146 }
bogdanm 0:9b334a45a8ff 147
bogdanm 0:9b334a45a8ff 148 void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
bogdanm 0:9b334a45a8ff 149 {
bogdanm 0:9b334a45a8ff 150 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPR[IRQn / 4]);
bogdanm 0:9b334a45a8ff 151 field += (IRQn % 4);
bogdanm 0:9b334a45a8ff 152 *field = (uint8_t)priority;
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 uint32_t GIC_GetPriority(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 156 {
bogdanm 0:9b334a45a8ff 157 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPR[IRQn / 4]);
bogdanm 0:9b334a45a8ff 158 field += (IRQn % 4);
bogdanm 0:9b334a45a8ff 159 return (uint32_t)*field;
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 void GIC_InterfacePriorityMask(uint32_t priority)
bogdanm 0:9b334a45a8ff 163 {
bogdanm 0:9b334a45a8ff 164 GICInterface->ICCPMR = priority & 0xff; //set priority mask
bogdanm 0:9b334a45a8ff 165 }
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 void GIC_SetBinaryPoint(uint32_t binary_point)
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 GICInterface->ICCBPR = binary_point & 0x07; //set binary point
bogdanm 0:9b334a45a8ff 170 }
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 uint32_t GIC_GetBinaryPoint(uint32_t binary_point)
bogdanm 0:9b334a45a8ff 173 {
bogdanm 0:9b334a45a8ff 174 return (uint32_t)GICInterface->ICCBPR;
bogdanm 0:9b334a45a8ff 175 }
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 uint32_t GIC_GetIRQStatus(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 178 {
bogdanm 0:9b334a45a8ff 179 uint32_t pending, active;
bogdanm 0:9b334a45a8ff 180
bogdanm 0:9b334a45a8ff 181 active = ((GICDistributor->ICDABR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
bogdanm 0:9b334a45a8ff 182 pending =((GICDistributor->ICDISPR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 return ((active<<1) | pending);
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)
bogdanm 0:9b334a45a8ff 188 {
bogdanm 0:9b334a45a8ff 189 GICDistributor->ICDSGIR = ((filter_list & 0x3) << 24) | ((target_list & 0xff) << 16) | (IRQn & 0xf);
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 void GIC_DistInit(void)
bogdanm 0:9b334a45a8ff 193 {
bogdanm 0:9b334a45a8ff 194 //IRQn_Type i;
bogdanm 0:9b334a45a8ff 195 uint32_t i;
bogdanm 0:9b334a45a8ff 196 uint32_t num_irq = 0;
bogdanm 0:9b334a45a8ff 197 uint32_t priority_field;
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 //A reset sets all bits in the ICDISRs corresponding to the SPIs to 0,
bogdanm 0:9b334a45a8ff 200 //configuring all of the interrupts as Secure.
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 //Disable interrupt forwarding
bogdanm 0:9b334a45a8ff 203 GIC_DisableDistributor();
bogdanm 0:9b334a45a8ff 204 //Get the maximum number of interrupts that the GIC supports
bogdanm 0:9b334a45a8ff 205 num_irq = 32 * ((GIC_DistributorInfo() & 0x1f) + 1);
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 /* Priority level is implementation defined.
bogdanm 0:9b334a45a8ff 208 To determine the number of priority bits implemented write 0xFF to an ICDIPR
bogdanm 0:9b334a45a8ff 209 priority field and read back the value stored.*/
bogdanm 0:9b334a45a8ff 210 GIC_SetPriority((IRQn_Type)0, 0xff);
bogdanm 0:9b334a45a8ff 211 priority_field = GIC_GetPriority((IRQn_Type)0);
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 for (i = 32; i < num_irq; i++)
bogdanm 0:9b334a45a8ff 214 {
bogdanm 0:9b334a45a8ff 215 //Disable all SPI the interrupts
bogdanm 0:9b334a45a8ff 216 GIC_DisableIRQ((IRQn_Type)i);
bogdanm 0:9b334a45a8ff 217 //Set level-sensitive and N-N model
bogdanm 0:9b334a45a8ff 218 //GIC_SetLevelModel(i, 0, 0);
bogdanm 0:9b334a45a8ff 219 //Set priority
bogdanm 0:9b334a45a8ff 220 GIC_SetPriority((IRQn_Type)i, priority_field/2);
bogdanm 0:9b334a45a8ff 221 //Set target list to "all cpus"
bogdanm 0:9b334a45a8ff 222 GIC_SetTarget((IRQn_Type)i, 0xff);
bogdanm 0:9b334a45a8ff 223 }
bogdanm 0:9b334a45a8ff 224 /* Set level-edge and 1-N model */
bogdanm 0:9b334a45a8ff 225 /* GICDistributor->ICDICFR[ 0] is read only */
bogdanm 0:9b334a45a8ff 226 GICDistributor->ICDICFR[ 1] = 0x00000055;
bogdanm 0:9b334a45a8ff 227 GICDistributor->ICDICFR[ 2] = 0xFFFD5555;
bogdanm 0:9b334a45a8ff 228 GICDistributor->ICDICFR[ 3] = 0x555FFFFF;
bogdanm 0:9b334a45a8ff 229 GICDistributor->ICDICFR[ 4] = 0x55555555;
bogdanm 0:9b334a45a8ff 230 GICDistributor->ICDICFR[ 5] = 0x55555555;
bogdanm 0:9b334a45a8ff 231 GICDistributor->ICDICFR[ 6] = 0x55555555;
bogdanm 0:9b334a45a8ff 232 GICDistributor->ICDICFR[ 7] = 0x55555555;
bogdanm 0:9b334a45a8ff 233 GICDistributor->ICDICFR[ 8] = 0x5555F555;
bogdanm 0:9b334a45a8ff 234 GICDistributor->ICDICFR[ 9] = 0x55555555;
bogdanm 0:9b334a45a8ff 235 GICDistributor->ICDICFR[10] = 0x55555555;
bogdanm 0:9b334a45a8ff 236 GICDistributor->ICDICFR[11] = 0xF5555555;
bogdanm 0:9b334a45a8ff 237 GICDistributor->ICDICFR[12] = 0xF555F555;
bogdanm 0:9b334a45a8ff 238 GICDistributor->ICDICFR[13] = 0x5555F555;
bogdanm 0:9b334a45a8ff 239 GICDistributor->ICDICFR[14] = 0x55555555;
bogdanm 0:9b334a45a8ff 240 GICDistributor->ICDICFR[15] = 0x55555555;
bogdanm 0:9b334a45a8ff 241 GICDistributor->ICDICFR[16] = 0x55555555;
bogdanm 0:9b334a45a8ff 242 GICDistributor->ICDICFR[17] = 0xFD555555;
bogdanm 0:9b334a45a8ff 243 GICDistributor->ICDICFR[18] = 0x55555557;
bogdanm 0:9b334a45a8ff 244 GICDistributor->ICDICFR[19] = 0x55555555;
bogdanm 0:9b334a45a8ff 245 GICDistributor->ICDICFR[20] = 0xFFD55555;
bogdanm 0:9b334a45a8ff 246 GICDistributor->ICDICFR[21] = 0x5F55557F;
bogdanm 0:9b334a45a8ff 247 GICDistributor->ICDICFR[22] = 0xFD55555F;
bogdanm 0:9b334a45a8ff 248 GICDistributor->ICDICFR[23] = 0x55555557;
bogdanm 0:9b334a45a8ff 249 GICDistributor->ICDICFR[24] = 0x55555555;
bogdanm 0:9b334a45a8ff 250 GICDistributor->ICDICFR[25] = 0x55555555;
bogdanm 0:9b334a45a8ff 251 GICDistributor->ICDICFR[26] = 0x55555555;
bogdanm 0:9b334a45a8ff 252 GICDistributor->ICDICFR[27] = 0x55555555;
bogdanm 0:9b334a45a8ff 253 GICDistributor->ICDICFR[28] = 0x55555555;
bogdanm 0:9b334a45a8ff 254 GICDistributor->ICDICFR[29] = 0x55555555;
bogdanm 0:9b334a45a8ff 255 GICDistributor->ICDICFR[30] = 0x55555555;
bogdanm 0:9b334a45a8ff 256 GICDistributor->ICDICFR[31] = 0x55555555;
bogdanm 0:9b334a45a8ff 257 GICDistributor->ICDICFR[32] = 0x55555555;
bogdanm 0:9b334a45a8ff 258 GICDistributor->ICDICFR[33] = 0x55555555;
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 //Enable distributor
bogdanm 0:9b334a45a8ff 261 GIC_EnableDistributor();
bogdanm 0:9b334a45a8ff 262 }
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 void GIC_CPUInterfaceInit(void)
bogdanm 0:9b334a45a8ff 265 {
bogdanm 0:9b334a45a8ff 266 IRQn_Type i;
bogdanm 0:9b334a45a8ff 267 uint32_t priority_field;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 //A reset sets all bits in the ICDISRs corresponding to the SPIs to 0,
bogdanm 0:9b334a45a8ff 270 //configuring all of the interrupts as Secure.
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 //Disable interrupt forwarding
bogdanm 0:9b334a45a8ff 273 GIC_DisableInterface();
bogdanm 0:9b334a45a8ff 274
bogdanm 0:9b334a45a8ff 275 /* Priority level is implementation defined.
bogdanm 0:9b334a45a8ff 276 To determine the number of priority bits implemented write 0xFF to an ICDIPR
bogdanm 0:9b334a45a8ff 277 priority field and read back the value stored.*/
bogdanm 0:9b334a45a8ff 278 GIC_SetPriority((IRQn_Type)0, 0xff);
bogdanm 0:9b334a45a8ff 279 priority_field = GIC_GetPriority((IRQn_Type)0);
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 //SGI and PPI
bogdanm 0:9b334a45a8ff 282 for (i = (IRQn_Type)0; i < 32; i++)
bogdanm 0:9b334a45a8ff 283 {
bogdanm 0:9b334a45a8ff 284 //Set level-sensitive and N-N model for PPI
bogdanm 0:9b334a45a8ff 285 //if(i > 15)
bogdanm 0:9b334a45a8ff 286 //GIC_SetLevelModel(i, 0, 0);
bogdanm 0:9b334a45a8ff 287 //Disable SGI and PPI interrupts
bogdanm 0:9b334a45a8ff 288 GIC_DisableIRQ(i);
bogdanm 0:9b334a45a8ff 289 //Set priority
bogdanm 0:9b334a45a8ff 290 GIC_SetPriority(i, priority_field/2);
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292 //Enable interface
bogdanm 0:9b334a45a8ff 293 GIC_EnableInterface();
bogdanm 0:9b334a45a8ff 294 //Set binary point to 0
bogdanm 0:9b334a45a8ff 295 GIC_SetBinaryPoint(0);
bogdanm 0:9b334a45a8ff 296 //Set priority mask
bogdanm 0:9b334a45a8ff 297 GIC_InterfacePriorityMask(0xff);
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 void GIC_Enable(void)
bogdanm 0:9b334a45a8ff 301 {
bogdanm 0:9b334a45a8ff 302 GIC_DistInit();
bogdanm 0:9b334a45a8ff 303 GIC_CPUInterfaceInit(); //per CPU
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305