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mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_lptim.h@149:156823d33999, 2016-10-28 (annotated)

Committer:: <>
Date:: Fri Oct 28 11:17:30 2016 +0100
Revision:: 149:156823d33999
Parent:: targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_lptim.h@144:ef7eb2e8f9f7
Child:: 157:ff67d9f36b67

This updates the lib to the mbed lib v128

NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32f7xx_hal_lptim.h
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	144:ef7eb2e8f9f7	5	* @version V1.1.0
<>	144:ef7eb2e8f9f7	6	* @date 22-April-2016
<>	144:ef7eb2e8f9f7	7	* @brief Header file of LPTIM HAL module.
<>	144:ef7eb2e8f9f7	8	******************************************************************************
<>	144:ef7eb2e8f9f7	9	* @attention
<>	144:ef7eb2e8f9f7	10	*
<>	144:ef7eb2e8f9f7	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	12	*
<>	144:ef7eb2e8f9f7	13	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	14	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	15	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	16	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	18	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	19	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	21	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	22	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	23	*
<>	144:ef7eb2e8f9f7	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	34	*
<>	144:ef7eb2e8f9f7	35	******************************************************************************
<>	144:ef7eb2e8f9f7	36	*/
<>	144:ef7eb2e8f9f7	37
<>	144:ef7eb2e8f9f7	38	/* Define to prevent recursive inclusion -------------------------------------*/
<>	144:ef7eb2e8f9f7	39	#ifndef __STM32F7xx_HAL_LPTIM_H
<>	144:ef7eb2e8f9f7	40	#define __STM32F7xx_HAL_LPTIM_H
<>	144:ef7eb2e8f9f7	41
<>	144:ef7eb2e8f9f7	42	#ifdef __cplusplus
<>	144:ef7eb2e8f9f7	43	extern "C" {
<>	144:ef7eb2e8f9f7	44	#endif
<>	144:ef7eb2e8f9f7	45
<>	144:ef7eb2e8f9f7	46	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	47	#include "stm32f7xx_hal_def.h"
<>	144:ef7eb2e8f9f7	48
<>	144:ef7eb2e8f9f7	49	/** @addtogroup STM32F7xx_HAL_Driver
<>	144:ef7eb2e8f9f7	50	* @{
<>	144:ef7eb2e8f9f7	51	*/
<>	144:ef7eb2e8f9f7	52
<>	144:ef7eb2e8f9f7	53	/** @defgroup LPTIM LPTIM
<>	144:ef7eb2e8f9f7	54	* @brief LPTIM HAL module driver
<>	144:ef7eb2e8f9f7	55	* @{
<>	144:ef7eb2e8f9f7	56	*/
<>	144:ef7eb2e8f9f7	57
<>	144:ef7eb2e8f9f7	58	/* Exported types ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	59	/** @defgroup LPTIM_Exported_Types LPTIM Exported Types
<>	144:ef7eb2e8f9f7	60	* @{
<>	144:ef7eb2e8f9f7	61	*/
<>	144:ef7eb2e8f9f7	62
<>	144:ef7eb2e8f9f7	63	/** @defgroup LPTIM_WAKEUPTIMER_EXTILINE LPTIM WAKEUP Timer EXTI Line
<>	144:ef7eb2e8f9f7	64	* @{
<>	144:ef7eb2e8f9f7	65	*/
<>	144:ef7eb2e8f9f7	66	#define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_MR23) /!< External interrupt line 23 Connected to the LPTIM EXTI Line /
<>	144:ef7eb2e8f9f7	67	/**
<>	144:ef7eb2e8f9f7	68	* @}
<>	144:ef7eb2e8f9f7	69	*/
<>	144:ef7eb2e8f9f7	70
<>	144:ef7eb2e8f9f7	71	/**
<>	144:ef7eb2e8f9f7	72	* @brief LPTIM Clock configuration definition
<>	144:ef7eb2e8f9f7	73	*/
<>	144:ef7eb2e8f9f7	74	typedef struct
<>	144:ef7eb2e8f9f7	75	{
<>	144:ef7eb2e8f9f7	76	uint32_t Source; /*!< Selects the clock source.
<>	144:ef7eb2e8f9f7	77	This parameter can be a value of @ref LPTIM_Clock_Source */
<>	144:ef7eb2e8f9f7	78
<>	144:ef7eb2e8f9f7	79	uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
<>	144:ef7eb2e8f9f7	80	This parameter can be a value of @ref LPTIM_Clock_Prescaler */
<>	144:ef7eb2e8f9f7	81
<>	144:ef7eb2e8f9f7	82	}LPTIM_ClockConfigTypeDef;
<>	144:ef7eb2e8f9f7	83
<>	144:ef7eb2e8f9f7	84	/**
<>	144:ef7eb2e8f9f7	85	* @brief LPTIM Clock configuration definition
<>	144:ef7eb2e8f9f7	86	*/
<>	144:ef7eb2e8f9f7	87	typedef struct
<>	144:ef7eb2e8f9f7	88	{
<>	144:ef7eb2e8f9f7	89	uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
<>	144:ef7eb2e8f9f7	90	if the ULPTIM input is selected.
<>	144:ef7eb2e8f9f7	91	Note: This parameter is used only when Ultra low power clock source is used.
<>	144:ef7eb2e8f9f7	92	Note: If the polarity is configured on 'both edges', an auxiliary clock
<>	144:ef7eb2e8f9f7	93	(one of the Low power oscillator) must be active.
<>	144:ef7eb2e8f9f7	94	This parameter can be a value of @ref LPTIM_Clock_Polarity */
<>	144:ef7eb2e8f9f7	95
<>	144:ef7eb2e8f9f7	96	uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
<>	144:ef7eb2e8f9f7	97	Note: This parameter is used only when Ultra low power clock source is used.
<>	144:ef7eb2e8f9f7	98	This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
<>	144:ef7eb2e8f9f7	99
<>	144:ef7eb2e8f9f7	100	}LPTIM_ULPClockConfigTypeDef;
<>	144:ef7eb2e8f9f7	101
<>	144:ef7eb2e8f9f7	102	/**
<>	144:ef7eb2e8f9f7	103	* @brief LPTIM Trigger configuration definition
<>	144:ef7eb2e8f9f7	104	*/
<>	144:ef7eb2e8f9f7	105	typedef struct
<>	144:ef7eb2e8f9f7	106	{
<>	144:ef7eb2e8f9f7	107	uint32_t Source; /*!< Selects the Trigger source.
<>	144:ef7eb2e8f9f7	108	This parameter can be a value of @ref LPTIM_Trigger_Source */
<>	144:ef7eb2e8f9f7	109
<>	144:ef7eb2e8f9f7	110	uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
<>	144:ef7eb2e8f9f7	111	Note: This parameter is used only when an external trigger is used.
<>	144:ef7eb2e8f9f7	112	This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
<>	144:ef7eb2e8f9f7	113
<>	144:ef7eb2e8f9f7	114	uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
<>	144:ef7eb2e8f9f7	115	Note: This parameter is used only when an external trigger is used.
<>	144:ef7eb2e8f9f7	116	This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
<>	144:ef7eb2e8f9f7	117	}LPTIM_TriggerConfigTypeDef;
<>	144:ef7eb2e8f9f7	118
<>	144:ef7eb2e8f9f7	119	/**
<>	144:ef7eb2e8f9f7	120	* @brief LPTIM Initialization Structure definition
<>	144:ef7eb2e8f9f7	121	*/
<>	144:ef7eb2e8f9f7	122	typedef struct
<>	144:ef7eb2e8f9f7	123	{
<>	144:ef7eb2e8f9f7	124	LPTIM_ClockConfigTypeDef Clock; /!< Specifies the clock parameters /
<>	144:ef7eb2e8f9f7	125
<>	144:ef7eb2e8f9f7	126	LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /!< Specifies the Ultra Low Power clock parameters /
<>	144:ef7eb2e8f9f7	127
<>	144:ef7eb2e8f9f7	128	LPTIM_TriggerConfigTypeDef Trigger; /!< Specifies the Trigger parameters /
<>	144:ef7eb2e8f9f7	129
<>	144:ef7eb2e8f9f7	130	uint32_t OutputPolarity; /*!< Specifies the Output polarity.
<>	144:ef7eb2e8f9f7	131	This parameter can be a value of @ref LPTIM_Output_Polarity */
<>	144:ef7eb2e8f9f7	132
<>	144:ef7eb2e8f9f7	133	uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
<>	144:ef7eb2e8f9f7	134	values is done immediately or after the end of current period.
<>	144:ef7eb2e8f9f7	135	This parameter can be a value of @ref LPTIM_Updating_Mode */
<>	144:ef7eb2e8f9f7	136
<>	144:ef7eb2e8f9f7	137	uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
<>	144:ef7eb2e8f9f7	138	or each external event.
<>	144:ef7eb2e8f9f7	139	This parameter can be a value of @ref LPTIM_Counter_Source */
<>	144:ef7eb2e8f9f7	140
<>	144:ef7eb2e8f9f7	141	}LPTIM_InitTypeDef;
<>	144:ef7eb2e8f9f7	142
<>	144:ef7eb2e8f9f7	143	/**
<>	144:ef7eb2e8f9f7	144	* @brief HAL LPTIM State structure definition
<>	144:ef7eb2e8f9f7	145	*/
<>	144:ef7eb2e8f9f7	146	typedef enum __HAL_LPTIM_StateTypeDef
<>	144:ef7eb2e8f9f7	147	{
<>	144:ef7eb2e8f9f7	148	HAL_LPTIM_STATE_RESET = 0x00U, /!< Peripheral not yet initialized or disabled /
<>	144:ef7eb2e8f9f7	149	HAL_LPTIM_STATE_READY = 0x01U, /!< Peripheral Initialized and ready for use /
<>	144:ef7eb2e8f9f7	150	HAL_LPTIM_STATE_BUSY = 0x02U, /!< An internal process is ongoing /
<>	144:ef7eb2e8f9f7	151	HAL_LPTIM_STATE_TIMEOUT = 0x03U, /!< Timeout state /
<>	144:ef7eb2e8f9f7	152	HAL_LPTIM_STATE_ERROR = 0x04U /!< Internal Process is ongoing /
<>	144:ef7eb2e8f9f7	153	}HAL_LPTIM_StateTypeDef;
<>	144:ef7eb2e8f9f7	154
<>	144:ef7eb2e8f9f7	155	/**
<>	144:ef7eb2e8f9f7	156	* @brief LPTIM handle Structure definition
<>	144:ef7eb2e8f9f7	157	*/
<>	144:ef7eb2e8f9f7	158	typedef struct
<>	144:ef7eb2e8f9f7	159	{
<>	144:ef7eb2e8f9f7	160	LPTIM_TypeDef Instance; /!< Register base address */
<>	144:ef7eb2e8f9f7	161
<>	144:ef7eb2e8f9f7	162	LPTIM_InitTypeDef Init; /!< LPTIM required parameters /
<>	144:ef7eb2e8f9f7	163
<>	144:ef7eb2e8f9f7	164	HAL_StatusTypeDef Status; /!< LPTIM peripheral status /
<>	144:ef7eb2e8f9f7	165
<>	144:ef7eb2e8f9f7	166	HAL_LockTypeDef Lock; /!< LPTIM locking object /
<>	144:ef7eb2e8f9f7	167
<>	144:ef7eb2e8f9f7	168	__IO HAL_LPTIM_StateTypeDef State; /!< LPTIM peripheral state /
<>	144:ef7eb2e8f9f7	169
<>	144:ef7eb2e8f9f7	170	}LPTIM_HandleTypeDef;
<>	144:ef7eb2e8f9f7	171
<>	144:ef7eb2e8f9f7	172	/**
<>	144:ef7eb2e8f9f7	173	* @}
<>	144:ef7eb2e8f9f7	174	*/
<>	144:ef7eb2e8f9f7	175
<>	144:ef7eb2e8f9f7	176	/* Exported constants --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	177	/** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
<>	144:ef7eb2e8f9f7	178	* @{
<>	144:ef7eb2e8f9f7	179	*/
<>	144:ef7eb2e8f9f7	180
<>	144:ef7eb2e8f9f7	181	/** @defgroup LPTIM_Clock_Source LPTIM Clock Source
<>	144:ef7eb2e8f9f7	182	* @{
<>	144:ef7eb2e8f9f7	183	*/
<>	144:ef7eb2e8f9f7	184	#define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U)
<>	144:ef7eb2e8f9f7	185	#define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
<>	144:ef7eb2e8f9f7	186	/**
<>	144:ef7eb2e8f9f7	187	* @}
<>	144:ef7eb2e8f9f7	188	*/
<>	144:ef7eb2e8f9f7	189
<>	144:ef7eb2e8f9f7	190	/** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
<>	144:ef7eb2e8f9f7	191	* @{
<>	144:ef7eb2e8f9f7	192	*/
<>	144:ef7eb2e8f9f7	193	#define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U)
<>	144:ef7eb2e8f9f7	194	#define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
<>	144:ef7eb2e8f9f7	195	#define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
<>	144:ef7eb2e8f9f7	196	#define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 \| LPTIM_CFGR_PRESC_1))
<>	144:ef7eb2e8f9f7	197	#define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
<>	144:ef7eb2e8f9f7	198	#define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 \| LPTIM_CFGR_PRESC_2))
<>	144:ef7eb2e8f9f7	199	#define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 \| LPTIM_CFGR_PRESC_2))
<>	144:ef7eb2e8f9f7	200	#define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC)
<>	144:ef7eb2e8f9f7	201	/**
<>	144:ef7eb2e8f9f7	202	* @}
<>	144:ef7eb2e8f9f7	203	*/
<>	144:ef7eb2e8f9f7	204
<>	144:ef7eb2e8f9f7	205	/** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
<>	144:ef7eb2e8f9f7	206	* @{
<>	144:ef7eb2e8f9f7	207	*/
<>	144:ef7eb2e8f9f7	208
<>	144:ef7eb2e8f9f7	209	#define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	210	#define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL)
<>	144:ef7eb2e8f9f7	211	/**
<>	144:ef7eb2e8f9f7	212	* @}
<>	144:ef7eb2e8f9f7	213	*/
<>	144:ef7eb2e8f9f7	214
<>	144:ef7eb2e8f9f7	215	/** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
<>	144:ef7eb2e8f9f7	216	* @{
<>	144:ef7eb2e8f9f7	217	*/
<>	144:ef7eb2e8f9f7	218	#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	219	#define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
<>	144:ef7eb2e8f9f7	220	#define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
<>	144:ef7eb2e8f9f7	221	#define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
<>	144:ef7eb2e8f9f7	222	/**
<>	144:ef7eb2e8f9f7	223	* @}
<>	144:ef7eb2e8f9f7	224	*/
<>	144:ef7eb2e8f9f7	225
<>	144:ef7eb2e8f9f7	226	/** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
<>	144:ef7eb2e8f9f7	227	* @{
<>	144:ef7eb2e8f9f7	228	*/
<>	144:ef7eb2e8f9f7	229
<>	144:ef7eb2e8f9f7	230	#define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	231	#define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
<>	144:ef7eb2e8f9f7	232	#define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
<>	144:ef7eb2e8f9f7	233	/**
<>	144:ef7eb2e8f9f7	234	* @}
<>	144:ef7eb2e8f9f7	235	*/
<>	144:ef7eb2e8f9f7	236
<>	144:ef7eb2e8f9f7	237	/** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
<>	144:ef7eb2e8f9f7	238	* @{
<>	144:ef7eb2e8f9f7	239	*/
<>	144:ef7eb2e8f9f7	240	#define LPTIM_TRIGSOURCE_SOFTWARE ((uint32_t)0x0000FFFFU)
<>	144:ef7eb2e8f9f7	241	#define LPTIM_TRIGSOURCE_0 ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	242	#define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0)
<>	144:ef7eb2e8f9f7	243	#define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
<>	144:ef7eb2e8f9f7	244	#define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 \| LPTIM_CFGR_TRIGSEL_1)
<>	144:ef7eb2e8f9f7	245	#define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
<>	144:ef7eb2e8f9f7	246	#define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 \| LPTIM_CFGR_TRIGSEL_2)
<>	144:ef7eb2e8f9f7	247	/**
<>	144:ef7eb2e8f9f7	248	* @}
<>	144:ef7eb2e8f9f7	249	*/
<>	144:ef7eb2e8f9f7	250
<>	144:ef7eb2e8f9f7	251	/** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
<>	144:ef7eb2e8f9f7	252	* @{
<>	144:ef7eb2e8f9f7	253	*/
<>	144:ef7eb2e8f9f7	254	#define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
<>	144:ef7eb2e8f9f7	255	#define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
<>	144:ef7eb2e8f9f7	256	#define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
<>	144:ef7eb2e8f9f7	257	/**
<>	144:ef7eb2e8f9f7	258	* @}
<>	144:ef7eb2e8f9f7	259	*/
<>	144:ef7eb2e8f9f7	260
<>	144:ef7eb2e8f9f7	261	/** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
<>	144:ef7eb2e8f9f7	262	* @{
<>	144:ef7eb2e8f9f7	263	*/
<>	144:ef7eb2e8f9f7	264	#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	265	#define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
<>	144:ef7eb2e8f9f7	266	#define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
<>	144:ef7eb2e8f9f7	267	#define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
<>	144:ef7eb2e8f9f7	268	/**
<>	144:ef7eb2e8f9f7	269	* @}
<>	144:ef7eb2e8f9f7	270	*/
<>	144:ef7eb2e8f9f7	271
<>	144:ef7eb2e8f9f7	272	/** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
<>	144:ef7eb2e8f9f7	273	* @{
<>	144:ef7eb2e8f9f7	274	*/
<>	144:ef7eb2e8f9f7	275
<>	144:ef7eb2e8f9f7	276	#define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	277	#define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
<>	144:ef7eb2e8f9f7	278	/**
<>	144:ef7eb2e8f9f7	279	* @}
<>	144:ef7eb2e8f9f7	280	*/
<>	144:ef7eb2e8f9f7	281
<>	144:ef7eb2e8f9f7	282	/** @defgroup LPTIM_Counter_Source LPTIM Counter Source
<>	144:ef7eb2e8f9f7	283	* @{
<>	144:ef7eb2e8f9f7	284	*/
<>	144:ef7eb2e8f9f7	285
<>	144:ef7eb2e8f9f7	286	#define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U)
<>	144:ef7eb2e8f9f7	287	#define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
<>	144:ef7eb2e8f9f7	288	/**
<>	144:ef7eb2e8f9f7	289	* @}
<>	144:ef7eb2e8f9f7	290	*/
<>	144:ef7eb2e8f9f7	291
<>	144:ef7eb2e8f9f7	292	/** @defgroup LPTIM_Flag_Definition LPTIM Flag Definition
<>	144:ef7eb2e8f9f7	293	* @{
<>	144:ef7eb2e8f9f7	294	*/
<>	144:ef7eb2e8f9f7	295
<>	144:ef7eb2e8f9f7	296	#define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
<>	144:ef7eb2e8f9f7	297	#define LPTIM_FLAG_UP LPTIM_ISR_UP
<>	144:ef7eb2e8f9f7	298	#define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
<>	144:ef7eb2e8f9f7	299	#define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
<>	144:ef7eb2e8f9f7	300	#define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
<>	144:ef7eb2e8f9f7	301	#define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
<>	144:ef7eb2e8f9f7	302	#define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
<>	144:ef7eb2e8f9f7	303	/**
<>	144:ef7eb2e8f9f7	304	* @}
<>	144:ef7eb2e8f9f7	305	*/
<>	144:ef7eb2e8f9f7	306
<>	144:ef7eb2e8f9f7	307	/** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
<>	144:ef7eb2e8f9f7	308	* @{
<>	144:ef7eb2e8f9f7	309	*/
<>	144:ef7eb2e8f9f7	310
<>	144:ef7eb2e8f9f7	311	#define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
<>	144:ef7eb2e8f9f7	312	#define LPTIM_IT_UP LPTIM_IER_UPIE
<>	144:ef7eb2e8f9f7	313	#define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
<>	144:ef7eb2e8f9f7	314	#define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
<>	144:ef7eb2e8f9f7	315	#define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
<>	144:ef7eb2e8f9f7	316	#define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
<>	144:ef7eb2e8f9f7	317	#define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
<>	144:ef7eb2e8f9f7	318	/**
<>	144:ef7eb2e8f9f7	319	* @}
<>	144:ef7eb2e8f9f7	320	*/
<>	144:ef7eb2e8f9f7	321
<>	144:ef7eb2e8f9f7	322	/**
<>	144:ef7eb2e8f9f7	323	* @}
<>	144:ef7eb2e8f9f7	324	*/
<>	144:ef7eb2e8f9f7	325
<>	144:ef7eb2e8f9f7	326	/* Exported macro ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	327	/** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
<>	144:ef7eb2e8f9f7	328	* @{
<>	144:ef7eb2e8f9f7	329	*/
<>	144:ef7eb2e8f9f7	330
<>	144:ef7eb2e8f9f7	331	/** @brief Reset LPTIM handle state
<>	144:ef7eb2e8f9f7	332	* @param __HANDLE__: LPTIM handle
<>	144:ef7eb2e8f9f7	333	* @retval None
<>	144:ef7eb2e8f9f7	334	*/
<>	144:ef7eb2e8f9f7	335	#define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
<>	144:ef7eb2e8f9f7	336
<>	144:ef7eb2e8f9f7	337	/**
<>	144:ef7eb2e8f9f7	338	* @brief Enable/Disable the LPTIM peripheral.
<>	144:ef7eb2e8f9f7	339	* @param __HANDLE__: LPTIM handle
<>	144:ef7eb2e8f9f7	340	* @retval None
<>	144:ef7eb2e8f9f7	341	*/
<>	144:ef7eb2e8f9f7	342	#define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= (LPTIM_CR_ENABLE))
<>	144:ef7eb2e8f9f7	343	#define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE))
<>	144:ef7eb2e8f9f7	344
<>	144:ef7eb2e8f9f7	345	/**
<>	144:ef7eb2e8f9f7	346	* @brief Starts the LPTIM peripheral in Continuous or in single mode.
<>	144:ef7eb2e8f9f7	347	* @param __HANDLE__: DMA handle
<>	144:ef7eb2e8f9f7	348	* @retval None
<>	144:ef7eb2e8f9f7	349	*/
<>	144:ef7eb2e8f9f7	350	#define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR \|= LPTIM_CR_CNTSTRT)
<>	144:ef7eb2e8f9f7	351	#define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= LPTIM_CR_SNGSTRT)
<>	144:ef7eb2e8f9f7	352
<>	144:ef7eb2e8f9f7	353
<>	144:ef7eb2e8f9f7	354	/**
<>	144:ef7eb2e8f9f7	355	* @brief Writes the passed parameter in the Autoreload register.
<>	144:ef7eb2e8f9f7	356	* @param __HANDLE__: LPTIM handle
<>	144:ef7eb2e8f9f7	357	* @param __VALUE__ : Autoreload value
<>	144:ef7eb2e8f9f7	358	* @retval None
<>	144:ef7eb2e8f9f7	359	*/
<>	144:ef7eb2e8f9f7	360	#define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
<>	144:ef7eb2e8f9f7	361
<>	144:ef7eb2e8f9f7	362	/**
<>	144:ef7eb2e8f9f7	363	* @brief Writes the passed parameter in the Compare register.
<>	144:ef7eb2e8f9f7	364	* @param __HANDLE__: LPTIM handle
<>	144:ef7eb2e8f9f7	365	* @param __VALUE__ : Compare value
<>	144:ef7eb2e8f9f7	366	* @retval None
<>	144:ef7eb2e8f9f7	367	*/
<>	144:ef7eb2e8f9f7	368	#define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
<>	144:ef7eb2e8f9f7	369
<>	144:ef7eb2e8f9f7	370	/**
<>	144:ef7eb2e8f9f7	371	* @brief Checks whether the specified LPTIM flag is set or not.
<>	144:ef7eb2e8f9f7	372	* @param __HANDLE__: LPTIM handle
<>	144:ef7eb2e8f9f7	373	* @param __FLAG__ : LPTIM flag to check
<>	144:ef7eb2e8f9f7	374	* This parameter can be a value of:
<>	144:ef7eb2e8f9f7	375	* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
<>	144:ef7eb2e8f9f7	376	* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
<>	144:ef7eb2e8f9f7	377	* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
<>	144:ef7eb2e8f9f7	378	* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
<>	144:ef7eb2e8f9f7	379	* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
<>	144:ef7eb2e8f9f7	380	* @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
<>	144:ef7eb2e8f9f7	381	* @arg LPTIM_FLAG_CMPM : Compare match Flag.
<>	144:ef7eb2e8f9f7	382	* @retval The state of the specified flag (SET or RESET).
<>	144:ef7eb2e8f9f7	383	*/
<>	144:ef7eb2e8f9f7	384	#define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
<>	144:ef7eb2e8f9f7	385
<>	144:ef7eb2e8f9f7	386	/**
<>	144:ef7eb2e8f9f7	387	* @brief Clears the specified LPTIM flag.
<>	144:ef7eb2e8f9f7	388	* @param __HANDLE__: LPTIM handle.
<>	144:ef7eb2e8f9f7	389	* @param __FLAG__ : LPTIM flag to clear.
<>	144:ef7eb2e8f9f7	390	* This parameter can be a value of:
<>	144:ef7eb2e8f9f7	391	* @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
<>	144:ef7eb2e8f9f7	392	* @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
<>	144:ef7eb2e8f9f7	393	* @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
<>	144:ef7eb2e8f9f7	394	* @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
<>	144:ef7eb2e8f9f7	395	* @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
<>	144:ef7eb2e8f9f7	396	* @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
<>	144:ef7eb2e8f9f7	397	* @arg LPTIM_FLAG_CMPM : Compare match Flag.
<>	144:ef7eb2e8f9f7	398	* @retval None.
<>	144:ef7eb2e8f9f7	399	*/
<>	144:ef7eb2e8f9f7	400	#define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<>	144:ef7eb2e8f9f7	401
<>	144:ef7eb2e8f9f7	402	/**
<>	144:ef7eb2e8f9f7	403	* @brief Enable the specified LPTIM interrupt.
<>	144:ef7eb2e8f9f7	404	* @param __HANDLE__ : LPTIM handle.
<>	144:ef7eb2e8f9f7	405	* @param __INTERRUPT__ : LPTIM interrupt to set.
<>	144:ef7eb2e8f9f7	406	* This parameter can be a value of:
<>	144:ef7eb2e8f9f7	407	* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<>	144:ef7eb2e8f9f7	408	* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<>	144:ef7eb2e8f9f7	409	* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<>	144:ef7eb2e8f9f7	410	* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<>	144:ef7eb2e8f9f7	411	* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<>	144:ef7eb2e8f9f7	412	* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<>	144:ef7eb2e8f9f7	413	* @arg LPTIM_IT_CMPM : Compare match Interrupt.
<>	144:ef7eb2e8f9f7	414	* @retval None.
<>	144:ef7eb2e8f9f7	415	*/
<>	144:ef7eb2e8f9f7	416	#define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER \|= (__INTERRUPT__))
<>	144:ef7eb2e8f9f7	417
<>	144:ef7eb2e8f9f7	418	/**
<>	144:ef7eb2e8f9f7	419	* @brief Disable the specified LPTIM interrupt.
<>	144:ef7eb2e8f9f7	420	* @param __HANDLE__ : LPTIM handle.
<>	144:ef7eb2e8f9f7	421	* @param __INTERRUPT__ : LPTIM interrupt to set.
<>	144:ef7eb2e8f9f7	422	* This parameter can be a value of:
<>	144:ef7eb2e8f9f7	423	* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<>	144:ef7eb2e8f9f7	424	* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<>	144:ef7eb2e8f9f7	425	* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<>	144:ef7eb2e8f9f7	426	* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<>	144:ef7eb2e8f9f7	427	* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<>	144:ef7eb2e8f9f7	428	* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<>	144:ef7eb2e8f9f7	429	* @arg LPTIM_IT_CMPM : Compare match Interrupt.
<>	144:ef7eb2e8f9f7	430	* @retval None.
<>	144:ef7eb2e8f9f7	431	*/
<>	144:ef7eb2e8f9f7	432	#define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
<>	144:ef7eb2e8f9f7	433
<>	144:ef7eb2e8f9f7	434	/**
<>	144:ef7eb2e8f9f7	435	* @brief Checks whether the specified LPTIM interrupt is set or not.
<>	144:ef7eb2e8f9f7	436	* @param __HANDLE__ : LPTIM handle.
<>	144:ef7eb2e8f9f7	437	* @param __INTERRUPT__ : LPTIM interrupt to check.
<>	144:ef7eb2e8f9f7	438	* This parameter can be a value of:
<>	144:ef7eb2e8f9f7	439	* @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<>	144:ef7eb2e8f9f7	440	* @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<>	144:ef7eb2e8f9f7	441	* @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<>	144:ef7eb2e8f9f7	442	* @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<>	144:ef7eb2e8f9f7	443	* @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<>	144:ef7eb2e8f9f7	444	* @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<>	144:ef7eb2e8f9f7	445	* @arg LPTIM_IT_CMPM : Compare match Interrupt.
<>	144:ef7eb2e8f9f7	446	* @retval Interrupt status.
<>	144:ef7eb2e8f9f7	447	*/
<>	144:ef7eb2e8f9f7	448
<>	144:ef7eb2e8f9f7	449	#define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
<>	144:ef7eb2e8f9f7	450
<>	144:ef7eb2e8f9f7	451	/**
<>	144:ef7eb2e8f9f7	452	* @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	453	* @retval None
<>	144:ef7eb2e8f9f7	454	*/
<>	144:ef7eb2e8f9f7	455	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR \|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	456
<>	144:ef7eb2e8f9f7	457	/**
<>	144:ef7eb2e8f9f7	458	* @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	459	* @retval None
<>	144:ef7eb2e8f9f7	460	*/
<>	144:ef7eb2e8f9f7	461	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	144:ef7eb2e8f9f7	462
<>	144:ef7eb2e8f9f7	463	/**
<>	144:ef7eb2e8f9f7	464	* @brief Enable event on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	465	* @retval None.
<>	144:ef7eb2e8f9f7	466	*/
<>	144:ef7eb2e8f9f7	467	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR \|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	468
<>	144:ef7eb2e8f9f7	469	/**
<>	144:ef7eb2e8f9f7	470	* @brief Disable event on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	471	* @retval None.
<>	144:ef7eb2e8f9f7	472	*/
<>	144:ef7eb2e8f9f7	473	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	144:ef7eb2e8f9f7	474
<>	144:ef7eb2e8f9f7	475	/**
<>	144:ef7eb2e8f9f7	476	* @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	477	* @retval None.
<>	144:ef7eb2e8f9f7	478	*/
<>	144:ef7eb2e8f9f7	479	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR \|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	480
<>	144:ef7eb2e8f9f7	481	/**
<>	144:ef7eb2e8f9f7	482	* @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	483	* @retval None.
<>	144:ef7eb2e8f9f7	484	*/
<>	144:ef7eb2e8f9f7	485	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	144:ef7eb2e8f9f7	486
<>	144:ef7eb2e8f9f7	487	/**
<>	144:ef7eb2e8f9f7	488	* @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	489	* @retval None.
<>	144:ef7eb2e8f9f7	490	*/
<>	144:ef7eb2e8f9f7	491	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR \|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	492
<>	144:ef7eb2e8f9f7	493	/**
<>	144:ef7eb2e8f9f7	494	* @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	495	* @retval None.
<>	144:ef7eb2e8f9f7	496	*/
<>	144:ef7eb2e8f9f7	497	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<>	144:ef7eb2e8f9f7	498
<>	144:ef7eb2e8f9f7	499	/**
<>	144:ef7eb2e8f9f7	500	* @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	501	* @retval None.
<>	144:ef7eb2e8f9f7	502	*/
<>	144:ef7eb2e8f9f7	503	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
<>	144:ef7eb2e8f9f7	504	__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
<>	144:ef7eb2e8f9f7	505	}while(0)
<>	144:ef7eb2e8f9f7	506
<>	144:ef7eb2e8f9f7	507	/**
<>	144:ef7eb2e8f9f7	508	* @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	509	* This parameter can be:
<>	144:ef7eb2e8f9f7	510	* @retval None.
<>	144:ef7eb2e8f9f7	511	*/
<>	144:ef7eb2e8f9f7	512	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
<>	144:ef7eb2e8f9f7	513	__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
<>	144:ef7eb2e8f9f7	514	}while(0)
<>	144:ef7eb2e8f9f7	515
<>	144:ef7eb2e8f9f7	516	/**
<>	144:ef7eb2e8f9f7	517	* @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not.
<>	144:ef7eb2e8f9f7	518	* @retval Line Status.
<>	144:ef7eb2e8f9f7	519	*/
<>	144:ef7eb2e8f9f7	520	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	521
<>	144:ef7eb2e8f9f7	522	/**
<>	144:ef7eb2e8f9f7	523	* @brief Clear the LPTIM Wake-up Timer associated Exti line flag.
<>	144:ef7eb2e8f9f7	524	* @retval None.
<>	144:ef7eb2e8f9f7	525	*/
<>	144:ef7eb2e8f9f7	526	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	527
<>	144:ef7eb2e8f9f7	528	/**
<>	144:ef7eb2e8f9f7	529	* @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line.
<>	144:ef7eb2e8f9f7	530	* @retval None.
<>	144:ef7eb2e8f9f7	531	*/
<>	144:ef7eb2e8f9f7	532	#define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<>	144:ef7eb2e8f9f7	533
<>	144:ef7eb2e8f9f7	534	/**
<>	144:ef7eb2e8f9f7	535	* @}
<>	144:ef7eb2e8f9f7	536	*/
<>	144:ef7eb2e8f9f7	537
<>	144:ef7eb2e8f9f7	538	/* Exported functions --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	539	/** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
<>	144:ef7eb2e8f9f7	540	* @{
<>	144:ef7eb2e8f9f7	541	*/
<>	144:ef7eb2e8f9f7	542
<>	144:ef7eb2e8f9f7	543	/* Initialization/de-initialization functions ********************************/
<>	144:ef7eb2e8f9f7	544	HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	545	HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	546
<>	144:ef7eb2e8f9f7	547	/* MSP functions *************************************************************/
<>	144:ef7eb2e8f9f7	548	void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	549	void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	550
<>	144:ef7eb2e8f9f7	551	/* Start/Stop operation functions *********************************************/
<>	144:ef7eb2e8f9f7	552	/* ################################# PWM Mode ################################*/
<>	144:ef7eb2e8f9f7	553	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	554	HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	555	HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	556	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	557	HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	558	HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	559
<>	144:ef7eb2e8f9f7	560	/* ############################# One Pulse Mode ##############################*/
<>	144:ef7eb2e8f9f7	561	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	562	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	563	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	564	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	565	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	566	HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	567
<>	144:ef7eb2e8f9f7	568	/* ############################## Set once Mode ##############################*/
<>	144:ef7eb2e8f9f7	569	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	570	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	571	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	572	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	573	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<>	144:ef7eb2e8f9f7	574	HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	575
<>	144:ef7eb2e8f9f7	576	/* ############################### Encoder Mode ##############################*/
<>	144:ef7eb2e8f9f7	577	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	578	HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<>	144:ef7eb2e8f9f7	579	HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	580	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	581	HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<>	144:ef7eb2e8f9f7	582	HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	583
<>	144:ef7eb2e8f9f7	584	/* ############################# Time out Mode ##############################*/
<>	144:ef7eb2e8f9f7	585	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	586	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	587	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	588	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	589	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
<>	144:ef7eb2e8f9f7	590	HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	591
<>	144:ef7eb2e8f9f7	592	/* ############################## Counter Mode ###############################*/
<>	144:ef7eb2e8f9f7	593	/* Blocking mode: Polling */
<>	144:ef7eb2e8f9f7	594	HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<>	144:ef7eb2e8f9f7	595	HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	596	/* Non-Blocking mode: Interrupt */
<>	144:ef7eb2e8f9f7	597	HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<>	144:ef7eb2e8f9f7	598	HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	599
<>	144:ef7eb2e8f9f7	600	/* Reading operation functions ************************************************/
<>	144:ef7eb2e8f9f7	601	uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	602	uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	603	uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	604
<>	144:ef7eb2e8f9f7	605	/* LPTIM IRQ functions *******************************************************/
<>	144:ef7eb2e8f9f7	606	void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	607
<>	144:ef7eb2e8f9f7	608	/* CallBack functions ********************************************************/
<>	144:ef7eb2e8f9f7	609	void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	610	void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	611	void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	612	void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	613	void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	614	void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	615	void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	616
<>	144:ef7eb2e8f9f7	617	/* Peripheral State functions ************************************************/
<>	144:ef7eb2e8f9f7	618	HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
<>	144:ef7eb2e8f9f7	619
<>	144:ef7eb2e8f9f7	620	/**
<>	144:ef7eb2e8f9f7	621	* @}
<>	144:ef7eb2e8f9f7	622	*/
<>	144:ef7eb2e8f9f7	623
<>	144:ef7eb2e8f9f7	624	/* Private types -------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	625	/** @defgroup LPTIM_Private_Types LPTIM Private Types
<>	144:ef7eb2e8f9f7	626	* @{
<>	144:ef7eb2e8f9f7	627	*/
<>	144:ef7eb2e8f9f7	628
<>	144:ef7eb2e8f9f7	629	/**
<>	144:ef7eb2e8f9f7	630	* @}
<>	144:ef7eb2e8f9f7	631	*/
<>	144:ef7eb2e8f9f7	632
<>	144:ef7eb2e8f9f7	633	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	634	/** @defgroup LPTIM_Private_Variables LPTIM Private Variables
<>	144:ef7eb2e8f9f7	635	* @{
<>	144:ef7eb2e8f9f7	636	*/
<>	144:ef7eb2e8f9f7	637
<>	144:ef7eb2e8f9f7	638	/**
<>	144:ef7eb2e8f9f7	639	* @}
<>	144:ef7eb2e8f9f7	640	*/
<>	144:ef7eb2e8f9f7	641
<>	144:ef7eb2e8f9f7	642	/* Private constants ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	643	/** @defgroup LPTIM_Private_Constants LPTIM Private Constants
<>	144:ef7eb2e8f9f7	644	* @{
<>	144:ef7eb2e8f9f7	645	*/
<>	144:ef7eb2e8f9f7	646
<>	144:ef7eb2e8f9f7	647	/**
<>	144:ef7eb2e8f9f7	648	* @}
<>	144:ef7eb2e8f9f7	649	*/
<>	144:ef7eb2e8f9f7	650
<>	144:ef7eb2e8f9f7	651	/* Private macros ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	652	/** @defgroup LPTIM_Private_Macros LPTIM Private Macros
<>	144:ef7eb2e8f9f7	653	* @{
<>	144:ef7eb2e8f9f7	654	*/
<>	144:ef7eb2e8f9f7	655
<>	144:ef7eb2e8f9f7	656	#define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) \|\| \
<>	144:ef7eb2e8f9f7	657	((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
<>	144:ef7eb2e8f9f7	658
<>	144:ef7eb2e8f9f7	659	#define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) \|\| \
<>	144:ef7eb2e8f9f7	660	((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) \|\| \
<>	144:ef7eb2e8f9f7	661	((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) \|\| \
<>	144:ef7eb2e8f9f7	662	((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) \|\| \
<>	144:ef7eb2e8f9f7	663	((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) \|\| \
<>	144:ef7eb2e8f9f7	664	((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) \|\| \
<>	144:ef7eb2e8f9f7	665	((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) \|\| \
<>	144:ef7eb2e8f9f7	666	((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
<>	144:ef7eb2e8f9f7	667	#define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
<>	144:ef7eb2e8f9f7	668
<>	144:ef7eb2e8f9f7	669	#define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) \|\| \
<>	144:ef7eb2e8f9f7	670	((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
<>	144:ef7eb2e8f9f7	671
<>	144:ef7eb2e8f9f7	672	#define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) \|\| \
<>	144:ef7eb2e8f9f7	673	((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) \|\| \
<>	144:ef7eb2e8f9f7	674	((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) \|\| \
<>	144:ef7eb2e8f9f7	675	((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
<>	144:ef7eb2e8f9f7	676
<>	144:ef7eb2e8f9f7	677	#define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) \|\| \
<>	144:ef7eb2e8f9f7	678	((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) \|\| \
<>	144:ef7eb2e8f9f7	679	((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
<>	144:ef7eb2e8f9f7	680
<>	144:ef7eb2e8f9f7	681	#define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) \|\| \
<>	144:ef7eb2e8f9f7	682	((__TRIG__) == LPTIM_TRIGSOURCE_0) \|\| \
<>	144:ef7eb2e8f9f7	683	((__TRIG__) == LPTIM_TRIGSOURCE_1) \|\| \
<>	144:ef7eb2e8f9f7	684	((__TRIG__) == LPTIM_TRIGSOURCE_2) \|\| \
<>	144:ef7eb2e8f9f7	685	((__TRIG__) == LPTIM_TRIGSOURCE_3) \|\| \
<>	144:ef7eb2e8f9f7	686	((__TRIG__) == LPTIM_TRIGSOURCE_4) \|\| \
<>	144:ef7eb2e8f9f7	687	((__TRIG__) == LPTIM_TRIGSOURCE_5))
<>	144:ef7eb2e8f9f7	688
<>	144:ef7eb2e8f9f7	689	#define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) \|\| \
<>	144:ef7eb2e8f9f7	690	((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) \|\| \
<>	144:ef7eb2e8f9f7	691	((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
<>	144:ef7eb2e8f9f7	692
<>	144:ef7eb2e8f9f7	693	#define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) \|\| \
<>	144:ef7eb2e8f9f7	694	((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) \|\| \
<>	144:ef7eb2e8f9f7	695	((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) \|\| \
<>	144:ef7eb2e8f9f7	696	((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
<>	144:ef7eb2e8f9f7	697
<>	144:ef7eb2e8f9f7	698	#define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) \|\| \
<>	144:ef7eb2e8f9f7	699	((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
<>	144:ef7eb2e8f9f7	700
<>	144:ef7eb2e8f9f7	701	#define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) \|\| \
<>	144:ef7eb2e8f9f7	702	((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
<>	144:ef7eb2e8f9f7	703
<>	144:ef7eb2e8f9f7	704	#define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU)
<>	144:ef7eb2e8f9f7	705
<>	144:ef7eb2e8f9f7	706	#define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU)
<>	144:ef7eb2e8f9f7	707
<>	144:ef7eb2e8f9f7	708	#define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFFU)
<>	144:ef7eb2e8f9f7	709
<>	144:ef7eb2e8f9f7	710	#define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFFU)
<>	144:ef7eb2e8f9f7	711
<>	144:ef7eb2e8f9f7	712	/**
<>	144:ef7eb2e8f9f7	713	* @}
<>	144:ef7eb2e8f9f7	714	*/
<>	144:ef7eb2e8f9f7	715
<>	144:ef7eb2e8f9f7	716	/* Private functions ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	717	/** @defgroup LPTIM_Private_Functions LPTIM Private Functions
<>	144:ef7eb2e8f9f7	718	* @{
<>	144:ef7eb2e8f9f7	719	*/
<>	144:ef7eb2e8f9f7	720
<>	144:ef7eb2e8f9f7	721	/**
<>	144:ef7eb2e8f9f7	722	* @}
<>	144:ef7eb2e8f9f7	723	*/
<>	144:ef7eb2e8f9f7	724
<>	144:ef7eb2e8f9f7	725	/**
<>	144:ef7eb2e8f9f7	726	* @}
<>	144:ef7eb2e8f9f7	727	*/
<>	144:ef7eb2e8f9f7	728
<>	144:ef7eb2e8f9f7	729	/**
<>	144:ef7eb2e8f9f7	730	* @}
<>	144:ef7eb2e8f9f7	731	*/
<>	144:ef7eb2e8f9f7	732
<>	144:ef7eb2e8f9f7	733	#ifdef __cplusplus
<>	144:ef7eb2e8f9f7	734	}
<>	144:ef7eb2e8f9f7	735	#endif
<>	144:ef7eb2e8f9f7	736
<>	144:ef7eb2e8f9f7	737	#endif /* __STM32F7xx_HAL_LPTIM_H */
<>	144:ef7eb2e8f9f7	738
<>	144:ef7eb2e8f9f7	739	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/