Bayley Wang / Mbed 2 deprecated foc-ed_in_the_bot_compact

robot

Dependencies:   FastPWM3 mbed

BREMS/BREMSConfig.cpp@206:5c848ea69028, 2018-02-14 (annotated)

Committer:
bwang
Date:
Wed Feb 14 01:33:47 2018 +0000
Revision:
206:5c848ea69028
Parent:
199:c160a2c03781
Child:
210:f9b722cf8a2c
02/13/2017 20:33 - set serial RX interrupt to be lower priority than commutation interrupt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 42:030e0ec4eac5 1 #include "mbed.h"
bwang 42:030e0ec4eac5 2
bwang 42:030e0ec4eac5 3 #include "BREMSConfig.h"
bwang 42:030e0ec4eac5 4 #include "BREMSStructs.h"
bwang 180:a783a972a867 5 #include "BufferedLogger.h"
bwang 181:d3510c8beab6 6 #include "CommandProcessor.h"
bwang 181:d3510c8beab6 7 #include "PreferenceWriter.h"
bwang 154:0a22dcf91577 8 #include "Filter.h"
bwang 42:030e0ec4eac5 9
bwang 196:7172e6e28867 10 #include "hardware.h"
bwang 185:5c102874b490 11 #include "derived.h"
bwang 181:d3510c8beab6 12 #include "prefs.h"
bwang 193:3abadeecf908 13 #include "errors.h"
bwang 181:d3510c8beab6 14
bwang 42:030e0ec4eac5 15 void BREMSConfigRegisters(IOStruct *io) {
bwang 42:030e0ec4eac5 16 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
bwang 42:030e0ec4eac5 17 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
bwang 42:030e0ec4eac5 18 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
bwang 42:030e0ec4eac5 19
bwang 42:030e0ec4eac5 20 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock
bwang 42:030e0ec4eac5 21
bwang 42:030e0ec4eac5 22 io->a = new FastPWM(PWMA);
bwang 42:030e0ec4eac5 23 io->b = new FastPWM(PWMB);
bwang 42:030e0ec4eac5 24 io->c = new FastPWM(PWMC);
bwang 42:030e0ec4eac5 25
bwang 42:030e0ec4eac5 26 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
bwang 42:030e0ec4eac5 27
bwang 42:030e0ec4eac5 28 TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt
bwang 91:f58472ac3fae 29 TIM1->CR1 = 0x00; //CMS = 10, interrupt only when counting up
bwang 42:030e0ec4eac5 30 TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on,
bwang 91:f58472ac3fae 31 TIM1->RCR |= 0x00; //update event once per up/down count of tim1
bwang 42:030e0ec4eac5 32 TIM1->EGR |= TIM_EGR_UG;
bwang 42:030e0ec4eac5 33
bwang 42:030e0ec4eac5 34 TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock
bwang 189:760cd81a7633 35 TIM1->ARR = (int) (2 * (float) 9e7 / _F_SW);
bwang 90:2ef53b1a22de 36 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
bwang 42:030e0ec4eac5 37 TIM1->CR1 |= TIM_CR1_CEN;
bwang 42:030e0ec4eac5 38
bwang 42:030e0ec4eac5 39 //ADC Setup
bwang 42:030e0ec4eac5 40 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
bwang 42:030e0ec4eac5 41 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
bwang 42:030e0ec4eac5 42
bwang 42:030e0ec4eac5 43 ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels
bwang 42:030e0ec4eac5 44
bwang 42:030e0ec4eac5 45 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on
bwang 42:030e0ec4eac5 46 ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0
bwang 42:030e0ec4eac5 47
bwang 42:030e0ec4eac5 48 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
bwang 42:030e0ec4eac5 49 ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1
bwang 42:030e0ec4eac5 50
bwang 42:030e0ec4eac5 51 GPIOA->MODER |= (1 << 8);
bwang 42:030e0ec4eac5 52 GPIOA->MODER |= (1 << 9);
bwang 42:030e0ec4eac5 53
bwang 42:030e0ec4eac5 54 GPIOA->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 55 GPIOA->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 56
bwang 42:030e0ec4eac5 57 GPIOA->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 58 GPIOA->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 59
bwang 42:030e0ec4eac5 60 GPIOB->MODER |= (1 << 0);
bwang 42:030e0ec4eac5 61 GPIOB->MODER |= (1 << 1);
bwang 42:030e0ec4eac5 62
bwang 42:030e0ec4eac5 63 GPIOC->MODER |= (1 << 2);
bwang 42:030e0ec4eac5 64 GPIOC->MODER |= (1 << 3);
bwang 42:030e0ec4eac5 65
bwang 42:030e0ec4eac5 66 //DAC setup
bwang 42:030e0ec4eac5 67 RCC->APB1ENR |= 0x20000000;
bwang 42:030e0ec4eac5 68 DAC->CR |= DAC_CR_EN2;
bwang 42:030e0ec4eac5 69
bwang 42:030e0ec4eac5 70 GPIOA->MODER |= (1 << 10);
bwang 42:030e0ec4eac5 71 GPIOA->MODER |= (1 << 11);
bwang 47:1c9868e226d0 72
bwang 47:1c9868e226d0 73 set_dtc(io->a, 0.0f);
bwang 47:1c9868e226d0 74 set_dtc(io->b, 0.0f);
bwang 47:1c9868e226d0 75 set_dtc(io->c, 0.0f);
bwang 42:030e0ec4eac5 76 }
bwang 42:030e0ec4eac5 77
bwang 42:030e0ec4eac5 78 void BREMSZeroCurrent(ReadDataStruct *read) {
bwang 42:030e0ec4eac5 79 for (int i = 0; i < 1000; i++){
bwang 42:030e0ec4eac5 80 read->ia_supp_offset += (float) (ADC1->DR);
bwang 42:030e0ec4eac5 81 read->ib_supp_offset += (float) (ADC2->DR);
bwang 42:030e0ec4eac5 82 ADC1->CR2 |= 0x40000000;
bwang 42:030e0ec4eac5 83 wait_us(100);
bwang 42:030e0ec4eac5 84 }
bwang 42:030e0ec4eac5 85 read->ia_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 86 read->ib_supp_offset /= 1000.0f;
bwang 42:030e0ec4eac5 87 read->ia_supp_offset = read->ia_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 88 read->ib_supp_offset = read->ib_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 42:030e0ec4eac5 89 }
bwang 42:030e0ec4eac5 90
bwang 42:030e0ec4eac5 91 void BREMSStartupMsg(ReadDataStruct *read, Serial *pc) {
bwang 181:d3510c8beab6 92 pc->printf("%s\n", "FOC'ed in the Bot Rev A.");
bwang 42:030e0ec4eac5 93 }
bwang 42:030e0ec4eac5 94
bwang 165:2463dbe52eee 95 void BREMSInit(IOStruct *io, ReadDataStruct *read, FOCStruct *foc, ControlStruct *control, bool tune) {
bwang 42:030e0ec4eac5 96 io->en = new DigitalOut(EN);
bwang 42:030e0ec4eac5 97 io->en->write(0);
bwang 42:030e0ec4eac5 98
bwang 42:030e0ec4eac5 99 io->pc = new Serial(USBTX, USBRX);
bwang 181:d3510c8beab6 100 io->pc->baud(115200);
bwang 206:5c848ea69028 101 NVIC_SetPriority(USART2_IRQn, 2);
bwang 165:2463dbe52eee 102
bwang 193:3abadeecf908 103 init_masks();
bwang 193:3abadeecf908 104
bwang 181:d3510c8beab6 105 BREMSStartupMsg(read, io->pc);
bwang 199:c160a2c03781 106
bwang 199:c160a2c03781 107 BREMS_mode = MODE_CFG;
bwang 188:43f50a4cc040 108 io->pref = new PreferenceWriter(6);
bwang 181:d3510c8beab6 109 cmd_reload(io->pc, io->pref);
bwang 182:5ed20e4ce158 110 if (_PREFS_VALID != 1) {
bwang 181:d3510c8beab6 111 io->pc->printf("%s\n", "Stored config invalid");
bwang 199:c160a2c03781 112 BREMS_mode = MODE_CFG;
bwang 181:d3510c8beab6 113 cmd_defaults(io->pc);
bwang 181:d3510c8beab6 114 io->pc->printf("%s\n", "You should probably at least set throttle and current limits!");
bwang 181:d3510c8beab6 115 }
bwang 188:43f50a4cc040 116
bwang 197:68fd01b73537 117 wait_ms(750);
bwang 197:68fd01b73537 118
bwang 189:760cd81a7633 119 io->pos = new PositionSensorEncoder(_CPR, 0);
bwang 189:760cd81a7633 120 io->logger = new BufferedLogger(_LOG_PACKET_SIZE, (_LOG_PAGE_SIZE-_LOG_HEADER_SIZE)/(_LOG_PACKET_SIZE+1), LOG_TX, LOG_RX, _LOG_BAUD_RATE);
bwang 197:68fd01b73537 121
bwang 189:760cd81a7633 122 io->throttle_in = new PwmIn(TH_PIN, _TH_LIMIT_LOW, _TH_LIMIT_HIGH);
bwang 42:030e0ec4eac5 123
bwang 189:760cd81a7633 124 control->throttle_filter = new MedianFilter(_THROTTLE_FILTER_WINDOW);
bwang 189:760cd81a7633 125 control->velocity_filter = new MedianFilter(_W_FILTER_WINDOW);
bwang 154:0a22dcf91577 126
bwang 189:760cd81a7633 127 read->vbus = _BUS_VOLTAGE;
bwang 42:030e0ec4eac5 128 read->w = 0.0f;
bwang 42:030e0ec4eac5 129 read->ia_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 130 read->ib_supp_offset = 0.0f;
bwang 42:030e0ec4eac5 131 read->p_mech = io->pos->GetMechPosition();
bwang 42:030e0ec4eac5 132
bwang 52:fd3d8df99287 133 BREMSConfigRegisters(io);
bwang 52:fd3d8df99287 134 wait_ms(250);
bwang 52:fd3d8df99287 135 BREMSZeroCurrent(read);
bwang 181:d3510c8beab6 136 io->pc->printf("%s", ">");
bwang 52:fd3d8df99287 137
bwang 42:030e0ec4eac5 138 control->d_integral = 0.0f;
bwang 42:030e0ec4eac5 139 control->q_integral = 0.0f;
bwang 42:030e0ec4eac5 140 control->d_filtered = 0.0f;
bwang 42:030e0ec4eac5 141 control->q_filtered = 0.0f;
bwang 42:030e0ec4eac5 142 control->last_d = 0.0f;
bwang 42:030e0ec4eac5 143 control->last_q = 0.0f;
bwang 42:030e0ec4eac5 144 control->d_ref = 0.0f;
bwang 42:030e0ec4eac5 145 control->q_ref = 0.0f;
bwang 70:5e39beeb4a21 146 control->torque_percent = 0.0f;
bwang 187:523cf8c962e4 147 control->enabled = false;
bwang 46:748aba7d111d 148
bwang 42:030e0ec4eac5 149 io->en->write(1);
bwang 42:030e0ec4eac5 150 }