Replacement for regular GPIO (DigitalIn, DigitalOut, DigitalInOut) classes which has superior speed.
Fork of FastIO by
Devices/FastIO_STM32L073XX.h@23:23a43a288e2c, 2018-04-17 (annotated)
- Committer:
- amateusz
- Date:
- Tue Apr 17 13:28:24 2018 +0000
- Revision:
- 23:23a43a288e2c
- Parent:
- 21:a1dfa6c65400
Added support for STM32L1xx (checked on Nucleo L152). I'm done this solely cross referenced existing STM32 target files with L152 reference manual.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
viquiram | 21:a1dfa6c65400 | 1 | #if defined(STM32L073xx) |
viquiram | 21:a1dfa6c65400 | 2 | |
viquiram | 21:a1dfa6c65400 | 3 | #include "mbed.h" |
viquiram | 21:a1dfa6c65400 | 4 | #include "pinmap.h" |
viquiram | 21:a1dfa6c65400 | 5 | |
viquiram | 21:a1dfa6c65400 | 6 | typedef struct { |
viquiram | 21:a1dfa6c65400 | 7 | uint32_t mask; |
viquiram | 21:a1dfa6c65400 | 8 | } fastio_vars; |
viquiram | 21:a1dfa6c65400 | 9 | |
viquiram | 21:a1dfa6c65400 | 10 | #define PINMASK (1 << STM_PIN(pin)) |
viquiram | 21:a1dfa6c65400 | 11 | #define PORT ((GPIO_TypeDef *)(GPIOA_BASE + 0x0400 * STM_PORT(pin))) |
viquiram | 21:a1dfa6c65400 | 12 | |
amateusz | 23:23a43a288e2c | 13 | |
viquiram | 21:a1dfa6c65400 | 14 | #define INIT_PIN RCC->IOPENR |= (1 << STM_PORT(pin)); (PORT->MODER &= ~(GPIO_MODER_MODE0_1 << (STM_PIN(pin) * 2))); container.mask = PINMASK |
viquiram | 21:a1dfa6c65400 | 15 | #define DESTROY_PIN |
viquiram | 21:a1dfa6c65400 | 16 | |
viquiram | 21:a1dfa6c65400 | 17 | #define SET_DIR_INPUT (PORT->MODER &= ~(GPIO_MODER_MODE0_0 << (STM_PIN(pin) * 2))) |
viquiram | 21:a1dfa6c65400 | 18 | #define SET_DIR_OUTPUT (PORT->MODER |= (GPIO_MODER_MODE0_0 << (STM_PIN(pin) * 2))) |
viquiram | 21:a1dfa6c65400 | 19 | #define SET_MODE(pull) pin_mode(pin, pull); |
viquiram | 21:a1dfa6c65400 | 20 | |
viquiram | 21:a1dfa6c65400 | 21 | #define WRITE_PIN_SET (PORT->BSRR = PINMASK) |
viquiram | 21:a1dfa6c65400 | 22 | #define WRITE_PIN_CLR (PORT->BRR = PINMASK) |
viquiram | 21:a1dfa6c65400 | 23 | |
viquiram | 21:a1dfa6c65400 | 24 | #define READ_PIN ((PORT->IDR & container.mask) ? 1 : 0) |
viquiram | 21:a1dfa6c65400 | 25 | |
viquiram | 21:a1dfa6c65400 | 26 | #endif |