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L4 HAL Drivers

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PLLSAI2
Functions

PLLSAI2
[RCC Exported Functions]

Functions

__STATIC_INLINE void LL_RCC_PLLSAI2_Enable (void)
 Enable PLLSAI2 CR PLLSAI2ON LL_RCC_PLLSAI2_Enable.
__STATIC_INLINE void LL_RCC_PLLSAI2_Disable (void)
 Disable PLLSAI2 CR PLLSAI2ON LL_RCC_PLLSAI2_Disable.
__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_IsReady (void)
 Check if PLLSAI2 Ready CR PLLSAI2RDY LL_RCC_PLLSAI2_IsReady.
__STATIC_INLINE void LL_RCC_PLLSAI2_ConfigDomain_SAI (uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP)
 Configure PLLSAI2 used for SAI domain clock.
__STATIC_INLINE void LL_RCC_PLLSAI2_ConfigDomain_ADC (uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR)
 Configure PLLSAI2 used for ADC domain clock.
__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetN (void)
 Get SAI2PLL multiplication factor for VCO PLLSAI2CFGR PLLSAI2N LL_RCC_PLLSAI2_GetN.
__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetP (void)
 Get SAI2PLL division factor for PLLSAI2P.
__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetR (void)
 Get SAI2PLL division factor for PLLSAI2R.
__STATIC_INLINE void LL_RCC_PLLSAI2_EnableDomain_SAI (void)
 Enable PLLSAI2 output mapped on SAI domain clock PLLSAI2CFGR PLLSAI2PEN LL_RCC_PLLSAI2_EnableDomain_SAI.
__STATIC_INLINE void LL_RCC_PLLSAI2_DisableDomain_SAI (void)
 Disable PLLSAI2 output mapped on SAI domain clock.
__STATIC_INLINE void LL_RCC_PLLSAI2_EnableDomain_ADC (void)
 Enable PLLSAI2 output mapped on ADC domain clock PLLSAI2CFGR PLLSAI2REN LL_RCC_PLLSAI2_EnableDomain_ADC.
__STATIC_INLINE void LL_RCC_PLLSAI2_DisableDomain_ADC (void)
 Disable PLLSAI2 output mapped on ADC domain clock.

Function Documentation

__STATIC_INLINE void LL_RCC_PLLSAI2_ConfigDomain_ADC ( uint32_t  Source,
uint32_t  PLLM,
uint32_t  PLLN,
uint32_t  PLLR 
)

Configure PLLSAI2 used for ADC domain clock.

Note:
PLL Source and PLLM Divider can be written only when PLL, PLLSAI2 and PLLSAI2 are disabled
PLLN/PLLR can be written only when PLLSAI2 is disabled
This can be selected for ADC PLLCFGR PLLSRC LL_RCC_PLLSAI2_ConfigDomain_ADC
PLLCFGR PLLM LL_RCC_PLLSAI2_ConfigDomain_ADC
PLLSAI2CFGR PLLSAI2N LL_RCC_PLLSAI2_ConfigDomain_ADC
PLLSAI2CFGR PLLSAI2R LL_RCC_PLLSAI2_ConfigDomain_ADC
Parameters:
SourceThis parameter can be one of the following values:

  • LL_RCC_PLLSOURCE_NONE
  • LL_RCC_PLLSOURCE_MSI
  • LL_RCC_PLLSOURCE_HSI
  • LL_RCC_PLLSOURCE_HSE
PLLMThis parameter can be one of the following values:

  • LL_RCC_PLLM_DIV_1
  • LL_RCC_PLLM_DIV_2
  • LL_RCC_PLLM_DIV_3
  • LL_RCC_PLLM_DIV_4
  • LL_RCC_PLLM_DIV_5
  • LL_RCC_PLLM_DIV_6
  • LL_RCC_PLLM_DIV_7
  • LL_RCC_PLLM_DIV_8
PLLNBetween 8 and 86
PLLRThis parameter can be one of the following values:

  • LL_RCC_PLLSAI2R_DIV2
  • LL_RCC_PLLSAI2R_DIV4
  • LL_RCC_PLLSAI2R_DIV6
  • LL_RCC_PLLSAI2R_DIV8
Return values:
None

Definition at line 2823 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_ConfigDomain_SAI ( uint32_t  Source,
uint32_t  PLLM,
uint32_t  PLLN,
uint32_t  PLLP 
)

Configure PLLSAI2 used for SAI domain clock.

Note:
PLL Source and PLLM Divider can be written only when PLL, PLLSAI2 and PLLSAI2 are disabled
PLLN/PLLP can be written only when PLLSAI2 is disabled
This can be selected for SAI1 or SAI2 PLLCFGR PLLSRC LL_RCC_PLLSAI2_ConfigDomain_SAI
PLLCFGR PLLM LL_RCC_PLLSAI2_ConfigDomain_SAI
PLLSAI2CFGR PLLSAI2N LL_RCC_PLLSAI2_ConfigDomain_SAI
PLLSAI2CFGR PLLSAI2P LL_RCC_PLLSAI2_ConfigDomain_SAI
Parameters:
SourceThis parameter can be one of the following values:

  • LL_RCC_PLLSOURCE_NONE
  • LL_RCC_PLLSOURCE_MSI
  • LL_RCC_PLLSOURCE_HSI
  • LL_RCC_PLLSOURCE_HSE
PLLMThis parameter can be one of the following values:

  • LL_RCC_PLLM_DIV_1
  • LL_RCC_PLLM_DIV_2
  • LL_RCC_PLLM_DIV_3
  • LL_RCC_PLLM_DIV_4
  • LL_RCC_PLLM_DIV_5
  • LL_RCC_PLLM_DIV_6
  • LL_RCC_PLLM_DIV_7
  • LL_RCC_PLLM_DIV_8
PLLNBetween 8 and 86
PLLPThis parameter can be one of the following values:

  • LL_RCC_PLLSAI2P_DIV7
  • LL_RCC_PLLSAI2P_DIV17
Return values:
None

Definition at line 2785 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_Disable ( void   )

Disable PLLSAI2 CR PLLSAI2ON LL_RCC_PLLSAI2_Disable.

Return values:
None

Definition at line 2740 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_DisableDomain_ADC ( void   )

Disable PLLSAI2 output mapped on ADC domain clock.

Note:
In order to save power, when of the PLLSAI2 is not used, Main PLLSAI2 should be 0 PLLSAI2CFGR PLLSAI2REN LL_RCC_PLLSAI2_DisableDomain_ADC
Return values:
None

Definition at line 2906 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_DisableDomain_SAI ( void   )

Disable PLLSAI2 output mapped on SAI domain clock.

Note:
In order to save power, when of the PLLSAI2 is not used, should be 0 PLLSAI2CFGR PLLSAI2PEN LL_RCC_PLLSAI2_DisableDomain_SAI
Return values:
None

Definition at line 2884 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_Enable ( void   )

Enable PLLSAI2 CR PLLSAI2ON LL_RCC_PLLSAI2_Enable.

Return values:
None

Definition at line 2730 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_EnableDomain_ADC ( void   )

Enable PLLSAI2 output mapped on ADC domain clock PLLSAI2CFGR PLLSAI2REN LL_RCC_PLLSAI2_EnableDomain_ADC.

Return values:
None

Definition at line 2894 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLLSAI2_EnableDomain_SAI ( void   )

Enable PLLSAI2 output mapped on SAI domain clock PLLSAI2CFGR PLLSAI2PEN LL_RCC_PLLSAI2_EnableDomain_SAI.

Return values:
None

Definition at line 2872 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetN ( void   )

Get SAI2PLL multiplication factor for VCO PLLSAI2CFGR PLLSAI2N LL_RCC_PLLSAI2_GetN.

Return values:
Between8 and 86

Definition at line 2834 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetP ( void   )

Get SAI2PLL division factor for PLLSAI2P.

Note:
used for PLLSAI2CLK (SAI1 or SAI2 clock). PLLSAI2CFGR PLLSAI2P LL_RCC_PLLSAI2_GetP
Return values:
Returnedvalue can be one of the following values:

  • LL_RCC_PLLSAI2P_DIV7
  • LL_RCC_PLLSAI2P_DIV17

Definition at line 2847 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_GetR ( void   )

Get SAI2PLL division factor for PLLSAI2R.

Note:
used for PLLADC2CLK (ADC clock) PLLSAI2CFGR PLLSAI2R LL_RCC_PLLSAI2_GetR
Return values:
Returnedvalue can be one of the following values:

  • LL_RCC_PLLSAI2R_DIV2
  • LL_RCC_PLLSAI2R_DIV4
  • LL_RCC_PLLSAI2R_DIV6
  • LL_RCC_PLLSAI2R_DIV8

Definition at line 2862 of file stm32l4xx_ll_rcc.h.

__STATIC_INLINE uint32_t LL_RCC_PLLSAI2_IsReady ( void   )

Check if PLLSAI2 Ready CR PLLSAI2RDY LL_RCC_PLLSAI2_IsReady.

Return values:
Stateof bit (1 or 0).

Definition at line 2750 of file stm32l4xx_ll_rcc.h.

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