雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

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SPISlave.h@43:e2ed12d17f06, 2012-10-26 (annotated)

Committer:
emilmont
Date:
Fri Oct 26 17:40:46 2012 +0100
Revision:
43:e2ed12d17f06
Parent:
27:7110ebee3484
Child:
44:24d45a770a51
Update documentation

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 27:7110ebee3484 1 /* mbed Microcontroller Library - SPISlave
emilmont 27:7110ebee3484 2 * Copyright (c) 2010-2011 ARM Limited. All rights reserved.
simon 20:029aa53d7323 3 */
simon 20:029aa53d7323 4
simon 20:029aa53d7323 5 #ifndef MBED_SPISLAVE_H
simon 20:029aa53d7323 6 #define MBED_SPISLAVE_H
simon 20:029aa53d7323 7
emilmont 27:7110ebee3484 8 #include "device.h"
emilmont 27:7110ebee3484 9
emilmont 27:7110ebee3484 10 #if DEVICE_SPISLAVE
emilmont 27:7110ebee3484 11
simon 20:029aa53d7323 12 #include "platform.h"
simon 20:029aa53d7323 13 #include "PinNames.h"
simon 20:029aa53d7323 14 #include "PeripheralNames.h"
simon 20:029aa53d7323 15 #include "Base.h"
simon 20:029aa53d7323 16
simon 20:029aa53d7323 17 namespace mbed {
simon 20:029aa53d7323 18
emilmont 43:e2ed12d17f06 19 /** A SPI slave, used for communicating with a SPI Master device
simon 20:029aa53d7323 20 *
emilmont 43:e2ed12d17f06 21 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
simon 20:029aa53d7323 22 *
simon 20:029aa53d7323 23 * Example:
emilmont 43:e2ed12d17f06 24 * @code
emilmont 43:e2ed12d17f06 25 * // Reply to a SPI master as slave
emilmont 43:e2ed12d17f06 26 *
emilmont 43:e2ed12d17f06 27 * #include "mbed.h"
emilmont 43:e2ed12d17f06 28 *
emilmont 43:e2ed12d17f06 29 * SPISlave device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
emilmont 43:e2ed12d17f06 30 *
emilmont 43:e2ed12d17f06 31 * int main() {
emilmont 43:e2ed12d17f06 32 * device.reply(0x00); // Prime SPI with first reply
emilmont 43:e2ed12d17f06 33 * while(1) {
emilmont 43:e2ed12d17f06 34 * if(device.receive()) {
emilmont 43:e2ed12d17f06 35 * int v = device.read(); // Read byte from master
emilmont 43:e2ed12d17f06 36 * v = (v + 1) % 0x100; // Add one to it, modulo 256
emilmont 43:e2ed12d17f06 37 * device.reply(v); // Make this the next reply
emilmont 43:e2ed12d17f06 38 * }
emilmont 43:e2ed12d17f06 39 * }
emilmont 43:e2ed12d17f06 40 * }
emilmont 43:e2ed12d17f06 41 * @endcode
simon 20:029aa53d7323 42 */
simon 20:029aa53d7323 43 class SPISlave : public Base {
simon 20:029aa53d7323 44
simon 20:029aa53d7323 45 public:
simon 20:029aa53d7323 46
emilmont 43:e2ed12d17f06 47 /** Create a SPI slave connected to the specified pins
simon 20:029aa53d7323 48 *
emilmont 43:e2ed12d17f06 49 * Pin Options:
simon 20:029aa53d7323 50 * (5, 6, 7i, 8) or (11, 12, 13, 14)
simon 20:029aa53d7323 51 *
simon 20:029aa53d7323 52 * mosi or miso can be specfied as NC if not used
emilmont 43:e2ed12d17f06 53 *
emilmont 43:e2ed12d17f06 54 * @param mosi SPI Master Out, Slave In pin
emilmont 43:e2ed12d17f06 55 * @param miso SPI Master In, Slave Out pin
emilmont 43:e2ed12d17f06 56 * @param sclk SPI Clock pin
emilmont 43:e2ed12d17f06 57 * @param ssel SPI chip select pin
emilmont 43:e2ed12d17f06 58 * @param name (optional) A string to identify the object
simon 20:029aa53d7323 59 */
simon 20:029aa53d7323 60 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel,
simon 20:029aa53d7323 61 const char *name = NULL);
simon 20:029aa53d7323 62
emilmont 43:e2ed12d17f06 63 /** Configure the data transmission format
simon 20:029aa53d7323 64 *
emilmont 43:e2ed12d17f06 65 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 43:e2ed12d17f06 66 * @param mode Clock polarity and phase mode (0 - 3)
simon 20:029aa53d7323 67 *
emilmont 43:e2ed12d17f06 68 * @code
emilmont 43:e2ed12d17f06 69 * mode | POL PHA
emilmont 43:e2ed12d17f06 70 * -----+--------
emilmont 43:e2ed12d17f06 71 * 0 | 0 0
emilmont 43:e2ed12d17f06 72 * 1 | 0 1
emilmont 43:e2ed12d17f06 73 * 2 | 1 0
emilmont 43:e2ed12d17f06 74 * 3 | 1 1
emilmont 43:e2ed12d17f06 75 * @endcode
simon 20:029aa53d7323 76 */
simon 20:029aa53d7323 77 void format(int bits, int mode = 0);
simon 20:029aa53d7323 78
emilmont 43:e2ed12d17f06 79 /** Set the spi bus clock frequency
simon 20:029aa53d7323 80 *
emilmont 43:e2ed12d17f06 81 * @param hz SCLK frequency in hz (default = 1MHz)
simon 20:029aa53d7323 82 */
simon 20:029aa53d7323 83 void frequency(int hz = 1000000);
simon 20:029aa53d7323 84
emilmont 43:e2ed12d17f06 85 /** Polls the SPI to see if data has been received
simon 20:029aa53d7323 86 *
emilmont 43:e2ed12d17f06 87 * @returns
emilmont 43:e2ed12d17f06 88 * 0 if no data,
emilmont 43:e2ed12d17f06 89 * 1 otherwise
simon 20:029aa53d7323 90 */
simon 20:029aa53d7323 91 int receive(void);
simon 20:029aa53d7323 92
emilmont 43:e2ed12d17f06 93 /** Retrieve data from receive buffer as slave
simon 20:029aa53d7323 94 *
emilmont 43:e2ed12d17f06 95 * @returns
emilmont 43:e2ed12d17f06 96 * the data in the receive buffer
simon 20:029aa53d7323 97 */
simon 20:029aa53d7323 98 int read(void);
simon 20:029aa53d7323 99
emilmont 43:e2ed12d17f06 100 /** Fill the transmission buffer with the value to be written out
simon 20:029aa53d7323 101 * as slave on the next received message from the master.
simon 20:029aa53d7323 102 *
emilmont 43:e2ed12d17f06 103 * @param value the data to be transmitted next
simon 20:029aa53d7323 104 */
simon 20:029aa53d7323 105 void reply(int value);
simon 20:029aa53d7323 106
simon 20:029aa53d7323 107 protected:
simon 20:029aa53d7323 108
emilmont 43:e2ed12d17f06 109 SPIName _spi;
emilmont 43:e2ed12d17f06 110
simon 20:029aa53d7323 111 int _bits;
simon 20:029aa53d7323 112 int _mode;
simon 20:029aa53d7323 113 int _hz;
simon 20:029aa53d7323 114
simon 20:029aa53d7323 115 };
simon 20:029aa53d7323 116
simon 20:029aa53d7323 117 } // namespace mbed
simon 20:029aa53d7323 118
simon 20:029aa53d7323 119 #endif
emilmont 27:7110ebee3484 120
emilmont 27:7110ebee3484 121 #endif