雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

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TARGET_NUCLEO_F103RB/stm32f1xx_hal_nor.h@96:487b796308b0, 2015-03-17 (annotated)

Committer:
Kojto
Date:
Tue Mar 17 14:27:45 2015 +0000
Revision:
96:487b796308b0
Release 96 of the mbed library



Changes:

- IAR support for ble boards, lpc, ethernet stack

- RTC - attach function to redirect time functions

- Nucleo F103RB - cube driver

- k20xx - fixes for teensy and k20 platforms in sleep/deepsleep and usb

- STM32L0, Nucleo/Disco L053 - refactoring

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 96:487b796308b0 1 /**
Kojto 96:487b796308b0 2 ******************************************************************************
Kojto 96:487b796308b0 3 * @file stm32f1xx_hal_nor.h
Kojto 96:487b796308b0 4 * @author MCD Application Team
Kojto 96:487b796308b0 5 * @version V1.0.0
Kojto 96:487b796308b0 6 * @date 15-December-2014
Kojto 96:487b796308b0 7 * @brief Header file of NOR HAL module.
Kojto 96:487b796308b0 8 ******************************************************************************
Kojto 96:487b796308b0 9 * @attention
Kojto 96:487b796308b0 10 *
Kojto 96:487b796308b0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 96:487b796308b0 12 *
Kojto 96:487b796308b0 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 96:487b796308b0 14 * are permitted provided that the following conditions are met:
Kojto 96:487b796308b0 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 96:487b796308b0 16 * this list of conditions and the following disclaimer.
Kojto 96:487b796308b0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 96:487b796308b0 18 * this list of conditions and the following disclaimer in the documentation
Kojto 96:487b796308b0 19 * and/or other materials provided with the distribution.
Kojto 96:487b796308b0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 96:487b796308b0 21 * may be used to endorse or promote products derived from this software
Kojto 96:487b796308b0 22 * without specific prior written permission.
Kojto 96:487b796308b0 23 *
Kojto 96:487b796308b0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 96:487b796308b0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 96:487b796308b0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 96:487b796308b0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 96:487b796308b0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 96:487b796308b0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 96:487b796308b0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 96:487b796308b0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 96:487b796308b0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 96:487b796308b0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 96:487b796308b0 34 *
Kojto 96:487b796308b0 35 ******************************************************************************
Kojto 96:487b796308b0 36 */
Kojto 96:487b796308b0 37
Kojto 96:487b796308b0 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 96:487b796308b0 39 #ifndef __STM32F1xx_HAL_NOR_H
Kojto 96:487b796308b0 40 #define __STM32F1xx_HAL_NOR_H
Kojto 96:487b796308b0 41
Kojto 96:487b796308b0 42 #ifdef __cplusplus
Kojto 96:487b796308b0 43 extern "C" {
Kojto 96:487b796308b0 44 #endif
Kojto 96:487b796308b0 45
Kojto 96:487b796308b0 46 /* Includes ------------------------------------------------------------------*/
Kojto 96:487b796308b0 47 #include "stm32f1xx_ll_fsmc.h"
Kojto 96:487b796308b0 48
Kojto 96:487b796308b0 49 /** @addtogroup STM32F1xx_HAL_Driver
Kojto 96:487b796308b0 50 * @{
Kojto 96:487b796308b0 51 */
Kojto 96:487b796308b0 52
Kojto 96:487b796308b0 53 #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
Kojto 96:487b796308b0 54 /** @addtogroup NOR
Kojto 96:487b796308b0 55 * @{
Kojto 96:487b796308b0 56 */
Kojto 96:487b796308b0 57
Kojto 96:487b796308b0 58 /** @addtogroup NOR_Private_Constants
Kojto 96:487b796308b0 59 * @{
Kojto 96:487b796308b0 60 */
Kojto 96:487b796308b0 61
Kojto 96:487b796308b0 62 /* NOR device IDs addresses */
Kojto 96:487b796308b0 63 #define MC_ADDRESS ((uint16_t)0x0000)
Kojto 96:487b796308b0 64 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
Kojto 96:487b796308b0 65 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
Kojto 96:487b796308b0 66 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
Kojto 96:487b796308b0 67
Kojto 96:487b796308b0 68 /* NOR CFI IDs addresses */
Kojto 96:487b796308b0 69 #define CFI1_ADDRESS ((uint16_t)0x10)
Kojto 96:487b796308b0 70 #define CFI2_ADDRESS ((uint16_t)0x11)
Kojto 96:487b796308b0 71 #define CFI3_ADDRESS ((uint16_t)0x12)
Kojto 96:487b796308b0 72 #define CFI4_ADDRESS ((uint16_t)0x13)
Kojto 96:487b796308b0 73
Kojto 96:487b796308b0 74 /* NOR operation wait timeout */
Kojto 96:487b796308b0 75 #define NOR_TMEOUT ((uint16_t)0xFFFF)
Kojto 96:487b796308b0 76
Kojto 96:487b796308b0 77 /* NOR memory data width */
Kojto 96:487b796308b0 78 #define NOR_MEMORY_8B ((uint8_t)0x0)
Kojto 96:487b796308b0 79 #define NOR_MEMORY_16B ((uint8_t)0x1)
Kojto 96:487b796308b0 80
Kojto 96:487b796308b0 81 /* NOR memory device read/write start address */
Kojto 96:487b796308b0 82 #define NOR_MEMORY_ADRESS1 FSMC_BANK1_1
Kojto 96:487b796308b0 83 #define NOR_MEMORY_ADRESS2 FSMC_BANK1_2
Kojto 96:487b796308b0 84 #define NOR_MEMORY_ADRESS3 FSMC_BANK1_3
Kojto 96:487b796308b0 85 #define NOR_MEMORY_ADRESS4 FSMC_BANK1_4
Kojto 96:487b796308b0 86
Kojto 96:487b796308b0 87 /**
Kojto 96:487b796308b0 88 * @}
Kojto 96:487b796308b0 89 */
Kojto 96:487b796308b0 90
Kojto 96:487b796308b0 91 /** @addtogroup NOR_Private_Macros
Kojto 96:487b796308b0 92 * @{
Kojto 96:487b796308b0 93 */
Kojto 96:487b796308b0 94
Kojto 96:487b796308b0 95 /**
Kojto 96:487b796308b0 96 * @brief NOR memory address shifting.
Kojto 96:487b796308b0 97 * @param __NOR_ADDRESS: NOR base address
Kojto 96:487b796308b0 98 * @param __NOR_MEMORY_WIDTH_: NOR memory width
Kojto 96:487b796308b0 99 * @param __ADDRESS__: NOR memory address
Kojto 96:487b796308b0 100 * @retval NOR shifted address value
Kojto 96:487b796308b0 101 */
Kojto 96:487b796308b0 102 #define __NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
Kojto 96:487b796308b0 103 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
Kojto 96:487b796308b0 104 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
Kojto 96:487b796308b0 105 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
Kojto 96:487b796308b0 106
Kojto 96:487b796308b0 107 /**
Kojto 96:487b796308b0 108 * @brief NOR memory write data to specified address.
Kojto 96:487b796308b0 109 * @param __ADDRESS__: NOR memory address
Kojto 96:487b796308b0 110 * @param __DATA__: Data to write
Kojto 96:487b796308b0 111 * @retval None
Kojto 96:487b796308b0 112 */
Kojto 96:487b796308b0 113 #define __NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
Kojto 96:487b796308b0 114
Kojto 96:487b796308b0 115 /**
Kojto 96:487b796308b0 116 * @}
Kojto 96:487b796308b0 117 */
Kojto 96:487b796308b0 118
Kojto 96:487b796308b0 119 /* Exported typedef ----------------------------------------------------------*/
Kojto 96:487b796308b0 120 /** @defgroup NOR_Exported_Types NOR Exported Types
Kojto 96:487b796308b0 121 * @{
Kojto 96:487b796308b0 122 */
Kojto 96:487b796308b0 123
Kojto 96:487b796308b0 124 /**
Kojto 96:487b796308b0 125 * @brief HAL SRAM State structures definition
Kojto 96:487b796308b0 126 */
Kojto 96:487b796308b0 127 typedef enum
Kojto 96:487b796308b0 128 {
Kojto 96:487b796308b0 129 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
Kojto 96:487b796308b0 130 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
Kojto 96:487b796308b0 131 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
Kojto 96:487b796308b0 132 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
Kojto 96:487b796308b0 133 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
Kojto 96:487b796308b0 134 }HAL_NOR_StateTypeDef;
Kojto 96:487b796308b0 135
Kojto 96:487b796308b0 136 /**
Kojto 96:487b796308b0 137 * @brief FSMC NOR Status typedef
Kojto 96:487b796308b0 138 */
Kojto 96:487b796308b0 139 typedef enum
Kojto 96:487b796308b0 140 {
Kojto 96:487b796308b0 141 HAL_NOR_STATUS_SUCCESS = 0,
Kojto 96:487b796308b0 142 HAL_NOR_STATUS_ONGOING,
Kojto 96:487b796308b0 143 HAL_NOR_STATUS_ERROR,
Kojto 96:487b796308b0 144 HAL_NOR_STATUS_TIMEOUT
Kojto 96:487b796308b0 145 }HAL_NOR_StatusTypeDef;
Kojto 96:487b796308b0 146
Kojto 96:487b796308b0 147 /**
Kojto 96:487b796308b0 148 * @brief FSMC NOR ID typedef
Kojto 96:487b796308b0 149 */
Kojto 96:487b796308b0 150 typedef struct
Kojto 96:487b796308b0 151 {
Kojto 96:487b796308b0 152 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
Kojto 96:487b796308b0 153
Kojto 96:487b796308b0 154 uint16_t Device_Code1;
Kojto 96:487b796308b0 155
Kojto 96:487b796308b0 156 uint16_t Device_Code2;
Kojto 96:487b796308b0 157
Kojto 96:487b796308b0 158 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
Kojto 96:487b796308b0 159 These codes can be accessed by performing read operations with specific
Kojto 96:487b796308b0 160 control signals and addresses set.They can also be accessed by issuing
Kojto 96:487b796308b0 161 an Auto Select command */
Kojto 96:487b796308b0 162 }NOR_IDTypeDef;
Kojto 96:487b796308b0 163
Kojto 96:487b796308b0 164 /**
Kojto 96:487b796308b0 165 * @brief FSMC NOR CFI typedef
Kojto 96:487b796308b0 166 */
Kojto 96:487b796308b0 167 typedef struct
Kojto 96:487b796308b0 168 {
Kojto 96:487b796308b0 169 /*!< Defines the information stored in the memory's Common flash interface
Kojto 96:487b796308b0 170 which contains a description of various electrical and timing parameters,
Kojto 96:487b796308b0 171 density information and functions supported by the memory */
Kojto 96:487b796308b0 172
Kojto 96:487b796308b0 173 uint16_t CFI_1;
Kojto 96:487b796308b0 174
Kojto 96:487b796308b0 175 uint16_t CFI_2;
Kojto 96:487b796308b0 176
Kojto 96:487b796308b0 177 uint16_t CFI_3;
Kojto 96:487b796308b0 178
Kojto 96:487b796308b0 179 uint16_t CFI_4;
Kojto 96:487b796308b0 180 }NOR_CFITypeDef;
Kojto 96:487b796308b0 181
Kojto 96:487b796308b0 182 /**
Kojto 96:487b796308b0 183 * @brief NOR handle Structure definition
Kojto 96:487b796308b0 184 */
Kojto 96:487b796308b0 185 typedef struct
Kojto 96:487b796308b0 186 {
Kojto 96:487b796308b0 187 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
Kojto 96:487b796308b0 188
Kojto 96:487b796308b0 189 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
Kojto 96:487b796308b0 190
Kojto 96:487b796308b0 191 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
Kojto 96:487b796308b0 192
Kojto 96:487b796308b0 193 HAL_LockTypeDef Lock; /*!< NOR locking object */
Kojto 96:487b796308b0 194
Kojto 96:487b796308b0 195 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
Kojto 96:487b796308b0 196
Kojto 96:487b796308b0 197 }NOR_HandleTypeDef;
Kojto 96:487b796308b0 198
Kojto 96:487b796308b0 199 /**
Kojto 96:487b796308b0 200 * @}
Kojto 96:487b796308b0 201 */
Kojto 96:487b796308b0 202
Kojto 96:487b796308b0 203 /* Exported constants --------------------------------------------------------*/
Kojto 96:487b796308b0 204 /* Exported macro ------------------------------------------------------------*/
Kojto 96:487b796308b0 205
Kojto 96:487b796308b0 206 /** @defgroup NOR_Exported_macro NOR Exported Macros
Kojto 96:487b796308b0 207 * @{
Kojto 96:487b796308b0 208 */
Kojto 96:487b796308b0 209
Kojto 96:487b796308b0 210 /** @brief Reset NOR handle state
Kojto 96:487b796308b0 211 * @param __HANDLE__: NOR handle
Kojto 96:487b796308b0 212 * @retval None
Kojto 96:487b796308b0 213 */
Kojto 96:487b796308b0 214 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
Kojto 96:487b796308b0 215
Kojto 96:487b796308b0 216 /**
Kojto 96:487b796308b0 217 * @}
Kojto 96:487b796308b0 218 */
Kojto 96:487b796308b0 219
Kojto 96:487b796308b0 220 /* Exported functions --------------------------------------------------------*/
Kojto 96:487b796308b0 221 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
Kojto 96:487b796308b0 222 * @{
Kojto 96:487b796308b0 223 */
Kojto 96:487b796308b0 224
Kojto 96:487b796308b0 225 /** @addtogroup NOR_Exported_Functions_Group1
Kojto 96:487b796308b0 226 * @{
Kojto 96:487b796308b0 227 */
Kojto 96:487b796308b0 228
Kojto 96:487b796308b0 229 /* Initialization/de-initialization functions **********************************/
Kojto 96:487b796308b0 230 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 96:487b796308b0 231 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 232 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 233 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 234 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
Kojto 96:487b796308b0 235
Kojto 96:487b796308b0 236 /**
Kojto 96:487b796308b0 237 * @}
Kojto 96:487b796308b0 238 */
Kojto 96:487b796308b0 239
Kojto 96:487b796308b0 240 /** @addtogroup NOR_Exported_Functions_Group2
Kojto 96:487b796308b0 241 * @{
Kojto 96:487b796308b0 242 */
Kojto 96:487b796308b0 243
Kojto 96:487b796308b0 244 /* I/O operation functions ***************************************************/
Kojto 96:487b796308b0 245 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
Kojto 96:487b796308b0 246 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 247 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
Kojto 96:487b796308b0 248 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
Kojto 96:487b796308b0 249
Kojto 96:487b796308b0 250 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
Kojto 96:487b796308b0 251 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
Kojto 96:487b796308b0 252
Kojto 96:487b796308b0 253 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
Kojto 96:487b796308b0 254 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
Kojto 96:487b796308b0 255 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
Kojto 96:487b796308b0 256
Kojto 96:487b796308b0 257 /**
Kojto 96:487b796308b0 258 * @}
Kojto 96:487b796308b0 259 */
Kojto 96:487b796308b0 260
Kojto 96:487b796308b0 261 /** @addtogroup NOR_Exported_Functions_Group3
Kojto 96:487b796308b0 262 * @{
Kojto 96:487b796308b0 263 */
Kojto 96:487b796308b0 264
Kojto 96:487b796308b0 265 /* NOR Control functions *****************************************************/
Kojto 96:487b796308b0 266 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 267 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 268
Kojto 96:487b796308b0 269 /**
Kojto 96:487b796308b0 270 * @}
Kojto 96:487b796308b0 271 */
Kojto 96:487b796308b0 272
Kojto 96:487b796308b0 273 /** @addtogroup NOR_Exported_Functions_Group4
Kojto 96:487b796308b0 274 * @{
Kojto 96:487b796308b0 275 */
Kojto 96:487b796308b0 276
Kojto 96:487b796308b0 277 /* NOR State functions ********************************************************/
Kojto 96:487b796308b0 278 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
Kojto 96:487b796308b0 279 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
Kojto 96:487b796308b0 280
Kojto 96:487b796308b0 281 /**
Kojto 96:487b796308b0 282 * @}
Kojto 96:487b796308b0 283 */
Kojto 96:487b796308b0 284
Kojto 96:487b796308b0 285 /**
Kojto 96:487b796308b0 286 * @}
Kojto 96:487b796308b0 287 */
Kojto 96:487b796308b0 288
Kojto 96:487b796308b0 289
Kojto 96:487b796308b0 290 /**
Kojto 96:487b796308b0 291 * @}
Kojto 96:487b796308b0 292 */
Kojto 96:487b796308b0 293
Kojto 96:487b796308b0 294 #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
Kojto 96:487b796308b0 295
Kojto 96:487b796308b0 296 /**
Kojto 96:487b796308b0 297 * @}
Kojto 96:487b796308b0 298 */
Kojto 96:487b796308b0 299
Kojto 96:487b796308b0 300 #ifdef __cplusplus
Kojto 96:487b796308b0 301 }
Kojto 96:487b796308b0 302 #endif
Kojto 96:487b796308b0 303
Kojto 96:487b796308b0 304 #endif /* __STM32F1xx_HAL_NOR_H */
Kojto 96:487b796308b0 305
Kojto 96:487b796308b0 306 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/