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TARGET_MTS_MDOT_F411RE/stm32f4xx_hal_nand.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
93:e188a91d3eaa 
remove SerialHalfDuplex.h

Who changed what in which revision?

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Kojto 93:e188a91d3eaa 1 /**
Kojto 93:e188a91d3eaa 2 ******************************************************************************
Kojto 93:e188a91d3eaa 3 * @file stm32f4xx_hal_nand.h
Kojto 93:e188a91d3eaa 4 * @author MCD Application Team
Kojto 93:e188a91d3eaa 5 * @version V1.1.0
Kojto 93:e188a91d3eaa 6 * @date 19-June-2014
Kojto 93:e188a91d3eaa 7 * @brief Header file of NAND HAL module.
Kojto 93:e188a91d3eaa 8 ******************************************************************************
Kojto 93:e188a91d3eaa 9 * @attention
Kojto 93:e188a91d3eaa 10 *
Kojto 93:e188a91d3eaa 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 93:e188a91d3eaa 12 *
Kojto 93:e188a91d3eaa 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 93:e188a91d3eaa 14 * are permitted provided that the following conditions are met:
Kojto 93:e188a91d3eaa 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 93:e188a91d3eaa 16 * this list of conditions and the following disclaimer.
Kojto 93:e188a91d3eaa 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 93:e188a91d3eaa 18 * this list of conditions and the following disclaimer in the documentation
Kojto 93:e188a91d3eaa 19 * and/or other materials provided with the distribution.
Kojto 93:e188a91d3eaa 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 93:e188a91d3eaa 21 * may be used to endorse or promote products derived from this software
Kojto 93:e188a91d3eaa 22 * without specific prior written permission.
Kojto 93:e188a91d3eaa 23 *
Kojto 93:e188a91d3eaa 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 93:e188a91d3eaa 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 93:e188a91d3eaa 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 93:e188a91d3eaa 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 93:e188a91d3eaa 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 93:e188a91d3eaa 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 93:e188a91d3eaa 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 93:e188a91d3eaa 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 93:e188a91d3eaa 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 93:e188a91d3eaa 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 93:e188a91d3eaa 34 *
Kojto 93:e188a91d3eaa 35 ******************************************************************************
Kojto 93:e188a91d3eaa 36 */
Kojto 93:e188a91d3eaa 37
Kojto 93:e188a91d3eaa 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 93:e188a91d3eaa 39 #ifndef __STM32F4xx_HAL_NAND_H
Kojto 93:e188a91d3eaa 40 #define __STM32F4xx_HAL_NAND_H
Kojto 93:e188a91d3eaa 41
Kojto 93:e188a91d3eaa 42 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 43 extern "C" {
Kojto 93:e188a91d3eaa 44 #endif
Kojto 93:e188a91d3eaa 45
Kojto 93:e188a91d3eaa 46 /* Includes ------------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
Kojto 93:e188a91d3eaa 48 #include "stm32f4xx_ll_fsmc.h"
Kojto 93:e188a91d3eaa 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
Kojto 93:e188a91d3eaa 50
Kojto 93:e188a91d3eaa 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
Kojto 93:e188a91d3eaa 52 #include "stm32f4xx_ll_fmc.h"
Kojto 93:e188a91d3eaa 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
Kojto 93:e188a91d3eaa 54
Kojto 93:e188a91d3eaa 55 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 93:e188a91d3eaa 56 * @{
Kojto 93:e188a91d3eaa 57 */
Kojto 93:e188a91d3eaa 58
Kojto 93:e188a91d3eaa 59 /** @addtogroup NAND
Kojto 93:e188a91d3eaa 60 * @{
Kojto 93:e188a91d3eaa 61 */
Kojto 93:e188a91d3eaa 62
Kojto 93:e188a91d3eaa 63 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
Kojto 93:e188a91d3eaa 64
Kojto 93:e188a91d3eaa 65 /* Exported typedef ----------------------------------------------------------*/
Kojto 93:e188a91d3eaa 66 /* Exported types ------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 67
Kojto 93:e188a91d3eaa 68 /**
Kojto 93:e188a91d3eaa 69 * @brief HAL NAND State structures definition
Kojto 93:e188a91d3eaa 70 */
Kojto 93:e188a91d3eaa 71 typedef enum
Kojto 93:e188a91d3eaa 72 {
Kojto 93:e188a91d3eaa 73 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */
Kojto 93:e188a91d3eaa 74 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
Kojto 93:e188a91d3eaa 75 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */
Kojto 93:e188a91d3eaa 76 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
Kojto 93:e188a91d3eaa 77 }HAL_NAND_StateTypeDef;
Kojto 93:e188a91d3eaa 78
Kojto 93:e188a91d3eaa 79 /**
Kojto 93:e188a91d3eaa 80 * @brief NAND Memory electronic signature Structure definition
Kojto 93:e188a91d3eaa 81 */
Kojto 93:e188a91d3eaa 82 typedef struct
Kojto 93:e188a91d3eaa 83 {
Kojto 93:e188a91d3eaa 84 /*<! NAND memory electronic signature maker and device IDs */
Kojto 93:e188a91d3eaa 85
Kojto 93:e188a91d3eaa 86 uint8_t Maker_Id;
Kojto 93:e188a91d3eaa 87
Kojto 93:e188a91d3eaa 88 uint8_t Device_Id;
Kojto 93:e188a91d3eaa 89
Kojto 93:e188a91d3eaa 90 uint8_t Third_Id;
Kojto 93:e188a91d3eaa 91
Kojto 93:e188a91d3eaa 92 uint8_t Fourth_Id;
Kojto 93:e188a91d3eaa 93 }NAND_IDTypeDef;
Kojto 93:e188a91d3eaa 94
Kojto 93:e188a91d3eaa 95 /**
Kojto 93:e188a91d3eaa 96 * @brief NAND Memory address Structure definition
Kojto 93:e188a91d3eaa 97 */
Kojto 93:e188a91d3eaa 98 typedef struct
Kojto 93:e188a91d3eaa 99 {
Kojto 93:e188a91d3eaa 100 uint16_t Page; /*!< NAND memory Page address */
Kojto 93:e188a91d3eaa 101
Kojto 93:e188a91d3eaa 102 uint16_t Zone; /*!< NAND memory Zone address */
Kojto 93:e188a91d3eaa 103
Kojto 93:e188a91d3eaa 104 uint16_t Block; /*!< NAND memory Block address */
Kojto 93:e188a91d3eaa 105
Kojto 93:e188a91d3eaa 106 }NAND_AddressTypedef;
Kojto 93:e188a91d3eaa 107
Kojto 93:e188a91d3eaa 108 /**
Kojto 93:e188a91d3eaa 109 * @brief NAND Memory info Structure definition
Kojto 93:e188a91d3eaa 110 */
Kojto 93:e188a91d3eaa 111 typedef struct
Kojto 93:e188a91d3eaa 112 {
Kojto 93:e188a91d3eaa 113 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */
Kojto 93:e188a91d3eaa 114
Kojto 93:e188a91d3eaa 115 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */
Kojto 93:e188a91d3eaa 116
Kojto 93:e188a91d3eaa 117 uint32_t BlockSize; /*!< NAND memory block size number of pages */
Kojto 93:e188a91d3eaa 118
Kojto 93:e188a91d3eaa 119 uint32_t BlockNbr; /*!< NAND memory number of blocks */
Kojto 93:e188a91d3eaa 120
Kojto 93:e188a91d3eaa 121 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */
Kojto 93:e188a91d3eaa 122 }NAND_InfoTypeDef;
Kojto 93:e188a91d3eaa 123
Kojto 93:e188a91d3eaa 124 /**
Kojto 93:e188a91d3eaa 125 * @brief NAND handle Structure definition
Kojto 93:e188a91d3eaa 126 */
Kojto 93:e188a91d3eaa 127 typedef struct
Kojto 93:e188a91d3eaa 128 {
Kojto 93:e188a91d3eaa 129 FMC_NAND_TypeDef *Instance; /*!< Register base address */
Kojto 93:e188a91d3eaa 130
Kojto 93:e188a91d3eaa 131 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
Kojto 93:e188a91d3eaa 132
Kojto 93:e188a91d3eaa 133 HAL_LockTypeDef Lock; /*!< NAND locking object */
Kojto 93:e188a91d3eaa 134
Kojto 93:e188a91d3eaa 135 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
Kojto 93:e188a91d3eaa 136
Kojto 93:e188a91d3eaa 137 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
Kojto 93:e188a91d3eaa 138 }NAND_HandleTypeDef;
Kojto 93:e188a91d3eaa 139
Kojto 93:e188a91d3eaa 140
Kojto 93:e188a91d3eaa 141 /* Exported constants --------------------------------------------------------*/
Kojto 93:e188a91d3eaa 142 /** @defgroup NAND_Exported_Constants
Kojto 93:e188a91d3eaa 143 * @{
Kojto 93:e188a91d3eaa 144 */
Kojto 93:e188a91d3eaa 145 #define NAND_DEVICE1 ((uint32_t)0x70000000)
Kojto 93:e188a91d3eaa 146 #define NAND_DEVICE2 ((uint32_t)0x80000000)
Kojto 93:e188a91d3eaa 147 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000)
Kojto 93:e188a91d3eaa 148
Kojto 93:e188a91d3eaa 149 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
Kojto 93:e188a91d3eaa 150 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
Kojto 93:e188a91d3eaa 151
Kojto 93:e188a91d3eaa 152 #define NAND_CMD_AREA_A ((uint8_t)0x00)
Kojto 93:e188a91d3eaa 153 #define NAND_CMD_AREA_B ((uint8_t)0x01)
Kojto 93:e188a91d3eaa 154 #define NAND_CMD_AREA_C ((uint8_t)0x50)
Kojto 93:e188a91d3eaa 155 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
Kojto 93:e188a91d3eaa 156
Kojto 93:e188a91d3eaa 157 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
Kojto 93:e188a91d3eaa 158 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
Kojto 93:e188a91d3eaa 159 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
Kojto 93:e188a91d3eaa 160 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
Kojto 93:e188a91d3eaa 161 #define NAND_CMD_READID ((uint8_t)0x90)
Kojto 93:e188a91d3eaa 162 #define NAND_CMD_STATUS ((uint8_t)0x70)
Kojto 93:e188a91d3eaa 163 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
Kojto 93:e188a91d3eaa 164 #define NAND_CMD_RESET ((uint8_t)0xFF)
Kojto 93:e188a91d3eaa 165
Kojto 93:e188a91d3eaa 166 /* NAND memory status */
Kojto 93:e188a91d3eaa 167 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100)
Kojto 93:e188a91d3eaa 168 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
Kojto 93:e188a91d3eaa 169 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400)
Kojto 93:e188a91d3eaa 170 #define NAND_BUSY ((uint32_t)0x00000000)
Kojto 93:e188a91d3eaa 171 #define NAND_ERROR ((uint32_t)0x00000001)
Kojto 93:e188a91d3eaa 172 #define NAND_READY ((uint32_t)0x00000040)
Kojto 93:e188a91d3eaa 173
Kojto 93:e188a91d3eaa 174 /**
Kojto 93:e188a91d3eaa 175 * @}
Kojto 93:e188a91d3eaa 176 */
Kojto 93:e188a91d3eaa 177
Kojto 93:e188a91d3eaa 178 /* Exported macro ------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 179
Kojto 93:e188a91d3eaa 180 /** @brief Reset NAND handle state
Kojto 93:e188a91d3eaa 181 * @param __HANDLE__: specifies the NAND handle.
Kojto 93:e188a91d3eaa 182 * @retval None
Kojto 93:e188a91d3eaa 183 */
Kojto 93:e188a91d3eaa 184 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
Kojto 93:e188a91d3eaa 185
Kojto 93:e188a91d3eaa 186 /**
Kojto 93:e188a91d3eaa 187 * @brief NAND memory address computation.
Kojto 93:e188a91d3eaa 188 * @param __ADDRESS__: NAND memory address.
Kojto 93:e188a91d3eaa 189 * @param __HANDLE__ : NAND handle.
Kojto 93:e188a91d3eaa 190 * @retval NAND Raw address value
Kojto 93:e188a91d3eaa 191 */
Kojto 93:e188a91d3eaa 192 #define __ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
Kojto 93:e188a91d3eaa 193 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize)))
Kojto 93:e188a91d3eaa 194
Kojto 93:e188a91d3eaa 195 /**
Kojto 93:e188a91d3eaa 196 * @brief NAND memory address cycling.
Kojto 93:e188a91d3eaa 197 * @param __ADDRESS__: NAND memory address.
Kojto 93:e188a91d3eaa 198 * @retval NAND address cycling value.
Kojto 93:e188a91d3eaa 199 */
Kojto 93:e188a91d3eaa 200 #define __ADDR_1st_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
Kojto 93:e188a91d3eaa 201 #define __ADDR_2nd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
Kojto 93:e188a91d3eaa 202 #define __ADDR_3rd_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
Kojto 93:e188a91d3eaa 203 #define __ADDR_4th_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
Kojto 93:e188a91d3eaa 204
Kojto 93:e188a91d3eaa 205 /* Exported functions --------------------------------------------------------*/
Kojto 93:e188a91d3eaa 206
Kojto 93:e188a91d3eaa 207 /* Initialization/de-initialization functions ********************************/
Kojto 93:e188a91d3eaa 208 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
Kojto 93:e188a91d3eaa 209 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 210 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 211 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 212 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 213 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 214
Kojto 93:e188a91d3eaa 215 /* IO operation functions ****************************************************/
Kojto 93:e188a91d3eaa 216 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
Kojto 93:e188a91d3eaa 217 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 218 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
Kojto 93:e188a91d3eaa 219 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
Kojto 93:e188a91d3eaa 220 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
Kojto 93:e188a91d3eaa 221 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
Kojto 93:e188a91d3eaa 222 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress);
Kojto 93:e188a91d3eaa 223 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 224 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypedef *pAddress);
Kojto 93:e188a91d3eaa 225
Kojto 93:e188a91d3eaa 226 /* NAND Control functions ****************************************************/
Kojto 93:e188a91d3eaa 227 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 228 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 229 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
Kojto 93:e188a91d3eaa 230
Kojto 93:e188a91d3eaa 231 /* NAND State functions *******************************************************/
Kojto 93:e188a91d3eaa 232 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 233 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
Kojto 93:e188a91d3eaa 234
Kojto 93:e188a91d3eaa 235 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
Kojto 93:e188a91d3eaa 236 /**
Kojto 93:e188a91d3eaa 237 * @}
Kojto 93:e188a91d3eaa 238 */
Kojto 93:e188a91d3eaa 239
Kojto 93:e188a91d3eaa 240 /**
Kojto 93:e188a91d3eaa 241 * @}
Kojto 93:e188a91d3eaa 242 */
Kojto 93:e188a91d3eaa 243
Kojto 93:e188a91d3eaa 244 #ifdef __cplusplus
Kojto 93:e188a91d3eaa 245 }
Kojto 93:e188a91d3eaa 246 #endif
Kojto 93:e188a91d3eaa 247
Kojto 93:e188a91d3eaa 248 #endif /* __STM32F4xx_HAL_NAND_H */
Kojto 93:e188a91d3eaa 249
Kojto 93:e188a91d3eaa 250 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/