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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_dac.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
92:4fc01daae5a5 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_dac.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of DAC HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_DAC_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_DAC_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 49 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 52 * @{
bogdanm 92:4fc01daae5a5 53 */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /** @addtogroup DAC
bogdanm 92:4fc01daae5a5 56 * @{
bogdanm 92:4fc01daae5a5 57 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 /**
bogdanm 92:4fc01daae5a5 62 * @brief HAL State structures definition
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 typedef enum
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 67 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
bogdanm 92:4fc01daae5a5 68 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
bogdanm 92:4fc01daae5a5 69 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
bogdanm 92:4fc01daae5a5 70 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
bogdanm 92:4fc01daae5a5 71 }HAL_DAC_StateTypeDef;
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 /**
bogdanm 92:4fc01daae5a5 74 * @brief DAC handle Structure definition
bogdanm 92:4fc01daae5a5 75 */
bogdanm 92:4fc01daae5a5 76 typedef struct
bogdanm 92:4fc01daae5a5 77 {
bogdanm 92:4fc01daae5a5 78 DAC_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 79
bogdanm 92:4fc01daae5a5 80 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
bogdanm 92:4fc01daae5a5 81
bogdanm 92:4fc01daae5a5 82 HAL_LockTypeDef Lock; /*!< DAC locking object */
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
bogdanm 92:4fc01daae5a5 87
bogdanm 92:4fc01daae5a5 88 __IO uint32_t ErrorCode; /*!< DAC Error code */
bogdanm 92:4fc01daae5a5 89
bogdanm 92:4fc01daae5a5 90 }DAC_HandleTypeDef;
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 /**
bogdanm 92:4fc01daae5a5 93 * @brief DAC Configuration regular Channel structure definition
bogdanm 92:4fc01daae5a5 94 */
bogdanm 92:4fc01daae5a5 95 typedef struct
bogdanm 92:4fc01daae5a5 96 {
bogdanm 92:4fc01daae5a5 97 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
bogdanm 92:4fc01daae5a5 98 This parameter can be a value of @ref DAC_trigger_selection */
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
bogdanm 92:4fc01daae5a5 101 This parameter can be a value of @ref DAC_output_buffer */
bogdanm 92:4fc01daae5a5 102 }DAC_ChannelConfTypeDef;
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 /** @defgroup DAC_Error_Code
bogdanm 92:4fc01daae5a5 107 * @{
bogdanm 92:4fc01daae5a5 108 */
bogdanm 92:4fc01daae5a5 109 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
bogdanm 92:4fc01daae5a5 110 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
bogdanm 92:4fc01daae5a5 111 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
bogdanm 92:4fc01daae5a5 112 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
bogdanm 92:4fc01daae5a5 113 /**
bogdanm 92:4fc01daae5a5 114 * @}
bogdanm 92:4fc01daae5a5 115 */
bogdanm 92:4fc01daae5a5 116
bogdanm 92:4fc01daae5a5 117 /** @defgroup DAC_trigger_selection
bogdanm 92:4fc01daae5a5 118 * @{
bogdanm 92:4fc01daae5a5 119 */
bogdanm 92:4fc01daae5a5 120
bogdanm 92:4fc01daae5a5 121 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
bogdanm 92:4fc01daae5a5 122 has been loaded, and not by external trigger */
bogdanm 92:4fc01daae5a5 123 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 124 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 125 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 126 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 127 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 128 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
bogdanm 92:4fc01daae5a5 131 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
bogdanm 92:4fc01daae5a5 132
bogdanm 92:4fc01daae5a5 133 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
bogdanm 92:4fc01daae5a5 134 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
bogdanm 92:4fc01daae5a5 135 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
bogdanm 92:4fc01daae5a5 136 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
bogdanm 92:4fc01daae5a5 137 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
bogdanm 92:4fc01daae5a5 138 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
bogdanm 92:4fc01daae5a5 139 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
bogdanm 92:4fc01daae5a5 140 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
bogdanm 92:4fc01daae5a5 141 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
bogdanm 92:4fc01daae5a5 142 /**
bogdanm 92:4fc01daae5a5 143 * @}
bogdanm 92:4fc01daae5a5 144 */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 /** @defgroup DAC_output_buffer
bogdanm 92:4fc01daae5a5 147 * @{
bogdanm 92:4fc01daae5a5 148 */
bogdanm 92:4fc01daae5a5 149 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
bogdanm 92:4fc01daae5a5 153 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
bogdanm 92:4fc01daae5a5 154 /**
bogdanm 92:4fc01daae5a5 155 * @}
bogdanm 92:4fc01daae5a5 156 */
bogdanm 92:4fc01daae5a5 157
bogdanm 92:4fc01daae5a5 158 /** @defgroup DAC_Channel_selection
bogdanm 92:4fc01daae5a5 159 * @{
bogdanm 92:4fc01daae5a5 160 */
bogdanm 92:4fc01daae5a5 161 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 162 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
bogdanm 92:4fc01daae5a5 163
bogdanm 92:4fc01daae5a5 164 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
bogdanm 92:4fc01daae5a5 165 ((CHANNEL) == DAC_CHANNEL_2))
bogdanm 92:4fc01daae5a5 166 /**
bogdanm 92:4fc01daae5a5 167 * @}
bogdanm 92:4fc01daae5a5 168 */
bogdanm 92:4fc01daae5a5 169
bogdanm 92:4fc01daae5a5 170 /** @defgroup DAC_data_alignement
bogdanm 92:4fc01daae5a5 171 * @{
bogdanm 92:4fc01daae5a5 172 */
bogdanm 92:4fc01daae5a5 173 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 174 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 175 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
bogdanm 92:4fc01daae5a5 176
bogdanm 92:4fc01daae5a5 177 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
bogdanm 92:4fc01daae5a5 178 ((ALIGN) == DAC_ALIGN_12B_L) || \
bogdanm 92:4fc01daae5a5 179 ((ALIGN) == DAC_ALIGN_8B_R))
bogdanm 92:4fc01daae5a5 180 /**
bogdanm 92:4fc01daae5a5 181 * @}
bogdanm 92:4fc01daae5a5 182 */
bogdanm 92:4fc01daae5a5 183
bogdanm 92:4fc01daae5a5 184 /** @defgroup DAC_data
bogdanm 92:4fc01daae5a5 185 * @{
bogdanm 92:4fc01daae5a5 186 */
bogdanm 92:4fc01daae5a5 187 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
bogdanm 92:4fc01daae5a5 188 /**
bogdanm 92:4fc01daae5a5 189 * @}
bogdanm 92:4fc01daae5a5 190 */
bogdanm 92:4fc01daae5a5 191
bogdanm 92:4fc01daae5a5 192 /** @defgroup DAC_flags_definition
bogdanm 92:4fc01daae5a5 193 * @{
bogdanm 92:4fc01daae5a5 194 */
bogdanm 92:4fc01daae5a5 195 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 92:4fc01daae5a5 196 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
bogdanm 92:4fc01daae5a5 197
bogdanm 92:4fc01daae5a5 198 #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \
bogdanm 92:4fc01daae5a5 199 ((FLAG) == DAC_FLAG_DMAUDR2))
bogdanm 92:4fc01daae5a5 200 /**
bogdanm 92:4fc01daae5a5 201 * @}
bogdanm 92:4fc01daae5a5 202 */
bogdanm 92:4fc01daae5a5 203
bogdanm 92:4fc01daae5a5 204 /** @defgroup DAC_IT_definition
bogdanm 92:4fc01daae5a5 205 * @{
bogdanm 92:4fc01daae5a5 206 */
bogdanm 92:4fc01daae5a5 207 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 92:4fc01daae5a5 208 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
bogdanm 92:4fc01daae5a5 209
bogdanm 92:4fc01daae5a5 210 #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \
bogdanm 92:4fc01daae5a5 211 ((IT) == DAC_IT_DMAUDR2))
bogdanm 92:4fc01daae5a5 212 /**
bogdanm 92:4fc01daae5a5 213 * @}
bogdanm 92:4fc01daae5a5 214 */
bogdanm 92:4fc01daae5a5 215
bogdanm 92:4fc01daae5a5 216 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 217
bogdanm 92:4fc01daae5a5 218 /** @brief Reset DAC handle state
bogdanm 92:4fc01daae5a5 219 * @param __HANDLE__: specifies the DAC handle.
bogdanm 92:4fc01daae5a5 220 * @retval None
bogdanm 92:4fc01daae5a5 221 */
bogdanm 92:4fc01daae5a5 222 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
bogdanm 92:4fc01daae5a5 223
bogdanm 92:4fc01daae5a5 224 /** @brief Enable the DAC channel
bogdanm 92:4fc01daae5a5 225 * @param __HANDLE__: specifies the DAC handle.
bogdanm 92:4fc01daae5a5 226 * @param __DAC_Channel__: specifies the DAC channel
bogdanm 92:4fc01daae5a5 227 * @retval None
bogdanm 92:4fc01daae5a5 228 */
bogdanm 92:4fc01daae5a5 229 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 92:4fc01daae5a5 230 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 92:4fc01daae5a5 231
bogdanm 92:4fc01daae5a5 232 /** @brief Disable the DAC channel
bogdanm 92:4fc01daae5a5 233 * @param __HANDLE__: specifies the DAC handle
bogdanm 92:4fc01daae5a5 234 * @param __DAC_Channel__: specifies the DAC channel.
bogdanm 92:4fc01daae5a5 235 * @retval None
bogdanm 92:4fc01daae5a5 236 */
bogdanm 92:4fc01daae5a5 237 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
bogdanm 92:4fc01daae5a5 238 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 92:4fc01daae5a5 239
bogdanm 92:4fc01daae5a5 240 /** @brief Set DHR12R1 alignment
bogdanm 92:4fc01daae5a5 241 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 92:4fc01daae5a5 242 * @retval None
bogdanm 92:4fc01daae5a5 243 */
bogdanm 92:4fc01daae5a5 244 #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__))
bogdanm 92:4fc01daae5a5 245
bogdanm 92:4fc01daae5a5 246 /** @brief Set DHR12R2 alignment
bogdanm 92:4fc01daae5a5 247 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 92:4fc01daae5a5 248 * @retval None
bogdanm 92:4fc01daae5a5 249 */
bogdanm 92:4fc01daae5a5 250 #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__))
bogdanm 92:4fc01daae5a5 251
bogdanm 92:4fc01daae5a5 252 /** @brief Set DHR12RD alignment
bogdanm 92:4fc01daae5a5 253 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 92:4fc01daae5a5 254 * @retval None
bogdanm 92:4fc01daae5a5 255 */
bogdanm 92:4fc01daae5a5 256 #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__))
bogdanm 92:4fc01daae5a5 257
bogdanm 92:4fc01daae5a5 258 /** @brief Enable the DAC interrupt
bogdanm 92:4fc01daae5a5 259 * @param __HANDLE__: specifies the DAC handle
bogdanm 92:4fc01daae5a5 260 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 92:4fc01daae5a5 261 * @retval None
bogdanm 92:4fc01daae5a5 262 */
bogdanm 92:4fc01daae5a5 263 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 264
bogdanm 92:4fc01daae5a5 265 /** @brief Disable the DAC interrupt
bogdanm 92:4fc01daae5a5 266 * @param __HANDLE__: specifies the DAC handle
bogdanm 92:4fc01daae5a5 267 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 92:4fc01daae5a5 268 * @retval None
bogdanm 92:4fc01daae5a5 269 */
bogdanm 92:4fc01daae5a5 270 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
bogdanm 92:4fc01daae5a5 271
bogdanm 92:4fc01daae5a5 272 /** @brief Get the selected DAC's flag status.
bogdanm 92:4fc01daae5a5 273 * @param __HANDLE__: specifies the DAC handle.
bogdanm 92:4fc01daae5a5 274 * @retval None
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 277
bogdanm 92:4fc01daae5a5 278 /** @brief Clear the DAC's flag.
bogdanm 92:4fc01daae5a5 279 * @param __HANDLE__: specifies the DAC handle.
bogdanm 92:4fc01daae5a5 280 * @retval None
bogdanm 92:4fc01daae5a5 281 */
bogdanm 92:4fc01daae5a5 282 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
bogdanm 92:4fc01daae5a5 283
bogdanm 92:4fc01daae5a5 284 /* Include DAC HAL Extension module */
bogdanm 92:4fc01daae5a5 285 #include "stm32f4xx_hal_dac_ex.h"
bogdanm 92:4fc01daae5a5 286
bogdanm 92:4fc01daae5a5 287 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 288 /* Initialization/de-initialization functions *********************************/
bogdanm 92:4fc01daae5a5 289 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 290 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 291 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 292 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 293
bogdanm 92:4fc01daae5a5 294 /* I/O operation functions ****************************************************/
bogdanm 92:4fc01daae5a5 295 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 92:4fc01daae5a5 296 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 92:4fc01daae5a5 297 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
bogdanm 92:4fc01daae5a5 298 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 92:4fc01daae5a5 299 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
bogdanm 92:4fc01daae5a5 300
bogdanm 92:4fc01daae5a5 301 /* Peripheral Control functions ***********************************************/
bogdanm 92:4fc01daae5a5 302 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
bogdanm 92:4fc01daae5a5 303 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
bogdanm 92:4fc01daae5a5 304
bogdanm 92:4fc01daae5a5 305 /* Peripheral State functions *************************************************/
bogdanm 92:4fc01daae5a5 306 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 307 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 308 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
bogdanm 92:4fc01daae5a5 309
bogdanm 92:4fc01daae5a5 310 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 311 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 92:4fc01daae5a5 312 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 92:4fc01daae5a5 313 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 92:4fc01daae5a5 314
bogdanm 92:4fc01daae5a5 315 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 316
bogdanm 92:4fc01daae5a5 317 /**
bogdanm 92:4fc01daae5a5 318 * @}
bogdanm 92:4fc01daae5a5 319 */
bogdanm 92:4fc01daae5a5 320
bogdanm 92:4fc01daae5a5 321 /**
bogdanm 92:4fc01daae5a5 322 * @}
bogdanm 92:4fc01daae5a5 323 */
bogdanm 92:4fc01daae5a5 324
bogdanm 92:4fc01daae5a5 325 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 326 }
bogdanm 92:4fc01daae5a5 327 #endif
bogdanm 92:4fc01daae5a5 328
bogdanm 92:4fc01daae5a5 329 #endif /*__STM32F4xx_HAL_DAC_H */
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/