雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/core_cmFunc.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
92:4fc01daae5a5 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**************************************************************************//**
bogdanm 92:4fc01daae5a5 2 * @file core_cmFunc.h
bogdanm 92:4fc01daae5a5 3 * @brief CMSIS Cortex-M Core Function Access Header File
bogdanm 92:4fc01daae5a5 4 * @version V3.20
bogdanm 92:4fc01daae5a5 5 * @date 25. February 2013
bogdanm 92:4fc01daae5a5 6 *
bogdanm 92:4fc01daae5a5 7 * @note
bogdanm 92:4fc01daae5a5 8 *
bogdanm 92:4fc01daae5a5 9 ******************************************************************************/
bogdanm 92:4fc01daae5a5 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 92:4fc01daae5a5 11
bogdanm 92:4fc01daae5a5 12 All rights reserved.
bogdanm 92:4fc01daae5a5 13 Redistribution and use in source and binary forms, with or without
bogdanm 92:4fc01daae5a5 14 modification, are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 - Redistributions of source code must retain the above copyright
bogdanm 92:4fc01daae5a5 16 notice, this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 92:4fc01daae5a5 18 notice, this list of conditions and the following disclaimer in the
bogdanm 92:4fc01daae5a5 19 documentation and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 92:4fc01daae5a5 21 to endorse or promote products derived from this software without
bogdanm 92:4fc01daae5a5 22 specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 92:4fc01daae5a5 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 92:4fc01daae5a5 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 92:4fc01daae5a5 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 92:4fc01daae5a5 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 92:4fc01daae5a5 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 92:4fc01daae5a5 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 92:4fc01daae5a5 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 35 ---------------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 36
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 #ifndef __CORE_CMFUNC_H
bogdanm 92:4fc01daae5a5 39 #define __CORE_CMFUNC_H
bogdanm 92:4fc01daae5a5 40
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 /* ########################### Core Function Access ########################### */
bogdanm 92:4fc01daae5a5 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 92:4fc01daae5a5 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 92:4fc01daae5a5 45 @{
bogdanm 92:4fc01daae5a5 46 */
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 92:4fc01daae5a5 49 /* ARM armcc specific functions */
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 #if (__ARMCC_VERSION < 400677)
bogdanm 92:4fc01daae5a5 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 92:4fc01daae5a5 53 #endif
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 /* intrinsic void __enable_irq(); */
bogdanm 92:4fc01daae5a5 56 /* intrinsic void __disable_irq(); */
bogdanm 92:4fc01daae5a5 57
bogdanm 92:4fc01daae5a5 58 /** \brief Get Control Register
bogdanm 92:4fc01daae5a5 59
bogdanm 92:4fc01daae5a5 60 This function returns the content of the Control Register.
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62 \return Control Register value
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 92:4fc01daae5a5 65 {
bogdanm 92:4fc01daae5a5 66 register uint32_t __regControl __ASM("control");
bogdanm 92:4fc01daae5a5 67 return(__regControl);
bogdanm 92:4fc01daae5a5 68 }
bogdanm 92:4fc01daae5a5 69
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 /** \brief Set Control Register
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 This function writes the given value to the Control Register.
bogdanm 92:4fc01daae5a5 74
bogdanm 92:4fc01daae5a5 75 \param [in] control Control Register value to set
bogdanm 92:4fc01daae5a5 76 */
bogdanm 92:4fc01daae5a5 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 92:4fc01daae5a5 78 {
bogdanm 92:4fc01daae5a5 79 register uint32_t __regControl __ASM("control");
bogdanm 92:4fc01daae5a5 80 __regControl = control;
bogdanm 92:4fc01daae5a5 81 }
bogdanm 92:4fc01daae5a5 82
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 /** \brief Get IPSR Register
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 This function returns the content of the IPSR Register.
bogdanm 92:4fc01daae5a5 87
bogdanm 92:4fc01daae5a5 88 \return IPSR Register value
bogdanm 92:4fc01daae5a5 89 */
bogdanm 92:4fc01daae5a5 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 92:4fc01daae5a5 91 {
bogdanm 92:4fc01daae5a5 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 92:4fc01daae5a5 93 return(__regIPSR);
bogdanm 92:4fc01daae5a5 94 }
bogdanm 92:4fc01daae5a5 95
bogdanm 92:4fc01daae5a5 96
bogdanm 92:4fc01daae5a5 97 /** \brief Get APSR Register
bogdanm 92:4fc01daae5a5 98
bogdanm 92:4fc01daae5a5 99 This function returns the content of the APSR Register.
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 \return APSR Register value
bogdanm 92:4fc01daae5a5 102 */
bogdanm 92:4fc01daae5a5 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 92:4fc01daae5a5 104 {
bogdanm 92:4fc01daae5a5 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 92:4fc01daae5a5 106 return(__regAPSR);
bogdanm 92:4fc01daae5a5 107 }
bogdanm 92:4fc01daae5a5 108
bogdanm 92:4fc01daae5a5 109
bogdanm 92:4fc01daae5a5 110 /** \brief Get xPSR Register
bogdanm 92:4fc01daae5a5 111
bogdanm 92:4fc01daae5a5 112 This function returns the content of the xPSR Register.
bogdanm 92:4fc01daae5a5 113
bogdanm 92:4fc01daae5a5 114 \return xPSR Register value
bogdanm 92:4fc01daae5a5 115 */
bogdanm 92:4fc01daae5a5 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 92:4fc01daae5a5 117 {
bogdanm 92:4fc01daae5a5 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 92:4fc01daae5a5 119 return(__regXPSR);
bogdanm 92:4fc01daae5a5 120 }
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122
bogdanm 92:4fc01daae5a5 123 /** \brief Get Process Stack Pointer
bogdanm 92:4fc01daae5a5 124
bogdanm 92:4fc01daae5a5 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 92:4fc01daae5a5 126
bogdanm 92:4fc01daae5a5 127 \return PSP Register value
bogdanm 92:4fc01daae5a5 128 */
bogdanm 92:4fc01daae5a5 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 92:4fc01daae5a5 130 {
bogdanm 92:4fc01daae5a5 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 92:4fc01daae5a5 132 return(__regProcessStackPointer);
bogdanm 92:4fc01daae5a5 133 }
bogdanm 92:4fc01daae5a5 134
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 /** \brief Set Process Stack Pointer
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 92:4fc01daae5a5 141 */
bogdanm 92:4fc01daae5a5 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 92:4fc01daae5a5 143 {
bogdanm 92:4fc01daae5a5 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 92:4fc01daae5a5 145 __regProcessStackPointer = topOfProcStack;
bogdanm 92:4fc01daae5a5 146 }
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148
bogdanm 92:4fc01daae5a5 149 /** \brief Get Main Stack Pointer
bogdanm 92:4fc01daae5a5 150
bogdanm 92:4fc01daae5a5 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 92:4fc01daae5a5 152
bogdanm 92:4fc01daae5a5 153 \return MSP Register value
bogdanm 92:4fc01daae5a5 154 */
bogdanm 92:4fc01daae5a5 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 92:4fc01daae5a5 156 {
bogdanm 92:4fc01daae5a5 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 92:4fc01daae5a5 158 return(__regMainStackPointer);
bogdanm 92:4fc01daae5a5 159 }
bogdanm 92:4fc01daae5a5 160
bogdanm 92:4fc01daae5a5 161
bogdanm 92:4fc01daae5a5 162 /** \brief Set Main Stack Pointer
bogdanm 92:4fc01daae5a5 163
bogdanm 92:4fc01daae5a5 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 92:4fc01daae5a5 165
bogdanm 92:4fc01daae5a5 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 92:4fc01daae5a5 167 */
bogdanm 92:4fc01daae5a5 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 92:4fc01daae5a5 169 {
bogdanm 92:4fc01daae5a5 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 92:4fc01daae5a5 171 __regMainStackPointer = topOfMainStack;
bogdanm 92:4fc01daae5a5 172 }
bogdanm 92:4fc01daae5a5 173
bogdanm 92:4fc01daae5a5 174
bogdanm 92:4fc01daae5a5 175 /** \brief Get Priority Mask
bogdanm 92:4fc01daae5a5 176
bogdanm 92:4fc01daae5a5 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 92:4fc01daae5a5 178
bogdanm 92:4fc01daae5a5 179 \return Priority Mask value
bogdanm 92:4fc01daae5a5 180 */
bogdanm 92:4fc01daae5a5 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 92:4fc01daae5a5 182 {
bogdanm 92:4fc01daae5a5 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 92:4fc01daae5a5 184 return(__regPriMask);
bogdanm 92:4fc01daae5a5 185 }
bogdanm 92:4fc01daae5a5 186
bogdanm 92:4fc01daae5a5 187
bogdanm 92:4fc01daae5a5 188 /** \brief Set Priority Mask
bogdanm 92:4fc01daae5a5 189
bogdanm 92:4fc01daae5a5 190 This function assigns the given value to the Priority Mask Register.
bogdanm 92:4fc01daae5a5 191
bogdanm 92:4fc01daae5a5 192 \param [in] priMask Priority Mask
bogdanm 92:4fc01daae5a5 193 */
bogdanm 92:4fc01daae5a5 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 92:4fc01daae5a5 195 {
bogdanm 92:4fc01daae5a5 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 92:4fc01daae5a5 197 __regPriMask = (priMask);
bogdanm 92:4fc01daae5a5 198 }
bogdanm 92:4fc01daae5a5 199
bogdanm 92:4fc01daae5a5 200
bogdanm 92:4fc01daae5a5 201 #if (__CORTEX_M >= 0x03)
bogdanm 92:4fc01daae5a5 202
bogdanm 92:4fc01daae5a5 203 /** \brief Enable FIQ
bogdanm 92:4fc01daae5a5 204
bogdanm 92:4fc01daae5a5 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 92:4fc01daae5a5 206 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 207 */
bogdanm 92:4fc01daae5a5 208 #define __enable_fault_irq __enable_fiq
bogdanm 92:4fc01daae5a5 209
bogdanm 92:4fc01daae5a5 210
bogdanm 92:4fc01daae5a5 211 /** \brief Disable FIQ
bogdanm 92:4fc01daae5a5 212
bogdanm 92:4fc01daae5a5 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 92:4fc01daae5a5 214 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 215 */
bogdanm 92:4fc01daae5a5 216 #define __disable_fault_irq __disable_fiq
bogdanm 92:4fc01daae5a5 217
bogdanm 92:4fc01daae5a5 218
bogdanm 92:4fc01daae5a5 219 /** \brief Get Base Priority
bogdanm 92:4fc01daae5a5 220
bogdanm 92:4fc01daae5a5 221 This function returns the current value of the Base Priority register.
bogdanm 92:4fc01daae5a5 222
bogdanm 92:4fc01daae5a5 223 \return Base Priority register value
bogdanm 92:4fc01daae5a5 224 */
bogdanm 92:4fc01daae5a5 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 92:4fc01daae5a5 226 {
bogdanm 92:4fc01daae5a5 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 92:4fc01daae5a5 228 return(__regBasePri);
bogdanm 92:4fc01daae5a5 229 }
bogdanm 92:4fc01daae5a5 230
bogdanm 92:4fc01daae5a5 231
bogdanm 92:4fc01daae5a5 232 /** \brief Set Base Priority
bogdanm 92:4fc01daae5a5 233
bogdanm 92:4fc01daae5a5 234 This function assigns the given value to the Base Priority register.
bogdanm 92:4fc01daae5a5 235
bogdanm 92:4fc01daae5a5 236 \param [in] basePri Base Priority value to set
bogdanm 92:4fc01daae5a5 237 */
bogdanm 92:4fc01daae5a5 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 92:4fc01daae5a5 239 {
bogdanm 92:4fc01daae5a5 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 92:4fc01daae5a5 241 __regBasePri = (basePri & 0xff);
bogdanm 92:4fc01daae5a5 242 }
bogdanm 92:4fc01daae5a5 243
bogdanm 92:4fc01daae5a5 244
bogdanm 92:4fc01daae5a5 245 /** \brief Get Fault Mask
bogdanm 92:4fc01daae5a5 246
bogdanm 92:4fc01daae5a5 247 This function returns the current value of the Fault Mask register.
bogdanm 92:4fc01daae5a5 248
bogdanm 92:4fc01daae5a5 249 \return Fault Mask register value
bogdanm 92:4fc01daae5a5 250 */
bogdanm 92:4fc01daae5a5 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 92:4fc01daae5a5 252 {
bogdanm 92:4fc01daae5a5 253 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 92:4fc01daae5a5 254 return(__regFaultMask);
bogdanm 92:4fc01daae5a5 255 }
bogdanm 92:4fc01daae5a5 256
bogdanm 92:4fc01daae5a5 257
bogdanm 92:4fc01daae5a5 258 /** \brief Set Fault Mask
bogdanm 92:4fc01daae5a5 259
bogdanm 92:4fc01daae5a5 260 This function assigns the given value to the Fault Mask register.
bogdanm 92:4fc01daae5a5 261
bogdanm 92:4fc01daae5a5 262 \param [in] faultMask Fault Mask value to set
bogdanm 92:4fc01daae5a5 263 */
bogdanm 92:4fc01daae5a5 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 92:4fc01daae5a5 265 {
bogdanm 92:4fc01daae5a5 266 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 92:4fc01daae5a5 267 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 92:4fc01daae5a5 268 }
bogdanm 92:4fc01daae5a5 269
bogdanm 92:4fc01daae5a5 270 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 92:4fc01daae5a5 271
bogdanm 92:4fc01daae5a5 272
bogdanm 92:4fc01daae5a5 273 #if (__CORTEX_M == 0x04)
bogdanm 92:4fc01daae5a5 274
bogdanm 92:4fc01daae5a5 275 /** \brief Get FPSCR
bogdanm 92:4fc01daae5a5 276
bogdanm 92:4fc01daae5a5 277 This function returns the current value of the Floating Point Status/Control register.
bogdanm 92:4fc01daae5a5 278
bogdanm 92:4fc01daae5a5 279 \return Floating Point Status/Control register value
bogdanm 92:4fc01daae5a5 280 */
bogdanm 92:4fc01daae5a5 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 92:4fc01daae5a5 282 {
bogdanm 92:4fc01daae5a5 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 92:4fc01daae5a5 284 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 92:4fc01daae5a5 285 return(__regfpscr);
bogdanm 92:4fc01daae5a5 286 #else
bogdanm 92:4fc01daae5a5 287 return(0);
bogdanm 92:4fc01daae5a5 288 #endif
bogdanm 92:4fc01daae5a5 289 }
bogdanm 92:4fc01daae5a5 290
bogdanm 92:4fc01daae5a5 291
bogdanm 92:4fc01daae5a5 292 /** \brief Set FPSCR
bogdanm 92:4fc01daae5a5 293
bogdanm 92:4fc01daae5a5 294 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 92:4fc01daae5a5 295
bogdanm 92:4fc01daae5a5 296 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 92:4fc01daae5a5 297 */
bogdanm 92:4fc01daae5a5 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 92:4fc01daae5a5 299 {
bogdanm 92:4fc01daae5a5 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 92:4fc01daae5a5 301 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 92:4fc01daae5a5 302 __regfpscr = (fpscr);
bogdanm 92:4fc01daae5a5 303 #endif
bogdanm 92:4fc01daae5a5 304 }
bogdanm 92:4fc01daae5a5 305
bogdanm 92:4fc01daae5a5 306 #endif /* (__CORTEX_M == 0x04) */
bogdanm 92:4fc01daae5a5 307
bogdanm 92:4fc01daae5a5 308
bogdanm 92:4fc01daae5a5 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 92:4fc01daae5a5 310 /* IAR iccarm specific functions */
bogdanm 92:4fc01daae5a5 311
bogdanm 92:4fc01daae5a5 312 #include <cmsis_iar.h>
bogdanm 92:4fc01daae5a5 313
bogdanm 92:4fc01daae5a5 314
bogdanm 92:4fc01daae5a5 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 92:4fc01daae5a5 316 /* TI CCS specific functions */
bogdanm 92:4fc01daae5a5 317
bogdanm 92:4fc01daae5a5 318 #include <cmsis_ccs.h>
bogdanm 92:4fc01daae5a5 319
bogdanm 92:4fc01daae5a5 320
bogdanm 92:4fc01daae5a5 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 92:4fc01daae5a5 322 /* GNU gcc specific functions */
bogdanm 92:4fc01daae5a5 323
bogdanm 92:4fc01daae5a5 324 /** \brief Enable IRQ Interrupts
bogdanm 92:4fc01daae5a5 325
bogdanm 92:4fc01daae5a5 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 92:4fc01daae5a5 327 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 328 */
bogdanm 92:4fc01daae5a5 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 92:4fc01daae5a5 330 {
bogdanm 92:4fc01daae5a5 331 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 92:4fc01daae5a5 332 }
bogdanm 92:4fc01daae5a5 333
bogdanm 92:4fc01daae5a5 334
bogdanm 92:4fc01daae5a5 335 /** \brief Disable IRQ Interrupts
bogdanm 92:4fc01daae5a5 336
bogdanm 92:4fc01daae5a5 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 92:4fc01daae5a5 338 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 339 */
bogdanm 92:4fc01daae5a5 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 92:4fc01daae5a5 341 {
bogdanm 92:4fc01daae5a5 342 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 92:4fc01daae5a5 343 }
bogdanm 92:4fc01daae5a5 344
bogdanm 92:4fc01daae5a5 345
bogdanm 92:4fc01daae5a5 346 /** \brief Get Control Register
bogdanm 92:4fc01daae5a5 347
bogdanm 92:4fc01daae5a5 348 This function returns the content of the Control Register.
bogdanm 92:4fc01daae5a5 349
bogdanm 92:4fc01daae5a5 350 \return Control Register value
bogdanm 92:4fc01daae5a5 351 */
bogdanm 92:4fc01daae5a5 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 92:4fc01daae5a5 353 {
bogdanm 92:4fc01daae5a5 354 uint32_t result;
bogdanm 92:4fc01daae5a5 355
bogdanm 92:4fc01daae5a5 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 92:4fc01daae5a5 357 return(result);
bogdanm 92:4fc01daae5a5 358 }
bogdanm 92:4fc01daae5a5 359
bogdanm 92:4fc01daae5a5 360
bogdanm 92:4fc01daae5a5 361 /** \brief Set Control Register
bogdanm 92:4fc01daae5a5 362
bogdanm 92:4fc01daae5a5 363 This function writes the given value to the Control Register.
bogdanm 92:4fc01daae5a5 364
bogdanm 92:4fc01daae5a5 365 \param [in] control Control Register value to set
bogdanm 92:4fc01daae5a5 366 */
bogdanm 92:4fc01daae5a5 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 92:4fc01daae5a5 368 {
bogdanm 92:4fc01daae5a5 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 92:4fc01daae5a5 370 }
bogdanm 92:4fc01daae5a5 371
bogdanm 92:4fc01daae5a5 372
bogdanm 92:4fc01daae5a5 373 /** \brief Get IPSR Register
bogdanm 92:4fc01daae5a5 374
bogdanm 92:4fc01daae5a5 375 This function returns the content of the IPSR Register.
bogdanm 92:4fc01daae5a5 376
bogdanm 92:4fc01daae5a5 377 \return IPSR Register value
bogdanm 92:4fc01daae5a5 378 */
bogdanm 92:4fc01daae5a5 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 92:4fc01daae5a5 380 {
bogdanm 92:4fc01daae5a5 381 uint32_t result;
bogdanm 92:4fc01daae5a5 382
bogdanm 92:4fc01daae5a5 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 92:4fc01daae5a5 384 return(result);
bogdanm 92:4fc01daae5a5 385 }
bogdanm 92:4fc01daae5a5 386
bogdanm 92:4fc01daae5a5 387
bogdanm 92:4fc01daae5a5 388 /** \brief Get APSR Register
bogdanm 92:4fc01daae5a5 389
bogdanm 92:4fc01daae5a5 390 This function returns the content of the APSR Register.
bogdanm 92:4fc01daae5a5 391
bogdanm 92:4fc01daae5a5 392 \return APSR Register value
bogdanm 92:4fc01daae5a5 393 */
bogdanm 92:4fc01daae5a5 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 92:4fc01daae5a5 395 {
bogdanm 92:4fc01daae5a5 396 uint32_t result;
bogdanm 92:4fc01daae5a5 397
bogdanm 92:4fc01daae5a5 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 92:4fc01daae5a5 399 return(result);
bogdanm 92:4fc01daae5a5 400 }
bogdanm 92:4fc01daae5a5 401
bogdanm 92:4fc01daae5a5 402
bogdanm 92:4fc01daae5a5 403 /** \brief Get xPSR Register
bogdanm 92:4fc01daae5a5 404
bogdanm 92:4fc01daae5a5 405 This function returns the content of the xPSR Register.
bogdanm 92:4fc01daae5a5 406
bogdanm 92:4fc01daae5a5 407 \return xPSR Register value
bogdanm 92:4fc01daae5a5 408 */
bogdanm 92:4fc01daae5a5 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 92:4fc01daae5a5 410 {
bogdanm 92:4fc01daae5a5 411 uint32_t result;
bogdanm 92:4fc01daae5a5 412
bogdanm 92:4fc01daae5a5 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 92:4fc01daae5a5 414 return(result);
bogdanm 92:4fc01daae5a5 415 }
bogdanm 92:4fc01daae5a5 416
bogdanm 92:4fc01daae5a5 417
bogdanm 92:4fc01daae5a5 418 /** \brief Get Process Stack Pointer
bogdanm 92:4fc01daae5a5 419
bogdanm 92:4fc01daae5a5 420 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 92:4fc01daae5a5 421
bogdanm 92:4fc01daae5a5 422 \return PSP Register value
bogdanm 92:4fc01daae5a5 423 */
bogdanm 92:4fc01daae5a5 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 92:4fc01daae5a5 425 {
bogdanm 92:4fc01daae5a5 426 register uint32_t result;
bogdanm 92:4fc01daae5a5 427
bogdanm 92:4fc01daae5a5 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 92:4fc01daae5a5 429 return(result);
bogdanm 92:4fc01daae5a5 430 }
bogdanm 92:4fc01daae5a5 431
bogdanm 92:4fc01daae5a5 432
bogdanm 92:4fc01daae5a5 433 /** \brief Set Process Stack Pointer
bogdanm 92:4fc01daae5a5 434
bogdanm 92:4fc01daae5a5 435 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 92:4fc01daae5a5 436
bogdanm 92:4fc01daae5a5 437 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 92:4fc01daae5a5 438 */
bogdanm 92:4fc01daae5a5 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 92:4fc01daae5a5 440 {
bogdanm 92:4fc01daae5a5 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 92:4fc01daae5a5 442 }
bogdanm 92:4fc01daae5a5 443
bogdanm 92:4fc01daae5a5 444
bogdanm 92:4fc01daae5a5 445 /** \brief Get Main Stack Pointer
bogdanm 92:4fc01daae5a5 446
bogdanm 92:4fc01daae5a5 447 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 92:4fc01daae5a5 448
bogdanm 92:4fc01daae5a5 449 \return MSP Register value
bogdanm 92:4fc01daae5a5 450 */
bogdanm 92:4fc01daae5a5 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 92:4fc01daae5a5 452 {
bogdanm 92:4fc01daae5a5 453 register uint32_t result;
bogdanm 92:4fc01daae5a5 454
bogdanm 92:4fc01daae5a5 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 92:4fc01daae5a5 456 return(result);
bogdanm 92:4fc01daae5a5 457 }
bogdanm 92:4fc01daae5a5 458
bogdanm 92:4fc01daae5a5 459
bogdanm 92:4fc01daae5a5 460 /** \brief Set Main Stack Pointer
bogdanm 92:4fc01daae5a5 461
bogdanm 92:4fc01daae5a5 462 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 92:4fc01daae5a5 463
bogdanm 92:4fc01daae5a5 464 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 92:4fc01daae5a5 465 */
bogdanm 92:4fc01daae5a5 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 92:4fc01daae5a5 467 {
bogdanm 92:4fc01daae5a5 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 92:4fc01daae5a5 469 }
bogdanm 92:4fc01daae5a5 470
bogdanm 92:4fc01daae5a5 471
bogdanm 92:4fc01daae5a5 472 /** \brief Get Priority Mask
bogdanm 92:4fc01daae5a5 473
bogdanm 92:4fc01daae5a5 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 92:4fc01daae5a5 475
bogdanm 92:4fc01daae5a5 476 \return Priority Mask value
bogdanm 92:4fc01daae5a5 477 */
bogdanm 92:4fc01daae5a5 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 92:4fc01daae5a5 479 {
bogdanm 92:4fc01daae5a5 480 uint32_t result;
bogdanm 92:4fc01daae5a5 481
bogdanm 92:4fc01daae5a5 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 92:4fc01daae5a5 483 return(result);
bogdanm 92:4fc01daae5a5 484 }
bogdanm 92:4fc01daae5a5 485
bogdanm 92:4fc01daae5a5 486
bogdanm 92:4fc01daae5a5 487 /** \brief Set Priority Mask
bogdanm 92:4fc01daae5a5 488
bogdanm 92:4fc01daae5a5 489 This function assigns the given value to the Priority Mask Register.
bogdanm 92:4fc01daae5a5 490
bogdanm 92:4fc01daae5a5 491 \param [in] priMask Priority Mask
bogdanm 92:4fc01daae5a5 492 */
bogdanm 92:4fc01daae5a5 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 92:4fc01daae5a5 494 {
bogdanm 92:4fc01daae5a5 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 92:4fc01daae5a5 496 }
bogdanm 92:4fc01daae5a5 497
bogdanm 92:4fc01daae5a5 498
bogdanm 92:4fc01daae5a5 499 #if (__CORTEX_M >= 0x03)
bogdanm 92:4fc01daae5a5 500
bogdanm 92:4fc01daae5a5 501 /** \brief Enable FIQ
bogdanm 92:4fc01daae5a5 502
bogdanm 92:4fc01daae5a5 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 92:4fc01daae5a5 504 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 505 */
bogdanm 92:4fc01daae5a5 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 92:4fc01daae5a5 507 {
bogdanm 92:4fc01daae5a5 508 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 92:4fc01daae5a5 509 }
bogdanm 92:4fc01daae5a5 510
bogdanm 92:4fc01daae5a5 511
bogdanm 92:4fc01daae5a5 512 /** \brief Disable FIQ
bogdanm 92:4fc01daae5a5 513
bogdanm 92:4fc01daae5a5 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 92:4fc01daae5a5 515 Can only be executed in Privileged modes.
bogdanm 92:4fc01daae5a5 516 */
bogdanm 92:4fc01daae5a5 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 92:4fc01daae5a5 518 {
bogdanm 92:4fc01daae5a5 519 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 92:4fc01daae5a5 520 }
bogdanm 92:4fc01daae5a5 521
bogdanm 92:4fc01daae5a5 522
bogdanm 92:4fc01daae5a5 523 /** \brief Get Base Priority
bogdanm 92:4fc01daae5a5 524
bogdanm 92:4fc01daae5a5 525 This function returns the current value of the Base Priority register.
bogdanm 92:4fc01daae5a5 526
bogdanm 92:4fc01daae5a5 527 \return Base Priority register value
bogdanm 92:4fc01daae5a5 528 */
bogdanm 92:4fc01daae5a5 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 92:4fc01daae5a5 530 {
bogdanm 92:4fc01daae5a5 531 uint32_t result;
bogdanm 92:4fc01daae5a5 532
bogdanm 92:4fc01daae5a5 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
bogdanm 92:4fc01daae5a5 534 return(result);
bogdanm 92:4fc01daae5a5 535 }
bogdanm 92:4fc01daae5a5 536
bogdanm 92:4fc01daae5a5 537
bogdanm 92:4fc01daae5a5 538 /** \brief Set Base Priority
bogdanm 92:4fc01daae5a5 539
bogdanm 92:4fc01daae5a5 540 This function assigns the given value to the Base Priority register.
bogdanm 92:4fc01daae5a5 541
bogdanm 92:4fc01daae5a5 542 \param [in] basePri Base Priority value to set
bogdanm 92:4fc01daae5a5 543 */
bogdanm 92:4fc01daae5a5 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 92:4fc01daae5a5 545 {
bogdanm 92:4fc01daae5a5 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 92:4fc01daae5a5 547 }
bogdanm 92:4fc01daae5a5 548
bogdanm 92:4fc01daae5a5 549
bogdanm 92:4fc01daae5a5 550 /** \brief Get Fault Mask
bogdanm 92:4fc01daae5a5 551
bogdanm 92:4fc01daae5a5 552 This function returns the current value of the Fault Mask register.
bogdanm 92:4fc01daae5a5 553
bogdanm 92:4fc01daae5a5 554 \return Fault Mask register value
bogdanm 92:4fc01daae5a5 555 */
bogdanm 92:4fc01daae5a5 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 92:4fc01daae5a5 557 {
bogdanm 92:4fc01daae5a5 558 uint32_t result;
bogdanm 92:4fc01daae5a5 559
bogdanm 92:4fc01daae5a5 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 92:4fc01daae5a5 561 return(result);
bogdanm 92:4fc01daae5a5 562 }
bogdanm 92:4fc01daae5a5 563
bogdanm 92:4fc01daae5a5 564
bogdanm 92:4fc01daae5a5 565 /** \brief Set Fault Mask
bogdanm 92:4fc01daae5a5 566
bogdanm 92:4fc01daae5a5 567 This function assigns the given value to the Fault Mask register.
bogdanm 92:4fc01daae5a5 568
bogdanm 92:4fc01daae5a5 569 \param [in] faultMask Fault Mask value to set
bogdanm 92:4fc01daae5a5 570 */
bogdanm 92:4fc01daae5a5 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 92:4fc01daae5a5 572 {
bogdanm 92:4fc01daae5a5 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 92:4fc01daae5a5 574 }
bogdanm 92:4fc01daae5a5 575
bogdanm 92:4fc01daae5a5 576 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 92:4fc01daae5a5 577
bogdanm 92:4fc01daae5a5 578
bogdanm 92:4fc01daae5a5 579 #if (__CORTEX_M == 0x04)
bogdanm 92:4fc01daae5a5 580
bogdanm 92:4fc01daae5a5 581 /** \brief Get FPSCR
bogdanm 92:4fc01daae5a5 582
bogdanm 92:4fc01daae5a5 583 This function returns the current value of the Floating Point Status/Control register.
bogdanm 92:4fc01daae5a5 584
bogdanm 92:4fc01daae5a5 585 \return Floating Point Status/Control register value
bogdanm 92:4fc01daae5a5 586 */
bogdanm 92:4fc01daae5a5 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 92:4fc01daae5a5 588 {
bogdanm 92:4fc01daae5a5 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 92:4fc01daae5a5 590 uint32_t result;
bogdanm 92:4fc01daae5a5 591
bogdanm 92:4fc01daae5a5 592 /* Empty asm statement works as a scheduling barrier */
bogdanm 92:4fc01daae5a5 593 __ASM volatile ("");
bogdanm 92:4fc01daae5a5 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 92:4fc01daae5a5 595 __ASM volatile ("");
bogdanm 92:4fc01daae5a5 596 return(result);
bogdanm 92:4fc01daae5a5 597 #else
bogdanm 92:4fc01daae5a5 598 return(0);
bogdanm 92:4fc01daae5a5 599 #endif
bogdanm 92:4fc01daae5a5 600 }
bogdanm 92:4fc01daae5a5 601
bogdanm 92:4fc01daae5a5 602
bogdanm 92:4fc01daae5a5 603 /** \brief Set FPSCR
bogdanm 92:4fc01daae5a5 604
bogdanm 92:4fc01daae5a5 605 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 92:4fc01daae5a5 606
bogdanm 92:4fc01daae5a5 607 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 92:4fc01daae5a5 608 */
bogdanm 92:4fc01daae5a5 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 92:4fc01daae5a5 610 {
bogdanm 92:4fc01daae5a5 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 92:4fc01daae5a5 612 /* Empty asm statement works as a scheduling barrier */
bogdanm 92:4fc01daae5a5 613 __ASM volatile ("");
bogdanm 92:4fc01daae5a5 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 92:4fc01daae5a5 615 __ASM volatile ("");
bogdanm 92:4fc01daae5a5 616 #endif
bogdanm 92:4fc01daae5a5 617 }
bogdanm 92:4fc01daae5a5 618
bogdanm 92:4fc01daae5a5 619 #endif /* (__CORTEX_M == 0x04) */
bogdanm 92:4fc01daae5a5 620
bogdanm 92:4fc01daae5a5 621
bogdanm 92:4fc01daae5a5 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 92:4fc01daae5a5 623 /* TASKING carm specific functions */
bogdanm 92:4fc01daae5a5 624
bogdanm 92:4fc01daae5a5 625 /*
bogdanm 92:4fc01daae5a5 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 92:4fc01daae5a5 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
bogdanm 92:4fc01daae5a5 628 * Including the CMSIS ones.
bogdanm 92:4fc01daae5a5 629 */
bogdanm 92:4fc01daae5a5 630
bogdanm 92:4fc01daae5a5 631 #endif
bogdanm 92:4fc01daae5a5 632
bogdanm 92:4fc01daae5a5 633 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 92:4fc01daae5a5 634
bogdanm 92:4fc01daae5a5 635
bogdanm 92:4fc01daae5a5 636 #endif /* __CORE_CMFUNC_H */