雄介 太田 / mbed

mbed(SerialHalfDuplex入り)

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TARGET_ARCH_MAX/stm32f4xx_ll_usb.h@98:01a414ca7d6d, 2015-04-08 (annotated)

Committer:
yusuke_kyo
Date:
Wed Apr 08 08:04:18 2015 +0000
Revision:
98:01a414ca7d6d
Parent:
92:4fc01daae5a5 
remove SerialHalfDuplex.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_ll_usb.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 89:552587b429a1 7 * @brief Header file of USB Core HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_LL_USB_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_LL_USB_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup USB_Core
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 /**
bogdanm 89:552587b429a1 60 * @brief USB Mode definition
bogdanm 89:552587b429a1 61 */
bogdanm 89:552587b429a1 62 typedef enum
bogdanm 89:552587b429a1 63 {
bogdanm 89:552587b429a1 64 USB_OTG_DEVICE_MODE = 0,
bogdanm 89:552587b429a1 65 USB_OTG_HOST_MODE = 1,
bogdanm 89:552587b429a1 66 USB_OTG_DRD_MODE = 2
bogdanm 89:552587b429a1 67
bogdanm 89:552587b429a1 68 }USB_OTG_ModeTypeDef;
bogdanm 89:552587b429a1 69
bogdanm 89:552587b429a1 70 /**
bogdanm 89:552587b429a1 71 * @brief URB States definition
bogdanm 89:552587b429a1 72 */
bogdanm 89:552587b429a1 73 typedef enum {
bogdanm 89:552587b429a1 74 URB_IDLE = 0,
bogdanm 89:552587b429a1 75 URB_DONE,
bogdanm 89:552587b429a1 76 URB_NOTREADY,
bogdanm 89:552587b429a1 77 URB_NYET,
bogdanm 89:552587b429a1 78 URB_ERROR,
bogdanm 89:552587b429a1 79 URB_STALL
bogdanm 89:552587b429a1 80
bogdanm 89:552587b429a1 81 }USB_OTG_URBStateTypeDef;
bogdanm 89:552587b429a1 82
bogdanm 89:552587b429a1 83 /**
bogdanm 89:552587b429a1 84 * @brief Host channel States definition
bogdanm 89:552587b429a1 85 */
bogdanm 89:552587b429a1 86 typedef enum {
bogdanm 89:552587b429a1 87 HC_IDLE = 0,
bogdanm 89:552587b429a1 88 HC_XFRC,
bogdanm 89:552587b429a1 89 HC_HALTED,
bogdanm 89:552587b429a1 90 HC_NAK,
bogdanm 89:552587b429a1 91 HC_NYET,
bogdanm 89:552587b429a1 92 HC_STALL,
bogdanm 89:552587b429a1 93 HC_XACTERR,
bogdanm 89:552587b429a1 94 HC_BBLERR,
bogdanm 89:552587b429a1 95 HC_DATATGLERR
bogdanm 89:552587b429a1 96
bogdanm 89:552587b429a1 97 }USB_OTG_HCStateTypeDef;
bogdanm 89:552587b429a1 98
bogdanm 89:552587b429a1 99 /**
bogdanm 89:552587b429a1 100 * @brief PCD Initialization Structure definition
bogdanm 89:552587b429a1 101 */
bogdanm 89:552587b429a1 102 typedef struct
bogdanm 89:552587b429a1 103 {
bogdanm 89:552587b429a1 104 uint32_t dev_endpoints; /*!< Device Endpoints number.
bogdanm 89:552587b429a1 105 This parameter depends on the used USB core.
bogdanm 89:552587b429a1 106 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 107
bogdanm 89:552587b429a1 108 uint32_t Host_channels; /*!< Host Channels number.
bogdanm 89:552587b429a1 109 This parameter Depends on the used USB core.
bogdanm 89:552587b429a1 110 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 111
bogdanm 89:552587b429a1 112 uint32_t speed; /*!< USB Core speed.
bogdanm 89:552587b429a1 113 This parameter can be any value of @ref USB_Core_Speed_ */
bogdanm 89:552587b429a1 114
bogdanm 89:552587b429a1 115 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
bogdanm 89:552587b429a1 116
bogdanm 89:552587b429a1 117 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
bogdanm 89:552587b429a1 118 This parameter can be any value of @ref USB_EP0_MPS_ */
bogdanm 89:552587b429a1 119
bogdanm 89:552587b429a1 120 uint32_t phy_itface; /*!< Select the used PHY interface.
bogdanm 89:552587b429a1 121 This parameter can be any value of @ref USB_Core_PHY_ */
bogdanm 89:552587b429a1 122
bogdanm 89:552587b429a1 123 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
bogdanm 89:552587b429a1 124
bogdanm 89:552587b429a1 125 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
bogdanm 89:552587b429a1 126
bogdanm 89:552587b429a1 127 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
bogdanm 89:552587b429a1 128
bogdanm 89:552587b429a1 129 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
bogdanm 89:552587b429a1 130
bogdanm 89:552587b429a1 131 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
bogdanm 89:552587b429a1 132
bogdanm 89:552587b429a1 133 }USB_OTG_CfgTypeDef;
bogdanm 89:552587b429a1 134
bogdanm 89:552587b429a1 135 typedef struct
bogdanm 89:552587b429a1 136 {
bogdanm 89:552587b429a1 137 uint8_t num; /*!< Endpoint number
bogdanm 89:552587b429a1 138 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 139
bogdanm 89:552587b429a1 140 uint8_t is_in; /*!< Endpoint direction
bogdanm 89:552587b429a1 141 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 142
bogdanm 89:552587b429a1 143 uint8_t is_stall; /*!< Endpoint stall condition
bogdanm 89:552587b429a1 144 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 145
bogdanm 89:552587b429a1 146 uint8_t type; /*!< Endpoint type
bogdanm 89:552587b429a1 147 This parameter can be any value of @ref USB_EP_Type_ */
bogdanm 89:552587b429a1 148
bogdanm 89:552587b429a1 149 uint8_t data_pid_start; /*!< Initial data PID
bogdanm 89:552587b429a1 150 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 151
bogdanm 89:552587b429a1 152 uint8_t even_odd_frame; /*!< IFrame parity
bogdanm 89:552587b429a1 153 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 154
bogdanm 89:552587b429a1 155 uint16_t tx_fifo_num; /*!< Transmission FIFO number
bogdanm 89:552587b429a1 156 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 157
bogdanm 89:552587b429a1 158 uint32_t maxpacket; /*!< Endpoint Max packet size
bogdanm 89:552587b429a1 159 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
bogdanm 89:552587b429a1 160
bogdanm 89:552587b429a1 161 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
bogdanm 89:552587b429a1 162
bogdanm 89:552587b429a1 163 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
bogdanm 89:552587b429a1 164
bogdanm 89:552587b429a1 165 uint32_t xfer_len; /*!< Current transfer length */
bogdanm 89:552587b429a1 166
bogdanm 89:552587b429a1 167 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
bogdanm 89:552587b429a1 168
bogdanm 89:552587b429a1 169 }USB_OTG_EPTypeDef;
bogdanm 89:552587b429a1 170
bogdanm 89:552587b429a1 171 typedef struct
bogdanm 89:552587b429a1 172 {
bogdanm 89:552587b429a1 173 uint8_t dev_addr ; /*!< USB device address.
bogdanm 89:552587b429a1 174 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
bogdanm 89:552587b429a1 175
bogdanm 89:552587b429a1 176 uint8_t ch_num; /*!< Host channel number.
bogdanm 89:552587b429a1 177 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 178
bogdanm 89:552587b429a1 179 uint8_t ep_num; /*!< Endpoint number.
bogdanm 89:552587b429a1 180 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
bogdanm 89:552587b429a1 181
bogdanm 89:552587b429a1 182 uint8_t ep_is_in; /*!< Endpoint direction
bogdanm 89:552587b429a1 183 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 184
bogdanm 89:552587b429a1 185 uint8_t speed; /*!< USB Host speed.
bogdanm 89:552587b429a1 186 This parameter can be any value of @ref USB_Core_Speed_ */
bogdanm 89:552587b429a1 187
bogdanm 89:552587b429a1 188 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
bogdanm 89:552587b429a1 189
bogdanm 89:552587b429a1 190 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
bogdanm 89:552587b429a1 191
bogdanm 89:552587b429a1 192 uint8_t ep_type; /*!< Endpoint Type.
bogdanm 89:552587b429a1 193 This parameter can be any value of @ref USB_EP_Type_ */
bogdanm 89:552587b429a1 194
bogdanm 89:552587b429a1 195 uint16_t max_packet; /*!< Endpoint Max packet size.
bogdanm 89:552587b429a1 196 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
bogdanm 89:552587b429a1 197
bogdanm 89:552587b429a1 198 uint8_t data_pid; /*!< Initial data PID.
bogdanm 89:552587b429a1 199 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 200
bogdanm 89:552587b429a1 201 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
bogdanm 89:552587b429a1 202
bogdanm 89:552587b429a1 203 uint32_t xfer_len; /*!< Current transfer length. */
bogdanm 89:552587b429a1 204
bogdanm 89:552587b429a1 205 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
bogdanm 89:552587b429a1 206
bogdanm 89:552587b429a1 207 uint8_t toggle_in; /*!< IN transfer current toggle flag.
bogdanm 89:552587b429a1 208 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 209
bogdanm 89:552587b429a1 210 uint8_t toggle_out; /*!< OUT transfer current toggle flag
bogdanm 89:552587b429a1 211 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
bogdanm 89:552587b429a1 212
bogdanm 89:552587b429a1 213 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
bogdanm 89:552587b429a1 214
bogdanm 89:552587b429a1 215 uint32_t ErrCnt; /*!< Host channel error count.*/
bogdanm 89:552587b429a1 216
bogdanm 89:552587b429a1 217 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
bogdanm 89:552587b429a1 218 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
bogdanm 89:552587b429a1 219
bogdanm 89:552587b429a1 220 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
bogdanm 89:552587b429a1 221 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
bogdanm 89:552587b429a1 222
bogdanm 89:552587b429a1 223 }USB_OTG_HCTypeDef;
bogdanm 89:552587b429a1 224
bogdanm 89:552587b429a1 225 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 226
bogdanm 89:552587b429a1 227 /** @defgroup PCD_Exported_Constants
bogdanm 89:552587b429a1 228 * @{
bogdanm 89:552587b429a1 229 */
bogdanm 89:552587b429a1 230
bogdanm 89:552587b429a1 231 /** @defgroup USB_Core_Mode_
bogdanm 89:552587b429a1 232 * @{
bogdanm 89:552587b429a1 233 */
bogdanm 89:552587b429a1 234 #define USB_OTG_MODE_DEVICE 0
bogdanm 89:552587b429a1 235 #define USB_OTG_MODE_HOST 1
bogdanm 89:552587b429a1 236 #define USB_OTG_MODE_DRD 2
bogdanm 89:552587b429a1 237 /**
bogdanm 89:552587b429a1 238 * @}
bogdanm 89:552587b429a1 239 */
bogdanm 89:552587b429a1 240
bogdanm 89:552587b429a1 241 /** @defgroup USB_Core_Speed_
bogdanm 89:552587b429a1 242 * @{
bogdanm 89:552587b429a1 243 */
bogdanm 89:552587b429a1 244 #define USB_OTG_SPEED_HIGH 0
bogdanm 89:552587b429a1 245 #define USB_OTG_SPEED_HIGH_IN_FULL 1
bogdanm 89:552587b429a1 246 #define USB_OTG_SPEED_LOW 2
bogdanm 89:552587b429a1 247 #define USB_OTG_SPEED_FULL 3
bogdanm 89:552587b429a1 248 /**
bogdanm 89:552587b429a1 249 * @}
bogdanm 89:552587b429a1 250 */
bogdanm 89:552587b429a1 251
bogdanm 89:552587b429a1 252 /** @defgroup USB_Core_PHY_
bogdanm 89:552587b429a1 253 * @{
bogdanm 89:552587b429a1 254 */
bogdanm 89:552587b429a1 255 #define USB_OTG_ULPI_PHY 1
bogdanm 89:552587b429a1 256 #define USB_OTG_EMBEDDED_PHY 2
bogdanm 89:552587b429a1 257 /**
bogdanm 89:552587b429a1 258 * @}
bogdanm 89:552587b429a1 259 */
bogdanm 89:552587b429a1 260
bogdanm 89:552587b429a1 261 /** @defgroup USB_Core_MPS_
bogdanm 89:552587b429a1 262 * @{
bogdanm 89:552587b429a1 263 */
bogdanm 89:552587b429a1 264 #define USB_OTG_HS_MAX_PACKET_SIZE 512
bogdanm 89:552587b429a1 265 #define USB_OTG_FS_MAX_PACKET_SIZE 64
bogdanm 89:552587b429a1 266 #define USB_OTG_MAX_EP0_SIZE 64
bogdanm 89:552587b429a1 267 /**
bogdanm 89:552587b429a1 268 * @}
bogdanm 89:552587b429a1 269 */
bogdanm 89:552587b429a1 270
bogdanm 89:552587b429a1 271 /** @defgroup USB_Core_Phy_Frequency_
bogdanm 89:552587b429a1 272 * @{
bogdanm 89:552587b429a1 273 */
bogdanm 89:552587b429a1 274 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1)
bogdanm 89:552587b429a1 275 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
bogdanm 89:552587b429a1 276 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
bogdanm 89:552587b429a1 277 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
bogdanm 89:552587b429a1 278 /**
bogdanm 89:552587b429a1 279 * @}
bogdanm 89:552587b429a1 280 */
bogdanm 89:552587b429a1 281
bogdanm 89:552587b429a1 282 /** @defgroup USB_CORE_Frame_Interval_
bogdanm 89:552587b429a1 283 * @{
bogdanm 89:552587b429a1 284 */
bogdanm 89:552587b429a1 285 #define DCFG_FRAME_INTERVAL_80 0
bogdanm 89:552587b429a1 286 #define DCFG_FRAME_INTERVAL_85 1
bogdanm 89:552587b429a1 287 #define DCFG_FRAME_INTERVAL_90 2
bogdanm 89:552587b429a1 288 #define DCFG_FRAME_INTERVAL_95 3
bogdanm 89:552587b429a1 289 /**
bogdanm 89:552587b429a1 290 * @}
bogdanm 89:552587b429a1 291 */
bogdanm 89:552587b429a1 292
bogdanm 89:552587b429a1 293 /** @defgroup USB_EP0_MPS_
bogdanm 89:552587b429a1 294 * @{
bogdanm 89:552587b429a1 295 */
bogdanm 89:552587b429a1 296 #define DEP0CTL_MPS_64 0
bogdanm 89:552587b429a1 297 #define DEP0CTL_MPS_32 1
bogdanm 89:552587b429a1 298 #define DEP0CTL_MPS_16 2
bogdanm 89:552587b429a1 299 #define DEP0CTL_MPS_8 3
bogdanm 89:552587b429a1 300 /**
bogdanm 89:552587b429a1 301 * @}
bogdanm 89:552587b429a1 302 */
bogdanm 89:552587b429a1 303
bogdanm 89:552587b429a1 304 /** @defgroup USB_EP_Speed_
bogdanm 89:552587b429a1 305 * @{
bogdanm 89:552587b429a1 306 */
bogdanm 89:552587b429a1 307 #define EP_SPEED_LOW 0
bogdanm 89:552587b429a1 308 #define EP_SPEED_FULL 1
bogdanm 89:552587b429a1 309 #define EP_SPEED_HIGH 2
bogdanm 89:552587b429a1 310 /**
bogdanm 89:552587b429a1 311 * @}
bogdanm 89:552587b429a1 312 */
bogdanm 89:552587b429a1 313
bogdanm 89:552587b429a1 314 /** @defgroup USB_EP_Type_
bogdanm 89:552587b429a1 315 * @{
bogdanm 89:552587b429a1 316 */
bogdanm 89:552587b429a1 317 #define EP_TYPE_CTRL 0
bogdanm 89:552587b429a1 318 #define EP_TYPE_ISOC 1
bogdanm 89:552587b429a1 319 #define EP_TYPE_BULK 2
bogdanm 89:552587b429a1 320 #define EP_TYPE_INTR 3
bogdanm 89:552587b429a1 321 #define EP_TYPE_MSK 3
bogdanm 89:552587b429a1 322 /**
bogdanm 89:552587b429a1 323 * @}
bogdanm 89:552587b429a1 324 */
bogdanm 89:552587b429a1 325
bogdanm 89:552587b429a1 326 /** @defgroup USB_STS_Defines_
bogdanm 89:552587b429a1 327 * @{
bogdanm 89:552587b429a1 328 */
bogdanm 89:552587b429a1 329 #define STS_GOUT_NAK 1
bogdanm 89:552587b429a1 330 #define STS_DATA_UPDT 2
bogdanm 89:552587b429a1 331 #define STS_XFER_COMP 3
bogdanm 89:552587b429a1 332 #define STS_SETUP_COMP 4
bogdanm 89:552587b429a1 333 #define STS_SETUP_UPDT 6
bogdanm 89:552587b429a1 334 /**
bogdanm 89:552587b429a1 335 * @}
bogdanm 89:552587b429a1 336 */
bogdanm 89:552587b429a1 337
bogdanm 89:552587b429a1 338 /** @defgroup HCFG_SPEED_Defines_
bogdanm 89:552587b429a1 339 * @{
bogdanm 89:552587b429a1 340 */
bogdanm 89:552587b429a1 341 #define HCFG_30_60_MHZ 0
bogdanm 89:552587b429a1 342 #define HCFG_48_MHZ 1
bogdanm 89:552587b429a1 343 #define HCFG_6_MHZ 2
bogdanm 89:552587b429a1 344 /**
bogdanm 89:552587b429a1 345 * @}
bogdanm 89:552587b429a1 346 */
bogdanm 89:552587b429a1 347
bogdanm 89:552587b429a1 348 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_
bogdanm 89:552587b429a1 349 * @{
bogdanm 89:552587b429a1 350 */
bogdanm 89:552587b429a1 351 #define HPRT0_PRTSPD_HIGH_SPEED 0
bogdanm 89:552587b429a1 352 #define HPRT0_PRTSPD_FULL_SPEED 1
bogdanm 89:552587b429a1 353 #define HPRT0_PRTSPD_LOW_SPEED 2
bogdanm 89:552587b429a1 354 /**
bogdanm 89:552587b429a1 355 * @}
bogdanm 89:552587b429a1 356 */
bogdanm 89:552587b429a1 357
bogdanm 89:552587b429a1 358 #define HCCHAR_CTRL 0
bogdanm 89:552587b429a1 359 #define HCCHAR_ISOC 1
bogdanm 89:552587b429a1 360 #define HCCHAR_BULK 2
bogdanm 89:552587b429a1 361 #define HCCHAR_INTR 3
bogdanm 89:552587b429a1 362
bogdanm 89:552587b429a1 363 #define HC_PID_DATA0 0
bogdanm 89:552587b429a1 364 #define HC_PID_DATA2 1
bogdanm 89:552587b429a1 365 #define HC_PID_DATA1 2
bogdanm 89:552587b429a1 366 #define HC_PID_SETUP 3
bogdanm 89:552587b429a1 367
bogdanm 89:552587b429a1 368 #define GRXSTS_PKTSTS_IN 2
bogdanm 89:552587b429a1 369 #define GRXSTS_PKTSTS_IN_XFER_COMP 3
bogdanm 89:552587b429a1 370 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
bogdanm 89:552587b429a1 371 #define GRXSTS_PKTSTS_CH_HALTED 7
bogdanm 89:552587b429a1 372
bogdanm 89:552587b429a1 373 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
bogdanm 89:552587b429a1 374 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
bogdanm 89:552587b429a1 375
bogdanm 89:552587b429a1 376 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
bogdanm 89:552587b429a1 377 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
bogdanm 89:552587b429a1 378 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
bogdanm 89:552587b429a1 379 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
bogdanm 89:552587b429a1 380
bogdanm 89:552587b429a1 381 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
bogdanm 89:552587b429a1 382 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
bogdanm 89:552587b429a1 383
bogdanm 89:552587b429a1 384 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 385 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
bogdanm 89:552587b429a1 386 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
bogdanm 89:552587b429a1 387
bogdanm 89:552587b429a1 388 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
bogdanm 89:552587b429a1 389 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
bogdanm 89:552587b429a1 390
bogdanm 89:552587b429a1 391 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 392 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
bogdanm 89:552587b429a1 393 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
bogdanm 89:552587b429a1 394 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 395 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 396 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
bogdanm 89:552587b429a1 397 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
bogdanm 89:552587b429a1 398 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 399 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
bogdanm 89:552587b429a1 400 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 401 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 402 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 403 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 404 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
bogdanm 89:552587b429a1 405 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
bogdanm 89:552587b429a1 406 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
bogdanm 89:552587b429a1 407 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
bogdanm 89:552587b429a1 408 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 409 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
bogdanm 89:552587b429a1 410 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
bogdanm 89:552587b429a1 411 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 412 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 413 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 414 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 415 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
bogdanm 89:552587b429a1 416 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 417 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 418 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 419 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 420 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
bogdanm 89:552587b429a1 421 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 422 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
bogdanm 89:552587b429a1 423 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
bogdanm 89:552587b429a1 424
bogdanm 89:552587b429a1 425 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
bogdanm 89:552587b429a1 426 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
bogdanm 89:552587b429a1 427 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 428 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
bogdanm 89:552587b429a1 429 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 430 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 431 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
bogdanm 89:552587b429a1 432 uint8_t ch_num,
bogdanm 89:552587b429a1 433 uint8_t epnum,
bogdanm 89:552587b429a1 434 uint8_t dev_address,
bogdanm 89:552587b429a1 435 uint8_t speed,
bogdanm 89:552587b429a1 436 uint8_t ep_type,
bogdanm 89:552587b429a1 437 uint16_t mps);
bogdanm 89:552587b429a1 438 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
bogdanm 89:552587b429a1 439 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 440 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
bogdanm 89:552587b429a1 441 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
bogdanm 89:552587b429a1 442 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
bogdanm 89:552587b429a1 443
bogdanm 89:552587b429a1 444 /**
bogdanm 89:552587b429a1 445 * @}
bogdanm 89:552587b429a1 446 */
bogdanm 89:552587b429a1 447
bogdanm 89:552587b429a1 448 /**
bogdanm 89:552587b429a1 449 * @}
bogdanm 89:552587b429a1 450 */
bogdanm 89:552587b429a1 451
bogdanm 89:552587b429a1 452 #ifdef __cplusplus
bogdanm 89:552587b429a1 453 }
bogdanm 89:552587b429a1 454 #endif
bogdanm 89:552587b429a1 455
bogdanm 89:552587b429a1 456
bogdanm 89:552587b429a1 457 #endif /* __STM32F4xx_LL_USB_H */
bogdanm 89:552587b429a1 458
bogdanm 89:552587b429a1 459 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/