mbeduino MP3 Sheild player MP3 player that runs on mebeduin with MP3 Shield. Regarding mbeduino, refer to: http://mbed.org/users/okini3939/notebook/mbeduino/ Regarding MP3 Shiled, refer to: http://www.sparkfun.com/commerce/product_info.php?products_id=9736

Dependencies:   mbed SDFileSystem

Committer:
xshige
Date:
Tue Oct 12 14:11:52 2010 +0000
Revision:
0:67cb2f650c15
Child:
1:c47269f0e9e1

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
xshige 0:67cb2f650c15 1 #include "VS1053.h"
xshige 0:67cb2f650c15 2 #include "mbed.h"
xshige 0:67cb2f650c15 3
xshige 0:67cb2f650c15 4
xshige 0:67cb2f650c15 5 Serial pc(USBTX, USBRX);
xshige 0:67cb2f650c15 6
xshige 0:67cb2f650c15 7 /* ==================================================================
xshige 0:67cb2f650c15 8 * Constructor
xshige 0:67cb2f650c15 9 * =================================================================*/
xshige 0:67cb2f650c15 10 VS1053::VS1053(
xshige 0:67cb2f650c15 11 PinName mosi, PinName miso, PinName sck, PinName cs, PinName rst,
xshige 0:67cb2f650c15 12 PinName dreq, PinName dcs, PinName vol)
xshige 0:67cb2f650c15 13 :
xshige 0:67cb2f650c15 14 _spi(mosi, miso, sck),
xshige 0:67cb2f650c15 15 _CS(cs),
xshige 0:67cb2f650c15 16 _RST(rst),
xshige 0:67cb2f650c15 17 _DREQ(dreq),
xshige 0:67cb2f650c15 18 _DCS(dcs),
xshige 0:67cb2f650c15 19 _VOL(vol) {
xshige 0:67cb2f650c15 20
xshige 0:67cb2f650c15 21 }
xshige 0:67cb2f650c15 22
xshige 0:67cb2f650c15 23 /*===================================================================
xshige 0:67cb2f650c15 24 * Functions
xshige 0:67cb2f650c15 25 *==================================================================*/
xshige 0:67cb2f650c15 26
xshige 0:67cb2f650c15 27 void VS1053::cs_low(void)
xshige 0:67cb2f650c15 28 {
xshige 0:67cb2f650c15 29 _CS = 0;
xshige 0:67cb2f650c15 30 }
xshige 0:67cb2f650c15 31 void VS1053::cs_high(void)
xshige 0:67cb2f650c15 32 {
xshige 0:67cb2f650c15 33 _CS = 1;
xshige 0:67cb2f650c15 34 }
xshige 0:67cb2f650c15 35 void VS1053::dcs_low(void)
xshige 0:67cb2f650c15 36 {
xshige 0:67cb2f650c15 37 _DCS = 0;
xshige 0:67cb2f650c15 38 }
xshige 0:67cb2f650c15 39 void VS1053::dcs_high(void)
xshige 0:67cb2f650c15 40 {
xshige 0:67cb2f650c15 41 _DCS = 1;
xshige 0:67cb2f650c15 42 }
xshige 0:67cb2f650c15 43 void VS1053::sci_en(void) //SCI enable
xshige 0:67cb2f650c15 44 {
xshige 0:67cb2f650c15 45 cs_high();
xshige 0:67cb2f650c15 46 dcs_high();
xshige 0:67cb2f650c15 47 cs_low();
xshige 0:67cb2f650c15 48 }
xshige 0:67cb2f650c15 49 void VS1053::sci_dis(void) //SCI disable
xshige 0:67cb2f650c15 50 {
xshige 0:67cb2f650c15 51 cs_high();
xshige 0:67cb2f650c15 52 }
xshige 0:67cb2f650c15 53 void VS1053::sdi_en(void) //SDI enable
xshige 0:67cb2f650c15 54 {
xshige 0:67cb2f650c15 55 dcs_high();
xshige 0:67cb2f650c15 56 cs_high();
xshige 0:67cb2f650c15 57 dcs_low();
xshige 0:67cb2f650c15 58 }
xshige 0:67cb2f650c15 59 void VS1053::sdi_dis(void) //SDI disable
xshige 0:67cb2f650c15 60 {
xshige 0:67cb2f650c15 61 dcs_high();
xshige 0:67cb2f650c15 62 }
xshige 0:67cb2f650c15 63 void VS1053::reset(void) //hardware reset
xshige 0:67cb2f650c15 64 {
xshige 0:67cb2f650c15 65 wait(0.01);
xshige 0:67cb2f650c15 66 _RST = 0;
xshige 0:67cb2f650c15 67 wait(0.01);
xshige 0:67cb2f650c15 68 _RST = 1;
xshige 0:67cb2f650c15 69 wait(0.10);
xshige 0:67cb2f650c15 70 }
xshige 0:67cb2f650c15 71 void VS1053::power_down(void) //hardware and software reset
xshige 0:67cb2f650c15 72 {
xshige 0:67cb2f650c15 73 cs_low();
xshige 0:67cb2f650c15 74 reset();
xshige 0:67cb2f650c15 75 // sci_write(0x00, SM_PDOWN);
xshige 0:67cb2f650c15 76 sci_write(0x00, 0x10); // tempo
xshige 0:67cb2f650c15 77 wait(0.01);
xshige 0:67cb2f650c15 78 reset();
xshige 0:67cb2f650c15 79 }
xshige 0:67cb2f650c15 80 void VS1053::sci_initialise(void)
xshige 0:67cb2f650c15 81 {
xshige 0:67cb2f650c15 82 _RST = 1; //no reset
xshige 0:67cb2f650c15 83 _spi.format(8,0); //spi 8bit interface, steady state low
xshige 0:67cb2f650c15 84 _spi.frequency(1000000); //rising edge data record, freq. 1Mhz
xshige 0:67cb2f650c15 85
xshige 0:67cb2f650c15 86 cs_low();
xshige 0:67cb2f650c15 87 for(int i=0; i<4; i++)
xshige 0:67cb2f650c15 88 {
xshige 0:67cb2f650c15 89 _spi.write(0xFF); //clock the chip a bit
xshige 0:67cb2f650c15 90 }
xshige 0:67cb2f650c15 91 cs_high();
xshige 0:67cb2f650c15 92 dcs_high();
xshige 0:67cb2f650c15 93 wait_us(5);
xshige 0:67cb2f650c15 94 }
xshige 0:67cb2f650c15 95 void VS1053::sdi_initialise(void)
xshige 0:67cb2f650c15 96 {
xshige 0:67cb2f650c15 97 _spi.format(8,0);
xshige 0:67cb2f650c15 98 _spi.frequency(7000000); //set to 7MHz
xshige 0:67cb2f650c15 99
xshige 0:67cb2f650c15 100 cs_high();
xshige 0:67cb2f650c15 101 dcs_high();
xshige 0:67cb2f650c15 102 }
xshige 0:67cb2f650c15 103 void VS1053::sci_write(unsigned char address, unsigned short int data)
xshige 0:67cb2f650c15 104 {
xshige 0:67cb2f650c15 105 sci_en(); //enables SCI/disables SDI
xshige 0:67cb2f650c15 106
xshige 0:67cb2f650c15 107 while(!_DREQ); //wait unitl data request is high
xshige 0:67cb2f650c15 108 _spi.write(0x02); //SCI write
xshige 0:67cb2f650c15 109 _spi.write(address); //register address
xshige 0:67cb2f650c15 110 _spi.write((data >> 8) & 0xFF); //write out first half of data word
xshige 0:67cb2f650c15 111 _spi.write(data & 0xFF); //write out second half of data word
xshige 0:67cb2f650c15 112
xshige 0:67cb2f650c15 113 sci_dis(); //enables SDI/disables SCI
xshige 0:67cb2f650c15 114 wait_us(5);
xshige 0:67cb2f650c15 115 }
xshige 0:67cb2f650c15 116 void VS1053::sdi_write(unsigned char datum)
xshige 0:67cb2f650c15 117 {
xshige 0:67cb2f650c15 118 sdi_en();
xshige 0:67cb2f650c15 119
xshige 0:67cb2f650c15 120 while(!_DREQ);
xshige 0:67cb2f650c15 121 _spi.write(datum);
xshige 0:67cb2f650c15 122
xshige 0:67cb2f650c15 123 sci_dis();
xshige 0:67cb2f650c15 124 }
xshige 0:67cb2f650c15 125 unsigned short int VS1053::read(unsigned short int address)
xshige 0:67cb2f650c15 126 {
xshige 0:67cb2f650c15 127 cs_low(); //enables SCI/disables SDI
xshige 0:67cb2f650c15 128
xshige 0:67cb2f650c15 129 while(!_DREQ); //wait unitl data request is high
xshige 0:67cb2f650c15 130 _spi.write(0x03); //SCI write
xshige 0:67cb2f650c15 131 _spi.write(address); //register address
xshige 0:67cb2f650c15 132 unsigned short int received = _spi.write(0x00); //write out dummy byte
xshige 0:67cb2f650c15 133 received <<= 8;
xshige 0:67cb2f650c15 134 received += _spi.write(0x00); //write out dummy byte
xshige 0:67cb2f650c15 135
xshige 0:67cb2f650c15 136 cs_high(); //enables SDI/disables SCI
xshige 0:67cb2f650c15 137
xshige 0:67cb2f650c15 138 return received; //return received word
xshige 0:67cb2f650c15 139 }
xshige 0:67cb2f650c15 140 void VS1053::sine_test_activate(unsigned char wave)
xshige 0:67cb2f650c15 141 {
xshige 0:67cb2f650c15 142 cs_high(); //enables SDI/disables SCI
xshige 0:67cb2f650c15 143
xshige 0:67cb2f650c15 144 while(!_DREQ); //wait unitl data request is high
xshige 0:67cb2f650c15 145 _spi.write(0x53); //SDI write
xshige 0:67cb2f650c15 146 _spi.write(0xEF); //SDI write
xshige 0:67cb2f650c15 147 _spi.write(0x6E); //SDI write
xshige 0:67cb2f650c15 148 _spi.write(wave); //SDI write
xshige 0:67cb2f650c15 149 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 150 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 151 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 152 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 153
xshige 0:67cb2f650c15 154 cs_low(); //enables SCI/disables SDI
xshige 0:67cb2f650c15 155 }
xshige 0:67cb2f650c15 156 void VS1053::sine_test_deactivate(void)
xshige 0:67cb2f650c15 157 {
xshige 0:67cb2f650c15 158 cs_high();
xshige 0:67cb2f650c15 159
xshige 0:67cb2f650c15 160 while(!_DREQ);
xshige 0:67cb2f650c15 161 _spi.write(0x45); //SDI write
xshige 0:67cb2f650c15 162 _spi.write(0x78); //SDI write
xshige 0:67cb2f650c15 163 _spi.write(0x69); //SDI write
xshige 0:67cb2f650c15 164 _spi.write(0x74); //SDI write
xshige 0:67cb2f650c15 165 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 166 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 167 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 168 _spi.write(0x00); //filler byte
xshige 0:67cb2f650c15 169 }
xshige 0:67cb2f650c15 170 void VS1053::volume(void)
xshige 0:67cb2f650c15 171 {
xshige 0:67cb2f650c15 172 #ifdef FIXED_VOL
xshige 0:67cb2f650c15 173 unsigned char volumize = (0 * 255); // FIXED VOL (not support volume input)
xshige 0:67cb2f650c15 174 #else
xshige 0:67cb2f650c15 175 unsigned char volumize = (_VOL * 255);
xshige 0:67cb2f650c15 176 #endif
xshige 0:67cb2f650c15 177 while(!_DREQ);
xshige 0:67cb2f650c15 178
xshige 0:67cb2f650c15 179 unsigned short int attenuation = ((256 * volumize) + volumize);
xshige 0:67cb2f650c15 180 sci_write(0x0B, attenuation);
xshige 0:67cb2f650c15 181 }
xshige 0:67cb2f650c15 182
xshige 0:67cb2f650c15 183 void VS1053::writeStream(unsigned char *array, int size)
xshige 0:67cb2f650c15 184 {
xshige 0:67cb2f650c15 185 for(int i=0; i<size; i++)
xshige 0:67cb2f650c15 186 {
xshige 0:67cb2f650c15 187 sdi_write(array[i]);
xshige 0:67cb2f650c15 188 }
xshige 0:67cb2f650c15 189 volume();
xshige 0:67cb2f650c15 190 }
xshige 0:67cb2f650c15 191
xshige 0:67cb2f650c15 192 #if 0
xshige 0:67cb2f650c15 193 // this function does not work
xshige 0:67cb2f650c15 194 // because of function call overhead
xshige 0:67cb2f650c15 195 void VS1053::putcStream(unsigned char datum)
xshige 0:67cb2f650c15 196 {
xshige 0:67cb2f650c15 197 sdi_write(datum);
xshige 0:67cb2f650c15 198 }
xshige 0:67cb2f650c15 199 #endif
xshige 0:67cb2f650c15 200
xshige 0:67cb2f650c15 201 void VS1053::terminateStream(void)
xshige 0:67cb2f650c15 202 {
xshige 0:67cb2f650c15 203 for(int n=0; n<2048; n++)
xshige 0:67cb2f650c15 204 {
xshige 0:67cb2f650c15 205 sdi_write(0x00);
xshige 0:67cb2f650c15 206 }
xshige 0:67cb2f650c15 207
xshige 0:67cb2f650c15 208 }