Norimasa Okamoto / Mbed 2 deprecated emu1114

mbed LPC1114 emulator pre-alpha version

Dependencies:   BaseV6M mbed F12RFileSystem F32RFileSystem ROMSLOT SDStorage

Fork of emu812 by Norimasa Okamoto

480
TOYOSHIKI TINY BASIC mbed Edition TTB_mbed_LPC1114.bin save as "LPC1114.IMG" .

EMU111x.h@9:ef9a58221fbe, 2016-04-09 (annotated)

Committer:
va009039
Date:
Sat Apr 09 16:49:02 2016 +0900
Revision:
9:ef9a58221fbe
Parent:
4:6629544a482e 
update ROMSLOT.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
va009039 4:6629544a482e 1 // EMU111x.h 2015/8/19
va009039 2:b8b4f07d4691 2 #include "BaseV6M.h"
va009039 2:b8b4f07d4691 3 #include "EMUInterface.h"
va009039 2:b8b4f07d4691 4 #pragma once
va009039 2:b8b4f07d4691 5
va009039 2:b8b4f07d4691 6 class EMU111x;
va009039 2:b8b4f07d4691 7
va009039 2:b8b4f07d4691 8 class EMU111x_SYSCON {
va009039 2:b8b4f07d4691 9 public:
va009039 2:b8b4f07d4691 10 EMU111x_SYSCON();
va009039 2:b8b4f07d4691 11 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 12 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 13 };
va009039 2:b8b4f07d4691 14
va009039 2:b8b4f07d4691 15 class EMU111x_IOCON {
va009039 2:b8b4f07d4691 16 public:
va009039 2:b8b4f07d4691 17 EMU111x_IOCON();
va009039 2:b8b4f07d4691 18 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 19 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 20
va009039 2:b8b4f07d4691 21 private:
va009039 2:b8b4f07d4691 22 uint32_t RESET_PIO0_0;
va009039 2:b8b4f07d4691 23 uint32_t PIO0_1;
va009039 2:b8b4f07d4691 24 uint32_t PIO1_8;
va009039 2:b8b4f07d4691 25 uint32_t PIO0_2;
va009039 2:b8b4f07d4691 26 uint32_t PIO0_3;
va009039 2:b8b4f07d4691 27 uint32_t PIO0_4;
va009039 2:b8b4f07d4691 28 uint32_t PIO0_5;
va009039 2:b8b4f07d4691 29 uint32_t PIO1_9;
va009039 2:b8b4f07d4691 30
va009039 2:b8b4f07d4691 31 uint32_t PIO0_6;
va009039 2:b8b4f07d4691 32 uint32_t PIO0_7;
va009039 2:b8b4f07d4691 33
va009039 2:b8b4f07d4691 34 uint32_t PIO0_8;
va009039 2:b8b4f07d4691 35 uint32_t PIO0_9;
va009039 2:b8b4f07d4691 36 uint32_t SWCLK_PIO0_10;
va009039 2:b8b4f07d4691 37 uint32_t PIO1_10;
va009039 2:b8b4f07d4691 38
va009039 2:b8b4f07d4691 39 uint32_t R_PIO0_11;
va009039 2:b8b4f07d4691 40 uint32_t R_PIO1_0;
va009039 2:b8b4f07d4691 41 uint32_t R_PIO1_1;
va009039 2:b8b4f07d4691 42 uint32_t R_PIO1_2;
va009039 2:b8b4f07d4691 43
va009039 2:b8b4f07d4691 44 uint32_t SWDIO_PIO_3;
va009039 2:b8b4f07d4691 45 uint32_t PIO1_4;
va009039 2:b8b4f07d4691 46 uint32_t PIO1_11;
va009039 2:b8b4f07d4691 47
va009039 2:b8b4f07d4691 48 uint32_t PIO1_5;
va009039 2:b8b4f07d4691 49 uint32_t PIO1_6;
va009039 2:b8b4f07d4691 50 uint32_t PIO1_7;
va009039 2:b8b4f07d4691 51
va009039 2:b8b4f07d4691 52 uint32_t SCK_LOC;
va009039 2:b8b4f07d4691 53 };
va009039 2:b8b4f07d4691 54
va009039 2:b8b4f07d4691 55 class EMU111x_GPIO {
va009039 2:b8b4f07d4691 56 public:
va009039 2:b8b4f07d4691 57 EMU111x_GPIO(EMU111x& mcu, int port);
va009039 2:b8b4f07d4691 58 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 59 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 60
va009039 2:b8b4f07d4691 61 private:
va009039 2:b8b4f07d4691 62 EMU111x& mcu;
va009039 2:b8b4f07d4691 63 int port;
va009039 2:b8b4f07d4691 64 uint32_t data;
va009039 2:b8b4f07d4691 65 uint32_t dir;
va009039 2:b8b4f07d4691 66 };
va009039 2:b8b4f07d4691 67
va009039 2:b8b4f07d4691 68 class EMU111x_TMR32B {
va009039 2:b8b4f07d4691 69 public:
va009039 2:b8b4f07d4691 70 EMU111x_TMR32B(int ch);
va009039 2:b8b4f07d4691 71 void clock_in(uint32_t n = 1);
va009039 2:b8b4f07d4691 72 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 73 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 74
va009039 2:b8b4f07d4691 75 private:
va009039 2:b8b4f07d4691 76 int ch;
va009039 2:b8b4f07d4691 77 uint32_t tc;
va009039 2:b8b4f07d4691 78 };
va009039 2:b8b4f07d4691 79
va009039 2:b8b4f07d4691 80 class EMU111x_UART {
va009039 2:b8b4f07d4691 81 public:
va009039 2:b8b4f07d4691 82 EMU111x_UART(EMU111x& mcu);
va009039 2:b8b4f07d4691 83 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 84 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 85
va009039 2:b8b4f07d4691 86 private:
va009039 2:b8b4f07d4691 87 EMU111x& mcu;
va009039 4:6629544a482e 88 uint32_t LCR;
va009039 4:6629544a482e 89 uint32_t FDR;
va009039 2:b8b4f07d4691 90 };
va009039 2:b8b4f07d4691 91
va009039 2:b8b4f07d4691 92 class EMU111x_I2C {
va009039 2:b8b4f07d4691 93 public:
va009039 2:b8b4f07d4691 94 EMU111x_I2C(EMU111x& mcu);
va009039 2:b8b4f07d4691 95 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 96 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 97
va009039 2:b8b4f07d4691 98 private:
va009039 2:b8b4f07d4691 99 EMU111x& mcu;
va009039 2:b8b4f07d4691 100 uint32_t con;
va009039 2:b8b4f07d4691 101 uint32_t stat;
va009039 2:b8b4f07d4691 102 uint8_t i2c_addr;
va009039 2:b8b4f07d4691 103 uint8_t i2c_data[16];
va009039 2:b8b4f07d4691 104 int i2c_pos;
va009039 2:b8b4f07d4691 105 };
va009039 2:b8b4f07d4691 106
va009039 2:b8b4f07d4691 107 class EMU111x_SPI {
va009039 2:b8b4f07d4691 108 public:
va009039 2:b8b4f07d4691 109 EMU111x_SPI(EMU111x& mcu, int ch);
va009039 2:b8b4f07d4691 110 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 111 uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 112
va009039 2:b8b4f07d4691 113 private:
va009039 2:b8b4f07d4691 114 EMU111x& mcu;
va009039 2:b8b4f07d4691 115 uint32_t cr0;
va009039 2:b8b4f07d4691 116 uint32_t cr1;
va009039 2:b8b4f07d4691 117 int ch;
va009039 2:b8b4f07d4691 118 int dr;
va009039 2:b8b4f07d4691 119 };
va009039 2:b8b4f07d4691 120
va009039 2:b8b4f07d4691 121 class EMU111x_NVIC {
va009039 2:b8b4f07d4691 122 public:
va009039 2:b8b4f07d4691 123 void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 124
va009039 2:b8b4f07d4691 125 private:
va009039 2:b8b4f07d4691 126 uint32_t iser;
va009039 2:b8b4f07d4691 127 };
va009039 2:b8b4f07d4691 128
va009039 2:b8b4f07d4691 129 class EMU111x : public EMUInterface, public BaseV6M {
va009039 2:b8b4f07d4691 130 public:
va009039 2:b8b4f07d4691 131 EMU111x();
va009039 2:b8b4f07d4691 132 void assign_flash(const uint8_t* addr) { flash = addr; }
va009039 2:b8b4f07d4691 133 void assign_rom(uint8_t* addr) { rom = addr; }
va009039 2:b8b4f07d4691 134 void clock_in(uint32_t n);
va009039 2:b8b4f07d4691 135 void trace();
va009039 2:b8b4f07d4691 136
va009039 2:b8b4f07d4691 137 protected:
va009039 2:b8b4f07d4691 138 virtual void poke32(uint32_t a, uint32_t d);
va009039 2:b8b4f07d4691 139 virtual uint32_t peek32(uint32_t a);
va009039 2:b8b4f07d4691 140 virtual void poke8(uint32_t a, uint8_t b);
va009039 2:b8b4f07d4691 141 virtual uint8_t peek8(uint32_t a);
va009039 2:b8b4f07d4691 142
va009039 2:b8b4f07d4691 143 private:
va009039 2:b8b4f07d4691 144 const uint8_t* flash;
va009039 2:b8b4f07d4691 145 const uint8_t* rom;
va009039 2:b8b4f07d4691 146 uint8_t* ram;
va009039 2:b8b4f07d4691 147
va009039 2:b8b4f07d4691 148 EMU111x_SYSCON syscon;
va009039 2:b8b4f07d4691 149 EMU111x_IOCON iocon;
va009039 2:b8b4f07d4691 150 EMU111x_TMR32B tmr32b1;
va009039 3:5df725af50e0 151 EMU111x_UART _uart;
va009039 3:5df725af50e0 152 EMU111x_I2C _i2c;
va009039 3:5df725af50e0 153 EMU111x_SPI _spi0;
va009039 3:5df725af50e0 154 EMU111x_SPI _spi1;
va009039 2:b8b4f07d4691 155 EMU111x_GPIO gpio0;
va009039 2:b8b4f07d4691 156 EMU111x_GPIO gpio1;
va009039 2:b8b4f07d4691 157 EMU111x_NVIC nvic;
va009039 2:b8b4f07d4691 158
va009039 2:b8b4f07d4691 159 friend class EMU111x_UART;
va009039 2:b8b4f07d4691 160 friend class EMU111x_I2C;
va009039 2:b8b4f07d4691 161 friend class EMU111x_SPI;
va009039 2:b8b4f07d4691 162 friend class EMU111x_GPIO;
va009039 2:b8b4f07d4691 163 };
va009039 2:b8b4f07d4691 164