canuck lehead / lib_mma8451q

mma8451q driver with a few minor modifications

Dependents:   Senet NAMote

Fork of lib_mma8451q by wayne roberts

mma8451q.cpp.orig@7:a68d2ad81d11, 2017-07-31 (annotated)

Committer:
shaunkrnelson
Date:
Mon Jul 31 13:47:22 2017 -0400
Revision:
7:a68d2ad81d11
Parent:
6:828b08201d8b 
Add header ifdef wrapper

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shaunkrnelson 6:828b08201d8b 1 #include "mma8451q.h"
shaunkrnelson 6:828b08201d8b 2 /* turn on: CTRL_REG1 active_bit = 1
shaunkrnelson 6:828b08201d8b 3 * back to standby: CTRL_REG1 active_bit = 0
shaunkrnelson 6:828b08201d8b 4 */
shaunkrnelson 6:828b08201d8b 5
shaunkrnelson 6:828b08201d8b 6 /* STANDBY: SYSMOD = 00 */
shaunkrnelson 6:828b08201d8b 7
shaunkrnelson 6:828b08201d8b 8 /*
shaunkrnelson 6:828b08201d8b 9 * MMA8451 I2C address
shaunkrnelson 6:828b08201d8b 10 */
shaunkrnelson 6:828b08201d8b 11 #define MMA8451_I2C_ADDRESS 0x38 //0x1C
shaunkrnelson 6:828b08201d8b 12
shaunkrnelson 6:828b08201d8b 13 MMA8451Q::MMA8451Q(I2C& r, DigitalIn& int_pin) : m_i2c(r), m_int_pin(int_pin)
shaunkrnelson 6:828b08201d8b 14 {
shaunkrnelson 6:828b08201d8b 15 /* INT pins on this chip default to push-pull output */
shaunkrnelson 6:828b08201d8b 16 write(MMA8451_CTRL_REG3, 0x01); // set PP_OD
shaunkrnelson 6:828b08201d8b 17 /* INT1 and INT2 are tied together */
shaunkrnelson 6:828b08201d8b 18
shaunkrnelson 6:828b08201d8b 19 }
shaunkrnelson 6:828b08201d8b 20
shaunkrnelson 6:828b08201d8b 21 MMA8451Q::~MMA8451Q()
shaunkrnelson 6:828b08201d8b 22 {
shaunkrnelson 6:828b08201d8b 23 }
shaunkrnelson 6:828b08201d8b 24
shaunkrnelson 6:828b08201d8b 25 void MMA8451Q::read(uint8_t addr, uint8_t *dst_buf, int length)
shaunkrnelson 6:828b08201d8b 26 {
shaunkrnelson 6:828b08201d8b 27 char cmd[2];
shaunkrnelson 6:828b08201d8b 28
shaunkrnelson 6:828b08201d8b 29 cmd[0] = addr;
shaunkrnelson 6:828b08201d8b 30 if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 1, true))
shaunkrnelson 6:828b08201d8b 31 printf("MMA write-fail %02x\n", addr);
shaunkrnelson 6:828b08201d8b 32 if (m_i2c.read(MMA8451_I2C_ADDRESS, (char *)dst_buf, length))
shaunkrnelson 6:828b08201d8b 33 printf("MMA read-fail\n");
shaunkrnelson 6:828b08201d8b 34 }
shaunkrnelson 6:828b08201d8b 35
shaunkrnelson 6:828b08201d8b 36 uint8_t MMA8451Q::read_single(uint8_t addr)
shaunkrnelson 6:828b08201d8b 37 {
shaunkrnelson 6:828b08201d8b 38 char cmd[2];
shaunkrnelson 6:828b08201d8b 39
shaunkrnelson 6:828b08201d8b 40 cmd[0] = addr;
shaunkrnelson 6:828b08201d8b 41 if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 1, true))
shaunkrnelson 6:828b08201d8b 42 printf("MMA write-fail %02x\n", addr);
shaunkrnelson 6:828b08201d8b 43 if (m_i2c.read(MMA8451_I2C_ADDRESS, cmd, 1))
shaunkrnelson 6:828b08201d8b 44 printf("MMA read-fail\n");
shaunkrnelson 6:828b08201d8b 45
shaunkrnelson 6:828b08201d8b 46 return cmd[0];
shaunkrnelson 6:828b08201d8b 47 }
shaunkrnelson 6:828b08201d8b 48
shaunkrnelson 6:828b08201d8b 49 void MMA8451Q::print_regs()
shaunkrnelson 6:828b08201d8b 50 {
shaunkrnelson 6:828b08201d8b 51 printf("ID: %02x\r\n", read_single(MMA8451_ID));
shaunkrnelson 6:828b08201d8b 52 printf("sysmod:%02x\r\n", read_single(MMA8451_SYSMOD));
shaunkrnelson 6:828b08201d8b 53 ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 54 printf("ctrl_reg1:%02x\r\n", ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 55 printf("ctrl_reg2:%02x\r\n", read_single(MMA8451_CTRL_REG2));
shaunkrnelson 6:828b08201d8b 56 printf("ctrl_reg3:%02x\r\n", read_single(MMA8451_CTRL_REG3)); /* TODO: PP_OD is bit 0 (1=open drain) */
shaunkrnelson 6:828b08201d8b 57 printf("(int en) ctrl_reg4:%02x\r\n", read_single(MMA8451_CTRL_REG4));
shaunkrnelson 6:828b08201d8b 58 printf("(int cfg) ctrl_reg5:%02x\r\n", read_single(MMA8451_CTRL_REG5));
shaunkrnelson 6:828b08201d8b 59 printf("status:%02x\r\n", read_single(MMA8451_STATUS));
shaunkrnelson 6:828b08201d8b 60 /* (interrupt status) int src at 0x0c (MMA8451_INT_SOURCE): data ready, motion/freefall, pulse, orientation, transient, auto sleep */
shaunkrnelson 6:828b08201d8b 61 printf("INT_SOURCE:%02x\r\n", read_single(MMA8451_INT_SOURCE));
shaunkrnelson 6:828b08201d8b 62 }
shaunkrnelson 6:828b08201d8b 63
shaunkrnelson 6:828b08201d8b 64 void MMA8451Q::write(uint8_t addr, uint8_t data)
shaunkrnelson 6:828b08201d8b 65 {
shaunkrnelson 6:828b08201d8b 66 uint8_t cmd[2];
shaunkrnelson 6:828b08201d8b 67
shaunkrnelson 6:828b08201d8b 68 cmd[0] = addr;
shaunkrnelson 6:828b08201d8b 69 cmd[1] = data;
shaunkrnelson 6:828b08201d8b 70
shaunkrnelson 6:828b08201d8b 71 if (m_i2c.write(MMA8451_I2C_ADDRESS, (char *)cmd, 2))
shaunkrnelson 6:828b08201d8b 72 printf("MMA write-fail %02x\n", addr);
shaunkrnelson 6:828b08201d8b 73 }
shaunkrnelson 6:828b08201d8b 74
shaunkrnelson 6:828b08201d8b 75 void MMA8451Q::set_active(char arg)
shaunkrnelson 6:828b08201d8b 76 {
shaunkrnelson 6:828b08201d8b 77 char cmd[2];
shaunkrnelson 6:828b08201d8b 78
shaunkrnelson 6:828b08201d8b 79 cmd[0] = MMA8451_CTRL_REG1;
shaunkrnelson 6:828b08201d8b 80 cmd[1] = arg;
shaunkrnelson 6:828b08201d8b 81
shaunkrnelson 6:828b08201d8b 82 if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 2))
shaunkrnelson 6:828b08201d8b 83 printf("MMA write-fail %02x\n", cmd[0]);
shaunkrnelson 6:828b08201d8b 84 }
shaunkrnelson 6:828b08201d8b 85
shaunkrnelson 6:828b08201d8b 86 bool MMA8451Q::get_active(void)
shaunkrnelson 6:828b08201d8b 87 {
shaunkrnelson 6:828b08201d8b 88 uint8_t ret = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 89 //printf("CTRL_REG1: %x\n", ret);
shaunkrnelson 6:828b08201d8b 90 if (ret & 1)
shaunkrnelson 6:828b08201d8b 91 return true;
shaunkrnelson 6:828b08201d8b 92 else
shaunkrnelson 6:828b08201d8b 93 return false;
shaunkrnelson 6:828b08201d8b 94 }
shaunkrnelson 6:828b08201d8b 95
shaunkrnelson 6:828b08201d8b 96 void MMA8451Q::orient_detect()
shaunkrnelson 6:828b08201d8b 97 {
shaunkrnelson 6:828b08201d8b 98 uint8_t v;
shaunkrnelson 6:828b08201d8b 99
shaunkrnelson 6:828b08201d8b 100 ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 101 /* AN4068 Sensors Freescale Semiconductor, Inc.
shaunkrnelson 6:828b08201d8b 102 * 4.1 Example Steps for Implementing the Embedded Orientation Detection */
shaunkrnelson 6:828b08201d8b 103
shaunkrnelson 6:828b08201d8b 104 /* Step 1: Put the part into Standby Mode */
shaunkrnelson 6:828b08201d8b 105 ctrl_reg1.bits.ACTIVE = 0;
shaunkrnelson 6:828b08201d8b 106 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 107
shaunkrnelson 6:828b08201d8b 108 /* Step 2: Set the data rate to 50 Hz (for example, but can choose any sample rate). */
shaunkrnelson 6:828b08201d8b 109 ctrl_reg1.bits.DR = 4;
shaunkrnelson 6:828b08201d8b 110 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 111
shaunkrnelson 6:828b08201d8b 112 /* Step 3: Set the PL_EN bit in Register 0x11 PL_CFG. This will enable the orientation detection. */
shaunkrnelson 6:828b08201d8b 113 v = read_single(MMA8451_PL_CFG);
shaunkrnelson 6:828b08201d8b 114 v |= 0x40;
shaunkrnelson 6:828b08201d8b 115 write(MMA8451_PL_CFG, v);
shaunkrnelson 6:828b08201d8b 116
shaunkrnelson 6:828b08201d8b 117 /* Step 4: Set the Back/Front Angle trip points in register 0x13 following the table in the data sheet. */
shaunkrnelson 6:828b08201d8b 118 v = read_single(MMA8451_PL_BF_ZCOMP);
shaunkrnelson 6:828b08201d8b 119 /*v &= 0x3f;
shaunkrnelson 6:828b08201d8b 120 v |= 0xX0;
shaunkrnelson 6:828b08201d8b 121 write(MMA8451_PL_BF_ZCOMP, v);*/
shaunkrnelson 6:828b08201d8b 122
shaunkrnelson 6:828b08201d8b 123 /* Step 5: Set the Z-Lockout angle trip point in register 0x13 following the table in the data sheet. */
shaunkrnelson 6:828b08201d8b 124 /* v &= 0xf8;
shaunkrnelson 6:828b08201d8b 125 v |= 0x0X;
shaunkrnelson 6:828b08201d8b 126 */
shaunkrnelson 6:828b08201d8b 127
shaunkrnelson 6:828b08201d8b 128 /* Step 6: Set the Trip Threshold Angle */
shaunkrnelson 6:828b08201d8b 129 v = read_single(MMA8451_PL_THS_REG);
shaunkrnelson 6:828b08201d8b 130 /*v &= 0x07;
shaunkrnelson 6:828b08201d8b 131 v |= 0x0X << 3;
shaunkrnelson 6:828b08201d8b 132 write(MMA8451_PL_THS_REG. v);*/
shaunkrnelson 6:828b08201d8b 133
shaunkrnelson 6:828b08201d8b 134 /* Step 7: Set the Hysteresis Angle */
shaunkrnelson 6:828b08201d8b 135 v = read_single(MMA8451_PL_THS_REG);
shaunkrnelson 6:828b08201d8b 136 /*v &= 0xf8;
shaunkrnelson 6:828b08201d8b 137 v |= 0x0X;
shaunkrnelson 6:828b08201d8b 138 write(MMA8451_PL_THS_REG. v);*/
shaunkrnelson 6:828b08201d8b 139
shaunkrnelson 6:828b08201d8b 140 /* Step 8: Register 0x2D, Control Register 4 configures all embedded features for interrupt */
shaunkrnelson 6:828b08201d8b 141 ctrl_reg4.octet = 0;
shaunkrnelson 6:828b08201d8b 142 ctrl_reg4.bits.INT_EN_LNDPRT = 1;
shaunkrnelson 6:828b08201d8b 143 write(MMA8451_CTRL_REG4, ctrl_reg4.octet);
shaunkrnelson 6:828b08201d8b 144
shaunkrnelson 6:828b08201d8b 145 /* Step 9: Register 0x2E is Control Register 5 which gives the option of routing the interrupt to either INT1 or INT2 */
shaunkrnelson 6:828b08201d8b 146 ctrl_reg5.octet = 0;
shaunkrnelson 6:828b08201d8b 147 ctrl_reg5.bits.INT_CFG_LNDPRT = 1;
shaunkrnelson 6:828b08201d8b 148 write(MMA8451_CTRL_REG5, ctrl_reg5.octet);
shaunkrnelson 6:828b08201d8b 149
shaunkrnelson 6:828b08201d8b 150 /* Step 10: Set the debounce counter in register 0x12 */
shaunkrnelson 6:828b08201d8b 151 write(MMA8451_PL_COUNT, 5); // 5: debounce to 100ms at 50hz
shaunkrnelson 6:828b08201d8b 152
shaunkrnelson 6:828b08201d8b 153 /* Step 11: Put the device in Active Mode */
shaunkrnelson 6:828b08201d8b 154 ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 155 ctrl_reg1.bits.ACTIVE = 1;
shaunkrnelson 6:828b08201d8b 156 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 157
shaunkrnelson 6:828b08201d8b 158 /* Step 12: in service() function */
shaunkrnelson 6:828b08201d8b 159 }
shaunkrnelson 6:828b08201d8b 160
shaunkrnelson 6:828b08201d8b 161
shaunkrnelson 6:828b08201d8b 162 void MMA8451Q::transient_detect()
shaunkrnelson 6:828b08201d8b 163 {
shaunkrnelson 6:828b08201d8b 164 ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 165 /* AN4071 Sensors Freescale Semiconductor, Inc.
shaunkrnelson 6:828b08201d8b 166 * 7.1 Example Steps for Configuring Transient Detection
shaunkrnelson 6:828b08201d8b 167 * Change in X or Y > 0.5g for 50 ms at 100 Hz ODR, Normal mode */
shaunkrnelson 6:828b08201d8b 168
shaunkrnelson 6:828b08201d8b 169 /* Step 1: Put the device in Standby Mode: Register 0x2A CTRL_REG1 */
shaunkrnelson 6:828b08201d8b 170 ctrl_reg1.bits.ACTIVE = 0;
shaunkrnelson 6:828b08201d8b 171 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 172 ctrl_reg1.bits.DR = 3; //Set device in 100 Hz ODR, Standby
shaunkrnelson 6:828b08201d8b 173 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 174
shaunkrnelson 6:828b08201d8b 175 /* Step 2: Enable X and Y Axes and enable the latch: Register 0x1D Configuration Register */
shaunkrnelson 6:828b08201d8b 176 transient_cfg.octet = 0;
shaunkrnelson 6:828b08201d8b 177 transient_cfg.bits.ELE = 1; // enable latch
shaunkrnelson 6:828b08201d8b 178 transient_cfg.bits.YTEFE = 1; // enable Y
shaunkrnelson 6:828b08201d8b 179 transient_cfg.bits.XTEFE = 1; // enable X
shaunkrnelson 6:828b08201d8b 180 transient_cfg.bits.ZTEFE = 1; // enable Z
shaunkrnelson 6:828b08201d8b 181 write(MMA8451_TRANSIENT_CFG, transient_cfg.octet);
shaunkrnelson 6:828b08201d8b 182
shaunkrnelson 6:828b08201d8b 183 /* Step 3: Set the Threshold: Register 0x1F
shaunkrnelson 6:828b08201d8b 184 * Note: Step count is 0.063g per count, 0.5g / 0.063g = 7.93.
shaunkrnelson 6:828b08201d8b 185 * Therefore set the threshold to 8 counts */
shaunkrnelson 6:828b08201d8b 186 write(MMA8451_TRANSIENT_THS, 8);
shaunkrnelson 6:828b08201d8b 187
shaunkrnelson 6:828b08201d8b 188 /* Step 4: Set the Debounce Counter for 50 ms: Register 0x20
shaunkrnelson 6:828b08201d8b 189 * Note: 100 Hz ODR, therefore 10 ms step sizes */
shaunkrnelson 6:828b08201d8b 190 write(MMA8451_TRANSIENT_COUNT, 5);
shaunkrnelson 6:828b08201d8b 191
shaunkrnelson 6:828b08201d8b 192 /* Step 5: Enable Transient Detection Interrupt in the System (CTRL_REG4) */
shaunkrnelson 6:828b08201d8b 193 ctrl_reg4.octet = 0;
shaunkrnelson 6:828b08201d8b 194 ctrl_reg4.bits.INT_EN_TRANS = 1;
shaunkrnelson 6:828b08201d8b 195 write(MMA8451_CTRL_REG4, ctrl_reg4.octet);
shaunkrnelson 6:828b08201d8b 196
shaunkrnelson 6:828b08201d8b 197 /* Step 6: Route the Transient Interrupt to INT 1 hardware pin (CTRL_REG5) */
shaunkrnelson 6:828b08201d8b 198 ctrl_reg5.octet = 0;
shaunkrnelson 6:828b08201d8b 199 ctrl_reg5.bits.INT_CFG_TRANS = 1;
shaunkrnelson 6:828b08201d8b 200 write(MMA8451_CTRL_REG5, ctrl_reg5.octet);
shaunkrnelson 6:828b08201d8b 201
shaunkrnelson 6:828b08201d8b 202 /* Step 7: Put the device in Active Mode: Register 0x2A CTRL_REG1 */
shaunkrnelson 6:828b08201d8b 203 ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
shaunkrnelson 6:828b08201d8b 204 ctrl_reg1.bits.ACTIVE = 1;
shaunkrnelson 6:828b08201d8b 205 write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
shaunkrnelson 6:828b08201d8b 206
shaunkrnelson 6:828b08201d8b 207 /* Step 8: Write Interrupt Service Routine Reading the
shaunkrnelson 6:828b08201d8b 208 * System Interrupt Status and the Transient Status */
shaunkrnelson 6:828b08201d8b 209 }
shaunkrnelson 6:828b08201d8b 210
shaunkrnelson 6:828b08201d8b 211 uint8_t MMA8451Q::service()
shaunkrnelson 6:828b08201d8b 212 {
shaunkrnelson 6:828b08201d8b 213 mma_int_source_t int_src;
shaunkrnelson 6:828b08201d8b 214
shaunkrnelson 6:828b08201d8b 215 if (m_int_pin)
shaunkrnelson 6:828b08201d8b 216 return 0; // no interrupt
shaunkrnelson 6:828b08201d8b 217
shaunkrnelson 6:828b08201d8b 218 int_src.octet = read_single(MMA8451_INT_SOURCE);
shaunkrnelson 6:828b08201d8b 219
shaunkrnelson 6:828b08201d8b 220 if (int_src.bits.SRC_DRDY) {
shaunkrnelson 6:828b08201d8b 221 read(MMA8451_OUT_X_MSB, out.octets, 6);
shaunkrnelson 6:828b08201d8b 222 }
shaunkrnelson 6:828b08201d8b 223 if (int_src.bits.SRC_FF_MT) {
shaunkrnelson 6:828b08201d8b 224 read_single(MMA8451_FF_MT_SRC);
shaunkrnelson 6:828b08201d8b 225 }
shaunkrnelson 6:828b08201d8b 226 if (int_src.bits.SRC_PULSE) {
shaunkrnelson 6:828b08201d8b 227 read_single(MMA8451_PULSE_SRC);
shaunkrnelson 6:828b08201d8b 228 }
shaunkrnelson 6:828b08201d8b 229 if (int_src.bits.SRC_LNDPRT) {
shaunkrnelson 6:828b08201d8b 230 mma_pl_status_t pl_status;
shaunkrnelson 6:828b08201d8b 231 /*AN4068 Step 12: Write a Service Routine to Service the Interrupt */
shaunkrnelson 6:828b08201d8b 232 pl_status.octet = read_single(MMA8451_PL_STATUS);
shaunkrnelson 6:828b08201d8b 233
shaunkrnelson 6:828b08201d8b 234 if(verbose)
shaunkrnelson 6:828b08201d8b 235 printf("PL_STATUS: ");
shaunkrnelson 6:828b08201d8b 236
shaunkrnelson 6:828b08201d8b 237 if (pl_status.bits.NEWLP)
shaunkrnelson 6:828b08201d8b 238 {
shaunkrnelson 6:828b08201d8b 239 orientation.reset();
shaunkrnelson 6:828b08201d8b 240
shaunkrnelson 6:828b08201d8b 241 if (pl_status.bits.LO)
shaunkrnelson 6:828b08201d8b 242 {
shaunkrnelson 6:828b08201d8b 243 orientation.low = true;
shaunkrnelson 6:828b08201d8b 244 if(verbose)
shaunkrnelson 6:828b08201d8b 245 printf("Z-tilt-LO ");
shaunkrnelson 6:828b08201d8b 246 }
shaunkrnelson 6:828b08201d8b 247
shaunkrnelson 6:828b08201d8b 248
shaunkrnelson 6:828b08201d8b 249 if (pl_status.bits.LAPO == 0)
shaunkrnelson 6:828b08201d8b 250 {
shaunkrnelson 6:828b08201d8b 251 orientation.up = true;
shaunkrnelson 6:828b08201d8b 252 if(verbose)
shaunkrnelson 6:828b08201d8b 253 printf("up ");
shaunkrnelson 6:828b08201d8b 254 }
shaunkrnelson 6:828b08201d8b 255 else if (pl_status.bits.LAPO == 1)
shaunkrnelson 6:828b08201d8b 256 {
shaunkrnelson 6:828b08201d8b 257 orientation.down = true;
shaunkrnelson 6:828b08201d8b 258 if(verbose)
shaunkrnelson 6:828b08201d8b 259 printf("down ");
shaunkrnelson 6:828b08201d8b 260 }
shaunkrnelson 6:828b08201d8b 261 else if (pl_status.bits.LAPO == 2)
shaunkrnelson 6:828b08201d8b 262 {
shaunkrnelson 6:828b08201d8b 263 orientation.right = true;
shaunkrnelson 6:828b08201d8b 264 if(verbose)
shaunkrnelson 6:828b08201d8b 265 printf("right ");
shaunkrnelson 6:828b08201d8b 266 }
shaunkrnelson 6:828b08201d8b 267 else if (pl_status.bits.LAPO == 3)
shaunkrnelson 6:828b08201d8b 268 {
shaunkrnelson 6:828b08201d8b 269 orientation.left = true;
shaunkrnelson 6:828b08201d8b 270 if(verbose)
shaunkrnelson 6:828b08201d8b 271 printf("left ");
shaunkrnelson 6:828b08201d8b 272 }
shaunkrnelson 6:828b08201d8b 273
shaunkrnelson 6:828b08201d8b 274 if (pl_status.bits.BAFRO)
shaunkrnelson 6:828b08201d8b 275 {
shaunkrnelson 6:828b08201d8b 276 orientation.back = true;
shaunkrnelson 6:828b08201d8b 277 if(verbose)
shaunkrnelson 6:828b08201d8b 278 printf("back ");
shaunkrnelson 6:828b08201d8b 279 }
shaunkrnelson 6:828b08201d8b 280 else
shaunkrnelson 6:828b08201d8b 281 {
shaunkrnelson 6:828b08201d8b 282 orientation.front = true;
shaunkrnelson 6:828b08201d8b 283 if(verbose)
shaunkrnelson 6:828b08201d8b 284 printf("front ");
shaunkrnelson 6:828b08201d8b 285 }
shaunkrnelson 6:828b08201d8b 286 }
shaunkrnelson 6:828b08201d8b 287
shaunkrnelson 6:828b08201d8b 288 if(verbose)
shaunkrnelson 6:828b08201d8b 289 printf("\r\n");
shaunkrnelson 6:828b08201d8b 290 } // ...int_src.bits.SRC_LNDPRT
shaunkrnelson 6:828b08201d8b 291
shaunkrnelson 6:828b08201d8b 292 if (int_src.bits.SRC_TRANS) {
shaunkrnelson 6:828b08201d8b 293 transient_src_t t_src;
shaunkrnelson 6:828b08201d8b 294 t_src.octet = read_single(MMA8451_TRANSIENT_SRC);
shaunkrnelson 6:828b08201d8b 295 if (verbose) {
shaunkrnelson 6:828b08201d8b 296 printf("transient src:%x ", t_src.octet);
shaunkrnelson 6:828b08201d8b 297 if (t_src.bits.XTRANSE)
shaunkrnelson 6:828b08201d8b 298 printf("X_Pol:%d ", t_src.bits.X_Trans_Pol);
shaunkrnelson 6:828b08201d8b 299 if (t_src.bits.YTRANSE)
shaunkrnelson 6:828b08201d8b 300 printf("Y_Pol:%d ", t_src.bits.Y_Trans_Pol);
shaunkrnelson 6:828b08201d8b 301 if (t_src.bits.ZTRANSE)
shaunkrnelson 6:828b08201d8b 302 printf("Z_Pol:%d ", t_src.bits.Z_Trans_Pol);
shaunkrnelson 6:828b08201d8b 303 printf("\r\n");
shaunkrnelson 6:828b08201d8b 304 }
shaunkrnelson 6:828b08201d8b 305 } // ...int_src.bits.SRC_TRANS
shaunkrnelson 6:828b08201d8b 306
shaunkrnelson 6:828b08201d8b 307 if (int_src.bits.SRC_ASLP) {
shaunkrnelson 6:828b08201d8b 308 read_single(MMA8451_SYSMOD);
shaunkrnelson 6:828b08201d8b 309 }
shaunkrnelson 6:828b08201d8b 310
shaunkrnelson 6:828b08201d8b 311 return int_src.octet;
shaunkrnelson 6:828b08201d8b 312 }