samp Srinivasan / Mbed 2 deprecated CDMS_CODE_FROM13JAN2017

To fix the hang problem

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE by shubham c

adf.h@175:e869e7837978, 2016-04-22 (annotated)

Committer:
ee12b079
Date:
Fri Apr 22 11:52:54 2016 +0000
Revision:
175:e869e7837978
Parent:
172:c508bbf7e89a
Child:
176:a5bfe3ca60b1
Testing DMA...22 Apr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ee12b079 175:e869e7837978 1 //Changes made on April 22nd 2016: Included Assert_IRQ_LOW Function
shreeshas95 1:a0055b3280c8 2 //without reset feature , with state checks.
ee12b079 172:c508bbf7e89a 3 InterruptIn IRQ(ADF_IRQ);
aniruddhv 52:0bd68655c651 4 //Ticker ticker;
shreeshas95 1:a0055b3280c8 5 bool loop_on;
shreeshas95 1:a0055b3280c8 6 bool ADF_off;
shreeshas95 1:a0055b3280c8 7 bool buffer_state;
ee12b079 9:e9eaada136c6 8 bool finish_write_data;
shreeshas95 1:a0055b3280c8 9 uint8_t signal = 0x00;
ee12b079 175:e869e7837978 10 /*Modified BBRAM*/unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x7F/*PA Parameters*/,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00};
ee12b079 175:e869e7837978 11 //unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00};
ee12b079 9:e9eaada136c6 12
shreeshas95 2:2caf2a9a13aa 13 //int initialise_card();
shreeshas95 2:2caf2a9a13aa 14 //int disk_initialize();
ee12b079 9:e9eaada136c6 15
shreeshas95 1:a0055b3280c8 16 #define bbram_write {\
shreeshas95 1:a0055b3280c8 17 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 18 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 19 spi.write(0xB0);\
shreeshas95 1:a0055b3280c8 20 wait_us(300);\
shreeshas95 1:a0055b3280c8 21 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 22 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 23 for(int i=0;i<66;i++){\
shreeshas95 1:a0055b3280c8 24 spi.write(bbram_buffer[i]);\
shreeshas95 1:a0055b3280c8 25 }\
shreeshas95 1:a0055b3280c8 26 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 27 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 28 }
shreeshas95 1:a0055b3280c8 29 //------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 30 // state checking functions
shreeshas95 1:a0055b3280c8 31 //bool assrt_phy_off( int, int, int);
shreeshas95 1:a0055b3280c8 32 //bool assrt_phy_on( int,int,int);
shreeshas95 1:a0055b3280c8 33 //bool assrt_phy_tx(int,int,int);
ee12b079 9:e9eaada136c6 34
shreeshas95 1:a0055b3280c8 35 #define START_ADDRESS 0x020;
shreeshas95 1:a0055b3280c8 36 #define MISO_PIN PTE3
shreeshas95 1:a0055b3280c8 37 /**************Defining Counter Limits**************/
shreeshas95 1:a0055b3280c8 38 #define THRS 20
shreeshas95 1:a0055b3280c8 39 #define STATE_ERR_THRS 20
shreeshas95 1:a0055b3280c8 40 #define PHY_OFF_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 41 #define PHY_ON_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 42 #define PHY_TX_EXEC_TIME 600
shreeshas95 1:a0055b3280c8 43 /******DEFINING COMMANDS*********/
shreeshas95 1:a0055b3280c8 44 #define CMD_HW_RESET 0xC8
shreeshas95 1:a0055b3280c8 45 #define CMD_PHY_ON 0xB1
shreeshas95 1:a0055b3280c8 46 #define CMD_PHY_OFF 0xB0
shreeshas95 1:a0055b3280c8 47 #define CMD_PHY_TX 0xB5
shreeshas95 1:a0055b3280c8 48 #define CMD_CONFIG_DEV 0xBB
ee12b079 175:e869e7837978 49 /*********MEM_RW_CMD*******************/
ee12b079 175:e869e7837978 50 #define SPI_MEM_RD_MCR 0x3B
ee12b079 175:e869e7837978 51 #define SPI_MEM_RD_BBRAM 0x39
ee12b079 175:e869e7837978 52 #define SPI_MEM_RD_BUFFER 0x38
ee12b079 175:e869e7837978 53 #define SPI_MEMR_RD_MCR 0x2B
ee12b079 175:e869e7837978 54 #define SPI_MEMR_RD_BBRAM 0x29
ee12b079 175:e869e7837978 55 #define SPI_MEMR_RD_BUFFER 0x28
ee12b079 175:e869e7837978 56 #define SPI_MEM_WR_MCR 0x1B
ee12b079 175:e869e7837978 57 #define SPI_MEM_WR_BBRAM 0x19
ee12b079 175:e869e7837978 58 #define SPI_MEM_WR_BUFFER 0x18
ee12b079 175:e869e7837978 59 #define SPI_MEMR_WR_MCR 0x0B
ee12b079 175:e869e7837978 60 #define SPI_MEMR_WR_BBRAM 0x09
ee12b079 175:e869e7837978 61 #define SPI_MEMR_WR_BUFFER 0x08
ee12b079 175:e869e7837978 62 /**********MISC*********************/
ee12b079 175:e869e7837978 63 #define DEVICE_ID_MSB 0x70
ee12b079 175:e869e7837978 64 #define DEVICE_ID_LSB 0x23
ee12b079 175:e869e7837978 65 /********************/
ee12b079 175:e869e7837978 66 #define assert_IRQ_LOW while(IRQ){\
ee12b079 175:e869e7837978 67 gCS_ADF=0;\
ee12b079 175:e869e7837978 68 spi.write(0x0B);\
ee12b079 175:e869e7837978 69 spi.write(0x36);\
ee12b079 175:e869e7837978 70 spi.write(0xFF);\
ee12b079 175:e869e7837978 71 gCS_ADF=1;\
ee12b079 175:e869e7837978 72 }\
ee12b079 175:e869e7837978 73 /********************/
shreeshas95 1:a0055b3280c8 74 #define check_status {\
shreeshas95 1:a0055b3280c8 75 unsigned char stat=0;\
shreeshas95 1:a0055b3280c8 76 gCS_ADF=0;\
ee12b079 175:e869e7837978 77 spi.write(SPI_NOP);\
ee12b079 175:e869e7837978 78 status = spi.write(SPI_NOP);\
shreeshas95 1:a0055b3280c8 79 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 80 }
ee12b079 9:e9eaada136c6 81
shreeshas95 1:a0055b3280c8 82 // all three arguments are int
shreeshas95 1:a0055b3280c8 83 #define assrt_phy_off(return_this) {\
shreeshas95 1:a0055b3280c8 84 int cmd_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 85 int spi_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 86 int state_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 87 for(int i = 0 ; i < 40 ;i++){\
shreeshas95 1:a0055b3280c8 88 check_status;\
ee12b079 175:e869e7837978 89 if(status&0x1F == 0xB1){\
shreeshas95 1:a0055b3280c8 90 return_this = 0;\
shreeshas95 1:a0055b3280c8 91 break;\
shreeshas95 1:a0055b3280c8 92 }\
shreeshas95 1:a0055b3280c8 93 else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 94 return_this = 1;\
shreeshas95 1:a0055b3280c8 95 break;\
shreeshas95 1:a0055b3280c8 96 }\
shreeshas95 1:a0055b3280c8 97 else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 98 return_this = 1;\
shreeshas95 1:a0055b3280c8 99 break;\
shreeshas95 1:a0055b3280c8 100 }\
shreeshas95 1:a0055b3280c8 101 else if( (status & 0xA0) == 0xA0 ){\
shreeshas95 1:a0055b3280c8 102 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 103 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 104 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 105 wait_us(PHY_OFF_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 106 state_err_cnt++;\
shreeshas95 1:a0055b3280c8 107 }\
shreeshas95 1:a0055b3280c8 108 else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 109 wait_ms(5);\
shreeshas95 1:a0055b3280c8 110 spi_err_cnt++;\
shreeshas95 1:a0055b3280c8 111 }\
shreeshas95 1:a0055b3280c8 112 else {\
shreeshas95 1:a0055b3280c8 113 wait_ms(1);\
shreeshas95 1:a0055b3280c8 114 cmd_err_cnt++;\
shreeshas95 1:a0055b3280c8 115 }\
shreeshas95 1:a0055b3280c8 116 }\
shreeshas95 1:a0055b3280c8 117 }
ee12b079 9:e9eaada136c6 118
ee12b079 9:e9eaada136c6 119
shreeshas95 1:a0055b3280c8 120 #define initial_adf_check {\
shreeshas95 1:a0055b3280c8 121 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 122 int tempReturn = 0;\
shreeshas95 2:2caf2a9a13aa 123 bool flag = false;\
shreeshas95 1:a0055b3280c8 124 while( hw_reset_err_cnt < 2 ){\
shreeshas95 1:a0055b3280c8 125 assrt_phy_off( tempReturn);\
shreeshas95 1:a0055b3280c8 126 if( !tempReturn ){\
shreeshas95 1:a0055b3280c8 127 bbram_write;\
shreeshas95 1:a0055b3280c8 128 bbram_flag=1;\
shreeshas95 2:2caf2a9a13aa 129 flag = true;\
shreeshas95 1:a0055b3280c8 130 break;\
shreeshas95 1:a0055b3280c8 131 }\
shreeshas95 1:a0055b3280c8 132 else{\
shreeshas95 1:a0055b3280c8 133 hardware_reset(0);\
shreeshas95 1:a0055b3280c8 134 hw_reset_err_cnt++;\
ee12b079 171:31bdf83591a1 135 gPC.puts("Resetting hardware\r\n");\
shreeshas95 1:a0055b3280c8 136 }\
shreeshas95 1:a0055b3280c8 137 }\
shreeshas95 2:2caf2a9a13aa 138 if( flag == false ){\
ee12b079 171:31bdf83591a1 139 gPC.puts("Seems to be SPI problem\r\n");\
shreeshas95 2:2caf2a9a13aa 140 }\
shreeshas95 1:a0055b3280c8 141 assrt_phy_off(tempReturn);\
shreeshas95 1:a0055b3280c8 142 if(!bbram_flag){\
shreeshas95 1:a0055b3280c8 143 bcn_flag=1;\
shreeshas95 1:a0055b3280c8 144 }\
shreeshas95 1:a0055b3280c8 145 }
ee12b079 9:e9eaada136c6 146
shreeshas95 1:a0055b3280c8 147 unsigned char status =0;
shreeshas95 1:a0055b3280c8 148 unsigned int cmd_err_cnt=0;
shreeshas95 1:a0055b3280c8 149 unsigned int state_err_cnt=0;
shreeshas95 1:a0055b3280c8 150 unsigned int miso_err_cnt=0;
shreeshas95 1:a0055b3280c8 151 unsigned int hw_reset_err_cnt=0;
shreeshas95 1:a0055b3280c8 152 bool bcn_flag=0;
shreeshas95 1:a0055b3280c8 153 bool bbram_flag=0;
ee12b079 9:e9eaada136c6 154
shreeshas95 1:a0055b3280c8 155 bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 156 for(int i= 0; i < 20 ; i++){
shreeshas95 1:a0055b3280c8 157 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 158 spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 159 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 160 wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 161 int count=0;
shreeshas95 1:a0055b3280c8 162 int temp_return = 0;
shreeshas95 1:a0055b3280c8 163 while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 164 if(MISO_PIN){
shreeshas95 1:a0055b3280c8 165 assrt_phy_off(temp_return);
shreeshas95 1:a0055b3280c8 166 if(!temp_return){
shreeshas95 1:a0055b3280c8 167 return 0;
shreeshas95 1:a0055b3280c8 168 }
shreeshas95 1:a0055b3280c8 169 count++;
shreeshas95 1:a0055b3280c8 170 }
shreeshas95 1:a0055b3280c8 171 else{
shreeshas95 1:a0055b3280c8 172 wait_us(50);
shreeshas95 1:a0055b3280c8 173 miso_err_cnt++;
shreeshas95 1:a0055b3280c8 174 }
shreeshas95 1:a0055b3280c8 175 }
shreeshas95 1:a0055b3280c8 176 }
shreeshas95 1:a0055b3280c8 177 return 1;
shreeshas95 1:a0055b3280c8 178 }
ee12b079 9:e9eaada136c6 179
shreeshas95 1:a0055b3280c8 180 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
shreeshas95 1:a0055b3280c8 181 //----------------------------------------------------------------------------
ee12b079 9:e9eaada136c6 182
shreeshas95 1:a0055b3280c8 183 # define initiate {\
shreeshas95 1:a0055b3280c8 184 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 185 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 186 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 187 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 188 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 189 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 190 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 191 spi.write(0x14);\
shreeshas95 1:a0055b3280c8 192 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 193 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 194 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 195 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 196 spi.write(0x15);\
shreeshas95 1:a0055b3280c8 197 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 198 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 199 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 200 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 201 spi.write(0x24);\
shreeshas95 1:a0055b3280c8 202 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 203 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 204 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 205 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 206 spi.write(0x37);\
shreeshas95 1:a0055b3280c8 207 spi.write(0xE0);\
shreeshas95 1:a0055b3280c8 208 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 209 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 210 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 211 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 212 spi.write(0x70);\
shreeshas95 1:a0055b3280c8 213 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 214 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 215 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 216 spi.write(0x39);\
shreeshas95 1:a0055b3280c8 217 spi.write(0x10);\
shreeshas95 1:a0055b3280c8 218 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 219 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 220 spi.write(0xBB);\
ee12b079 9:e9eaada136c6 221 gCS_ADF=1;\
ee12b079 9:e9eaada136c6 222 gCS_ADF=0;\
ee12b079 9:e9eaada136c6 223 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 224 spi.write(0xFF);\
ee12b079 9:e9eaada136c6 225 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 226 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 227 }
ee12b079 9:e9eaada136c6 228
shreeshas95 1:a0055b3280c8 229 #define write_data {\
shreeshas95 1:a0055b3280c8 230 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 231 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 232 spi.write(0x0B);\
shreeshas95 1:a0055b3280c8 233 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 234 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 235 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 236 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 237 if(buffer_state){\
shreeshas95 1:a0055b3280c8 238 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 239 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 240 for(unsigned char i=0; i<112;i++){\
ee12b079 139:1018e1dc82e9 241 if(bypass_adf)\
ee12b079 139:1018e1dc82e9 242 gPC.putc(buffer_112[i]);\
ee12b079 139:1018e1dc82e9 243 else\
ee12b079 139:1018e1dc82e9 244 spi.write(buffer_112[i]);\
ee12b079 53:18db568f1098 245 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
shreeshas95 1:a0055b3280c8 246 }\
shreeshas95 1:a0055b3280c8 247 }\
shreeshas95 1:a0055b3280c8 248 else{\
shreeshas95 1:a0055b3280c8 249 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 250 spi.write(0x90);\
shreeshas95 1:a0055b3280c8 251 for(unsigned char i=0; i<112;i++){\
ee12b079 139:1018e1dc82e9 252 if(bypass_adf)\
ee12b079 139:1018e1dc82e9 253 gPC.putc(buffer_112[i]);\
ee12b079 139:1018e1dc82e9 254 else\
ee12b079 139:1018e1dc82e9 255 spi.write(buffer_112[i]);\
ee12b079 53:18db568f1098 256 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
shreeshas95 1:a0055b3280c8 257 }\
shreeshas95 1:a0055b3280c8 258 }\
shreeshas95 1:a0055b3280c8 259 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 260 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 261 buffer_state = !buffer_state;\
shreeshas95 1:a0055b3280c8 262 if(last_buffer){\
ee12b079 9:e9eaada136c6 263 finish_write_data = true;\
aniruddhv 69:20f09a0c3fd2 264 /*gPC.puts("adf_off\r\n");*/\
shreeshas95 1:a0055b3280c8 265 }\
shreeshas95 1:a0055b3280c8 266 }
shreeshas95 1:a0055b3280c8 267
aniruddhv 52:0bd68655c651 268 /*
shreeshas95 1:a0055b3280c8 269 void check(){
shreeshas95 1:a0055b3280c8 270 if(IRQ){
shreeshas95 1:a0055b3280c8 271 gCOM_MNG_TMTC_THREAD->signal_set(signal);
shreeshas95 1:a0055b3280c8 272 }
aniruddhv 52:0bd68655c651 273 }*/
shreeshas95 1:a0055b3280c8 274
ee12b079 9:e9eaada136c6 275
shreeshas95 1:a0055b3280c8 276 #define send_data {\
ee12b079 88:b9beee1a7a3e 277 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 278 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 279 }else{\
shreeshas95 1:a0055b3280c8 280 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 281 }\
shreeshas95 1:a0055b3280c8 282 write_data;\
shreeshas95 1:a0055b3280c8 283 if(sent_tmfrom_SDcard){\
krishanprajapat 148:46763854fa83 284 send_tm_from_SD_card_fun();\
krishanprajapat 148:46763854fa83 285 }else{\
krishanprajapat 148:46763854fa83 286 snd_tm.transmit_data(buffer_112,&last_buffer);\
krishanprajapat 148:46763854fa83 287 }\
krishanprajapat 148:46763854fa83 288 write_data;\
krishanprajapat 148:46763854fa83 289 if(sent_tmfrom_SDcard){\
ee12b079 95:42d6747900cb 290 send_tm_from_SD_card_fun();\
shreeshas95 1:a0055b3280c8 291 }else{\
shreeshas95 1:a0055b3280c8 292 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 293 }\
shreeshas95 1:a0055b3280c8 294 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 295 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 296 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 297 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 298 wait_us(300);\
shreeshas95 1:a0055b3280c8 299 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 300 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 301 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 302 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 303 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 304 spi.write(0xB5);\
shreeshas95 1:a0055b3280c8 305 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 306 wait_us(300);\
shreeshas95 1:a0055b3280c8 307 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 308 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 309 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 310 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 311 SPI_mutex.unlock();\
aniruddhv 52:0bd68655c651 312 /*ticker.attach_us(&check,32000);*/\
shreeshas95 1:a0055b3280c8 313 }
ee12b079 9:e9eaada136c6 314
aniruddhv 52:0bd68655c651 315 #define configure_adf {\
aniruddhv 52:0bd68655c651 316 finish_write_data = false;\
aniruddhv 52:0bd68655c651 317 buffer_state = true;\
aniruddhv 52:0bd68655c651 318 last_buffer = false;\
aniruddhv 52:0bd68655c651 319 loop_on = true;\
aniruddhv 52:0bd68655c651 320 ADF_off = false;\
aniruddhv 52:0bd68655c651 321 initial_adf_check;\
ee12b079 171:31bdf83591a1 322 gPC.puts("initial adf check\r\n");\
aniruddhv 52:0bd68655c651 323 initiate;\
ee12b079 171:31bdf83591a1 324 gPC.puts("adf configured\r\n");\
ee12b079 96:4ca92f9775e0 325 /*gLEDR = !gLEDR;*/\
ee12b079 9:e9eaada136c6 326 }
ee12b079 9:e9eaada136c6 327
ee12b079 95:42d6747900cb 328 #define transmit_adf {\
aniruddhv 52:0bd68655c651 329 configure_adf;\
ee12b079 95:42d6747900cb 330 if(sent_tmfrom_SDcard)\
ee12b079 95:42d6747900cb 331 signal = COM_MNG_TMTC_SIGNAL_ADF_SD;\
ee12b079 95:42d6747900cb 332 else signal = COM_MNG_TMTC_SIGNAL_ADF_NSD;\
aniruddhv 52:0bd68655c651 333 send_data;\
aniruddhv 52:0bd68655c651 334 while(loop_on){\
aniruddhv 52:0bd68655c651 335 wait_ms(COM_TX_TICKER_LIMIT);\
aniruddhv 69:20f09a0c3fd2 336 if(IRQ || bypass_adf){\
aniruddhv 52:0bd68655c651 337 if(finish_write_data){\
aniruddhv 52:0bd68655c651 338 if(ADF_off){\
aniruddhv 52:0bd68655c651 339 SPI_mutex.lock();\
aniruddhv 52:0bd68655c651 340 gCS_ADF=0;\
aniruddhv 52:0bd68655c651 341 spi.write(0xB1);\
aniruddhv 52:0bd68655c651 342 gCS_ADF=1;\
aniruddhv 52:0bd68655c651 343 SPI_mutex.unlock();\
aniruddhv 52:0bd68655c651 344 loop_on = false;\
ee12b079 95:42d6747900cb 345 gPC.puts("Transmission done\r\n");\
ee12b079 96:4ca92f9775e0 346 gLEDR = 1;\
aniruddhv 52:0bd68655c651 347 }\
aniruddhv 52:0bd68655c651 348 else{\
aniruddhv 52:0bd68655c651 349 ADF_off = true;\
aniruddhv 52:0bd68655c651 350 }\
ee12b079 96:4ca92f9775e0 351 }else{\
ee12b079 161:a63672bf4423 352 gLEDG = !gLEDG;\
aniruddhv 52:0bd68655c651 353 write_data;\
ee12b079 95:42d6747900cb 354 if(sent_tmfrom_SDcard)\
ee12b079 95:42d6747900cb 355 send_tm_from_SD_card_fun();\
ee12b079 95:42d6747900cb 356 else snd_tm.transmit_data(buffer_112,&last_buffer);\
aniruddhv 52:0bd68655c651 357 }\
aniruddhv 52:0bd68655c651 358 }\
aniruddhv 52:0bd68655c651 359 }\
aniruddhv 69:20f09a0c3fd2 360 /*gPC.puts("after while loop\r\n");*/\
ee12b079 88:b9beee1a7a3e 361 }
ee12b079 88:b9beee1a7a3e 362