Diff: FMS_all.h

Revision:

257:7d404e9dc9e2

Parent:

245:da9d1bd999da

Child:

261:1e54415b34d3

--- a/FMS_all.h	Tue Jul 12 11:10:48 2016 +0000
+++ b/FMS_all.h	Tue Jul 12 17:07:17 2016 +0000
@@ -1,3 +1,9 @@
+
+// Includes MMS RAM functions also
+
+/*===================================================FMS Functions=================================================*/
+
+void STANDBY_PRCS();
 
 //Run processes
 void P_PL_INIT();
@@ -27,17 +33,22 @@
 void SW_RST_PL_BEE();
 void RST_BAE();
 void RST_PL_BEE();
-void CDMS_INTERNAL_RESET();
+void CDMS_RESET();
 void SYS_PWR_RESET();  // Have to be decided with EPS team.
 void EPS_V_A_EN();
 void EPS_V_C_EN();
 
 void RST_HK_COUNTER();
-uint8_t CDMS_RD_SD_HK(uint8_t *);
+int8_t CDMS_RD_SD_HK(uint8_t *);
 void CDMS_RD_RTC(uint64_t *);
-void CDMS_CALIB_RTC();
-void CDMS_RESET();
+void CDMS_CALIB_RTC(uint8_t *);
+void TOTAL_RESET_WITH_CDMS();
+
 
+void STANDBY_PRCS()
+{
+    
+}
 
 void P_PL_INIT()
 {
@@ -46,7 +57,7 @@
 
 void P_PL_MAIN()
 {
-   // FCTN_CDMS_PL_MAIN((void *)NULL);
+   FCTN_CDMS_PL_MAIN((void *)NULL);
 }
 
 void P_COM_INIT()
@@ -81,12 +92,23 @@
 
 void CDMS_RTC_ON()
 {
-    
+    //FCTN_CDMS_INIT_RTC();
+    SPI_mutex.lock();
+    gCS_RTC=1;
+    gCS_RTC=0;
+    spi.write(0x81); //register address with write flag
+    spi.write(0x00);//disabling stop bit in the seconds register
+    SPI_mutex.unlock();
 }
 
 void CDMS_RTC_OFF()
 {
-    
+    SPI_mutex.lock();
+    gCS_RTC=1;
+    gCS_RTC=0;
+    spi.write(0x81); //register address with write flag
+    spi.write(0x80);//enabling stop bit in the seconds register
+    SPI_mutex.unlock();
 }
 
 void SW_ON_BAE()
@@ -145,14 +167,12 @@
 
 void SW_ON_V_A_EN()
 {
-    TRXY_PWR_CNTRL = 1;
-    TRZ_PWR_CNTRL = 1;
+    V_A_EN = 1;
 }
 
 void SW_OFF_V_A_EN()
 {
-    TRXY_PWR_CNTRL = 0;
-    TRZ_PWR_CNTRL = 0;    
+    V_A_EN = 0;
 }
 
 void RST_SD()
@@ -197,16 +217,14 @@
 
 void SYS_PWR_RESET()  // Have to be decided with EPS team.
 {
-    
+    sys_pwr_rst = 1;
 }
 
 void EPS_V_A_EN()     // This is a reset function
 {
-    TRXY_PWR_CNTRL = 0;
-    TRZ_PWR_CNTRL = 0;
+    V_A_EN = 0;
     wait_ms(10);
-    TRXY_PWR_CNTRL = 1;
-    TRZ_PWR_CNTRL = 1;
+    V_A_EN = 1;
 }
 
 void EPS_V_C_EN()     // This is a reset function
@@ -221,25 +239,19 @@
     firstCount = true;
 }
 
-uint8_t CDMS_RD_SD_HK(uint8_t *sd_statusbits)
+int8_t CDMS_RD_SD_HK(uint8_t *sd_statusbits)
 {
-    uint8_t p;
-    uint8_t ACK;
+    int8_t p;
     if(SD_SW_EN_DS != DEVICE_POWERED)
     {
-        ACK = 0x89;
         SD_RD_ERROR = 1;
-        //Generate TM
+        p = 1;
     }
     else
     {
         p = disk_read_statusbits(sd_statusbits);
-        if(p == 0)
-            ACK = 0xA0;
-        else
-            ACK = 0x89;
     }
-    return ACK;
+    return p;
 }
 
 void CDMS_RD_RTC(uint64_t *time)
@@ -247,9 +259,39 @@
     *time = FCTN_CDMS_RD_RTC();
 }
 
-void CDMS_CALIB_RTC()
+void CDMS_CALIB_RTC(uint64_t *time)
 {
+    SPI_mutex.lock();
+    gCS_RTC=1;
+    spi.format(8,0);
+    spi.frequency(1000000);
+ 
+    gCS_RTC=0;
+    spi.write(0x82);
+    spi.write(time[0]);//set minutes
+    gCS_RTC=1;
+ 
+    gCS_RTC=0;
+    spi.write(0x83); 
+    spi.write(time[1] & 0x3F); //set hours
+    gCS_RTC=1;
     
+    gCS_RTC=0;
+    spi.write(0x85); 
+    spi.write(time[2] & 0x3F); //set date
+    gCS_RTC=1;
+    
+    gCS_RTC=0;
+    spi.write(0x86); 
+    spi.write(time[3] & 0x1F); //set month
+    gCS_RTC=1;
+    
+    gCS_RTC=0;
+    spi.write(0x87); 
+    spi.write(time[4]); //set year to 00(2000)
+    gCS_RTC=1;
+    gPC.puts("\n\r rtc initalised \n");
+    SPI_mutex.unlock();
 }
 
 void CDMS_RESET()
@@ -262,4 +304,16 @@
 {
     
 }
-*/
\ No newline at end of file
+*/
+
+//===============================MMS RAM functions==================================
+
+void FCTN_CDMS_RD_L_RAM(Base_tm *);
+
+void FCTN_CDMS_RD_L_RAM(Base_tm *tm_pointer)
+{
+    for(int i=4;i<132;i++)
+    tm_pointer->TM_string[i] = CDMS_HK_FRAME[i-4];
+}
+
+