txrx test code

Dependencies:   BufferedSerial SX1276GenericLib mbed

Committer:
rtavk3
Date:
Thu Sep 07 18:56:20 2017 +0000
Revision:
0:2871c35d504d
TXRX Project data

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rtavk3 0:2871c35d504d 1 /*
rtavk3 0:2871c35d504d 2 * Copyright (c) 2017 Helmut Tschemernjak
rtavk3 0:2871c35d504d 3 * 30826 Garbsen (Hannover) Germany
rtavk3 0:2871c35d504d 4 * Licensed under the Apache License, Version 2.0);
rtavk3 0:2871c35d504d 5 */
rtavk3 0:2871c35d504d 6 #include "main.h"
rtavk3 0:2871c35d504d 7
rtavk3 0:2871c35d504d 8 DigitalOut myled(LED1);
rtavk3 0:2871c35d504d 9 BufferedSerial *ser;
rtavk3 0:2871c35d504d 10
rtavk3 0:2871c35d504d 11 int main() {
rtavk3 0:2871c35d504d 12 SystemClock_Config();
rtavk3 0:2871c35d504d 13 ser = new BufferedSerial(USBTX, USBRX);
rtavk3 0:2871c35d504d 14 ser->baud(115200*2);
rtavk3 0:2871c35d504d 15 ser->format(8);
rtavk3 0:2871c35d504d 16 ser->printf("Hello World\n\r");
rtavk3 0:2871c35d504d 17 myled = 1;
rtavk3 0:2871c35d504d 18
rtavk3 0:2871c35d504d 19 SX1276PingPong();
rtavk3 0:2871c35d504d 20 }
rtavk3 0:2871c35d504d 21
rtavk3 0:2871c35d504d 22
rtavk3 0:2871c35d504d 23
rtavk3 0:2871c35d504d 24
rtavk3 0:2871c35d504d 25 void SystemClock_Config(void)
rtavk3 0:2871c35d504d 26 {
rtavk3 0:2871c35d504d 27 #ifdef B_L072Z_LRWAN1_LORA
rtavk3 0:2871c35d504d 28 /*
rtavk3 0:2871c35d504d 29 * The L072Z_LRWAN1_LORA clock setup is somewhat differnt from the Nucleo board.
rtavk3 0:2871c35d504d 30 * It has no LSE.
rtavk3 0:2871c35d504d 31 */
rtavk3 0:2871c35d504d 32 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
rtavk3 0:2871c35d504d 33 RCC_OscInitTypeDef RCC_OscInitStruct = {0};
rtavk3 0:2871c35d504d 34
rtavk3 0:2871c35d504d 35 /* Enable HSE Oscillator and Activate PLL with HSE as source */
rtavk3 0:2871c35d504d 36 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
rtavk3 0:2871c35d504d 37 RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
rtavk3 0:2871c35d504d 38 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
rtavk3 0:2871c35d504d 39 RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
rtavk3 0:2871c35d504d 40 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
rtavk3 0:2871c35d504d 41 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
rtavk3 0:2871c35d504d 42 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_6;
rtavk3 0:2871c35d504d 43 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3;
rtavk3 0:2871c35d504d 44
rtavk3 0:2871c35d504d 45 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
rtavk3 0:2871c35d504d 46 // Error_Handler();
rtavk3 0:2871c35d504d 47 }
rtavk3 0:2871c35d504d 48
rtavk3 0:2871c35d504d 49 /* Set Voltage scale1 as MCU will run at 32MHz */
rtavk3 0:2871c35d504d 50 __HAL_RCC_PWR_CLK_ENABLE();
rtavk3 0:2871c35d504d 51 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
rtavk3 0:2871c35d504d 52
rtavk3 0:2871c35d504d 53 /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
rtavk3 0:2871c35d504d 54 while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};
rtavk3 0:2871c35d504d 55
rtavk3 0:2871c35d504d 56 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
rtavk3 0:2871c35d504d 57 clocks dividers */
rtavk3 0:2871c35d504d 58 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
rtavk3 0:2871c35d504d 59 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
rtavk3 0:2871c35d504d 60 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
rtavk3 0:2871c35d504d 61 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
rtavk3 0:2871c35d504d 62 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
rtavk3 0:2871c35d504d 63 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
rtavk3 0:2871c35d504d 64 // Error_Handler();
rtavk3 0:2871c35d504d 65 }
rtavk3 0:2871c35d504d 66 #endif
rtavk3 0:2871c35d504d 67 }
rtavk3 0:2871c35d504d 68
rtavk3 0:2871c35d504d 69 void dump(const char *title, const void *data, int len, bool dwords)
rtavk3 0:2871c35d504d 70 {
rtavk3 0:2871c35d504d 71 dprintf("dump(\"%s\", 0x%x, %d bytes)", title, data, len);
rtavk3 0:2871c35d504d 72
rtavk3 0:2871c35d504d 73 int i, j, cnt;
rtavk3 0:2871c35d504d 74 unsigned char *u;
rtavk3 0:2871c35d504d 75 const int width = 16;
rtavk3 0:2871c35d504d 76 const int seppos = 7;
rtavk3 0:2871c35d504d 77
rtavk3 0:2871c35d504d 78 cnt = 0;
rtavk3 0:2871c35d504d 79 u = (unsigned char *)data;
rtavk3 0:2871c35d504d 80 while (len > 0) {
rtavk3 0:2871c35d504d 81 ser->printf("%08x: ", (unsigned int)data + cnt);
rtavk3 0:2871c35d504d 82 if (dwords) {
rtavk3 0:2871c35d504d 83 unsigned int *ip = ( unsigned int *)u;
rtavk3 0:2871c35d504d 84 ser->printf(" 0x%08x\r\n", *ip);
rtavk3 0:2871c35d504d 85 u+= 4;
rtavk3 0:2871c35d504d 86 len -= 4;
rtavk3 0:2871c35d504d 87 cnt += 4;
rtavk3 0:2871c35d504d 88 continue;
rtavk3 0:2871c35d504d 89 }
rtavk3 0:2871c35d504d 90 cnt += width;
rtavk3 0:2871c35d504d 91 j = len < width ? len : width;
rtavk3 0:2871c35d504d 92 for (i = 0; i < j; i++) {
rtavk3 0:2871c35d504d 93 ser->printf("%2.2x ", *(u + i));
rtavk3 0:2871c35d504d 94 if (i == seppos)
rtavk3 0:2871c35d504d 95 ser->putc(' ');
rtavk3 0:2871c35d504d 96 }
rtavk3 0:2871c35d504d 97 ser->putc(' ');
rtavk3 0:2871c35d504d 98 if (j < width) {
rtavk3 0:2871c35d504d 99 i = width - j;
rtavk3 0:2871c35d504d 100 if (i > seppos + 1)
rtavk3 0:2871c35d504d 101 ser->putc(' ');
rtavk3 0:2871c35d504d 102 while (i--) {
rtavk3 0:2871c35d504d 103 printf("%s", " ");
rtavk3 0:2871c35d504d 104 }
rtavk3 0:2871c35d504d 105 }
rtavk3 0:2871c35d504d 106 for (i = 0; i < j; i++) {
rtavk3 0:2871c35d504d 107 int c = *(u + i);
rtavk3 0:2871c35d504d 108 if (c >= ' ' && c <= '~')
rtavk3 0:2871c35d504d 109 ser->putc(c);
rtavk3 0:2871c35d504d 110 else
rtavk3 0:2871c35d504d 111 ser->putc('.');
rtavk3 0:2871c35d504d 112 if (i == seppos)
rtavk3 0:2871c35d504d 113 ser->putc(' ');
rtavk3 0:2871c35d504d 114 }
rtavk3 0:2871c35d504d 115 len -= width;
rtavk3 0:2871c35d504d 116 u += width;
rtavk3 0:2871c35d504d 117 ser->printf("\r\n");
rtavk3 0:2871c35d504d 118 }
rtavk3 0:2871c35d504d 119 ser->printf("--\r\n");
rtavk3 0:2871c35d504d 120 }