Ricardo Benitez
meh
Fork of
mbed
by 
mbed official
TARGET_NUCLEO_F401RE/stm32f4xx_hal_flash_ex.h@99:dbbf35b96557, 2015-05-13 (annotated)
- Committer:
- Kojto
- Date:
- Wed May 13 08:08:21 2015 +0200
- Revision:
- 99:dbbf35b96557
- Parent:
- 90:cb3d968589d8
- Child:
- 106:ba1f97679dad
Release 99 of the mbed library
Changes:
- new targets - MAXWSNENV, DISCO_L053C8
- STM32F4xx - ST Cube driver
- KSDK mcu - SPI timing fix
- Nordic - update to softdevice s130
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_flash_ex.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| Kojto | 99:dbbf35b96557 | 5 | * @version V1.3.0 |
| Kojto | 99:dbbf35b96557 | 6 | * @date 09-March-2015 |
| emilmont | 77:869cf507173a | 7 | * @brief Header file of FLASH HAL Extension module. |
| emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 9 | * @attention |
| emilmont | 77:869cf507173a | 10 | * |
| Kojto | 99:dbbf35b96557 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 12 | * |
| emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
| emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
| emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
| emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
| emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
| emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
| emilmont | 77:869cf507173a | 23 | * |
| emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| emilmont | 77:869cf507173a | 34 | * |
| emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 36 | */ |
| emilmont | 77:869cf507173a | 37 | |
| emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_FLASH_EX_H |
| emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_FLASH_EX_H |
| emilmont | 77:869cf507173a | 41 | |
| emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 43 | extern "C" { |
| emilmont | 77:869cf507173a | 44 | #endif |
| emilmont | 77:869cf507173a | 45 | |
| emilmont | 77:869cf507173a | 46 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 47 | #include "stm32f4xx_hal_def.h" |
| emilmont | 77:869cf507173a | 48 | |
| emilmont | 77:869cf507173a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| emilmont | 77:869cf507173a | 50 | * @{ |
| emilmont | 77:869cf507173a | 51 | */ |
| emilmont | 77:869cf507173a | 52 | |
| emilmont | 77:869cf507173a | 53 | /** @addtogroup FLASHEx |
| emilmont | 77:869cf507173a | 54 | * @{ |
| emilmont | 77:869cf507173a | 55 | */ |
| emilmont | 77:869cf507173a | 56 | |
| emilmont | 77:869cf507173a | 57 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 58 | /** @defgroup FLASHEx_Exported_Types FLASH Exported Types |
| Kojto | 99:dbbf35b96557 | 59 | * @{ |
| Kojto | 99:dbbf35b96557 | 60 | */ |
| emilmont | 77:869cf507173a | 61 | |
| emilmont | 77:869cf507173a | 62 | /** |
| emilmont | 77:869cf507173a | 63 | * @brief FLASH Erase structure definition |
| emilmont | 77:869cf507173a | 64 | */ |
| emilmont | 77:869cf507173a | 65 | typedef struct |
| emilmont | 77:869cf507173a | 66 | { |
| bogdanm | 85:024bf7f99721 | 67 | uint32_t TypeErase; /*!< Mass erase or sector Erase. |
| emilmont | 77:869cf507173a | 68 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| emilmont | 77:869cf507173a | 69 | |
| bogdanm | 85:024bf7f99721 | 70 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
| emilmont | 77:869cf507173a | 71 | This parameter must be a value of @ref FLASHEx_Banks */ |
| emilmont | 77:869cf507173a | 72 | |
| bogdanm | 85:024bf7f99721 | 73 | uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled |
| emilmont | 77:869cf507173a | 74 | This parameter must be a value of @ref FLASHEx_Sectors */ |
| emilmont | 77:869cf507173a | 75 | |
| bogdanm | 85:024bf7f99721 | 76 | uint32_t NbSectors; /*!< Number of sectors to be erased. |
| emilmont | 77:869cf507173a | 77 | This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ |
| emilmont | 77:869cf507173a | 78 | |
| bogdanm | 85:024bf7f99721 | 79 | uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism |
| emilmont | 77:869cf507173a | 80 | This parameter must be a value of @ref FLASHEx_Voltage_Range */ |
| emilmont | 77:869cf507173a | 81 | |
| emilmont | 77:869cf507173a | 82 | } FLASH_EraseInitTypeDef; |
| emilmont | 77:869cf507173a | 83 | |
| emilmont | 77:869cf507173a | 84 | /** |
| emilmont | 77:869cf507173a | 85 | * @brief FLASH Option Bytes Program structure definition |
| emilmont | 77:869cf507173a | 86 | */ |
| emilmont | 77:869cf507173a | 87 | typedef struct |
| emilmont | 77:869cf507173a | 88 | { |
| bogdanm | 85:024bf7f99721 | 89 | uint32_t OptionType; /*!< Option byte to be configured. |
| emilmont | 77:869cf507173a | 90 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
| emilmont | 77:869cf507173a | 91 | |
| bogdanm | 85:024bf7f99721 | 92 | uint32_t WRPState; /*!< Write protection activation or deactivation. |
| emilmont | 77:869cf507173a | 93 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
| emilmont | 77:869cf507173a | 94 | |
| bogdanm | 85:024bf7f99721 | 95 | uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. |
| emilmont | 77:869cf507173a | 96 | The value of this parameter depend on device used within the same series */ |
| emilmont | 77:869cf507173a | 97 | |
| bogdanm | 85:024bf7f99721 | 98 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
| emilmont | 77:869cf507173a | 99 | This parameter must be a value of @ref FLASHEx_Banks */ |
| emilmont | 77:869cf507173a | 100 | |
| bogdanm | 85:024bf7f99721 | 101 | uint32_t RDPLevel; /*!< Set the read protection level. |
| emilmont | 77:869cf507173a | 102 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
| emilmont | 77:869cf507173a | 103 | |
| bogdanm | 85:024bf7f99721 | 104 | uint32_t BORLevel; /*!< Set the BOR Level. |
| emilmont | 77:869cf507173a | 105 | This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ |
| emilmont | 77:869cf507173a | 106 | |
| bogdanm | 85:024bf7f99721 | 107 | uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */ |
| emilmont | 77:869cf507173a | 108 | |
| emilmont | 77:869cf507173a | 109 | } FLASH_OBProgramInitTypeDef; |
| emilmont | 77:869cf507173a | 110 | |
| emilmont | 77:869cf507173a | 111 | /** |
| emilmont | 77:869cf507173a | 112 | * @brief FLASH Advanced Option Bytes Program structure definition |
| emilmont | 77:869cf507173a | 113 | */ |
| Kojto | 90:cb3d968589d8 | 114 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
| Kojto | 99:dbbf35b96557 | 115 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 116 | typedef struct |
| emilmont | 77:869cf507173a | 117 | { |
| bogdanm | 85:024bf7f99721 | 118 | uint32_t OptionType; /*!< Option byte to be configured for extension. |
| emilmont | 77:869cf507173a | 119 | This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */ |
| emilmont | 77:869cf507173a | 120 | |
| bogdanm | 85:024bf7f99721 | 121 | uint32_t PCROPState; /*!< PCROP activation or deactivation. |
| emilmont | 77:869cf507173a | 122 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
| emilmont | 77:869cf507173a | 123 | |
| Kojto | 99:dbbf35b96557 | 124 | #if defined (STM32F401xC) || defined (STM32F401xE) || defined (STM32F411xE) || defined (STM32F446xx) |
| bogdanm | 85:024bf7f99721 | 125 | uint16_t Sectors; /*!< specifies the sector(s) set for PCROP. |
| emilmont | 77:869cf507173a | 126 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| Kojto | 99:dbbf35b96557 | 127 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 90:cb3d968589d8 | 128 | |
| emilmont | 77:869cf507173a | 129 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| bogdanm | 85:024bf7f99721 | 130 | uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors. |
| emilmont | 77:869cf507173a | 131 | This parameter must be a value of @ref FLASHEx_Banks */ |
| emilmont | 77:869cf507173a | 132 | |
| bogdanm | 85:024bf7f99721 | 133 | uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1. |
| emilmont | 77:869cf507173a | 134 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| emilmont | 77:869cf507173a | 135 | |
| bogdanm | 85:024bf7f99721 | 136 | uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2. |
| emilmont | 77:869cf507173a | 137 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| emilmont | 77:869cf507173a | 138 | |
| bogdanm | 85:024bf7f99721 | 139 | uint8_t BootConfig; /*!< Specifies Option bytes for boot config. |
| emilmont | 77:869cf507173a | 140 | This parameter can be a value of @ref FLASHEx_Dual_Boot */ |
| emilmont | 77:869cf507173a | 141 | |
| emilmont | 77:869cf507173a | 142 | #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| emilmont | 77:869cf507173a | 143 | } FLASH_AdvOBProgramInitTypeDef; |
| Kojto | 99:dbbf35b96557 | 144 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 145 | /** |
| Kojto | 99:dbbf35b96557 | 146 | * @} |
| Kojto | 99:dbbf35b96557 | 147 | */ |
| emilmont | 77:869cf507173a | 148 | |
| emilmont | 77:869cf507173a | 149 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 150 | |
| Kojto | 90:cb3d968589d8 | 151 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants |
| emilmont | 77:869cf507173a | 152 | * @{ |
| emilmont | 77:869cf507173a | 153 | */ |
| emilmont | 77:869cf507173a | 154 | |
| emilmont | 77:869cf507173a | 155 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| emilmont | 77:869cf507173a | 156 | * @{ |
| emilmont | 77:869cf507173a | 157 | */ |
| Kojto | 99:dbbf35b96557 | 158 | #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */ |
| Kojto | 99:dbbf35b96557 | 159 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */ |
| emilmont | 77:869cf507173a | 160 | /** |
| emilmont | 77:869cf507173a | 161 | * @} |
| emilmont | 77:869cf507173a | 162 | */ |
| emilmont | 77:869cf507173a | 163 | |
| emilmont | 77:869cf507173a | 164 | /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range |
| emilmont | 77:869cf507173a | 165 | * @{ |
| emilmont | 77:869cf507173a | 166 | */ |
| Kojto | 99:dbbf35b96557 | 167 | #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ |
| Kojto | 99:dbbf35b96557 | 168 | #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */ |
| Kojto | 99:dbbf35b96557 | 169 | #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */ |
| Kojto | 99:dbbf35b96557 | 170 | #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ |
| emilmont | 77:869cf507173a | 171 | /** |
| emilmont | 77:869cf507173a | 172 | * @} |
| emilmont | 77:869cf507173a | 173 | */ |
| emilmont | 77:869cf507173a | 174 | |
| emilmont | 77:869cf507173a | 175 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
| emilmont | 77:869cf507173a | 176 | * @{ |
| emilmont | 77:869cf507173a | 177 | */ |
| Kojto | 99:dbbf35b96557 | 178 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */ |
| Kojto | 99:dbbf35b96557 | 179 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */ |
| emilmont | 77:869cf507173a | 180 | /** |
| emilmont | 77:869cf507173a | 181 | * @} |
| emilmont | 77:869cf507173a | 182 | */ |
| emilmont | 77:869cf507173a | 183 | |
| emilmont | 77:869cf507173a | 184 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
| emilmont | 77:869cf507173a | 185 | * @{ |
| emilmont | 77:869cf507173a | 186 | */ |
| emilmont | 77:869cf507173a | 187 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */ |
| emilmont | 77:869cf507173a | 188 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */ |
| emilmont | 77:869cf507173a | 189 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */ |
| emilmont | 77:869cf507173a | 190 | #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */ |
| emilmont | 77:869cf507173a | 191 | /** |
| emilmont | 77:869cf507173a | 192 | * @} |
| emilmont | 77:869cf507173a | 193 | */ |
| emilmont | 77:869cf507173a | 194 | |
| emilmont | 77:869cf507173a | 195 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
| emilmont | 77:869cf507173a | 196 | * @{ |
| emilmont | 77:869cf507173a | 197 | */ |
| emilmont | 77:869cf507173a | 198 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) |
| emilmont | 77:869cf507173a | 199 | #define OB_RDP_LEVEL_1 ((uint8_t)0x55) |
| emilmont | 77:869cf507173a | 200 | /*#define OB_RDP_LEVEL_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2 |
| emilmont | 77:869cf507173a | 201 | it s no more possible to go back to level 1 or 0 */ |
| emilmont | 77:869cf507173a | 202 | /** |
| emilmont | 77:869cf507173a | 203 | * @} |
| emilmont | 77:869cf507173a | 204 | */ |
| emilmont | 77:869cf507173a | 205 | |
| emilmont | 77:869cf507173a | 206 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
| emilmont | 77:869cf507173a | 207 | * @{ |
| emilmont | 77:869cf507173a | 208 | */ |
| emilmont | 77:869cf507173a | 209 | #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ |
| emilmont | 77:869cf507173a | 210 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ |
| emilmont | 77:869cf507173a | 211 | /** |
| emilmont | 77:869cf507173a | 212 | * @} |
| emilmont | 77:869cf507173a | 213 | */ |
| emilmont | 77:869cf507173a | 214 | |
| emilmont | 77:869cf507173a | 215 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP |
| emilmont | 77:869cf507173a | 216 | * @{ |
| emilmont | 77:869cf507173a | 217 | */ |
| emilmont | 77:869cf507173a | 218 | #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ |
| emilmont | 77:869cf507173a | 219 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
| emilmont | 77:869cf507173a | 220 | /** |
| emilmont | 77:869cf507173a | 221 | * @} |
| emilmont | 77:869cf507173a | 222 | */ |
| emilmont | 77:869cf507173a | 223 | |
| emilmont | 77:869cf507173a | 224 | |
| emilmont | 77:869cf507173a | 225 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
| emilmont | 77:869cf507173a | 226 | * @{ |
| emilmont | 77:869cf507173a | 227 | */ |
| emilmont | 77:869cf507173a | 228 | #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ |
| emilmont | 77:869cf507173a | 229 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| emilmont | 77:869cf507173a | 230 | /** |
| emilmont | 77:869cf507173a | 231 | * @} |
| emilmont | 77:869cf507173a | 232 | */ |
| emilmont | 77:869cf507173a | 233 | |
| emilmont | 77:869cf507173a | 234 | /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level |
| emilmont | 77:869cf507173a | 235 | * @{ |
| emilmont | 77:869cf507173a | 236 | */ |
| emilmont | 77:869cf507173a | 237 | #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ |
| emilmont | 77:869cf507173a | 238 | #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ |
| emilmont | 77:869cf507173a | 239 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ |
| emilmont | 77:869cf507173a | 240 | #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ |
| emilmont | 77:869cf507173a | 241 | /** |
| emilmont | 77:869cf507173a | 242 | * @} |
| emilmont | 77:869cf507173a | 243 | */ |
| emilmont | 77:869cf507173a | 244 | |
| Kojto | 90:cb3d968589d8 | 245 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| Kojto | 99:dbbf35b96557 | 246 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 247 | /** @defgroup FLASHEx_PCROP_State FLASH PCROP State |
| emilmont | 77:869cf507173a | 248 | * @{ |
| emilmont | 77:869cf507173a | 249 | */ |
| Kojto | 99:dbbf35b96557 | 250 | #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00) /*!< Disable PCROP */ |
| Kojto | 99:dbbf35b96557 | 251 | #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01) /*!< Enable PCROP */ |
| emilmont | 77:869cf507173a | 252 | /** |
| emilmont | 77:869cf507173a | 253 | * @} |
| emilmont | 77:869cf507173a | 254 | */ |
| Kojto | 90:cb3d968589d8 | 255 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */ |
| emilmont | 77:869cf507173a | 256 | |
| emilmont | 77:869cf507173a | 257 | /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type |
| emilmont | 77:869cf507173a | 258 | * @{ |
| emilmont | 77:869cf507173a | 259 | */ |
| emilmont | 77:869cf507173a | 260 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 261 | #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!< PCROP option byte configuration */ |
| Kojto | 99:dbbf35b96557 | 262 | #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02) /*!< BOOTConfig option byte configuration */ |
| emilmont | 77:869cf507173a | 263 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| emilmont | 77:869cf507173a | 264 | |
| Kojto | 99:dbbf35b96557 | 265 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 266 | #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration */ |
| Kojto | 99:dbbf35b96557 | 267 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| emilmont | 77:869cf507173a | 268 | /** |
| emilmont | 77:869cf507173a | 269 | * @} |
| emilmont | 77:869cf507173a | 270 | */ |
| emilmont | 77:869cf507173a | 271 | |
| emilmont | 77:869cf507173a | 272 | /** @defgroup FLASH_Latency FLASH Latency |
| emilmont | 77:869cf507173a | 273 | * @{ |
| emilmont | 77:869cf507173a | 274 | */ |
| Kojto | 90:cb3d968589d8 | 275 | /*------------------------------------------- STM32F42xxx/STM32F43xxx------------------------------------------*/ |
| emilmont | 77:869cf507173a | 276 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 277 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| emilmont | 77:869cf507173a | 278 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| emilmont | 77:869cf507173a | 279 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| emilmont | 77:869cf507173a | 280 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| emilmont | 77:869cf507173a | 281 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| emilmont | 77:869cf507173a | 282 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| emilmont | 77:869cf507173a | 283 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| emilmont | 77:869cf507173a | 284 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| emilmont | 77:869cf507173a | 285 | #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ |
| emilmont | 77:869cf507173a | 286 | #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ |
| emilmont | 77:869cf507173a | 287 | #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ |
| emilmont | 77:869cf507173a | 288 | #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ |
| emilmont | 77:869cf507173a | 289 | #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ |
| emilmont | 77:869cf507173a | 290 | #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ |
| emilmont | 77:869cf507173a | 291 | #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ |
| emilmont | 77:869cf507173a | 292 | #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ |
| emilmont | 77:869cf507173a | 293 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 90:cb3d968589d8 | 294 | /*--------------------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 295 | |
| Kojto | 90:cb3d968589d8 | 296 | /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------*/ |
| Kojto | 90:cb3d968589d8 | 297 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
| Kojto | 99:dbbf35b96557 | 298 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 90:cb3d968589d8 | 299 | |
| emilmont | 77:869cf507173a | 300 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| emilmont | 77:869cf507173a | 301 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| emilmont | 77:869cf507173a | 302 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| emilmont | 77:869cf507173a | 303 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| emilmont | 77:869cf507173a | 304 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| emilmont | 77:869cf507173a | 305 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| emilmont | 77:869cf507173a | 306 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| emilmont | 77:869cf507173a | 307 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| Kojto | 99:dbbf35b96557 | 308 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| Kojto | 90:cb3d968589d8 | 309 | /*--------------------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 310 | |
| emilmont | 77:869cf507173a | 311 | /** |
| emilmont | 77:869cf507173a | 312 | * @} |
| emilmont | 77:869cf507173a | 313 | */ |
| emilmont | 77:869cf507173a | 314 | |
| emilmont | 77:869cf507173a | 315 | |
| emilmont | 77:869cf507173a | 316 | /** @defgroup FLASHEx_Banks FLASH Banks |
| emilmont | 77:869cf507173a | 317 | * @{ |
| emilmont | 77:869cf507173a | 318 | */ |
| emilmont | 77:869cf507173a | 319 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 320 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| emilmont | 77:869cf507173a | 321 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
| emilmont | 77:869cf507173a | 322 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
| emilmont | 77:869cf507173a | 323 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| emilmont | 77:869cf507173a | 324 | |
| Kojto | 90:cb3d968589d8 | 325 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| Kojto | 99:dbbf35b96557 | 326 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 327 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| Kojto | 99:dbbf35b96557 | 328 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| emilmont | 77:869cf507173a | 329 | /** |
| emilmont | 77:869cf507173a | 330 | * @} |
| emilmont | 77:869cf507173a | 331 | */ |
| emilmont | 77:869cf507173a | 332 | |
| emilmont | 77:869cf507173a | 333 | /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit |
| emilmont | 77:869cf507173a | 334 | * @{ |
| emilmont | 77:869cf507173a | 335 | */ |
| emilmont | 77:869cf507173a | 336 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 337 | #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */ |
| emilmont | 77:869cf507173a | 338 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| emilmont | 77:869cf507173a | 339 | |
| Kojto | 90:cb3d968589d8 | 340 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| Kojto | 99:dbbf35b96557 | 341 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 342 | #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */ |
| Kojto | 99:dbbf35b96557 | 343 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| emilmont | 77:869cf507173a | 344 | /** |
| emilmont | 77:869cf507173a | 345 | * @} |
| emilmont | 77:869cf507173a | 346 | */ |
| emilmont | 77:869cf507173a | 347 | |
| emilmont | 77:869cf507173a | 348 | /** @defgroup FLASHEx_Sectors FLASH Sectors |
| emilmont | 77:869cf507173a | 349 | * @{ |
| emilmont | 77:869cf507173a | 350 | */ |
| Kojto | 90:cb3d968589d8 | 351 | /*------------------------------------------ STM32F42xxx/STM32F43xxx--------------------------------------*/ |
| emilmont | 77:869cf507173a | 352 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 353 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| emilmont | 77:869cf507173a | 354 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| emilmont | 77:869cf507173a | 355 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| emilmont | 77:869cf507173a | 356 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| emilmont | 77:869cf507173a | 357 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| emilmont | 77:869cf507173a | 358 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| emilmont | 77:869cf507173a | 359 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| emilmont | 77:869cf507173a | 360 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| emilmont | 77:869cf507173a | 361 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| emilmont | 77:869cf507173a | 362 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| emilmont | 77:869cf507173a | 363 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| emilmont | 77:869cf507173a | 364 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| emilmont | 77:869cf507173a | 365 | #define FLASH_SECTOR_12 ((uint32_t)12) /*!< Sector Number 12 */ |
| emilmont | 77:869cf507173a | 366 | #define FLASH_SECTOR_13 ((uint32_t)13) /*!< Sector Number 13 */ |
| emilmont | 77:869cf507173a | 367 | #define FLASH_SECTOR_14 ((uint32_t)14) /*!< Sector Number 14 */ |
| emilmont | 77:869cf507173a | 368 | #define FLASH_SECTOR_15 ((uint32_t)15) /*!< Sector Number 15 */ |
| emilmont | 77:869cf507173a | 369 | #define FLASH_SECTOR_16 ((uint32_t)16) /*!< Sector Number 16 */ |
| emilmont | 77:869cf507173a | 370 | #define FLASH_SECTOR_17 ((uint32_t)17) /*!< Sector Number 17 */ |
| emilmont | 77:869cf507173a | 371 | #define FLASH_SECTOR_18 ((uint32_t)18) /*!< Sector Number 18 */ |
| emilmont | 77:869cf507173a | 372 | #define FLASH_SECTOR_19 ((uint32_t)19) /*!< Sector Number 19 */ |
| emilmont | 77:869cf507173a | 373 | #define FLASH_SECTOR_20 ((uint32_t)20) /*!< Sector Number 20 */ |
| emilmont | 77:869cf507173a | 374 | #define FLASH_SECTOR_21 ((uint32_t)21) /*!< Sector Number 21 */ |
| emilmont | 77:869cf507173a | 375 | #define FLASH_SECTOR_22 ((uint32_t)22) /*!< Sector Number 22 */ |
| emilmont | 77:869cf507173a | 376 | #define FLASH_SECTOR_23 ((uint32_t)23) /*!< Sector Number 23 */ |
| Kojto | 90:cb3d968589d8 | 377 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 90:cb3d968589d8 | 378 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 379 | |
| Kojto | 90:cb3d968589d8 | 380 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| emilmont | 77:869cf507173a | 381 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| emilmont | 77:869cf507173a | 382 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| emilmont | 77:869cf507173a | 383 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| emilmont | 77:869cf507173a | 384 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| emilmont | 77:869cf507173a | 385 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| emilmont | 77:869cf507173a | 386 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| emilmont | 77:869cf507173a | 387 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| emilmont | 77:869cf507173a | 388 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| emilmont | 77:869cf507173a | 389 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| emilmont | 77:869cf507173a | 390 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| emilmont | 77:869cf507173a | 391 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| emilmont | 77:869cf507173a | 392 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| emilmont | 77:869cf507173a | 393 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| Kojto | 90:cb3d968589d8 | 394 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| Kojto | 90:cb3d968589d8 | 395 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 396 | |
| Kojto | 90:cb3d968589d8 | 397 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| emilmont | 77:869cf507173a | 398 | #if defined(STM32F401xC) |
| emilmont | 77:869cf507173a | 399 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| emilmont | 77:869cf507173a | 400 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| emilmont | 77:869cf507173a | 401 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| emilmont | 77:869cf507173a | 402 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| emilmont | 77:869cf507173a | 403 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| emilmont | 77:869cf507173a | 404 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| Kojto | 90:cb3d968589d8 | 405 | #endif /* STM32F401xC */ |
| Kojto | 90:cb3d968589d8 | 406 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 407 | |
| Kojto | 99:dbbf35b96557 | 408 | /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 409 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 410 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| emilmont | 77:869cf507173a | 411 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| emilmont | 77:869cf507173a | 412 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| emilmont | 77:869cf507173a | 413 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| emilmont | 77:869cf507173a | 414 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| emilmont | 77:869cf507173a | 415 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| emilmont | 77:869cf507173a | 416 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| emilmont | 77:869cf507173a | 417 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| Kojto | 99:dbbf35b96557 | 418 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 90:cb3d968589d8 | 419 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 420 | |
| emilmont | 77:869cf507173a | 421 | /** |
| emilmont | 77:869cf507173a | 422 | * @} |
| emilmont | 77:869cf507173a | 423 | */ |
| emilmont | 77:869cf507173a | 424 | |
| emilmont | 77:869cf507173a | 425 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
| emilmont | 77:869cf507173a | 426 | * @{ |
| emilmont | 77:869cf507173a | 427 | */ |
| Kojto | 90:cb3d968589d8 | 428 | /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/ |
| emilmont | 77:869cf507173a | 429 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 430 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 431 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 432 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 433 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 434 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 435 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 436 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 437 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 438 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| emilmont | 77:869cf507173a | 439 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| emilmont | 77:869cf507173a | 440 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| emilmont | 77:869cf507173a | 441 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| emilmont | 77:869cf507173a | 442 | #define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /*!< Write protection of Sector12 */ |
| emilmont | 77:869cf507173a | 443 | #define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /*!< Write protection of Sector13 */ |
| emilmont | 77:869cf507173a | 444 | #define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /*!< Write protection of Sector14 */ |
| emilmont | 77:869cf507173a | 445 | #define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /*!< Write protection of Sector15 */ |
| emilmont | 77:869cf507173a | 446 | #define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /*!< Write protection of Sector16 */ |
| emilmont | 77:869cf507173a | 447 | #define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /*!< Write protection of Sector17 */ |
| emilmont | 77:869cf507173a | 448 | #define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /*!< Write protection of Sector18 */ |
| emilmont | 77:869cf507173a | 449 | #define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /*!< Write protection of Sector19 */ |
| emilmont | 77:869cf507173a | 450 | #define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /*!< Write protection of Sector20 */ |
| emilmont | 77:869cf507173a | 451 | #define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /*!< Write protection of Sector21 */ |
| emilmont | 77:869cf507173a | 452 | #define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /*!< Write protection of Sector22 */ |
| emilmont | 77:869cf507173a | 453 | #define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /*!< Write protection of Sector23 */ |
| emilmont | 77:869cf507173a | 454 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 455 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 90:cb3d968589d8 | 456 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 457 | |
| Kojto | 90:cb3d968589d8 | 458 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| emilmont | 77:869cf507173a | 459 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| emilmont | 77:869cf507173a | 460 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 461 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 462 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 463 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 464 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 465 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 466 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 467 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 468 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| emilmont | 77:869cf507173a | 469 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| emilmont | 77:869cf507173a | 470 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| emilmont | 77:869cf507173a | 471 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| emilmont | 77:869cf507173a | 472 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 473 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| Kojto | 90:cb3d968589d8 | 474 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 475 | |
| Kojto | 90:cb3d968589d8 | 476 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| emilmont | 77:869cf507173a | 477 | #if defined(STM32F401xC) |
| emilmont | 77:869cf507173a | 478 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 479 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 480 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 481 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 482 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 483 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 484 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 485 | #endif /* STM32F401xC */ |
| Kojto | 90:cb3d968589d8 | 486 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 487 | |
| Kojto | 99:dbbf35b96557 | 488 | /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 489 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 490 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 491 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 492 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 493 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 494 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 495 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 496 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 497 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 498 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| Kojto | 99:dbbf35b96557 | 499 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 90:cb3d968589d8 | 500 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 501 | /** |
| emilmont | 77:869cf507173a | 502 | * @} |
| emilmont | 77:869cf507173a | 503 | */ |
| emilmont | 77:869cf507173a | 504 | |
| emilmont | 77:869cf507173a | 505 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection |
| emilmont | 77:869cf507173a | 506 | * @{ |
| emilmont | 77:869cf507173a | 507 | */ |
| Kojto | 90:cb3d968589d8 | 508 | /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/ |
| emilmont | 77:869cf507173a | 509 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 510 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 511 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 512 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 513 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 514 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 515 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 516 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 517 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 518 | #define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ |
| emilmont | 77:869cf507173a | 519 | #define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ |
| emilmont | 77:869cf507173a | 520 | #define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ |
| emilmont | 77:869cf507173a | 521 | #define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ |
| emilmont | 77:869cf507173a | 522 | #define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ |
| emilmont | 77:869cf507173a | 523 | #define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ |
| emilmont | 77:869cf507173a | 524 | #define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ |
| emilmont | 77:869cf507173a | 525 | #define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ |
| emilmont | 77:869cf507173a | 526 | #define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ |
| emilmont | 77:869cf507173a | 527 | #define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ |
| emilmont | 77:869cf507173a | 528 | #define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ |
| emilmont | 77:869cf507173a | 529 | #define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ |
| emilmont | 77:869cf507173a | 530 | #define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ |
| emilmont | 77:869cf507173a | 531 | #define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ |
| emilmont | 77:869cf507173a | 532 | #define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ |
| emilmont | 77:869cf507173a | 533 | #define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ |
| emilmont | 77:869cf507173a | 534 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 535 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 90:cb3d968589d8 | 536 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 537 | |
| Kojto | 90:cb3d968589d8 | 538 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| emilmont | 77:869cf507173a | 539 | #if defined(STM32F401xC) |
| emilmont | 77:869cf507173a | 540 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 541 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 542 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 543 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 544 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 545 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 546 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| emilmont | 77:869cf507173a | 547 | #endif /* STM32F401xC */ |
| Kojto | 90:cb3d968589d8 | 548 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 549 | |
| Kojto | 99:dbbf35b96557 | 550 | /*------------------------------ STM32F401xE/STM32F411xE/STM32F446xx ----------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 551 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 552 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| emilmont | 77:869cf507173a | 553 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| emilmont | 77:869cf507173a | 554 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| emilmont | 77:869cf507173a | 555 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| emilmont | 77:869cf507173a | 556 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| emilmont | 77:869cf507173a | 557 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| emilmont | 77:869cf507173a | 558 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| emilmont | 77:869cf507173a | 559 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| emilmont | 77:869cf507173a | 560 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| Kojto | 99:dbbf35b96557 | 561 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 90:cb3d968589d8 | 562 | /*-----------------------------------------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 563 | |
| emilmont | 77:869cf507173a | 564 | /** |
| emilmont | 77:869cf507173a | 565 | * @} |
| emilmont | 77:869cf507173a | 566 | */ |
| emilmont | 77:869cf507173a | 567 | |
| emilmont | 77:869cf507173a | 568 | /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot |
| emilmont | 77:869cf507173a | 569 | * @{ |
| emilmont | 77:869cf507173a | 570 | */ |
| emilmont | 77:869cf507173a | 571 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 572 | #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ |
| emilmont | 77:869cf507173a | 573 | #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ |
| emilmont | 77:869cf507173a | 574 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| emilmont | 77:869cf507173a | 575 | /** |
| emilmont | 77:869cf507173a | 576 | * @} |
| emilmont | 77:869cf507173a | 577 | */ |
| emilmont | 77:869cf507173a | 578 | |
| emilmont | 77:869cf507173a | 579 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode |
| emilmont | 77:869cf507173a | 580 | * @{ |
| emilmont | 77:869cf507173a | 581 | */ |
| Kojto | 90:cb3d968589d8 | 582 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| Kojto | 99:dbbf35b96557 | 583 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 584 | #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ |
| emilmont | 77:869cf507173a | 585 | #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ |
| Kojto | 99:dbbf35b96557 | 586 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| emilmont | 77:869cf507173a | 587 | /** |
| emilmont | 77:869cf507173a | 588 | * @} |
| emilmont | 77:869cf507173a | 589 | */ |
| emilmont | 77:869cf507173a | 590 | |
| emilmont | 77:869cf507173a | 591 | /** |
| emilmont | 77:869cf507173a | 592 | * @} |
| emilmont | 77:869cf507173a | 593 | */ |
| emilmont | 77:869cf507173a | 594 | |
| emilmont | 77:869cf507173a | 595 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 596 | |
| emilmont | 77:869cf507173a | 597 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 598 | /** @addtogroup FLASHEx_Exported_Functions |
| Kojto | 99:dbbf35b96557 | 599 | * @{ |
| Kojto | 99:dbbf35b96557 | 600 | */ |
| emilmont | 77:869cf507173a | 601 | |
| Kojto | 99:dbbf35b96557 | 602 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| Kojto | 99:dbbf35b96557 | 603 | * @{ |
| Kojto | 99:dbbf35b96557 | 604 | */ |
| emilmont | 77:869cf507173a | 605 | /* Extension Program operation functions *************************************/ |
| emilmont | 77:869cf507173a | 606 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); |
| emilmont | 77:869cf507173a | 607 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| emilmont | 77:869cf507173a | 608 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| emilmont | 77:869cf507173a | 609 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| Kojto | 90:cb3d968589d8 | 610 | |
| Kojto | 90:cb3d968589d8 | 611 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| Kojto | 99:dbbf35b96557 | 612 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| emilmont | 77:869cf507173a | 613 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| emilmont | 77:869cf507173a | 614 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| emilmont | 77:869cf507173a | 615 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
| emilmont | 77:869cf507173a | 616 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
| Kojto | 99:dbbf35b96557 | 617 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| emilmont | 77:869cf507173a | 618 | |
| emilmont | 77:869cf507173a | 619 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| emilmont | 77:869cf507173a | 620 | uint16_t HAL_FLASHEx_OB_GetBank2WRP(void); |
| emilmont | 77:869cf507173a | 621 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 622 | /** |
| Kojto | 99:dbbf35b96557 | 623 | * @} |
| Kojto | 99:dbbf35b96557 | 624 | */ |
| emilmont | 77:869cf507173a | 625 | |
| Kojto | 99:dbbf35b96557 | 626 | /** |
| Kojto | 99:dbbf35b96557 | 627 | * @} |
| Kojto | 99:dbbf35b96557 | 628 | */ |
| Kojto | 99:dbbf35b96557 | 629 | /* Private types -------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 630 | /* Private variables ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 631 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 632 | /** @defgroup FLASHEx_Private_Constants FLASH Private Constants |
| Kojto | 99:dbbf35b96557 | 633 | * @{ |
| Kojto | 99:dbbf35b96557 | 634 | */ |
| Kojto | 99:dbbf35b96557 | 635 | /*--------------------------------------- STM32F42xxx/STM32F43xxx--------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 636 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 637 | #define FLASH_SECTOR_TOTAL 24 |
| Kojto | 99:dbbf35b96557 | 638 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 639 | |
| Kojto | 99:dbbf35b96557 | 640 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 641 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| Kojto | 99:dbbf35b96557 | 642 | #define FLASH_SECTOR_TOTAL 12 |
| Kojto | 99:dbbf35b96557 | 643 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| Kojto | 99:dbbf35b96557 | 644 | |
| Kojto | 99:dbbf35b96557 | 645 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 646 | #if defined(STM32F401xC) |
| Kojto | 99:dbbf35b96557 | 647 | #define FLASH_SECTOR_TOTAL 6 |
| Kojto | 99:dbbf35b96557 | 648 | #endif /* STM32F401xC */ |
| Kojto | 99:dbbf35b96557 | 649 | |
| Kojto | 99:dbbf35b96557 | 650 | /*--------------------------------- STM32F401xE/STM32F411xE/STM32F446xx -------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 651 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 652 | #define FLASH_SECTOR_TOTAL 8 |
| Kojto | 99:dbbf35b96557 | 653 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 654 | |
| Kojto | 99:dbbf35b96557 | 655 | /** |
| Kojto | 99:dbbf35b96557 | 656 | * @brief OPTCR1 register byte 2 (Bits[23:16]) base address |
| Kojto | 99:dbbf35b96557 | 657 | */ |
| Kojto | 99:dbbf35b96557 | 658 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 659 | #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) |
| Kojto | 99:dbbf35b96557 | 660 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 661 | |
| Kojto | 99:dbbf35b96557 | 662 | /** |
| Kojto | 99:dbbf35b96557 | 663 | * @} |
| Kojto | 99:dbbf35b96557 | 664 | */ |
| Kojto | 99:dbbf35b96557 | 665 | |
| Kojto | 99:dbbf35b96557 | 666 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 667 | /** @defgroup FLASHEx_Private_Macros FLASH Private Macros |
| Kojto | 99:dbbf35b96557 | 668 | * @{ |
| Kojto | 99:dbbf35b96557 | 669 | */ |
| Kojto | 99:dbbf35b96557 | 670 | |
| Kojto | 99:dbbf35b96557 | 671 | /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters |
| Kojto | 99:dbbf35b96557 | 672 | * @{ |
| Kojto | 99:dbbf35b96557 | 673 | */ |
| Kojto | 99:dbbf35b96557 | 674 | |
| Kojto | 99:dbbf35b96557 | 675 | #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ |
| Kojto | 99:dbbf35b96557 | 676 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| Kojto | 99:dbbf35b96557 | 677 | |
| Kojto | 99:dbbf35b96557 | 678 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ |
| Kojto | 99:dbbf35b96557 | 679 | ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ |
| Kojto | 99:dbbf35b96557 | 680 | ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ |
| Kojto | 99:dbbf35b96557 | 681 | ((RANGE) == FLASH_VOLTAGE_RANGE_4)) |
| Kojto | 99:dbbf35b96557 | 682 | |
| Kojto | 99:dbbf35b96557 | 683 | #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ |
| Kojto | 99:dbbf35b96557 | 684 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
| Kojto | 99:dbbf35b96557 | 685 | |
| Kojto | 99:dbbf35b96557 | 686 | #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
| Kojto | 99:dbbf35b96557 | 687 | |
| Kojto | 99:dbbf35b96557 | 688 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| Kojto | 99:dbbf35b96557 | 689 | ((LEVEL) == OB_RDP_LEVEL_1))/*||\ |
| Kojto | 99:dbbf35b96557 | 690 | ((LEVEL) == OB_RDP_LEVEL_2))*/ |
| Kojto | 99:dbbf35b96557 | 691 | |
| Kojto | 99:dbbf35b96557 | 692 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| Kojto | 99:dbbf35b96557 | 693 | |
| Kojto | 99:dbbf35b96557 | 694 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| Kojto | 99:dbbf35b96557 | 695 | |
| Kojto | 99:dbbf35b96557 | 696 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| Kojto | 99:dbbf35b96557 | 697 | |
| Kojto | 99:dbbf35b96557 | 698 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
| Kojto | 99:dbbf35b96557 | 699 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
| Kojto | 99:dbbf35b96557 | 700 | |
| Kojto | 99:dbbf35b96557 | 701 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| Kojto | 99:dbbf35b96557 | 702 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 703 | #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ |
| Kojto | 99:dbbf35b96557 | 704 | ((VALUE) == OB_PCROP_STATE_ENABLE)) |
| Kojto | 99:dbbf35b96557 | 705 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 706 | |
| Kojto | 99:dbbf35b96557 | 707 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 708 | #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \ |
| Kojto | 99:dbbf35b96557 | 709 | ((VALUE) == OPTIONBYTE_BOOTCONFIG)) |
| Kojto | 99:dbbf35b96557 | 710 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 711 | |
| Kojto | 99:dbbf35b96557 | 712 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 713 | #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP)) |
| Kojto | 99:dbbf35b96557 | 714 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 715 | |
| Kojto | 99:dbbf35b96557 | 716 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 717 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| Kojto | 99:dbbf35b96557 | 718 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| Kojto | 99:dbbf35b96557 | 719 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| Kojto | 99:dbbf35b96557 | 720 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| Kojto | 99:dbbf35b96557 | 721 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| Kojto | 99:dbbf35b96557 | 722 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| Kojto | 99:dbbf35b96557 | 723 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| Kojto | 99:dbbf35b96557 | 724 | ((LATENCY) == FLASH_LATENCY_7) || \ |
| Kojto | 99:dbbf35b96557 | 725 | ((LATENCY) == FLASH_LATENCY_8) || \ |
| Kojto | 99:dbbf35b96557 | 726 | ((LATENCY) == FLASH_LATENCY_9) || \ |
| Kojto | 99:dbbf35b96557 | 727 | ((LATENCY) == FLASH_LATENCY_10) || \ |
| Kojto | 99:dbbf35b96557 | 728 | ((LATENCY) == FLASH_LATENCY_11) || \ |
| Kojto | 99:dbbf35b96557 | 729 | ((LATENCY) == FLASH_LATENCY_12) || \ |
| Kojto | 99:dbbf35b96557 | 730 | ((LATENCY) == FLASH_LATENCY_13) || \ |
| Kojto | 99:dbbf35b96557 | 731 | ((LATENCY) == FLASH_LATENCY_14) || \ |
| Kojto | 99:dbbf35b96557 | 732 | ((LATENCY) == FLASH_LATENCY_15)) |
| Kojto | 99:dbbf35b96557 | 733 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 734 | |
| Kojto | 99:dbbf35b96557 | 735 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
| Kojto | 99:dbbf35b96557 | 736 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 737 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| Kojto | 99:dbbf35b96557 | 738 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| Kojto | 99:dbbf35b96557 | 739 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| Kojto | 99:dbbf35b96557 | 740 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| Kojto | 99:dbbf35b96557 | 741 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| Kojto | 99:dbbf35b96557 | 742 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| Kojto | 99:dbbf35b96557 | 743 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| Kojto | 99:dbbf35b96557 | 744 | ((LATENCY) == FLASH_LATENCY_7)) |
| Kojto | 99:dbbf35b96557 | 745 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 746 | |
| Kojto | 99:dbbf35b96557 | 747 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 748 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| Kojto | 99:dbbf35b96557 | 749 | ((BANK) == FLASH_BANK_2) || \ |
| Kojto | 99:dbbf35b96557 | 750 | ((BANK) == FLASH_BANK_BOTH)) |
| Kojto | 99:dbbf35b96557 | 751 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 752 | |
| Kojto | 99:dbbf35b96557 | 753 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| Kojto | 99:dbbf35b96557 | 754 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 755 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
| Kojto | 99:dbbf35b96557 | 756 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 757 | |
| Kojto | 99:dbbf35b96557 | 758 | |
| Kojto | 99:dbbf35b96557 | 759 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 760 | #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| Kojto | 99:dbbf35b96557 | 761 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| Kojto | 99:dbbf35b96557 | 762 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| Kojto | 99:dbbf35b96557 | 763 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| Kojto | 99:dbbf35b96557 | 764 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| Kojto | 99:dbbf35b96557 | 765 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ |
| Kojto | 99:dbbf35b96557 | 766 | ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ |
| Kojto | 99:dbbf35b96557 | 767 | ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ |
| Kojto | 99:dbbf35b96557 | 768 | ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ |
| Kojto | 99:dbbf35b96557 | 769 | ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ |
| Kojto | 99:dbbf35b96557 | 770 | ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ |
| Kojto | 99:dbbf35b96557 | 771 | ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) |
| Kojto | 99:dbbf35b96557 | 772 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 773 | |
| Kojto | 99:dbbf35b96557 | 774 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| Kojto | 99:dbbf35b96557 | 775 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| Kojto | 99:dbbf35b96557 | 776 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| Kojto | 99:dbbf35b96557 | 777 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| Kojto | 99:dbbf35b96557 | 778 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| Kojto | 99:dbbf35b96557 | 779 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| Kojto | 99:dbbf35b96557 | 780 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11)) |
| Kojto | 99:dbbf35b96557 | 781 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| Kojto | 99:dbbf35b96557 | 782 | |
| Kojto | 99:dbbf35b96557 | 783 | #if defined(STM32F401xC) |
| Kojto | 99:dbbf35b96557 | 784 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| Kojto | 99:dbbf35b96557 | 785 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| Kojto | 99:dbbf35b96557 | 786 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5)) |
| Kojto | 99:dbbf35b96557 | 787 | #endif /* STM32F401xC */ |
| Kojto | 99:dbbf35b96557 | 788 | |
| Kojto | 99:dbbf35b96557 | 789 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 790 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| Kojto | 99:dbbf35b96557 | 791 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| Kojto | 99:dbbf35b96557 | 792 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| Kojto | 99:dbbf35b96557 | 793 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) |
| Kojto | 99:dbbf35b96557 | 794 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 795 | |
| Kojto | 99:dbbf35b96557 | 796 | #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) |
| Kojto | 99:dbbf35b96557 | 797 | #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) |
| Kojto | 99:dbbf35b96557 | 798 | |
| Kojto | 99:dbbf35b96557 | 799 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 800 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 801 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 802 | |
| Kojto | 99:dbbf35b96557 | 803 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| Kojto | 99:dbbf35b96557 | 804 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 805 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| Kojto | 99:dbbf35b96557 | 806 | |
| Kojto | 99:dbbf35b96557 | 807 | #if defined(STM32F401xC) |
| Kojto | 99:dbbf35b96557 | 808 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 809 | #endif /* STM32F401xC */ |
| Kojto | 99:dbbf35b96557 | 810 | |
| Kojto | 99:dbbf35b96557 | 811 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 812 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 813 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 814 | |
| Kojto | 99:dbbf35b96557 | 815 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 816 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 817 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 818 | |
| Kojto | 99:dbbf35b96557 | 819 | #if defined(STM32F401xC) |
| Kojto | 99:dbbf35b96557 | 820 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 821 | #endif /* STM32F401xC */ |
| Kojto | 99:dbbf35b96557 | 822 | |
| Kojto | 99:dbbf35b96557 | 823 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 824 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| Kojto | 99:dbbf35b96557 | 825 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 826 | |
| Kojto | 99:dbbf35b96557 | 827 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| Kojto | 99:dbbf35b96557 | 828 | #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE)) |
| Kojto | 99:dbbf35b96557 | 829 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| Kojto | 99:dbbf35b96557 | 830 | |
| Kojto | 99:dbbf35b96557 | 831 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| Kojto | 99:dbbf35b96557 | 832 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| Kojto | 99:dbbf35b96557 | 833 | #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED)) |
| Kojto | 99:dbbf35b96557 | 834 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| Kojto | 99:dbbf35b96557 | 835 | /** |
| Kojto | 99:dbbf35b96557 | 836 | * @} |
| Kojto | 99:dbbf35b96557 | 837 | */ |
| Kojto | 99:dbbf35b96557 | 838 | |
| Kojto | 99:dbbf35b96557 | 839 | /** |
| Kojto | 99:dbbf35b96557 | 840 | * @} |
| Kojto | 99:dbbf35b96557 | 841 | */ |
| Kojto | 99:dbbf35b96557 | 842 | |
| Kojto | 99:dbbf35b96557 | 843 | /* Private functions ---------------------------------------------------------*/ |
| Kojto | 99:dbbf35b96557 | 844 | /** @defgroup FLASHEx_Private_Functions FLASH Private Functions |
| Kojto | 99:dbbf35b96557 | 845 | * @{ |
| Kojto | 99:dbbf35b96557 | 846 | */ |
| emilmont | 77:869cf507173a | 847 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); |
| Kojto | 99:dbbf35b96557 | 848 | /** |
| Kojto | 99:dbbf35b96557 | 849 | * @} |
| Kojto | 99:dbbf35b96557 | 850 | */ |
| emilmont | 77:869cf507173a | 851 | |
| emilmont | 77:869cf507173a | 852 | /** |
| emilmont | 77:869cf507173a | 853 | * @} |
| emilmont | 77:869cf507173a | 854 | */ |
| emilmont | 77:869cf507173a | 855 | |
| emilmont | 77:869cf507173a | 856 | /** |
| emilmont | 77:869cf507173a | 857 | * @} |
| emilmont | 77:869cf507173a | 858 | */ |
| emilmont | 77:869cf507173a | 859 | |
| emilmont | 77:869cf507173a | 860 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 861 | } |
| emilmont | 77:869cf507173a | 862 | #endif |
| emilmont | 77:869cf507173a | 863 | |
| emilmont | 77:869cf507173a | 864 | #endif /* __STM32F4xx_HAL_FLASH_EX_H */ |
| emilmont | 77:869cf507173a | 865 | |
| emilmont | 77:869cf507173a | 866 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |