meh

Fork of mbed by mbed official

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
89:552587b429a1
Child:
110:165afa46840b
dgdgr

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bogdanm 88:9327015d4013 1 /**************************************************************************//**
bogdanm 88:9327015d4013 2 * @file core_cmInstr.h
bogdanm 88:9327015d4013 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 88:9327015d4013 4 * @version V3.20
bogdanm 88:9327015d4013 5 * @date 05. March 2013
bogdanm 88:9327015d4013 6 *
bogdanm 88:9327015d4013 7 * @note
bogdanm 88:9327015d4013 8 *
bogdanm 88:9327015d4013 9 ******************************************************************************/
bogdanm 88:9327015d4013 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 88:9327015d4013 11
bogdanm 88:9327015d4013 12 All rights reserved.
bogdanm 88:9327015d4013 13 Redistribution and use in source and binary forms, with or without
bogdanm 88:9327015d4013 14 modification, are permitted provided that the following conditions are met:
bogdanm 88:9327015d4013 15 - Redistributions of source code must retain the above copyright
bogdanm 88:9327015d4013 16 notice, this list of conditions and the following disclaimer.
bogdanm 88:9327015d4013 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 88:9327015d4013 18 notice, this list of conditions and the following disclaimer in the
bogdanm 88:9327015d4013 19 documentation and/or other materials provided with the distribution.
bogdanm 88:9327015d4013 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 88:9327015d4013 21 to endorse or promote products derived from this software without
bogdanm 88:9327015d4013 22 specific prior written permission.
bogdanm 88:9327015d4013 23 *
bogdanm 88:9327015d4013 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 88:9327015d4013 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 88:9327015d4013 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 88:9327015d4013 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 88:9327015d4013 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 88:9327015d4013 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 88:9327015d4013 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 88:9327015d4013 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 88:9327015d4013 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 88:9327015d4013 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 88:9327015d4013 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 88:9327015d4013 35 ---------------------------------------------------------------------------*/
bogdanm 88:9327015d4013 36
bogdanm 88:9327015d4013 37
bogdanm 88:9327015d4013 38 #ifndef __CORE_CMINSTR_H
bogdanm 88:9327015d4013 39 #define __CORE_CMINSTR_H
bogdanm 88:9327015d4013 40
bogdanm 88:9327015d4013 41
bogdanm 88:9327015d4013 42 /* ########################## Core Instruction Access ######################### */
bogdanm 88:9327015d4013 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 88:9327015d4013 44 Access to dedicated instructions
bogdanm 88:9327015d4013 45 @{
bogdanm 88:9327015d4013 46 */
bogdanm 88:9327015d4013 47
bogdanm 88:9327015d4013 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 88:9327015d4013 49 /* ARM armcc specific functions */
bogdanm 88:9327015d4013 50
bogdanm 88:9327015d4013 51 #if (__ARMCC_VERSION < 400677)
bogdanm 88:9327015d4013 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 88:9327015d4013 53 #endif
bogdanm 88:9327015d4013 54
bogdanm 88:9327015d4013 55
bogdanm 88:9327015d4013 56 /** \brief No Operation
bogdanm 88:9327015d4013 57
bogdanm 88:9327015d4013 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 88:9327015d4013 59 */
bogdanm 88:9327015d4013 60 #define __NOP __nop
bogdanm 88:9327015d4013 61
bogdanm 88:9327015d4013 62
bogdanm 88:9327015d4013 63 /** \brief Wait For Interrupt
bogdanm 88:9327015d4013 64
bogdanm 88:9327015d4013 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 88:9327015d4013 66 until one of a number of events occurs.
bogdanm 88:9327015d4013 67 */
bogdanm 88:9327015d4013 68 #define __WFI __wfi
bogdanm 88:9327015d4013 69
bogdanm 88:9327015d4013 70
bogdanm 88:9327015d4013 71 /** \brief Wait For Event
bogdanm 88:9327015d4013 72
bogdanm 88:9327015d4013 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 88:9327015d4013 74 a low-power state until one of a number of events occurs.
bogdanm 88:9327015d4013 75 */
bogdanm 88:9327015d4013 76 #define __WFE __wfe
bogdanm 88:9327015d4013 77
bogdanm 88:9327015d4013 78
bogdanm 88:9327015d4013 79 /** \brief Send Event
bogdanm 88:9327015d4013 80
bogdanm 88:9327015d4013 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 88:9327015d4013 82 */
bogdanm 88:9327015d4013 83 #define __SEV __sev
bogdanm 88:9327015d4013 84
bogdanm 88:9327015d4013 85
bogdanm 88:9327015d4013 86 /** \brief Instruction Synchronization Barrier
bogdanm 88:9327015d4013 87
bogdanm 88:9327015d4013 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 88:9327015d4013 89 so that all instructions following the ISB are fetched from cache or
bogdanm 88:9327015d4013 90 memory, after the instruction has been completed.
bogdanm 88:9327015d4013 91 */
bogdanm 88:9327015d4013 92 #define __ISB() __isb(0xF)
bogdanm 88:9327015d4013 93
bogdanm 88:9327015d4013 94
bogdanm 88:9327015d4013 95 /** \brief Data Synchronization Barrier
bogdanm 88:9327015d4013 96
bogdanm 88:9327015d4013 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 88:9327015d4013 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 88:9327015d4013 99 */
bogdanm 88:9327015d4013 100 #define __DSB() __dsb(0xF)
bogdanm 88:9327015d4013 101
bogdanm 88:9327015d4013 102
bogdanm 88:9327015d4013 103 /** \brief Data Memory Barrier
bogdanm 88:9327015d4013 104
bogdanm 88:9327015d4013 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 88:9327015d4013 106 and after the instruction, without ensuring their completion.
bogdanm 88:9327015d4013 107 */
bogdanm 88:9327015d4013 108 #define __DMB() __dmb(0xF)
bogdanm 88:9327015d4013 109
bogdanm 88:9327015d4013 110
bogdanm 88:9327015d4013 111 /** \brief Reverse byte order (32 bit)
bogdanm 88:9327015d4013 112
bogdanm 88:9327015d4013 113 This function reverses the byte order in integer value.
bogdanm 88:9327015d4013 114
bogdanm 88:9327015d4013 115 \param [in] value Value to reverse
bogdanm 88:9327015d4013 116 \return Reversed value
bogdanm 88:9327015d4013 117 */
bogdanm 88:9327015d4013 118 #define __REV __rev
bogdanm 88:9327015d4013 119
bogdanm 88:9327015d4013 120
bogdanm 88:9327015d4013 121 /** \brief Reverse byte order (16 bit)
bogdanm 88:9327015d4013 122
bogdanm 88:9327015d4013 123 This function reverses the byte order in two unsigned short values.
bogdanm 88:9327015d4013 124
bogdanm 88:9327015d4013 125 \param [in] value Value to reverse
bogdanm 88:9327015d4013 126 \return Reversed value
bogdanm 88:9327015d4013 127 */
bogdanm 88:9327015d4013 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 88:9327015d4013 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 88:9327015d4013 130 {
bogdanm 88:9327015d4013 131 rev16 r0, r0
bogdanm 88:9327015d4013 132 bx lr
bogdanm 88:9327015d4013 133 }
bogdanm 88:9327015d4013 134 #endif
bogdanm 88:9327015d4013 135
bogdanm 88:9327015d4013 136 /** \brief Reverse byte order in signed short value
bogdanm 88:9327015d4013 137
bogdanm 88:9327015d4013 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 88:9327015d4013 139
bogdanm 88:9327015d4013 140 \param [in] value Value to reverse
bogdanm 88:9327015d4013 141 \return Reversed value
bogdanm 88:9327015d4013 142 */
bogdanm 88:9327015d4013 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 88:9327015d4013 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 88:9327015d4013 145 {
bogdanm 88:9327015d4013 146 revsh r0, r0
bogdanm 88:9327015d4013 147 bx lr
bogdanm 88:9327015d4013 148 }
bogdanm 88:9327015d4013 149 #endif
bogdanm 88:9327015d4013 150
bogdanm 88:9327015d4013 151
bogdanm 88:9327015d4013 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 88:9327015d4013 153
bogdanm 88:9327015d4013 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 88:9327015d4013 155
bogdanm 88:9327015d4013 156 \param [in] value Value to rotate
bogdanm 88:9327015d4013 157 \param [in] value Number of Bits to rotate
bogdanm 88:9327015d4013 158 \return Rotated value
bogdanm 88:9327015d4013 159 */
bogdanm 88:9327015d4013 160 #define __ROR __ror
bogdanm 88:9327015d4013 161
bogdanm 88:9327015d4013 162
bogdanm 88:9327015d4013 163 /** \brief Breakpoint
bogdanm 88:9327015d4013 164
bogdanm 88:9327015d4013 165 This function causes the processor to enter Debug state.
bogdanm 88:9327015d4013 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 88:9327015d4013 167
bogdanm 88:9327015d4013 168 \param [in] value is ignored by the processor.
bogdanm 88:9327015d4013 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 88:9327015d4013 170 */
bogdanm 88:9327015d4013 171 #define __BKPT(value) __breakpoint(value)
bogdanm 88:9327015d4013 172
bogdanm 88:9327015d4013 173
bogdanm 88:9327015d4013 174 #if (__CORTEX_M >= 0x03)
bogdanm 88:9327015d4013 175
bogdanm 88:9327015d4013 176 /** \brief Reverse bit order of value
bogdanm 88:9327015d4013 177
bogdanm 88:9327015d4013 178 This function reverses the bit order of the given value.
bogdanm 88:9327015d4013 179
bogdanm 88:9327015d4013 180 \param [in] value Value to reverse
bogdanm 88:9327015d4013 181 \return Reversed value
bogdanm 88:9327015d4013 182 */
bogdanm 88:9327015d4013 183 #define __RBIT __rbit
bogdanm 88:9327015d4013 184
bogdanm 88:9327015d4013 185
bogdanm 88:9327015d4013 186 /** \brief LDR Exclusive (8 bit)
bogdanm 88:9327015d4013 187
bogdanm 88:9327015d4013 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 88:9327015d4013 189
bogdanm 88:9327015d4013 190 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 191 \return value of type uint8_t at (*ptr)
bogdanm 88:9327015d4013 192 */
bogdanm 88:9327015d4013 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 88:9327015d4013 194
bogdanm 88:9327015d4013 195
bogdanm 88:9327015d4013 196 /** \brief LDR Exclusive (16 bit)
bogdanm 88:9327015d4013 197
bogdanm 88:9327015d4013 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 88:9327015d4013 199
bogdanm 88:9327015d4013 200 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 201 \return value of type uint16_t at (*ptr)
bogdanm 88:9327015d4013 202 */
bogdanm 88:9327015d4013 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 88:9327015d4013 204
bogdanm 88:9327015d4013 205
bogdanm 88:9327015d4013 206 /** \brief LDR Exclusive (32 bit)
bogdanm 88:9327015d4013 207
bogdanm 88:9327015d4013 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 88:9327015d4013 209
bogdanm 88:9327015d4013 210 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 211 \return value of type uint32_t at (*ptr)
bogdanm 88:9327015d4013 212 */
bogdanm 88:9327015d4013 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 88:9327015d4013 214
bogdanm 88:9327015d4013 215
bogdanm 88:9327015d4013 216 /** \brief STR Exclusive (8 bit)
bogdanm 88:9327015d4013 217
bogdanm 88:9327015d4013 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 88:9327015d4013 219
bogdanm 88:9327015d4013 220 \param [in] value Value to store
bogdanm 88:9327015d4013 221 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 222 \return 0 Function succeeded
bogdanm 88:9327015d4013 223 \return 1 Function failed
bogdanm 88:9327015d4013 224 */
bogdanm 88:9327015d4013 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 88:9327015d4013 226
bogdanm 88:9327015d4013 227
bogdanm 88:9327015d4013 228 /** \brief STR Exclusive (16 bit)
bogdanm 88:9327015d4013 229
bogdanm 88:9327015d4013 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 88:9327015d4013 231
bogdanm 88:9327015d4013 232 \param [in] value Value to store
bogdanm 88:9327015d4013 233 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 234 \return 0 Function succeeded
bogdanm 88:9327015d4013 235 \return 1 Function failed
bogdanm 88:9327015d4013 236 */
bogdanm 88:9327015d4013 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 88:9327015d4013 238
bogdanm 88:9327015d4013 239
bogdanm 88:9327015d4013 240 /** \brief STR Exclusive (32 bit)
bogdanm 88:9327015d4013 241
bogdanm 88:9327015d4013 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 88:9327015d4013 243
bogdanm 88:9327015d4013 244 \param [in] value Value to store
bogdanm 88:9327015d4013 245 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 246 \return 0 Function succeeded
bogdanm 88:9327015d4013 247 \return 1 Function failed
bogdanm 88:9327015d4013 248 */
bogdanm 88:9327015d4013 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 88:9327015d4013 250
bogdanm 88:9327015d4013 251
bogdanm 88:9327015d4013 252 /** \brief Remove the exclusive lock
bogdanm 88:9327015d4013 253
bogdanm 88:9327015d4013 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 88:9327015d4013 255
bogdanm 88:9327015d4013 256 */
bogdanm 88:9327015d4013 257 #define __CLREX __clrex
bogdanm 88:9327015d4013 258
bogdanm 88:9327015d4013 259
bogdanm 88:9327015d4013 260 /** \brief Signed Saturate
bogdanm 88:9327015d4013 261
bogdanm 88:9327015d4013 262 This function saturates a signed value.
bogdanm 88:9327015d4013 263
bogdanm 88:9327015d4013 264 \param [in] value Value to be saturated
bogdanm 88:9327015d4013 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 88:9327015d4013 266 \return Saturated value
bogdanm 88:9327015d4013 267 */
bogdanm 88:9327015d4013 268 #define __SSAT __ssat
bogdanm 88:9327015d4013 269
bogdanm 88:9327015d4013 270
bogdanm 88:9327015d4013 271 /** \brief Unsigned Saturate
bogdanm 88:9327015d4013 272
bogdanm 88:9327015d4013 273 This function saturates an unsigned value.
bogdanm 88:9327015d4013 274
bogdanm 88:9327015d4013 275 \param [in] value Value to be saturated
bogdanm 88:9327015d4013 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 88:9327015d4013 277 \return Saturated value
bogdanm 88:9327015d4013 278 */
bogdanm 88:9327015d4013 279 #define __USAT __usat
bogdanm 88:9327015d4013 280
bogdanm 88:9327015d4013 281
bogdanm 88:9327015d4013 282 /** \brief Count leading zeros
bogdanm 88:9327015d4013 283
bogdanm 88:9327015d4013 284 This function counts the number of leading zeros of a data value.
bogdanm 88:9327015d4013 285
bogdanm 88:9327015d4013 286 \param [in] value Value to count the leading zeros
bogdanm 88:9327015d4013 287 \return number of leading zeros in value
bogdanm 88:9327015d4013 288 */
bogdanm 88:9327015d4013 289 #define __CLZ __clz
bogdanm 88:9327015d4013 290
bogdanm 88:9327015d4013 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 88:9327015d4013 292
bogdanm 88:9327015d4013 293
bogdanm 88:9327015d4013 294
bogdanm 88:9327015d4013 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 88:9327015d4013 296 /* IAR iccarm specific functions */
bogdanm 88:9327015d4013 297
bogdanm 88:9327015d4013 298 #include <cmsis_iar.h>
bogdanm 88:9327015d4013 299
bogdanm 88:9327015d4013 300
bogdanm 88:9327015d4013 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 88:9327015d4013 302 /* TI CCS specific functions */
bogdanm 88:9327015d4013 303
bogdanm 88:9327015d4013 304 #include <cmsis_ccs.h>
bogdanm 88:9327015d4013 305
bogdanm 88:9327015d4013 306
bogdanm 88:9327015d4013 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 88:9327015d4013 308 /* GNU gcc specific functions */
bogdanm 88:9327015d4013 309
bogdanm 88:9327015d4013 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 88:9327015d4013 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 88:9327015d4013 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 88:9327015d4013 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 88:9327015d4013 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 88:9327015d4013 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 88:9327015d4013 316 #else
bogdanm 88:9327015d4013 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 88:9327015d4013 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 88:9327015d4013 319 #endif
bogdanm 88:9327015d4013 320
bogdanm 88:9327015d4013 321 /** \brief No Operation
bogdanm 88:9327015d4013 322
bogdanm 88:9327015d4013 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 88:9327015d4013 324 */
bogdanm 88:9327015d4013 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 88:9327015d4013 326 {
bogdanm 88:9327015d4013 327 __ASM volatile ("nop");
bogdanm 88:9327015d4013 328 }
bogdanm 88:9327015d4013 329
bogdanm 88:9327015d4013 330
bogdanm 88:9327015d4013 331 /** \brief Wait For Interrupt
bogdanm 88:9327015d4013 332
bogdanm 88:9327015d4013 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 88:9327015d4013 334 until one of a number of events occurs.
bogdanm 88:9327015d4013 335 */
bogdanm 88:9327015d4013 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 88:9327015d4013 337 {
bogdanm 88:9327015d4013 338 __ASM volatile ("wfi");
bogdanm 88:9327015d4013 339 }
bogdanm 88:9327015d4013 340
bogdanm 88:9327015d4013 341
bogdanm 88:9327015d4013 342 /** \brief Wait For Event
bogdanm 88:9327015d4013 343
bogdanm 88:9327015d4013 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 88:9327015d4013 345 a low-power state until one of a number of events occurs.
bogdanm 88:9327015d4013 346 */
bogdanm 88:9327015d4013 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 88:9327015d4013 348 {
bogdanm 88:9327015d4013 349 __ASM volatile ("wfe");
bogdanm 88:9327015d4013 350 }
bogdanm 88:9327015d4013 351
bogdanm 88:9327015d4013 352
bogdanm 88:9327015d4013 353 /** \brief Send Event
bogdanm 88:9327015d4013 354
bogdanm 88:9327015d4013 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 88:9327015d4013 356 */
bogdanm 88:9327015d4013 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 88:9327015d4013 358 {
bogdanm 88:9327015d4013 359 __ASM volatile ("sev");
bogdanm 88:9327015d4013 360 }
bogdanm 88:9327015d4013 361
bogdanm 88:9327015d4013 362
bogdanm 88:9327015d4013 363 /** \brief Instruction Synchronization Barrier
bogdanm 88:9327015d4013 364
bogdanm 88:9327015d4013 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 88:9327015d4013 366 so that all instructions following the ISB are fetched from cache or
bogdanm 88:9327015d4013 367 memory, after the instruction has been completed.
bogdanm 88:9327015d4013 368 */
bogdanm 88:9327015d4013 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 88:9327015d4013 370 {
bogdanm 88:9327015d4013 371 __ASM volatile ("isb");
bogdanm 88:9327015d4013 372 }
bogdanm 88:9327015d4013 373
bogdanm 88:9327015d4013 374
bogdanm 88:9327015d4013 375 /** \brief Data Synchronization Barrier
bogdanm 88:9327015d4013 376
bogdanm 88:9327015d4013 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 88:9327015d4013 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 88:9327015d4013 379 */
bogdanm 88:9327015d4013 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 88:9327015d4013 381 {
bogdanm 88:9327015d4013 382 __ASM volatile ("dsb");
bogdanm 88:9327015d4013 383 }
bogdanm 88:9327015d4013 384
bogdanm 88:9327015d4013 385
bogdanm 88:9327015d4013 386 /** \brief Data Memory Barrier
bogdanm 88:9327015d4013 387
bogdanm 88:9327015d4013 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 88:9327015d4013 389 and after the instruction, without ensuring their completion.
bogdanm 88:9327015d4013 390 */
bogdanm 88:9327015d4013 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 88:9327015d4013 392 {
bogdanm 88:9327015d4013 393 __ASM volatile ("dmb");
bogdanm 88:9327015d4013 394 }
bogdanm 88:9327015d4013 395
bogdanm 88:9327015d4013 396
bogdanm 88:9327015d4013 397 /** \brief Reverse byte order (32 bit)
bogdanm 88:9327015d4013 398
bogdanm 88:9327015d4013 399 This function reverses the byte order in integer value.
bogdanm 88:9327015d4013 400
bogdanm 88:9327015d4013 401 \param [in] value Value to reverse
bogdanm 88:9327015d4013 402 \return Reversed value
bogdanm 88:9327015d4013 403 */
bogdanm 88:9327015d4013 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 88:9327015d4013 405 {
bogdanm 88:9327015d4013 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 88:9327015d4013 407 return __builtin_bswap32(value);
bogdanm 88:9327015d4013 408 #else
bogdanm 88:9327015d4013 409 uint32_t result;
bogdanm 88:9327015d4013 410
bogdanm 88:9327015d4013 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 88:9327015d4013 412 return(result);
bogdanm 88:9327015d4013 413 #endif
bogdanm 88:9327015d4013 414 }
bogdanm 88:9327015d4013 415
bogdanm 88:9327015d4013 416
bogdanm 88:9327015d4013 417 /** \brief Reverse byte order (16 bit)
bogdanm 88:9327015d4013 418
bogdanm 88:9327015d4013 419 This function reverses the byte order in two unsigned short values.
bogdanm 88:9327015d4013 420
bogdanm 88:9327015d4013 421 \param [in] value Value to reverse
bogdanm 88:9327015d4013 422 \return Reversed value
bogdanm 88:9327015d4013 423 */
bogdanm 88:9327015d4013 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 88:9327015d4013 425 {
bogdanm 88:9327015d4013 426 uint32_t result;
bogdanm 88:9327015d4013 427
bogdanm 88:9327015d4013 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 88:9327015d4013 429 return(result);
bogdanm 88:9327015d4013 430 }
bogdanm 88:9327015d4013 431
bogdanm 88:9327015d4013 432
bogdanm 88:9327015d4013 433 /** \brief Reverse byte order in signed short value
bogdanm 88:9327015d4013 434
bogdanm 88:9327015d4013 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 88:9327015d4013 436
bogdanm 88:9327015d4013 437 \param [in] value Value to reverse
bogdanm 88:9327015d4013 438 \return Reversed value
bogdanm 88:9327015d4013 439 */
bogdanm 88:9327015d4013 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 88:9327015d4013 441 {
bogdanm 88:9327015d4013 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 88:9327015d4013 443 return (short)__builtin_bswap16(value);
bogdanm 88:9327015d4013 444 #else
bogdanm 88:9327015d4013 445 uint32_t result;
bogdanm 88:9327015d4013 446
bogdanm 88:9327015d4013 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 88:9327015d4013 448 return(result);
bogdanm 88:9327015d4013 449 #endif
bogdanm 88:9327015d4013 450 }
bogdanm 88:9327015d4013 451
bogdanm 88:9327015d4013 452
bogdanm 88:9327015d4013 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 88:9327015d4013 454
bogdanm 88:9327015d4013 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 88:9327015d4013 456
bogdanm 88:9327015d4013 457 \param [in] value Value to rotate
bogdanm 88:9327015d4013 458 \param [in] value Number of Bits to rotate
bogdanm 88:9327015d4013 459 \return Rotated value
bogdanm 88:9327015d4013 460 */
bogdanm 88:9327015d4013 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 88:9327015d4013 462 {
bogdanm 88:9327015d4013 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 88:9327015d4013 464 }
bogdanm 88:9327015d4013 465
bogdanm 88:9327015d4013 466
bogdanm 88:9327015d4013 467 /** \brief Breakpoint
bogdanm 88:9327015d4013 468
bogdanm 88:9327015d4013 469 This function causes the processor to enter Debug state.
bogdanm 88:9327015d4013 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 88:9327015d4013 471
bogdanm 88:9327015d4013 472 \param [in] value is ignored by the processor.
bogdanm 88:9327015d4013 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 88:9327015d4013 474 */
bogdanm 88:9327015d4013 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 88:9327015d4013 476
bogdanm 88:9327015d4013 477
bogdanm 88:9327015d4013 478 #if (__CORTEX_M >= 0x03)
bogdanm 88:9327015d4013 479
bogdanm 88:9327015d4013 480 /** \brief Reverse bit order of value
bogdanm 88:9327015d4013 481
bogdanm 88:9327015d4013 482 This function reverses the bit order of the given value.
bogdanm 88:9327015d4013 483
bogdanm 88:9327015d4013 484 \param [in] value Value to reverse
bogdanm 88:9327015d4013 485 \return Reversed value
bogdanm 88:9327015d4013 486 */
bogdanm 88:9327015d4013 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 88:9327015d4013 488 {
bogdanm 88:9327015d4013 489 uint32_t result;
bogdanm 88:9327015d4013 490
bogdanm 88:9327015d4013 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 88:9327015d4013 492 return(result);
bogdanm 88:9327015d4013 493 }
bogdanm 88:9327015d4013 494
bogdanm 88:9327015d4013 495
bogdanm 88:9327015d4013 496 /** \brief LDR Exclusive (8 bit)
bogdanm 88:9327015d4013 497
bogdanm 88:9327015d4013 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 88:9327015d4013 499
bogdanm 88:9327015d4013 500 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 501 \return value of type uint8_t at (*ptr)
bogdanm 88:9327015d4013 502 */
bogdanm 88:9327015d4013 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 88:9327015d4013 504 {
bogdanm 88:9327015d4013 505 uint32_t result;
bogdanm 88:9327015d4013 506
bogdanm 88:9327015d4013 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 88:9327015d4013 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 88:9327015d4013 509 #else
bogdanm 88:9327015d4013 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 88:9327015d4013 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 88:9327015d4013 512 */
bogdanm 88:9327015d4013 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 88:9327015d4013 514 #endif
bogdanm 88:9327015d4013 515 return(result);
bogdanm 88:9327015d4013 516 }
bogdanm 88:9327015d4013 517
bogdanm 88:9327015d4013 518
bogdanm 88:9327015d4013 519 /** \brief LDR Exclusive (16 bit)
bogdanm 88:9327015d4013 520
bogdanm 88:9327015d4013 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 88:9327015d4013 522
bogdanm 88:9327015d4013 523 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 524 \return value of type uint16_t at (*ptr)
bogdanm 88:9327015d4013 525 */
bogdanm 88:9327015d4013 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 88:9327015d4013 527 {
bogdanm 88:9327015d4013 528 uint32_t result;
bogdanm 88:9327015d4013 529
bogdanm 88:9327015d4013 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 88:9327015d4013 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 88:9327015d4013 532 #else
bogdanm 88:9327015d4013 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 88:9327015d4013 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 88:9327015d4013 535 */
bogdanm 88:9327015d4013 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 88:9327015d4013 537 #endif
bogdanm 88:9327015d4013 538 return(result);
bogdanm 88:9327015d4013 539 }
bogdanm 88:9327015d4013 540
bogdanm 88:9327015d4013 541
bogdanm 88:9327015d4013 542 /** \brief LDR Exclusive (32 bit)
bogdanm 88:9327015d4013 543
bogdanm 88:9327015d4013 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 88:9327015d4013 545
bogdanm 88:9327015d4013 546 \param [in] ptr Pointer to data
bogdanm 88:9327015d4013 547 \return value of type uint32_t at (*ptr)
bogdanm 88:9327015d4013 548 */
bogdanm 88:9327015d4013 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 88:9327015d4013 550 {
bogdanm 88:9327015d4013 551 uint32_t result;
bogdanm 88:9327015d4013 552
bogdanm 88:9327015d4013 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 88:9327015d4013 554 return(result);
bogdanm 88:9327015d4013 555 }
bogdanm 88:9327015d4013 556
bogdanm 88:9327015d4013 557
bogdanm 88:9327015d4013 558 /** \brief STR Exclusive (8 bit)
bogdanm 88:9327015d4013 559
bogdanm 88:9327015d4013 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 88:9327015d4013 561
bogdanm 88:9327015d4013 562 \param [in] value Value to store
bogdanm 88:9327015d4013 563 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 564 \return 0 Function succeeded
bogdanm 88:9327015d4013 565 \return 1 Function failed
bogdanm 88:9327015d4013 566 */
bogdanm 88:9327015d4013 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 88:9327015d4013 568 {
bogdanm 88:9327015d4013 569 uint32_t result;
bogdanm 88:9327015d4013 570
bogdanm 88:9327015d4013 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 88:9327015d4013 572 return(result);
bogdanm 88:9327015d4013 573 }
bogdanm 88:9327015d4013 574
bogdanm 88:9327015d4013 575
bogdanm 88:9327015d4013 576 /** \brief STR Exclusive (16 bit)
bogdanm 88:9327015d4013 577
bogdanm 88:9327015d4013 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 88:9327015d4013 579
bogdanm 88:9327015d4013 580 \param [in] value Value to store
bogdanm 88:9327015d4013 581 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 582 \return 0 Function succeeded
bogdanm 88:9327015d4013 583 \return 1 Function failed
bogdanm 88:9327015d4013 584 */
bogdanm 88:9327015d4013 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 88:9327015d4013 586 {
bogdanm 88:9327015d4013 587 uint32_t result;
bogdanm 88:9327015d4013 588
bogdanm 88:9327015d4013 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 88:9327015d4013 590 return(result);
bogdanm 88:9327015d4013 591 }
bogdanm 88:9327015d4013 592
bogdanm 88:9327015d4013 593
bogdanm 88:9327015d4013 594 /** \brief STR Exclusive (32 bit)
bogdanm 88:9327015d4013 595
bogdanm 88:9327015d4013 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 88:9327015d4013 597
bogdanm 88:9327015d4013 598 \param [in] value Value to store
bogdanm 88:9327015d4013 599 \param [in] ptr Pointer to location
bogdanm 88:9327015d4013 600 \return 0 Function succeeded
bogdanm 88:9327015d4013 601 \return 1 Function failed
bogdanm 88:9327015d4013 602 */
bogdanm 88:9327015d4013 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 88:9327015d4013 604 {
bogdanm 88:9327015d4013 605 uint32_t result;
bogdanm 88:9327015d4013 606
bogdanm 88:9327015d4013 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 88:9327015d4013 608 return(result);
bogdanm 88:9327015d4013 609 }
bogdanm 88:9327015d4013 610
bogdanm 88:9327015d4013 611
bogdanm 88:9327015d4013 612 /** \brief Remove the exclusive lock
bogdanm 88:9327015d4013 613
bogdanm 88:9327015d4013 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 88:9327015d4013 615
bogdanm 88:9327015d4013 616 */
bogdanm 88:9327015d4013 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 88:9327015d4013 618 {
bogdanm 88:9327015d4013 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 88:9327015d4013 620 }
bogdanm 88:9327015d4013 621
bogdanm 88:9327015d4013 622
bogdanm 88:9327015d4013 623 /** \brief Signed Saturate
bogdanm 88:9327015d4013 624
bogdanm 88:9327015d4013 625 This function saturates a signed value.
bogdanm 88:9327015d4013 626
bogdanm 88:9327015d4013 627 \param [in] value Value to be saturated
bogdanm 88:9327015d4013 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 88:9327015d4013 629 \return Saturated value
bogdanm 88:9327015d4013 630 */
bogdanm 88:9327015d4013 631 #define __SSAT(ARG1,ARG2) \
bogdanm 88:9327015d4013 632 ({ \
bogdanm 88:9327015d4013 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 88:9327015d4013 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 88:9327015d4013 635 __RES; \
bogdanm 88:9327015d4013 636 })
bogdanm 88:9327015d4013 637
bogdanm 88:9327015d4013 638
bogdanm 88:9327015d4013 639 /** \brief Unsigned Saturate
bogdanm 88:9327015d4013 640
bogdanm 88:9327015d4013 641 This function saturates an unsigned value.
bogdanm 88:9327015d4013 642
bogdanm 88:9327015d4013 643 \param [in] value Value to be saturated
bogdanm 88:9327015d4013 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 88:9327015d4013 645 \return Saturated value
bogdanm 88:9327015d4013 646 */
bogdanm 88:9327015d4013 647 #define __USAT(ARG1,ARG2) \
bogdanm 88:9327015d4013 648 ({ \
bogdanm 88:9327015d4013 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 88:9327015d4013 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 88:9327015d4013 651 __RES; \
bogdanm 88:9327015d4013 652 })
bogdanm 88:9327015d4013 653
bogdanm 88:9327015d4013 654
bogdanm 88:9327015d4013 655 /** \brief Count leading zeros
bogdanm 88:9327015d4013 656
bogdanm 88:9327015d4013 657 This function counts the number of leading zeros of a data value.
bogdanm 88:9327015d4013 658
bogdanm 88:9327015d4013 659 \param [in] value Value to count the leading zeros
bogdanm 88:9327015d4013 660 \return number of leading zeros in value
bogdanm 88:9327015d4013 661 */
bogdanm 88:9327015d4013 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 88:9327015d4013 663 {
bogdanm 88:9327015d4013 664 uint32_t result;
bogdanm 88:9327015d4013 665
bogdanm 88:9327015d4013 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 88:9327015d4013 667 return(result);
bogdanm 88:9327015d4013 668 }
bogdanm 88:9327015d4013 669
bogdanm 88:9327015d4013 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 88:9327015d4013 671
bogdanm 88:9327015d4013 672
bogdanm 88:9327015d4013 673
bogdanm 88:9327015d4013 674
bogdanm 88:9327015d4013 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 88:9327015d4013 676 /* TASKING carm specific functions */
bogdanm 88:9327015d4013 677
bogdanm 88:9327015d4013 678 /*
bogdanm 88:9327015d4013 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 88:9327015d4013 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 88:9327015d4013 681 * Including the CMSIS ones.
bogdanm 88:9327015d4013 682 */
bogdanm 88:9327015d4013 683
bogdanm 88:9327015d4013 684 #endif
bogdanm 88:9327015d4013 685
bogdanm 88:9327015d4013 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 88:9327015d4013 687
bogdanm 88:9327015d4013 688 #endif /* __CORE_CMINSTR_H */