Ricardo Benitez
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TARGET_NUCLEO_L053R8/stm32l0xx_hal_lcd.h@118:16969dd821af, 2016-04-05 (annotated)
- Committer:
- ricardobtez
- Date:
- Tue Apr 05 23:51:21 2016 +0000
- Revision:
- 118:16969dd821af
- Parent:
- 92:4fc01daae5a5
- Child:
- 96:487b796308b0
dgdgr
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 84:0b3ab51c8877 | 1 | /** |
| bogdanm | 84:0b3ab51c8877 | 2 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 3 | * @file stm32l0xx_hal_lcd.h |
| bogdanm | 84:0b3ab51c8877 | 4 | * @author MCD Application Team |
| bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
| bogdanm | 92:4fc01daae5a5 | 6 | * @date 18-June-2014 |
| bogdanm | 84:0b3ab51c8877 | 7 | * @brief Header file of LCD Controller HAL module. |
| bogdanm | 84:0b3ab51c8877 | 8 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 9 | * @attention |
| bogdanm | 84:0b3ab51c8877 | 10 | * |
| bogdanm | 84:0b3ab51c8877 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 84:0b3ab51c8877 | 12 | * |
| bogdanm | 84:0b3ab51c8877 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 84:0b3ab51c8877 | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 84:0b3ab51c8877 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 84:0b3ab51c8877 | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 84:0b3ab51c8877 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 84:0b3ab51c8877 | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 84:0b3ab51c8877 | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 84:0b3ab51c8877 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 84:0b3ab51c8877 | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 84:0b3ab51c8877 | 22 | * without specific prior written permission. |
| bogdanm | 84:0b3ab51c8877 | 23 | * |
| bogdanm | 84:0b3ab51c8877 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 84:0b3ab51c8877 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 84:0b3ab51c8877 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 84:0b3ab51c8877 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 84:0b3ab51c8877 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 84:0b3ab51c8877 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 84:0b3ab51c8877 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 84:0b3ab51c8877 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 84:0b3ab51c8877 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 84:0b3ab51c8877 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 84:0b3ab51c8877 | 34 | * |
| bogdanm | 84:0b3ab51c8877 | 35 | ****************************************************************************** |
| bogdanm | 84:0b3ab51c8877 | 36 | */ |
| bogdanm | 84:0b3ab51c8877 | 37 | |
| bogdanm | 84:0b3ab51c8877 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 39 | #ifndef __STM32L0xx_HAL_LCD_H |
| bogdanm | 84:0b3ab51c8877 | 40 | #define __STM32L0xx_HAL_LCD_H |
| bogdanm | 84:0b3ab51c8877 | 41 | |
| bogdanm | 84:0b3ab51c8877 | 42 | #ifdef __cplusplus |
| bogdanm | 84:0b3ab51c8877 | 43 | extern "C" { |
| bogdanm | 84:0b3ab51c8877 | 44 | #endif |
| bogdanm | 84:0b3ab51c8877 | 45 | |
| bogdanm | 84:0b3ab51c8877 | 46 | #if !defined (STM32L051xx) && !defined (STM32L052xx) && !defined (STM32L062xx) && !defined (STM32L061xx) |
| bogdanm | 84:0b3ab51c8877 | 47 | |
| bogdanm | 84:0b3ab51c8877 | 48 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 49 | #include "stm32l0xx_hal_def.h" |
| bogdanm | 84:0b3ab51c8877 | 50 | |
| bogdanm | 84:0b3ab51c8877 | 51 | /** @addtogroup STM32L0xx_HAL_Driver |
| bogdanm | 84:0b3ab51c8877 | 52 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 53 | */ |
| bogdanm | 84:0b3ab51c8877 | 54 | |
| bogdanm | 84:0b3ab51c8877 | 55 | /** @addtogroup LCD |
| bogdanm | 84:0b3ab51c8877 | 56 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 57 | */ |
| bogdanm | 84:0b3ab51c8877 | 58 | |
| bogdanm | 84:0b3ab51c8877 | 59 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 60 | |
| bogdanm | 84:0b3ab51c8877 | 61 | /** |
| bogdanm | 84:0b3ab51c8877 | 62 | * @brief LCD Init structure definition |
| bogdanm | 84:0b3ab51c8877 | 63 | */ |
| bogdanm | 84:0b3ab51c8877 | 64 | |
| bogdanm | 84:0b3ab51c8877 | 65 | typedef struct |
| bogdanm | 84:0b3ab51c8877 | 66 | { |
| bogdanm | 84:0b3ab51c8877 | 67 | uint32_t Prescaler; /*!< Configures the LCD Prescaler. |
| bogdanm | 84:0b3ab51c8877 | 68 | This parameter can be one value of @ref LCD_Prescaler */ |
| bogdanm | 84:0b3ab51c8877 | 69 | uint32_t Divider; /*!< Configures the LCD Divider. |
| bogdanm | 84:0b3ab51c8877 | 70 | This parameter can be one value of @ref LCD_Divider */ |
| bogdanm | 84:0b3ab51c8877 | 71 | uint32_t Duty; /*!< Configures the LCD Duty. |
| bogdanm | 84:0b3ab51c8877 | 72 | This parameter can be one value of @ref LCD_Duty */ |
| bogdanm | 84:0b3ab51c8877 | 73 | uint32_t Bias; /*!< Configures the LCD Bias. |
| bogdanm | 84:0b3ab51c8877 | 74 | This parameter can be one value of @ref LCD_Bias */ |
| bogdanm | 84:0b3ab51c8877 | 75 | uint32_t VoltageSource; /*!< Selects the LCD Voltage source. |
| bogdanm | 84:0b3ab51c8877 | 76 | This parameter can be one value of @ref LCD_Voltage_Source */ |
| bogdanm | 84:0b3ab51c8877 | 77 | uint32_t Contrast; /*!< Configures the LCD Contrast. |
| bogdanm | 84:0b3ab51c8877 | 78 | This parameter can be one value of @ref LCD_Contrast */ |
| bogdanm | 84:0b3ab51c8877 | 79 | uint32_t DeadTime; /*!< Configures the LCD Dead Time. |
| bogdanm | 84:0b3ab51c8877 | 80 | This parameter can be one value of @ref LCD_DeadTime */ |
| bogdanm | 84:0b3ab51c8877 | 81 | uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. |
| bogdanm | 84:0b3ab51c8877 | 82 | This parameter can be one value of @ref LCD_PulseOnDuration */ |
| bogdanm | 84:0b3ab51c8877 | 83 | uint32_t HighDrive; /*!< Enable or disable the low resistance divider. |
| bogdanm | 84:0b3ab51c8877 | 84 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 84:0b3ab51c8877 | 85 | uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. |
| bogdanm | 84:0b3ab51c8877 | 86 | This parameter can be one value of @ref LCD_BlinkMode */ |
| bogdanm | 84:0b3ab51c8877 | 87 | uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. |
| bogdanm | 84:0b3ab51c8877 | 88 | This parameter can be one value of @ref LCD_BlinkFrequency */ |
| bogdanm | 84:0b3ab51c8877 | 89 | }LCD_InitTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 90 | |
| bogdanm | 84:0b3ab51c8877 | 91 | /** |
| bogdanm | 84:0b3ab51c8877 | 92 | * @brief HAL LCD State structures definition |
| bogdanm | 84:0b3ab51c8877 | 93 | */ |
| bogdanm | 84:0b3ab51c8877 | 94 | typedef enum |
| bogdanm | 84:0b3ab51c8877 | 95 | { |
| bogdanm | 84:0b3ab51c8877 | 96 | HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ |
| bogdanm | 84:0b3ab51c8877 | 97 | HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| bogdanm | 84:0b3ab51c8877 | 98 | HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| bogdanm | 84:0b3ab51c8877 | 99 | HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| bogdanm | 84:0b3ab51c8877 | 100 | HAL_LCD_STATE_ERROR = 0x04 /*!< Error */ |
| bogdanm | 84:0b3ab51c8877 | 101 | }HAL_LCD_StateTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 102 | |
| bogdanm | 84:0b3ab51c8877 | 103 | /** |
| bogdanm | 84:0b3ab51c8877 | 104 | * @brief HAL LCD Error Code structure definition |
| bogdanm | 84:0b3ab51c8877 | 105 | */ |
| bogdanm | 84:0b3ab51c8877 | 106 | typedef enum |
| bogdanm | 84:0b3ab51c8877 | 107 | { |
| bogdanm | 84:0b3ab51c8877 | 108 | HAL_LCD_ERROR_NONE = 0x00, /*!< No error */ |
| bogdanm | 84:0b3ab51c8877 | 109 | HAL_LCD_ERROR_FCRSF = 0x01, /*!< Synchro flag timeout error */ |
| bogdanm | 84:0b3ab51c8877 | 110 | HAL_LCD_ERROR_UDR = 0x02, /*!< Update display request flag timeout error */ |
| bogdanm | 84:0b3ab51c8877 | 111 | HAL_LCD_ERROR_UDD = 0x04, /*!< Update display done flag timeout error */ |
| bogdanm | 84:0b3ab51c8877 | 112 | HAL_LCD_ERROR_ENS = 0x08, /*!< LCD enabled status flag timeout error */ |
| bogdanm | 84:0b3ab51c8877 | 113 | HAL_LCD_ERROR_RDY = 0x10 /*!< LCD Booster ready timeout error */ |
| bogdanm | 84:0b3ab51c8877 | 114 | }HAL_LCD_ErrorTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 115 | |
| bogdanm | 84:0b3ab51c8877 | 116 | /** |
| bogdanm | 84:0b3ab51c8877 | 117 | * @brief UART handle Structure definition |
| bogdanm | 84:0b3ab51c8877 | 118 | */ |
| bogdanm | 84:0b3ab51c8877 | 119 | typedef struct |
| bogdanm | 84:0b3ab51c8877 | 120 | { |
| bogdanm | 84:0b3ab51c8877 | 121 | LCD_TypeDef *Instance; /* LCD registers base address */ |
| bogdanm | 84:0b3ab51c8877 | 122 | |
| bogdanm | 84:0b3ab51c8877 | 123 | LCD_InitTypeDef Init; /* LCD communication parameters */ |
| bogdanm | 84:0b3ab51c8877 | 124 | |
| bogdanm | 84:0b3ab51c8877 | 125 | HAL_LockTypeDef Lock; /* Locking object */ |
| bogdanm | 84:0b3ab51c8877 | 126 | |
| bogdanm | 84:0b3ab51c8877 | 127 | __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ |
| bogdanm | 84:0b3ab51c8877 | 128 | |
| bogdanm | 84:0b3ab51c8877 | 129 | __IO HAL_LCD_ErrorTypeDef ErrorCode; /* LCD Error code */ |
| bogdanm | 84:0b3ab51c8877 | 130 | |
| bogdanm | 84:0b3ab51c8877 | 131 | }LCD_HandleTypeDef; |
| bogdanm | 84:0b3ab51c8877 | 132 | |
| bogdanm | 84:0b3ab51c8877 | 133 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 134 | |
| bogdanm | 84:0b3ab51c8877 | 135 | /** @defgroup LCD_Exported_Constants |
| bogdanm | 84:0b3ab51c8877 | 136 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 137 | */ |
| bogdanm | 84:0b3ab51c8877 | 138 | |
| bogdanm | 84:0b3ab51c8877 | 139 | #define IS_LCD_ALL_INSTANCE(INSTANCE) ((INSTANCE) == LCD) |
| bogdanm | 84:0b3ab51c8877 | 140 | |
| bogdanm | 92:4fc01daae5a5 | 141 | /** @defgroup LCD_Prescaler |
| bogdanm | 84:0b3ab51c8877 | 142 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 143 | */ |
| bogdanm | 84:0b3ab51c8877 | 144 | |
| bogdanm | 84:0b3ab51c8877 | 145 | #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */ |
| bogdanm | 84:0b3ab51c8877 | 146 | #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */ |
| bogdanm | 84:0b3ab51c8877 | 147 | #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */ |
| bogdanm | 84:0b3ab51c8877 | 148 | #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */ |
| bogdanm | 84:0b3ab51c8877 | 149 | #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */ |
| bogdanm | 84:0b3ab51c8877 | 150 | #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */ |
| bogdanm | 84:0b3ab51c8877 | 151 | #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */ |
| bogdanm | 84:0b3ab51c8877 | 152 | #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */ |
| bogdanm | 84:0b3ab51c8877 | 153 | #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */ |
| bogdanm | 84:0b3ab51c8877 | 154 | #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */ |
| bogdanm | 84:0b3ab51c8877 | 155 | #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */ |
| bogdanm | 84:0b3ab51c8877 | 156 | #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */ |
| bogdanm | 84:0b3ab51c8877 | 157 | #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */ |
| bogdanm | 84:0b3ab51c8877 | 158 | #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */ |
| bogdanm | 84:0b3ab51c8877 | 159 | #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */ |
| bogdanm | 84:0b3ab51c8877 | 160 | #define LCD_PRESCALER_32768 ((uint32_t)0x03C00000) /*!< CLKPS = LCDCLK/32768 */ |
| bogdanm | 84:0b3ab51c8877 | 161 | |
| bogdanm | 84:0b3ab51c8877 | 162 | #define IS_LCD_PRESCALER(PRESCALER) (((PRESCALER) == LCD_PRESCALER_1) || \ |
| bogdanm | 84:0b3ab51c8877 | 163 | ((PRESCALER) == LCD_PRESCALER_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 164 | ((PRESCALER) == LCD_PRESCALER_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 165 | ((PRESCALER) == LCD_PRESCALER_8) || \ |
| bogdanm | 84:0b3ab51c8877 | 166 | ((PRESCALER) == LCD_PRESCALER_16) || \ |
| bogdanm | 84:0b3ab51c8877 | 167 | ((PRESCALER) == LCD_PRESCALER_32) || \ |
| bogdanm | 84:0b3ab51c8877 | 168 | ((PRESCALER) == LCD_PRESCALER_64) || \ |
| bogdanm | 84:0b3ab51c8877 | 169 | ((PRESCALER) == LCD_PRESCALER_128) || \ |
| bogdanm | 84:0b3ab51c8877 | 170 | ((PRESCALER) == LCD_PRESCALER_256) || \ |
| bogdanm | 84:0b3ab51c8877 | 171 | ((PRESCALER) == LCD_PRESCALER_512) || \ |
| bogdanm | 84:0b3ab51c8877 | 172 | ((PRESCALER) == LCD_PRESCALER_1024) || \ |
| bogdanm | 84:0b3ab51c8877 | 173 | ((PRESCALER) == LCD_PRESCALER_2048) || \ |
| bogdanm | 84:0b3ab51c8877 | 174 | ((PRESCALER) == LCD_PRESCALER_4096) || \ |
| bogdanm | 84:0b3ab51c8877 | 175 | ((PRESCALER) == LCD_PRESCALER_8192) || \ |
| bogdanm | 84:0b3ab51c8877 | 176 | ((PRESCALER) == LCD_PRESCALER_16384) || \ |
| bogdanm | 84:0b3ab51c8877 | 177 | ((PRESCALER) == LCD_PRESCALER_32768)) |
| bogdanm | 84:0b3ab51c8877 | 178 | |
| bogdanm | 84:0b3ab51c8877 | 179 | /** |
| bogdanm | 84:0b3ab51c8877 | 180 | * @} |
| bogdanm | 84:0b3ab51c8877 | 181 | */ |
| bogdanm | 84:0b3ab51c8877 | 182 | |
| bogdanm | 92:4fc01daae5a5 | 183 | /** @defgroup LCD_Divider |
| bogdanm | 84:0b3ab51c8877 | 184 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 185 | */ |
| bogdanm | 84:0b3ab51c8877 | 186 | |
| bogdanm | 84:0b3ab51c8877 | 187 | #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */ |
| bogdanm | 84:0b3ab51c8877 | 188 | #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */ |
| bogdanm | 84:0b3ab51c8877 | 189 | #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */ |
| bogdanm | 84:0b3ab51c8877 | 190 | #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */ |
| bogdanm | 84:0b3ab51c8877 | 191 | #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */ |
| bogdanm | 84:0b3ab51c8877 | 192 | #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */ |
| bogdanm | 84:0b3ab51c8877 | 193 | #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */ |
| bogdanm | 84:0b3ab51c8877 | 194 | #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */ |
| bogdanm | 84:0b3ab51c8877 | 195 | #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */ |
| bogdanm | 84:0b3ab51c8877 | 196 | #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */ |
| bogdanm | 84:0b3ab51c8877 | 197 | #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */ |
| bogdanm | 84:0b3ab51c8877 | 198 | #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */ |
| bogdanm | 84:0b3ab51c8877 | 199 | #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */ |
| bogdanm | 84:0b3ab51c8877 | 200 | #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */ |
| bogdanm | 84:0b3ab51c8877 | 201 | #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */ |
| bogdanm | 84:0b3ab51c8877 | 202 | #define LCD_DIVIDER_31 ((uint32_t)0x003C0000) /*!< LCD frequency = CLKPS/31 */ |
| bogdanm | 84:0b3ab51c8877 | 203 | |
| bogdanm | 84:0b3ab51c8877 | 204 | #define IS_LCD_DIVIDER(DIVIDER) (((DIVIDER) == LCD_DIVIDER_16) || \ |
| bogdanm | 84:0b3ab51c8877 | 205 | ((DIVIDER) == LCD_DIVIDER_17) || \ |
| bogdanm | 84:0b3ab51c8877 | 206 | ((DIVIDER) == LCD_DIVIDER_18) || \ |
| bogdanm | 84:0b3ab51c8877 | 207 | ((DIVIDER) == LCD_DIVIDER_19) || \ |
| bogdanm | 84:0b3ab51c8877 | 208 | ((DIVIDER) == LCD_DIVIDER_20) || \ |
| bogdanm | 84:0b3ab51c8877 | 209 | ((DIVIDER) == LCD_DIVIDER_21) || \ |
| bogdanm | 84:0b3ab51c8877 | 210 | ((DIVIDER) == LCD_DIVIDER_22) || \ |
| bogdanm | 84:0b3ab51c8877 | 211 | ((DIVIDER) == LCD_DIVIDER_23) || \ |
| bogdanm | 84:0b3ab51c8877 | 212 | ((DIVIDER) == LCD_DIVIDER_24) || \ |
| bogdanm | 84:0b3ab51c8877 | 213 | ((DIVIDER) == LCD_DIVIDER_25) || \ |
| bogdanm | 84:0b3ab51c8877 | 214 | ((DIVIDER) == LCD_DIVIDER_26) || \ |
| bogdanm | 84:0b3ab51c8877 | 215 | ((DIVIDER) == LCD_DIVIDER_27) || \ |
| bogdanm | 84:0b3ab51c8877 | 216 | ((DIVIDER) == LCD_DIVIDER_28) || \ |
| bogdanm | 84:0b3ab51c8877 | 217 | ((DIVIDER) == LCD_DIVIDER_29) || \ |
| bogdanm | 84:0b3ab51c8877 | 218 | ((DIVIDER) == LCD_DIVIDER_30) || \ |
| bogdanm | 84:0b3ab51c8877 | 219 | ((DIVIDER) == LCD_DIVIDER_31)) |
| bogdanm | 84:0b3ab51c8877 | 220 | |
| bogdanm | 84:0b3ab51c8877 | 221 | /** |
| bogdanm | 84:0b3ab51c8877 | 222 | * @} |
| bogdanm | 84:0b3ab51c8877 | 223 | */ |
| bogdanm | 84:0b3ab51c8877 | 224 | |
| bogdanm | 84:0b3ab51c8877 | 225 | |
| bogdanm | 92:4fc01daae5a5 | 226 | /** @defgroup LCD_Duty |
| bogdanm | 84:0b3ab51c8877 | 227 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 228 | */ |
| bogdanm | 84:0b3ab51c8877 | 229 | |
| bogdanm | 84:0b3ab51c8877 | 230 | #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */ |
| bogdanm | 84:0b3ab51c8877 | 231 | #define LCD_DUTY_1_2 ((uint32_t)0x00000004) /*!< 1/2 duty */ |
| bogdanm | 84:0b3ab51c8877 | 232 | #define LCD_DUTY_1_3 ((uint32_t)0x00000008) /*!< 1/3 duty */ |
| bogdanm | 84:0b3ab51c8877 | 233 | #define LCD_DUTY_1_4 ((uint32_t)0x0000000C) /*!< 1/4 duty */ |
| bogdanm | 84:0b3ab51c8877 | 234 | #define LCD_DUTY_1_8 ((uint32_t)0x00000010) /*!< 1/4 duty */ |
| bogdanm | 84:0b3ab51c8877 | 235 | |
| bogdanm | 84:0b3ab51c8877 | 236 | #define IS_LCD_DUTY(DUTY) (((DUTY) == LCD_DUTY_STATIC) || \ |
| bogdanm | 84:0b3ab51c8877 | 237 | ((DUTY) == LCD_DUTY_1_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 238 | ((DUTY) == LCD_DUTY_1_3) || \ |
| bogdanm | 84:0b3ab51c8877 | 239 | ((DUTY) == LCD_DUTY_1_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 240 | ((DUTY) == LCD_DUTY_1_8)) |
| bogdanm | 84:0b3ab51c8877 | 241 | |
| bogdanm | 84:0b3ab51c8877 | 242 | /** |
| bogdanm | 84:0b3ab51c8877 | 243 | * @} |
| bogdanm | 84:0b3ab51c8877 | 244 | */ |
| bogdanm | 84:0b3ab51c8877 | 245 | |
| bogdanm | 84:0b3ab51c8877 | 246 | |
| bogdanm | 92:4fc01daae5a5 | 247 | /** @defgroup LCD_Bias |
| bogdanm | 84:0b3ab51c8877 | 248 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 249 | */ |
| bogdanm | 84:0b3ab51c8877 | 250 | |
| bogdanm | 84:0b3ab51c8877 | 251 | #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */ |
| bogdanm | 84:0b3ab51c8877 | 252 | #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ |
| bogdanm | 84:0b3ab51c8877 | 253 | #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ |
| bogdanm | 84:0b3ab51c8877 | 254 | |
| bogdanm | 84:0b3ab51c8877 | 255 | #define IS_LCD_BIAS(BIAS) (((BIAS) == LCD_BIAS_1_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 256 | ((BIAS) == LCD_BIAS_1_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 257 | ((BIAS) == LCD_BIAS_1_3)) |
| bogdanm | 84:0b3ab51c8877 | 258 | /** |
| bogdanm | 84:0b3ab51c8877 | 259 | * @} |
| bogdanm | 84:0b3ab51c8877 | 260 | */ |
| bogdanm | 84:0b3ab51c8877 | 261 | |
| bogdanm | 92:4fc01daae5a5 | 262 | /** @defgroup LCD_Voltage_Source |
| bogdanm | 84:0b3ab51c8877 | 263 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 264 | */ |
| bogdanm | 84:0b3ab51c8877 | 265 | |
| bogdanm | 84:0b3ab51c8877 | 266 | #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */ |
| bogdanm | 84:0b3ab51c8877 | 267 | #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ |
| bogdanm | 84:0b3ab51c8877 | 268 | |
| bogdanm | 84:0b3ab51c8877 | 269 | #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ |
| bogdanm | 84:0b3ab51c8877 | 270 | ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) |
| bogdanm | 84:0b3ab51c8877 | 271 | |
| bogdanm | 84:0b3ab51c8877 | 272 | /** |
| bogdanm | 84:0b3ab51c8877 | 273 | * @} |
| bogdanm | 84:0b3ab51c8877 | 274 | */ |
| bogdanm | 84:0b3ab51c8877 | 275 | |
| bogdanm | 92:4fc01daae5a5 | 276 | /** @defgroup LCD_Interrupts |
| bogdanm | 84:0b3ab51c8877 | 277 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 278 | */ |
| bogdanm | 84:0b3ab51c8877 | 279 | #define LCD_IT_SOF LCD_FCR_SOFIE |
| bogdanm | 84:0b3ab51c8877 | 280 | #define LCD_IT_UDD LCD_FCR_UDDIE |
| bogdanm | 84:0b3ab51c8877 | 281 | |
| bogdanm | 84:0b3ab51c8877 | 282 | #define IS_LCD_IT(IT) ((((IT) & (uint32_t)0xFFFFFFF5) == 0x00) && ((IT) != 0x00)) |
| bogdanm | 84:0b3ab51c8877 | 283 | |
| bogdanm | 84:0b3ab51c8877 | 284 | #define IS_LCD_GET_IT(IT) (((IT) == LCD_IT_SOF) || ((IT) == LCD_IT_UDD)) |
| bogdanm | 84:0b3ab51c8877 | 285 | |
| bogdanm | 84:0b3ab51c8877 | 286 | /** |
| bogdanm | 84:0b3ab51c8877 | 287 | * @} |
| bogdanm | 84:0b3ab51c8877 | 288 | */ |
| bogdanm | 84:0b3ab51c8877 | 289 | |
| bogdanm | 92:4fc01daae5a5 | 290 | /** @defgroup LCD_PulseOnDuration |
| bogdanm | 84:0b3ab51c8877 | 291 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 292 | */ |
| bogdanm | 84:0b3ab51c8877 | 293 | |
| bogdanm | 84:0b3ab51c8877 | 294 | #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */ |
| bogdanm | 84:0b3ab51c8877 | 295 | #define LCD_PULSEONDURATION_1 ((uint32_t)0x00000010) /*!< Pulse ON duration = 1/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 296 | #define LCD_PULSEONDURATION_2 ((uint32_t)0x00000020) /*!< Pulse ON duration = 2/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 297 | #define LCD_PULSEONDURATION_3 ((uint32_t)0x00000030) /*!< Pulse ON duration = 3/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 298 | #define LCD_PULSEONDURATION_4 ((uint32_t)0x00000040) /*!< Pulse ON duration = 4/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 299 | #define LCD_PULSEONDURATION_5 ((uint32_t)0x00000050) /*!< Pulse ON duration = 5/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 300 | #define LCD_PULSEONDURATION_6 ((uint32_t)0x00000060) /*!< Pulse ON duration = 6/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 301 | #define LCD_PULSEONDURATION_7 ((uint32_t)0x00000070) /*!< Pulse ON duration = 7/CK_PS */ |
| bogdanm | 84:0b3ab51c8877 | 302 | |
| bogdanm | 84:0b3ab51c8877 | 303 | #define IS_LCD_PULSE_ON_DURATION(DURATION) (((DURATION) == LCD_PULSEONDURATION_0) || \ |
| bogdanm | 84:0b3ab51c8877 | 304 | ((DURATION) == LCD_PULSEONDURATION_1) || \ |
| bogdanm | 84:0b3ab51c8877 | 305 | ((DURATION) == LCD_PULSEONDURATION_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 306 | ((DURATION) == LCD_PULSEONDURATION_3) || \ |
| bogdanm | 84:0b3ab51c8877 | 307 | ((DURATION) == LCD_PULSEONDURATION_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 308 | ((DURATION) == LCD_PULSEONDURATION_5) || \ |
| bogdanm | 84:0b3ab51c8877 | 309 | ((DURATION) == LCD_PULSEONDURATION_6) || \ |
| bogdanm | 84:0b3ab51c8877 | 310 | ((DURATION) == LCD_PULSEONDURATION_7)) |
| bogdanm | 84:0b3ab51c8877 | 311 | /** |
| bogdanm | 84:0b3ab51c8877 | 312 | * @} |
| bogdanm | 84:0b3ab51c8877 | 313 | */ |
| bogdanm | 84:0b3ab51c8877 | 314 | |
| bogdanm | 84:0b3ab51c8877 | 315 | |
| bogdanm | 92:4fc01daae5a5 | 316 | /** @defgroup LCD_DeadTime |
| bogdanm | 84:0b3ab51c8877 | 317 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 318 | */ |
| bogdanm | 84:0b3ab51c8877 | 319 | |
| bogdanm | 84:0b3ab51c8877 | 320 | #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */ |
| bogdanm | 84:0b3ab51c8877 | 321 | #define LCD_DEADTIME_1 ((uint32_t)0x00000080) /*!< One Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 322 | #define LCD_DEADTIME_2 ((uint32_t)0x00000100) /*!< Two Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 323 | #define LCD_DEADTIME_3 ((uint32_t)0x00000180) /*!< Three Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 324 | #define LCD_DEADTIME_4 ((uint32_t)0x00000200) /*!< Four Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 325 | #define LCD_DEADTIME_5 ((uint32_t)0x00000280) /*!< Five Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 326 | #define LCD_DEADTIME_6 ((uint32_t)0x00000300) /*!< Six Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 327 | #define LCD_DEADTIME_7 ((uint32_t)0x00000380) /*!< Seven Phase between different couple of Frame */ |
| bogdanm | 84:0b3ab51c8877 | 328 | |
| bogdanm | 84:0b3ab51c8877 | 329 | #define IS_LCD_DEAD_TIME(TIME) (((TIME) == LCD_DEADTIME_0) || \ |
| bogdanm | 84:0b3ab51c8877 | 330 | ((TIME) == LCD_DEADTIME_1) || \ |
| bogdanm | 84:0b3ab51c8877 | 331 | ((TIME) == LCD_DEADTIME_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 332 | ((TIME) == LCD_DEADTIME_3) || \ |
| bogdanm | 84:0b3ab51c8877 | 333 | ((TIME) == LCD_DEADTIME_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 334 | ((TIME) == LCD_DEADTIME_5) || \ |
| bogdanm | 84:0b3ab51c8877 | 335 | ((TIME) == LCD_DEADTIME_6) || \ |
| bogdanm | 84:0b3ab51c8877 | 336 | ((TIME) == LCD_DEADTIME_7)) |
| bogdanm | 84:0b3ab51c8877 | 337 | /** |
| bogdanm | 84:0b3ab51c8877 | 338 | * @} |
| bogdanm | 84:0b3ab51c8877 | 339 | */ |
| bogdanm | 84:0b3ab51c8877 | 340 | |
| bogdanm | 92:4fc01daae5a5 | 341 | /** @defgroup LCD_BlinkMode |
| bogdanm | 84:0b3ab51c8877 | 342 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 343 | */ |
| bogdanm | 84:0b3ab51c8877 | 344 | |
| bogdanm | 84:0b3ab51c8877 | 345 | #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */ |
| bogdanm | 84:0b3ab51c8877 | 346 | #define LCD_BLINKMODE_SEG0_COM0 ((uint32_t)0x00010000) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ |
| bogdanm | 84:0b3ab51c8877 | 347 | #define LCD_BLINKMODE_SEG0_ALLCOM ((uint32_t)0x00020000) /*!< Blink enabled on SEG[0], all COM (up to |
| bogdanm | 84:0b3ab51c8877 | 348 | 8 pixels according to the programmed duty) */ |
| bogdanm | 84:0b3ab51c8877 | 349 | #define LCD_BLINKMODE_ALLSEG_ALLCOM ((uint32_t)0x00030000) /*!< Blink enabled on all SEG and all COM (all pixels) */ |
| bogdanm | 84:0b3ab51c8877 | 350 | |
| bogdanm | 84:0b3ab51c8877 | 351 | #define IS_LCD_BLINK_MODE(MODE) (((MODE) == LCD_BLINKMODE_OFF) || \ |
| bogdanm | 84:0b3ab51c8877 | 352 | ((MODE) == LCD_BLINKMODE_SEG0_COM0) || \ |
| bogdanm | 84:0b3ab51c8877 | 353 | ((MODE) == LCD_BLINKMODE_SEG0_ALLCOM) || \ |
| bogdanm | 84:0b3ab51c8877 | 354 | ((MODE) == LCD_BLINKMODE_ALLSEG_ALLCOM)) |
| bogdanm | 84:0b3ab51c8877 | 355 | /** |
| bogdanm | 84:0b3ab51c8877 | 356 | * @} |
| bogdanm | 84:0b3ab51c8877 | 357 | */ |
| bogdanm | 84:0b3ab51c8877 | 358 | |
| bogdanm | 92:4fc01daae5a5 | 359 | /** @defgroup LCD_BlinkFrequency |
| bogdanm | 84:0b3ab51c8877 | 360 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 361 | */ |
| bogdanm | 84:0b3ab51c8877 | 362 | |
| bogdanm | 84:0b3ab51c8877 | 363 | #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */ |
| bogdanm | 84:0b3ab51c8877 | 364 | #define LCD_BLINKFREQUENCY_DIV16 ((uint32_t)0x00002000) /*!< The Blink frequency = fLCD/16 */ |
| bogdanm | 84:0b3ab51c8877 | 365 | #define LCD_BLINKFREQUENCY_DIV32 ((uint32_t)0x00004000) /*!< The Blink frequency = fLCD/32 */ |
| bogdanm | 84:0b3ab51c8877 | 366 | #define LCD_BLINKFREQUENCY_DIV64 ((uint32_t)0x00006000) /*!< The Blink frequency = fLCD/64 */ |
| bogdanm | 84:0b3ab51c8877 | 367 | #define LCD_BLINKFREQUENCY_DIV128 ((uint32_t)0x00008000) /*!< The Blink frequency = fLCD/128 */ |
| bogdanm | 84:0b3ab51c8877 | 368 | #define LCD_BLINKFREQUENCY_DIV256 ((uint32_t)0x0000A000) /*!< The Blink frequency = fLCD/256 */ |
| bogdanm | 84:0b3ab51c8877 | 369 | #define LCD_BLINKFREQUENCY_DIV512 ((uint32_t)0x0000C000) /*!< The Blink frequency = fLCD/512 */ |
| bogdanm | 84:0b3ab51c8877 | 370 | #define LCD_BLINKFREQUENCY_DIV1024 ((uint32_t)0x0000E000) /*!< The Blink frequency = fLCD/1024 */ |
| bogdanm | 84:0b3ab51c8877 | 371 | |
| bogdanm | 84:0b3ab51c8877 | 372 | #define IS_LCD_BLINK_FREQUENCY(FREQUENCY) (((FREQUENCY) == LCD_BLINKFREQUENCY_DIV8) || \ |
| bogdanm | 84:0b3ab51c8877 | 373 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV16) || \ |
| bogdanm | 84:0b3ab51c8877 | 374 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV32) || \ |
| bogdanm | 84:0b3ab51c8877 | 375 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV64) || \ |
| bogdanm | 84:0b3ab51c8877 | 376 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV128) || \ |
| bogdanm | 84:0b3ab51c8877 | 377 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV256) || \ |
| bogdanm | 84:0b3ab51c8877 | 378 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV512) || \ |
| bogdanm | 84:0b3ab51c8877 | 379 | ((FREQUENCY) == LCD_BLINKFREQUENCY_DIV1024)) |
| bogdanm | 84:0b3ab51c8877 | 380 | /** |
| bogdanm | 84:0b3ab51c8877 | 381 | * @} |
| bogdanm | 84:0b3ab51c8877 | 382 | */ |
| bogdanm | 84:0b3ab51c8877 | 383 | |
| bogdanm | 92:4fc01daae5a5 | 384 | /** @defgroup LCD_Contrast |
| bogdanm | 84:0b3ab51c8877 | 385 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 386 | */ |
| bogdanm | 84:0b3ab51c8877 | 387 | |
| bogdanm | 84:0b3ab51c8877 | 388 | #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */ |
| bogdanm | 84:0b3ab51c8877 | 389 | #define LCD_CONTRASTLEVEL_1 ((uint32_t)0x00000400) /*!< Maximum Voltage = 2.73V */ |
| bogdanm | 84:0b3ab51c8877 | 390 | #define LCD_CONTRASTLEVEL_2 ((uint32_t)0x00000800) /*!< Maximum Voltage = 2.86V */ |
| bogdanm | 84:0b3ab51c8877 | 391 | #define LCD_CONTRASTLEVEL_3 ((uint32_t)0x00000C00) /*!< Maximum Voltage = 2.99V */ |
| bogdanm | 84:0b3ab51c8877 | 392 | #define LCD_CONTRASTLEVEL_4 ((uint32_t)0x00001000) /*!< Maximum Voltage = 3.12V */ |
| bogdanm | 84:0b3ab51c8877 | 393 | #define LCD_CONTRASTLEVEL_5 ((uint32_t)0x00001400) /*!< Maximum Voltage = 3.25V */ |
| bogdanm | 84:0b3ab51c8877 | 394 | #define LCD_CONTRASTLEVEL_6 ((uint32_t)0x00001800) /*!< Maximum Voltage = 3.38V */ |
| bogdanm | 84:0b3ab51c8877 | 395 | #define LCD_CONTRASTLEVEL_7 ((uint32_t)0x00001C00) /*!< Maximum Voltage = 3.51V */ |
| bogdanm | 84:0b3ab51c8877 | 396 | |
| bogdanm | 84:0b3ab51c8877 | 397 | #define IS_LCD_CONTRAST(CONTRAST) (((CONTRAST) == LCD_CONTRASTLEVEL_0) || \ |
| bogdanm | 84:0b3ab51c8877 | 398 | ((CONTRAST) == LCD_CONTRASTLEVEL_1) || \ |
| bogdanm | 84:0b3ab51c8877 | 399 | ((CONTRAST) == LCD_CONTRASTLEVEL_2) || \ |
| bogdanm | 84:0b3ab51c8877 | 400 | ((CONTRAST) == LCD_CONTRASTLEVEL_3) || \ |
| bogdanm | 84:0b3ab51c8877 | 401 | ((CONTRAST) == LCD_CONTRASTLEVEL_4) || \ |
| bogdanm | 84:0b3ab51c8877 | 402 | ((CONTRAST) == LCD_CONTRASTLEVEL_5) || \ |
| bogdanm | 84:0b3ab51c8877 | 403 | ((CONTRAST) == LCD_CONTRASTLEVEL_6) || \ |
| bogdanm | 84:0b3ab51c8877 | 404 | ((CONTRAST) == LCD_CONTRASTLEVEL_7)) |
| bogdanm | 84:0b3ab51c8877 | 405 | /** |
| bogdanm | 84:0b3ab51c8877 | 406 | * @} |
| bogdanm | 84:0b3ab51c8877 | 407 | */ |
| bogdanm | 84:0b3ab51c8877 | 408 | |
| bogdanm | 92:4fc01daae5a5 | 409 | /** @defgroup LCD_Flag |
| bogdanm | 84:0b3ab51c8877 | 410 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 411 | */ |
| bogdanm | 84:0b3ab51c8877 | 412 | |
| bogdanm | 84:0b3ab51c8877 | 413 | #define LCD_FLAG_ENS LCD_SR_ENS |
| bogdanm | 84:0b3ab51c8877 | 414 | #define LCD_FLAG_SOF LCD_SR_SOF |
| bogdanm | 84:0b3ab51c8877 | 415 | #define LCD_FLAG_UDR LCD_SR_UDR |
| bogdanm | 84:0b3ab51c8877 | 416 | #define LCD_FLAG_UDD LCD_SR_UDD |
| bogdanm | 84:0b3ab51c8877 | 417 | #define LCD_FLAG_RDY LCD_SR_RDY |
| bogdanm | 84:0b3ab51c8877 | 418 | #define LCD_FLAG_FCRSF LCD_SR_FCRSR |
| bogdanm | 84:0b3ab51c8877 | 419 | |
| bogdanm | 84:0b3ab51c8877 | 420 | #define IS_LCD_GET_FLAG(FLAG) (((FLAG) == LCD_FLAG_ENS) || ((FLAG) == LCD_FLAG_SOF) || \ |
| bogdanm | 84:0b3ab51c8877 | 421 | ((FLAG) == LCD_FLAG_UDR) || ((FLAG) == LCD_FLAG_UDD) || \ |
| bogdanm | 84:0b3ab51c8877 | 422 | ((FLAG) == LCD_FLAG_RDY) || ((FLAG) == LCD_FLAG_FCRSF)) |
| bogdanm | 84:0b3ab51c8877 | 423 | |
| bogdanm | 84:0b3ab51c8877 | 424 | #define IS_LCD_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF5) == 0x00) && ((FLAG) != 0x00)) |
| bogdanm | 84:0b3ab51c8877 | 425 | /** |
| bogdanm | 84:0b3ab51c8877 | 426 | * @} |
| bogdanm | 84:0b3ab51c8877 | 427 | */ |
| bogdanm | 84:0b3ab51c8877 | 428 | |
| bogdanm | 92:4fc01daae5a5 | 429 | /** @defgroup LCD_RAMRegister |
| bogdanm | 84:0b3ab51c8877 | 430 | * @{ |
| bogdanm | 84:0b3ab51c8877 | 431 | */ |
| bogdanm | 84:0b3ab51c8877 | 432 | |
| bogdanm | 84:0b3ab51c8877 | 433 | #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */ |
| bogdanm | 84:0b3ab51c8877 | 434 | #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */ |
| bogdanm | 84:0b3ab51c8877 | 435 | #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */ |
| bogdanm | 84:0b3ab51c8877 | 436 | #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */ |
| bogdanm | 84:0b3ab51c8877 | 437 | #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */ |
| bogdanm | 84:0b3ab51c8877 | 438 | #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */ |
| bogdanm | 84:0b3ab51c8877 | 439 | #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */ |
| bogdanm | 84:0b3ab51c8877 | 440 | #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */ |
| bogdanm | 84:0b3ab51c8877 | 441 | #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */ |
| bogdanm | 84:0b3ab51c8877 | 442 | #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */ |
| bogdanm | 84:0b3ab51c8877 | 443 | #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */ |
| bogdanm | 84:0b3ab51c8877 | 444 | #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */ |
| bogdanm | 84:0b3ab51c8877 | 445 | #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */ |
| bogdanm | 84:0b3ab51c8877 | 446 | #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */ |
| bogdanm | 84:0b3ab51c8877 | 447 | #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */ |
| bogdanm | 84:0b3ab51c8877 | 448 | #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */ |
| bogdanm | 84:0b3ab51c8877 | 449 | |
| bogdanm | 84:0b3ab51c8877 | 450 | #define IS_LCD_RAM_REGISTER(REGISTER) (((REGISTER) == LCD_RAM_REGISTER0) || \ |
| bogdanm | 84:0b3ab51c8877 | 451 | ((REGISTER) == LCD_RAM_REGISTER1) || \ |
| bogdanm | 84:0b3ab51c8877 | 452 | ((REGISTER) == LCD_RAM_REGISTER2) || \ |
| bogdanm | 84:0b3ab51c8877 | 453 | ((REGISTER) == LCD_RAM_REGISTER3) || \ |
| bogdanm | 84:0b3ab51c8877 | 454 | ((REGISTER) == LCD_RAM_REGISTER4) || \ |
| bogdanm | 84:0b3ab51c8877 | 455 | ((REGISTER) == LCD_RAM_REGISTER5) || \ |
| bogdanm | 84:0b3ab51c8877 | 456 | ((REGISTER) == LCD_RAM_REGISTER6) || \ |
| bogdanm | 84:0b3ab51c8877 | 457 | ((REGISTER) == LCD_RAM_REGISTER7) || \ |
| bogdanm | 84:0b3ab51c8877 | 458 | ((REGISTER) == LCD_RAM_REGISTER8) || \ |
| bogdanm | 84:0b3ab51c8877 | 459 | ((REGISTER) == LCD_RAM_REGISTER9) || \ |
| bogdanm | 84:0b3ab51c8877 | 460 | ((REGISTER) == LCD_RAM_REGISTER10) || \ |
| bogdanm | 84:0b3ab51c8877 | 461 | ((REGISTER) == LCD_RAM_REGISTER11) || \ |
| bogdanm | 84:0b3ab51c8877 | 462 | ((REGISTER) == LCD_RAM_REGISTER12) || \ |
| bogdanm | 84:0b3ab51c8877 | 463 | ((REGISTER) == LCD_RAM_REGISTER13) || \ |
| bogdanm | 84:0b3ab51c8877 | 464 | ((REGISTER) == LCD_RAM_REGISTER14) || \ |
| bogdanm | 84:0b3ab51c8877 | 465 | ((REGISTER) == LCD_RAM_REGISTER15)) |
| bogdanm | 84:0b3ab51c8877 | 466 | |
| bogdanm | 84:0b3ab51c8877 | 467 | /** |
| bogdanm | 84:0b3ab51c8877 | 468 | * @} |
| bogdanm | 84:0b3ab51c8877 | 469 | */ |
| bogdanm | 84:0b3ab51c8877 | 470 | |
| bogdanm | 84:0b3ab51c8877 | 471 | /** |
| bogdanm | 84:0b3ab51c8877 | 472 | * @} |
| bogdanm | 84:0b3ab51c8877 | 473 | */ |
| bogdanm | 84:0b3ab51c8877 | 474 | |
| bogdanm | 84:0b3ab51c8877 | 475 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 476 | |
| bogdanm | 92:4fc01daae5a5 | 477 | /** @defgroup LCD_Exported_Macros |
| bogdanm | 92:4fc01daae5a5 | 478 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 479 | */ |
| bogdanm | 92:4fc01daae5a5 | 480 | |
| bogdanm | 84:0b3ab51c8877 | 481 | /** @brief Reset LCD handle state |
| bogdanm | 84:0b3ab51c8877 | 482 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 483 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 484 | */ |
| bogdanm | 84:0b3ab51c8877 | 485 | #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) |
| bogdanm | 84:0b3ab51c8877 | 486 | |
| bogdanm | 84:0b3ab51c8877 | 487 | /** @brief macros to enables or disables the LCD |
| bogdanm | 84:0b3ab51c8877 | 488 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 489 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 490 | */ |
| bogdanm | 84:0b3ab51c8877 | 491 | #define __HAL_LCD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LCD_CR_LCDEN) |
| bogdanm | 84:0b3ab51c8877 | 492 | #define __HAL_LCD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~LCD_CR_LCDEN) |
| bogdanm | 84:0b3ab51c8877 | 493 | |
| bogdanm | 84:0b3ab51c8877 | 494 | /** @brief Macros to enable or disable the low resistance divider. Displays with high |
| bogdanm | 84:0b3ab51c8877 | 495 | * internal resistance may need a longer drive time to achieve |
| bogdanm | 84:0b3ab51c8877 | 496 | * satisfactory contrast. This function is useful in this case if some |
| bogdanm | 84:0b3ab51c8877 | 497 | * additional power consumption can be tolerated. |
| bogdanm | 84:0b3ab51c8877 | 498 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 499 | * @note When this mode is enabled, the PulseOn Duration (PON) have to be |
| bogdanm | 84:0b3ab51c8877 | 500 | * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). |
| bogdanm | 84:0b3ab51c8877 | 501 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 502 | */ |
| bogdanm | 84:0b3ab51c8877 | 503 | #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ |
| bogdanm | 84:0b3ab51c8877 | 504 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 505 | ((__HANDLE__)->Instance->FCR |= LCD_FCR_HD); \ |
| bogdanm | 84:0b3ab51c8877 | 506 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 507 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 508 | |
| bogdanm | 84:0b3ab51c8877 | 509 | #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ |
| bogdanm | 84:0b3ab51c8877 | 510 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 511 | ((__HANDLE__)->Instance->FCR &= ~LCD_FCR_HD); \ |
| bogdanm | 84:0b3ab51c8877 | 512 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 513 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 514 | /** |
| bogdanm | 84:0b3ab51c8877 | 515 | * @brief Macro to configure the LCD pulses on duration. |
| bogdanm | 84:0b3ab51c8877 | 516 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 517 | * @param __DURATION__: specifies the LCD pulse on duration in terms of |
| bogdanm | 84:0b3ab51c8877 | 518 | * CK_PS (prescaled LCD clock period) pulses. |
| bogdanm | 84:0b3ab51c8877 | 519 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 520 | * @arg LCD_PULSEONDURATION_0: 0 pulse |
| bogdanm | 84:0b3ab51c8877 | 521 | * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 522 | * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 523 | * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 524 | * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 525 | * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 526 | * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 527 | * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS |
| bogdanm | 84:0b3ab51c8877 | 528 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 529 | */ |
| bogdanm | 84:0b3ab51c8877 | 530 | #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ |
| bogdanm | 84:0b3ab51c8877 | 531 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 532 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ |
| bogdanm | 84:0b3ab51c8877 | 533 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 534 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 535 | |
| bogdanm | 84:0b3ab51c8877 | 536 | /** |
| bogdanm | 84:0b3ab51c8877 | 537 | * @brief Macro to configure the LCD dead time. |
| bogdanm | 84:0b3ab51c8877 | 538 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 539 | * @param __DEADTIME__: specifies the LCD dead time. |
| bogdanm | 84:0b3ab51c8877 | 540 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 541 | * @arg LCD_DEADTIME_0: No dead Time |
| bogdanm | 84:0b3ab51c8877 | 542 | * @arg LCD_DEADTIME_1: One Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 543 | * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 544 | * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 545 | * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 546 | * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 547 | * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 548 | * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame |
| bogdanm | 84:0b3ab51c8877 | 549 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 550 | */ |
| bogdanm | 84:0b3ab51c8877 | 551 | #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ |
| bogdanm | 84:0b3ab51c8877 | 552 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 553 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ |
| bogdanm | 84:0b3ab51c8877 | 554 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 555 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 556 | |
| bogdanm | 84:0b3ab51c8877 | 557 | /** |
| bogdanm | 84:0b3ab51c8877 | 558 | * @brief Macro to configure the LCD Contrast. |
| bogdanm | 84:0b3ab51c8877 | 559 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 560 | * @param __CONTRAST__: specifies the LCD Contrast. |
| bogdanm | 84:0b3ab51c8877 | 561 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 562 | * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V |
| bogdanm | 84:0b3ab51c8877 | 563 | * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V |
| bogdanm | 84:0b3ab51c8877 | 564 | * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V |
| bogdanm | 84:0b3ab51c8877 | 565 | * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V |
| bogdanm | 84:0b3ab51c8877 | 566 | * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V |
| bogdanm | 84:0b3ab51c8877 | 567 | * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V |
| bogdanm | 84:0b3ab51c8877 | 568 | * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V |
| bogdanm | 84:0b3ab51c8877 | 569 | * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V |
| bogdanm | 84:0b3ab51c8877 | 570 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 571 | */ |
| bogdanm | 84:0b3ab51c8877 | 572 | #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ |
| bogdanm | 84:0b3ab51c8877 | 573 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 574 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ |
| bogdanm | 84:0b3ab51c8877 | 575 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 576 | } while(0) |
| bogdanm | 84:0b3ab51c8877 | 577 | /** |
| bogdanm | 84:0b3ab51c8877 | 578 | * @brief Macro to configure the LCD Blink mode and Blink frequency. |
| bogdanm | 84:0b3ab51c8877 | 579 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 580 | * @param __BLINKMODE__: specifies the LCD blink mode. |
| bogdanm | 84:0b3ab51c8877 | 581 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 582 | * @arg LCD_BLINKMODE_OFF: Blink disabled |
| bogdanm | 84:0b3ab51c8877 | 583 | * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) |
| bogdanm | 84:0b3ab51c8877 | 584 | * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 |
| bogdanm | 84:0b3ab51c8877 | 585 | * pixels according to the programmed duty) |
| bogdanm | 84:0b3ab51c8877 | 586 | * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM |
| bogdanm | 84:0b3ab51c8877 | 587 | * (all pixels) |
| bogdanm | 84:0b3ab51c8877 | 588 | * @param __BLINKFREQUENCY__: specifies the LCD blink frequency. |
| bogdanm | 84:0b3ab51c8877 | 589 | * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 |
| bogdanm | 84:0b3ab51c8877 | 590 | * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 |
| bogdanm | 84:0b3ab51c8877 | 591 | * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 |
| bogdanm | 84:0b3ab51c8877 | 592 | * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 |
| bogdanm | 84:0b3ab51c8877 | 593 | * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 |
| bogdanm | 84:0b3ab51c8877 | 594 | * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 |
| bogdanm | 84:0b3ab51c8877 | 595 | * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 |
| bogdanm | 84:0b3ab51c8877 | 596 | * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 |
| bogdanm | 84:0b3ab51c8877 | 597 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 598 | */ |
| bogdanm | 84:0b3ab51c8877 | 599 | #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ |
| bogdanm | 84:0b3ab51c8877 | 600 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 601 | MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ |
| bogdanm | 84:0b3ab51c8877 | 602 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 603 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 604 | |
| bogdanm | 84:0b3ab51c8877 | 605 | /** @brief Enables or disables the specified LCD interrupt. |
| bogdanm | 84:0b3ab51c8877 | 606 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 607 | * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled. |
| bogdanm | 84:0b3ab51c8877 | 608 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 609 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
| bogdanm | 84:0b3ab51c8877 | 610 | * @arg LCD_IT_UDD: Update Display Done Interrupt |
| bogdanm | 84:0b3ab51c8877 | 611 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 612 | */ |
| bogdanm | 84:0b3ab51c8877 | 613 | #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| bogdanm | 84:0b3ab51c8877 | 614 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 615 | ((__HANDLE__)->Instance->FCR |= (__INTERRUPT__)); \ |
| bogdanm | 84:0b3ab51c8877 | 616 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 617 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 618 | #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| bogdanm | 84:0b3ab51c8877 | 619 | do{ \ |
| bogdanm | 84:0b3ab51c8877 | 620 | ((__HANDLE__)->Instance->FCR &= ~(__INTERRUPT__));\ |
| bogdanm | 84:0b3ab51c8877 | 621 | LCD_WaitForSynchro(__HANDLE__); \ |
| bogdanm | 84:0b3ab51c8877 | 622 | }while(0) |
| bogdanm | 84:0b3ab51c8877 | 623 | /** @brief Checks whether the specified LCD interrupt is enabled or not. |
| bogdanm | 84:0b3ab51c8877 | 624 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 625 | * @param __IT__: specifies the LCD interrupt source to check. |
| bogdanm | 84:0b3ab51c8877 | 626 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 627 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
| bogdanm | 84:0b3ab51c8877 | 628 | * @arg LCD_IT_UDD: Update Display Done Interrupt. |
| bogdanm | 84:0b3ab51c8877 | 629 | * @note If the device is in STOP mode (PCLK not provided) UDD will not |
| bogdanm | 84:0b3ab51c8877 | 630 | * generate an interrupt even if UDDIE = 1. |
| bogdanm | 84:0b3ab51c8877 | 631 | * If the display is not enabled the UDD interrupt will never occur. |
| bogdanm | 84:0b3ab51c8877 | 632 | * @retval The state of __IT__ (TRUE or FALSE). |
| bogdanm | 84:0b3ab51c8877 | 633 | */ |
| bogdanm | 84:0b3ab51c8877 | 634 | #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) |
| bogdanm | 84:0b3ab51c8877 | 635 | |
| bogdanm | 84:0b3ab51c8877 | 636 | /** @brief Checks whether the specified LCD flag is set or not. |
| bogdanm | 84:0b3ab51c8877 | 637 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 638 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 84:0b3ab51c8877 | 639 | * This parameter can be one of the following values: |
| bogdanm | 84:0b3ab51c8877 | 640 | * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. |
| bogdanm | 84:0b3ab51c8877 | 641 | * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR |
| bogdanm | 84:0b3ab51c8877 | 642 | * goes from 0 to 1. On deactivation it reflects the real status of |
| bogdanm | 84:0b3ab51c8877 | 643 | * LCD so it becomes 0 at the end of the last displayed frame. |
| bogdanm | 84:0b3ab51c8877 | 644 | * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at |
| bogdanm | 84:0b3ab51c8877 | 645 | * the beginning of a new frame, at the same time as the display data is |
| bogdanm | 84:0b3ab51c8877 | 646 | * updated. |
| bogdanm | 84:0b3ab51c8877 | 647 | * @arg LCD_FLAG_UDR: Update Display Request flag. |
| bogdanm | 84:0b3ab51c8877 | 648 | * @arg LCD_FLAG_UDD: Update Display Done flag. |
| bogdanm | 84:0b3ab51c8877 | 649 | * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status |
| bogdanm | 84:0b3ab51c8877 | 650 | * of the step-up converter. |
| bogdanm | 84:0b3ab51c8877 | 651 | * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. |
| bogdanm | 84:0b3ab51c8877 | 652 | * This flag is set by hardware each time the LCD_FCR register is updated |
| bogdanm | 84:0b3ab51c8877 | 653 | * in the LCDCLK domain. |
| bogdanm | 84:0b3ab51c8877 | 654 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 84:0b3ab51c8877 | 655 | */ |
| bogdanm | 84:0b3ab51c8877 | 656 | #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| bogdanm | 84:0b3ab51c8877 | 657 | |
| bogdanm | 84:0b3ab51c8877 | 658 | /** @brief Clears the specified LCD pending flag. |
| bogdanm | 84:0b3ab51c8877 | 659 | * @param __HANDLE__: specifies the LCD Handle. |
| bogdanm | 84:0b3ab51c8877 | 660 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 84:0b3ab51c8877 | 661 | * This parameter can be any combination of the following values: |
| bogdanm | 84:0b3ab51c8877 | 662 | * @arg LCD_FLAG_SOF: Start of Frame Interrupt |
| bogdanm | 84:0b3ab51c8877 | 663 | * @arg LCD_FLAG_UDD: Update Display Done Interrupt |
| bogdanm | 84:0b3ab51c8877 | 664 | * @retval None |
| bogdanm | 84:0b3ab51c8877 | 665 | */ |
| bogdanm | 84:0b3ab51c8877 | 666 | #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) |
| bogdanm | 84:0b3ab51c8877 | 667 | |
| bogdanm | 92:4fc01daae5a5 | 668 | /** |
| bogdanm | 92:4fc01daae5a5 | 669 | * @} |
| bogdanm | 92:4fc01daae5a5 | 670 | */ |
| bogdanm | 92:4fc01daae5a5 | 671 | |
| bogdanm | 84:0b3ab51c8877 | 672 | /* Exported functions ------------------------------------------------------- */ |
| bogdanm | 84:0b3ab51c8877 | 673 | /* Initialization/de-initialization methods **********************************/ |
| bogdanm | 84:0b3ab51c8877 | 674 | HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 675 | HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 676 | void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 677 | void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 678 | |
| bogdanm | 84:0b3ab51c8877 | 679 | /* IO operation methods *******************************************************/ |
| bogdanm | 84:0b3ab51c8877 | 680 | HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); |
| bogdanm | 84:0b3ab51c8877 | 681 | HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 682 | HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 683 | |
| bogdanm | 84:0b3ab51c8877 | 684 | /* Peripheral State methods **************************************************/ |
| bogdanm | 84:0b3ab51c8877 | 685 | HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 686 | uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 687 | |
| bogdanm | 84:0b3ab51c8877 | 688 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 84:0b3ab51c8877 | 689 | HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); |
| bogdanm | 84:0b3ab51c8877 | 690 | |
| bogdanm | 84:0b3ab51c8877 | 691 | #endif /* STM32L051xx && STM32L052xx && STM32L062xx && STM32L061xx*/ |
| bogdanm | 84:0b3ab51c8877 | 692 | |
| bogdanm | 84:0b3ab51c8877 | 693 | #ifdef __cplusplus |
| bogdanm | 84:0b3ab51c8877 | 694 | } |
| bogdanm | 84:0b3ab51c8877 | 695 | #endif |
| bogdanm | 84:0b3ab51c8877 | 696 | |
| bogdanm | 84:0b3ab51c8877 | 697 | #endif /* __STM32L0xx_HAL_LCD_H */ |
| bogdanm | 84:0b3ab51c8877 | 698 | |
| bogdanm | 84:0b3ab51c8877 | 699 | /** |
| bogdanm | 84:0b3ab51c8877 | 700 | * @} |
| bogdanm | 84:0b3ab51c8877 | 701 | */ |
| bogdanm | 84:0b3ab51c8877 | 702 | |
| bogdanm | 84:0b3ab51c8877 | 703 | /** |
| bogdanm | 84:0b3ab51c8877 | 704 | * @} |
| bogdanm | 84:0b3ab51c8877 | 705 | */ |
| bogdanm | 84:0b3ab51c8877 | 706 | |
| bogdanm | 84:0b3ab51c8877 | 707 | /******************* (C) COPYRIGHT 2014 STMicroelectronics *****END OF FILE****/ |