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TARGET_NUCLEO_F411RE/stm32f4xx_ll_sdmmc.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
86:04dd9b1680ae
Child:
99:dbbf35b96557
dgdgr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f4xx_ll_sdmmc.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
bogdanm 86:04dd9b1680ae 5 * @version V1.1.0
bogdanm 86:04dd9b1680ae 6 * @date 19-June-2014
bogdanm 86:04dd9b1680ae 7 * @brief Header file of SDMMC HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
bogdanm 86:04dd9b1680ae 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F4xx_LL_SDMMC_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F4xx_LL_SDMMC_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 47 #include "stm32f4xx_hal_def.h"
bogdanm 86:04dd9b1680ae 48
bogdanm 86:04dd9b1680ae 49 /** @addtogroup STM32F4xx_Driver
bogdanm 86:04dd9b1680ae 50 * @{
bogdanm 86:04dd9b1680ae 51 */
bogdanm 86:04dd9b1680ae 52
bogdanm 86:04dd9b1680ae 53 /** @addtogroup SDMMC
bogdanm 86:04dd9b1680ae 54 * @{
bogdanm 86:04dd9b1680ae 55 */
bogdanm 86:04dd9b1680ae 56
bogdanm 86:04dd9b1680ae 57 /* Exported types ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 58
bogdanm 86:04dd9b1680ae 59 /** @defgroup SDIO_Exported_Types SDIO Exported Types
bogdanm 86:04dd9b1680ae 60 * @{
bogdanm 86:04dd9b1680ae 61 */
bogdanm 86:04dd9b1680ae 62
bogdanm 86:04dd9b1680ae 63 /**
bogdanm 86:04dd9b1680ae 64 * @brief SDMMC Configuration Structure definition
bogdanm 86:04dd9b1680ae 65 */
bogdanm 86:04dd9b1680ae 66 typedef struct
bogdanm 86:04dd9b1680ae 67 {
bogdanm 86:04dd9b1680ae 68 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 86:04dd9b1680ae 69 This parameter can be a value of @ref SDIO_Clock_Edge */
bogdanm 86:04dd9b1680ae 70
bogdanm 86:04dd9b1680ae 71 uint32_t ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
bogdanm 86:04dd9b1680ae 72 enabled or disabled.
bogdanm 86:04dd9b1680ae 73 This parameter can be a value of @ref SDIO_Clock_Bypass */
bogdanm 86:04dd9b1680ae 74
bogdanm 86:04dd9b1680ae 75 uint32_t ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
bogdanm 86:04dd9b1680ae 76 disabled when the bus is idle.
bogdanm 86:04dd9b1680ae 77 This parameter can be a value of @ref SDIO_Clock_Power_Save */
bogdanm 86:04dd9b1680ae 78
bogdanm 86:04dd9b1680ae 79 uint32_t BusWide; /*!< Specifies the SDIO bus width.
bogdanm 86:04dd9b1680ae 80 This parameter can be a value of @ref SDIO_Bus_Wide */
bogdanm 86:04dd9b1680ae 81
bogdanm 86:04dd9b1680ae 82 uint32_t HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
bogdanm 86:04dd9b1680ae 83 This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
bogdanm 86:04dd9b1680ae 84
bogdanm 86:04dd9b1680ae 85 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
bogdanm 86:04dd9b1680ae 86 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
bogdanm 86:04dd9b1680ae 87
bogdanm 86:04dd9b1680ae 88 }SDIO_InitTypeDef;
bogdanm 86:04dd9b1680ae 89
bogdanm 86:04dd9b1680ae 90
bogdanm 86:04dd9b1680ae 91 /**
bogdanm 86:04dd9b1680ae 92 * @brief SDIO Command Control structure
bogdanm 86:04dd9b1680ae 93 */
bogdanm 86:04dd9b1680ae 94 typedef struct
bogdanm 86:04dd9b1680ae 95 {
bogdanm 86:04dd9b1680ae 96 uint32_t Argument; /*!< Specifies the SDIO command argument which is sent
bogdanm 86:04dd9b1680ae 97 to a card as part of a command message. If a command
bogdanm 86:04dd9b1680ae 98 contains an argument, it must be loaded into this register
bogdanm 86:04dd9b1680ae 99 before writing the command to the command register. */
bogdanm 86:04dd9b1680ae 100
bogdanm 86:04dd9b1680ae 101 uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be Min_Data = 0 and
bogdanm 86:04dd9b1680ae 102 Max_Data = 64 */
bogdanm 86:04dd9b1680ae 103
bogdanm 86:04dd9b1680ae 104 uint32_t Response; /*!< Specifies the SDIO response type.
bogdanm 86:04dd9b1680ae 105 This parameter can be a value of @ref SDIO_Response_Type */
bogdanm 86:04dd9b1680ae 106
bogdanm 86:04dd9b1680ae 107 uint32_t WaitForInterrupt; /*!< Specifies whether SDIO wait for interrupt request is
bogdanm 86:04dd9b1680ae 108 enabled or disabled.
bogdanm 86:04dd9b1680ae 109 This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
bogdanm 86:04dd9b1680ae 110
bogdanm 86:04dd9b1680ae 111 uint32_t CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
bogdanm 86:04dd9b1680ae 112 is enabled or disabled.
bogdanm 86:04dd9b1680ae 113 This parameter can be a value of @ref SDIO_CPSM_State */
bogdanm 86:04dd9b1680ae 114 }SDIO_CmdInitTypeDef;
bogdanm 86:04dd9b1680ae 115
bogdanm 86:04dd9b1680ae 116
bogdanm 86:04dd9b1680ae 117 /**
bogdanm 86:04dd9b1680ae 118 * @brief SDIO Data Control structure
bogdanm 86:04dd9b1680ae 119 */
bogdanm 86:04dd9b1680ae 120 typedef struct
bogdanm 86:04dd9b1680ae 121 {
bogdanm 86:04dd9b1680ae 122 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
bogdanm 86:04dd9b1680ae 123
bogdanm 86:04dd9b1680ae 124 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */
bogdanm 86:04dd9b1680ae 125
bogdanm 86:04dd9b1680ae 126 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
bogdanm 86:04dd9b1680ae 127 This parameter can be a value of @ref SDIO_Data_Block_Size */
bogdanm 86:04dd9b1680ae 128
bogdanm 86:04dd9b1680ae 129 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
bogdanm 86:04dd9b1680ae 130 is a read or write.
bogdanm 86:04dd9b1680ae 131 This parameter can be a value of @ref SDIO_Transfer_Direction */
bogdanm 86:04dd9b1680ae 132
bogdanm 86:04dd9b1680ae 133 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
bogdanm 86:04dd9b1680ae 134 This parameter can be a value of @ref SDIO_Transfer_Type */
bogdanm 86:04dd9b1680ae 135
bogdanm 86:04dd9b1680ae 136 uint32_t DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
bogdanm 86:04dd9b1680ae 137 is enabled or disabled.
bogdanm 86:04dd9b1680ae 138 This parameter can be a value of @ref SDIO_DPSM_State */
bogdanm 86:04dd9b1680ae 139 }SDIO_DataInitTypeDef;
bogdanm 86:04dd9b1680ae 140
bogdanm 86:04dd9b1680ae 141 /**
bogdanm 86:04dd9b1680ae 142 * @}
bogdanm 86:04dd9b1680ae 143 */
bogdanm 86:04dd9b1680ae 144
bogdanm 86:04dd9b1680ae 145 /* Exported constants --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 146
bogdanm 86:04dd9b1680ae 147 /** @defgroup SDIO_Exported_Constants
bogdanm 86:04dd9b1680ae 148 * @{
bogdanm 86:04dd9b1680ae 149 */
bogdanm 86:04dd9b1680ae 150
bogdanm 86:04dd9b1680ae 151 /** @defgroup SDIO_Clock_Edge
bogdanm 86:04dd9b1680ae 152 * @{
bogdanm 86:04dd9b1680ae 153 */
bogdanm 86:04dd9b1680ae 154 #define SDIO_CLOCK_EDGE_RISING ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 155 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
bogdanm 86:04dd9b1680ae 156
bogdanm 86:04dd9b1680ae 157 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \
bogdanm 86:04dd9b1680ae 158 ((EDGE) == SDIO_CLOCK_EDGE_FALLING))
bogdanm 86:04dd9b1680ae 159 /**
bogdanm 86:04dd9b1680ae 160 * @}
bogdanm 86:04dd9b1680ae 161 */
bogdanm 86:04dd9b1680ae 162
bogdanm 86:04dd9b1680ae 163 /** @defgroup SDIO_Clock_Bypass
bogdanm 86:04dd9b1680ae 164 * @{
bogdanm 86:04dd9b1680ae 165 */
bogdanm 86:04dd9b1680ae 166 #define SDIO_CLOCK_BYPASS_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 167 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
bogdanm 86:04dd9b1680ae 168
bogdanm 86:04dd9b1680ae 169 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \
bogdanm 86:04dd9b1680ae 170 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
bogdanm 86:04dd9b1680ae 171 /**
bogdanm 86:04dd9b1680ae 172 * @}
bogdanm 86:04dd9b1680ae 173 */
bogdanm 86:04dd9b1680ae 174
bogdanm 86:04dd9b1680ae 175 /** @defgroup SDIO_Clock_Power_Save
bogdanm 86:04dd9b1680ae 176 * @{
bogdanm 86:04dd9b1680ae 177 */
bogdanm 86:04dd9b1680ae 178 #define SDIO_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 179 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
bogdanm 86:04dd9b1680ae 180
bogdanm 86:04dd9b1680ae 181 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \
bogdanm 86:04dd9b1680ae 182 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
bogdanm 86:04dd9b1680ae 183 /**
bogdanm 86:04dd9b1680ae 184 * @}
bogdanm 86:04dd9b1680ae 185 */
bogdanm 86:04dd9b1680ae 186
bogdanm 86:04dd9b1680ae 187 /** @defgroup SDIO_Bus_Wide
bogdanm 86:04dd9b1680ae 188 * @{
bogdanm 86:04dd9b1680ae 189 */
bogdanm 86:04dd9b1680ae 190 #define SDIO_BUS_WIDE_1B ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 191 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
bogdanm 86:04dd9b1680ae 192 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
bogdanm 86:04dd9b1680ae 193
bogdanm 86:04dd9b1680ae 194 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \
bogdanm 86:04dd9b1680ae 195 ((WIDE) == SDIO_BUS_WIDE_4B) || \
bogdanm 86:04dd9b1680ae 196 ((WIDE) == SDIO_BUS_WIDE_8B))
bogdanm 86:04dd9b1680ae 197 /**
bogdanm 86:04dd9b1680ae 198 * @}
bogdanm 86:04dd9b1680ae 199 */
bogdanm 86:04dd9b1680ae 200
bogdanm 86:04dd9b1680ae 201 /** @defgroup SDIO_Hardware_Flow_Control
bogdanm 86:04dd9b1680ae 202 * @{
bogdanm 86:04dd9b1680ae 203 */
bogdanm 86:04dd9b1680ae 204 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 205 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
bogdanm 86:04dd9b1680ae 206
bogdanm 86:04dd9b1680ae 207 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \
bogdanm 86:04dd9b1680ae 208 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
bogdanm 86:04dd9b1680ae 209 /**
bogdanm 86:04dd9b1680ae 210 * @}
bogdanm 86:04dd9b1680ae 211 */
bogdanm 86:04dd9b1680ae 212
bogdanm 86:04dd9b1680ae 213 /** @defgroup SDIO_Clock_Division
bogdanm 86:04dd9b1680ae 214 * @{
bogdanm 86:04dd9b1680ae 215 */
bogdanm 86:04dd9b1680ae 216 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFF)
bogdanm 86:04dd9b1680ae 217 /**
bogdanm 86:04dd9b1680ae 218 * @}
bogdanm 86:04dd9b1680ae 219 */
bogdanm 86:04dd9b1680ae 220
bogdanm 86:04dd9b1680ae 221 /** @defgroup SDIO_Command_Index
bogdanm 86:04dd9b1680ae 222 * @{
bogdanm 86:04dd9b1680ae 223 */
bogdanm 86:04dd9b1680ae 224 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
bogdanm 86:04dd9b1680ae 225 /**
bogdanm 86:04dd9b1680ae 226 * @}
bogdanm 86:04dd9b1680ae 227 */
bogdanm 86:04dd9b1680ae 228
bogdanm 86:04dd9b1680ae 229 /** @defgroup SDIO_Response_Type
bogdanm 86:04dd9b1680ae 230 * @{
bogdanm 86:04dd9b1680ae 231 */
bogdanm 86:04dd9b1680ae 232 #define SDIO_RESPONSE_NO ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 233 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
bogdanm 86:04dd9b1680ae 234 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
bogdanm 86:04dd9b1680ae 235
bogdanm 86:04dd9b1680ae 236 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \
bogdanm 86:04dd9b1680ae 237 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \
bogdanm 86:04dd9b1680ae 238 ((RESPONSE) == SDIO_RESPONSE_LONG))
bogdanm 86:04dd9b1680ae 239 /**
bogdanm 86:04dd9b1680ae 240 * @}
bogdanm 86:04dd9b1680ae 241 */
bogdanm 86:04dd9b1680ae 242
bogdanm 86:04dd9b1680ae 243 /** @defgroup SDIO_Wait_Interrupt_State
bogdanm 86:04dd9b1680ae 244 * @{
bogdanm 86:04dd9b1680ae 245 */
bogdanm 86:04dd9b1680ae 246 #define SDIO_WAIT_NO ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 247 #define SDIO_WAIT_IT SDIO_CMD_WAITINT
bogdanm 86:04dd9b1680ae 248 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
bogdanm 86:04dd9b1680ae 249
bogdanm 86:04dd9b1680ae 250 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \
bogdanm 86:04dd9b1680ae 251 ((WAIT) == SDIO_WAIT_IT) || \
bogdanm 86:04dd9b1680ae 252 ((WAIT) == SDIO_WAIT_PEND))
bogdanm 86:04dd9b1680ae 253 /**
bogdanm 86:04dd9b1680ae 254 * @}
bogdanm 86:04dd9b1680ae 255 */
bogdanm 86:04dd9b1680ae 256
bogdanm 86:04dd9b1680ae 257 /** @defgroup SDIO_CPSM_State
bogdanm 86:04dd9b1680ae 258 * @{
bogdanm 86:04dd9b1680ae 259 */
bogdanm 86:04dd9b1680ae 260 #define SDIO_CPSM_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 261 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
bogdanm 86:04dd9b1680ae 262
bogdanm 86:04dd9b1680ae 263 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \
bogdanm 86:04dd9b1680ae 264 ((CPSM) == SDIO_CPSM_ENABLE))
bogdanm 86:04dd9b1680ae 265 /**
bogdanm 86:04dd9b1680ae 266 * @}
bogdanm 86:04dd9b1680ae 267 */
bogdanm 86:04dd9b1680ae 268
bogdanm 86:04dd9b1680ae 269 /** @defgroup SDIO_Response_Registers
bogdanm 86:04dd9b1680ae 270 * @{
bogdanm 86:04dd9b1680ae 271 */
bogdanm 86:04dd9b1680ae 272 #define SDIO_RESP1 ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 273 #define SDIO_RESP2 ((uint32_t)0x00000004)
bogdanm 86:04dd9b1680ae 274 #define SDIO_RESP3 ((uint32_t)0x00000008)
bogdanm 86:04dd9b1680ae 275 #define SDIO_RESP4 ((uint32_t)0x0000000C)
bogdanm 86:04dd9b1680ae 276
bogdanm 86:04dd9b1680ae 277 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \
bogdanm 86:04dd9b1680ae 278 ((RESP) == SDIO_RESP2) || \
bogdanm 86:04dd9b1680ae 279 ((RESP) == SDIO_RESP3) || \
bogdanm 86:04dd9b1680ae 280 ((RESP) == SDIO_RESP4))
bogdanm 86:04dd9b1680ae 281 /**
bogdanm 86:04dd9b1680ae 282 * @}
bogdanm 86:04dd9b1680ae 283 */
bogdanm 86:04dd9b1680ae 284
bogdanm 86:04dd9b1680ae 285 /** @defgroup SDIO_Data_Length
bogdanm 86:04dd9b1680ae 286 * @{
bogdanm 86:04dd9b1680ae 287 */
bogdanm 86:04dd9b1680ae 288 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
bogdanm 86:04dd9b1680ae 289 /**
bogdanm 86:04dd9b1680ae 290 * @}
bogdanm 86:04dd9b1680ae 291 */
bogdanm 86:04dd9b1680ae 292
bogdanm 86:04dd9b1680ae 293 /** @defgroup SDIO_Data_Block_Size
bogdanm 86:04dd9b1680ae 294 * @{
bogdanm 86:04dd9b1680ae 295 */
bogdanm 86:04dd9b1680ae 296 #define SDIO_DATABLOCK_SIZE_1B ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 297 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
bogdanm 86:04dd9b1680ae 298 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
bogdanm 86:04dd9b1680ae 299 #define SDIO_DATABLOCK_SIZE_8B ((uint32_t)0x00000030)
bogdanm 86:04dd9b1680ae 300 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
bogdanm 86:04dd9b1680ae 301 #define SDIO_DATABLOCK_SIZE_32B ((uint32_t)0x00000050)
bogdanm 86:04dd9b1680ae 302 #define SDIO_DATABLOCK_SIZE_64B ((uint32_t)0x00000060)
bogdanm 86:04dd9b1680ae 303 #define SDIO_DATABLOCK_SIZE_128B ((uint32_t)0x00000070)
bogdanm 86:04dd9b1680ae 304 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
bogdanm 86:04dd9b1680ae 305 #define SDIO_DATABLOCK_SIZE_512B ((uint32_t)0x00000090)
bogdanm 86:04dd9b1680ae 306 #define SDIO_DATABLOCK_SIZE_1024B ((uint32_t)0x000000A0)
bogdanm 86:04dd9b1680ae 307 #define SDIO_DATABLOCK_SIZE_2048B ((uint32_t)0x000000B0)
bogdanm 86:04dd9b1680ae 308 #define SDIO_DATABLOCK_SIZE_4096B ((uint32_t)0x000000C0)
bogdanm 86:04dd9b1680ae 309 #define SDIO_DATABLOCK_SIZE_8192B ((uint32_t)0x000000D0)
bogdanm 86:04dd9b1680ae 310 #define SDIO_DATABLOCK_SIZE_16384B ((uint32_t)0x000000E0)
bogdanm 86:04dd9b1680ae 311
bogdanm 86:04dd9b1680ae 312 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \
bogdanm 86:04dd9b1680ae 313 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \
bogdanm 86:04dd9b1680ae 314 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \
bogdanm 86:04dd9b1680ae 315 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \
bogdanm 86:04dd9b1680ae 316 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \
bogdanm 86:04dd9b1680ae 317 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \
bogdanm 86:04dd9b1680ae 318 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \
bogdanm 86:04dd9b1680ae 319 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \
bogdanm 86:04dd9b1680ae 320 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \
bogdanm 86:04dd9b1680ae 321 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \
bogdanm 86:04dd9b1680ae 322 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \
bogdanm 86:04dd9b1680ae 323 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \
bogdanm 86:04dd9b1680ae 324 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \
bogdanm 86:04dd9b1680ae 325 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \
bogdanm 86:04dd9b1680ae 326 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
bogdanm 86:04dd9b1680ae 327 /**
bogdanm 86:04dd9b1680ae 328 * @}
bogdanm 86:04dd9b1680ae 329 */
bogdanm 86:04dd9b1680ae 330
bogdanm 86:04dd9b1680ae 331 /** @defgroup SDIO_Transfer_Direction
bogdanm 86:04dd9b1680ae 332 * @{
bogdanm 86:04dd9b1680ae 333 */
bogdanm 86:04dd9b1680ae 334 #define SDIO_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 335 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
bogdanm 86:04dd9b1680ae 336
bogdanm 86:04dd9b1680ae 337 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \
bogdanm 86:04dd9b1680ae 338 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
bogdanm 86:04dd9b1680ae 339 /**
bogdanm 86:04dd9b1680ae 340 * @}
bogdanm 86:04dd9b1680ae 341 */
bogdanm 86:04dd9b1680ae 342
bogdanm 86:04dd9b1680ae 343 /** @defgroup SDIO_Transfer_Type
bogdanm 86:04dd9b1680ae 344 * @{
bogdanm 86:04dd9b1680ae 345 */
bogdanm 86:04dd9b1680ae 346 #define SDIO_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 347 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
bogdanm 86:04dd9b1680ae 348
bogdanm 86:04dd9b1680ae 349 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \
bogdanm 86:04dd9b1680ae 350 ((MODE) == SDIO_TRANSFER_MODE_STREAM))
bogdanm 86:04dd9b1680ae 351 /**
bogdanm 86:04dd9b1680ae 352 * @}
bogdanm 86:04dd9b1680ae 353 */
bogdanm 86:04dd9b1680ae 354
bogdanm 86:04dd9b1680ae 355 /** @defgroup SDIO_DPSM_State
bogdanm 86:04dd9b1680ae 356 * @{
bogdanm 86:04dd9b1680ae 357 */
bogdanm 86:04dd9b1680ae 358 #define SDIO_DPSM_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 359 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
bogdanm 86:04dd9b1680ae 360
bogdanm 86:04dd9b1680ae 361 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\
bogdanm 86:04dd9b1680ae 362 ((DPSM) == SDIO_DPSM_ENABLE))
bogdanm 86:04dd9b1680ae 363 /**
bogdanm 86:04dd9b1680ae 364 * @}
bogdanm 86:04dd9b1680ae 365 */
bogdanm 86:04dd9b1680ae 366
bogdanm 86:04dd9b1680ae 367 /** @defgroup SDIO_Read_Wait_Mode
bogdanm 86:04dd9b1680ae 368 * @{
bogdanm 86:04dd9b1680ae 369 */
bogdanm 86:04dd9b1680ae 370 #define SDIO_READ_WAIT_MODE_CLK ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 371 #define SDIO_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000001)
bogdanm 86:04dd9b1680ae 372
bogdanm 86:04dd9b1680ae 373 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \
bogdanm 86:04dd9b1680ae 374 ((MODE) == SDIO_READ_WAIT_MODE_DATA2))
bogdanm 86:04dd9b1680ae 375 /**
bogdanm 86:04dd9b1680ae 376 * @}
bogdanm 86:04dd9b1680ae 377 */
bogdanm 86:04dd9b1680ae 378
bogdanm 86:04dd9b1680ae 379 /** @defgroup SDIO_Interrupt_sources
bogdanm 86:04dd9b1680ae 380 * @{
bogdanm 86:04dd9b1680ae 381 */
bogdanm 86:04dd9b1680ae 382 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
bogdanm 86:04dd9b1680ae 383 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
bogdanm 86:04dd9b1680ae 384 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
bogdanm 86:04dd9b1680ae 385 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
bogdanm 86:04dd9b1680ae 386 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
bogdanm 86:04dd9b1680ae 387 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
bogdanm 86:04dd9b1680ae 388 #define SDIO_IT_CMDREND SDIO_STA_CMDREND
bogdanm 86:04dd9b1680ae 389 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
bogdanm 86:04dd9b1680ae 390 #define SDIO_IT_DATAEND SDIO_STA_DATAEND
bogdanm 86:04dd9b1680ae 391 #define SDIO_IT_STBITERR SDIO_STA_STBITERR
bogdanm 86:04dd9b1680ae 392 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
bogdanm 86:04dd9b1680ae 393 #define SDIO_IT_CMDACT SDIO_STA_CMDACT
bogdanm 86:04dd9b1680ae 394 #define SDIO_IT_TXACT SDIO_STA_TXACT
bogdanm 86:04dd9b1680ae 395 #define SDIO_IT_RXACT SDIO_STA_RXACT
bogdanm 86:04dd9b1680ae 396 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
bogdanm 86:04dd9b1680ae 397 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
bogdanm 86:04dd9b1680ae 398 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
bogdanm 86:04dd9b1680ae 399 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
bogdanm 86:04dd9b1680ae 400 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
bogdanm 86:04dd9b1680ae 401 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
bogdanm 86:04dd9b1680ae 402 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
bogdanm 86:04dd9b1680ae 403 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
bogdanm 86:04dd9b1680ae 404 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
bogdanm 86:04dd9b1680ae 405 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
bogdanm 86:04dd9b1680ae 406
bogdanm 86:04dd9b1680ae 407 #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
bogdanm 86:04dd9b1680ae 408 /**
bogdanm 86:04dd9b1680ae 409 * @}
bogdanm 86:04dd9b1680ae 410 */
bogdanm 86:04dd9b1680ae 411
bogdanm 86:04dd9b1680ae 412 /** @defgroup SDIO_Flags
bogdanm 86:04dd9b1680ae 413 * @{
bogdanm 86:04dd9b1680ae 414 */
bogdanm 86:04dd9b1680ae 415 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
bogdanm 86:04dd9b1680ae 416 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
bogdanm 86:04dd9b1680ae 417 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
bogdanm 86:04dd9b1680ae 418 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
bogdanm 86:04dd9b1680ae 419 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
bogdanm 86:04dd9b1680ae 420 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
bogdanm 86:04dd9b1680ae 421 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
bogdanm 86:04dd9b1680ae 422 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
bogdanm 86:04dd9b1680ae 423 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
bogdanm 86:04dd9b1680ae 424 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
bogdanm 86:04dd9b1680ae 425 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
bogdanm 86:04dd9b1680ae 426 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
bogdanm 86:04dd9b1680ae 427 #define SDIO_FLAG_TXACT SDIO_STA_TXACT
bogdanm 86:04dd9b1680ae 428 #define SDIO_FLAG_RXACT SDIO_STA_RXACT
bogdanm 86:04dd9b1680ae 429 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
bogdanm 86:04dd9b1680ae 430 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
bogdanm 86:04dd9b1680ae 431 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
bogdanm 86:04dd9b1680ae 432 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
bogdanm 86:04dd9b1680ae 433 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
bogdanm 86:04dd9b1680ae 434 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
bogdanm 86:04dd9b1680ae 435 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
bogdanm 86:04dd9b1680ae 436 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
bogdanm 86:04dd9b1680ae 437 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
bogdanm 86:04dd9b1680ae 438 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
bogdanm 86:04dd9b1680ae 439
bogdanm 86:04dd9b1680ae 440 #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
bogdanm 86:04dd9b1680ae 441 ((FLAG) == SDIO_FLAG_DCRCFAIL) || \
bogdanm 86:04dd9b1680ae 442 ((FLAG) == SDIO_FLAG_CTIMEOUT) || \
bogdanm 86:04dd9b1680ae 443 ((FLAG) == SDIO_FLAG_DTIMEOUT) || \
bogdanm 86:04dd9b1680ae 444 ((FLAG) == SDIO_FLAG_TXUNDERR) || \
bogdanm 86:04dd9b1680ae 445 ((FLAG) == SDIO_FLAG_RXOVERR) || \
bogdanm 86:04dd9b1680ae 446 ((FLAG) == SDIO_FLAG_CMDREND) || \
bogdanm 86:04dd9b1680ae 447 ((FLAG) == SDIO_FLAG_CMDSENT) || \
bogdanm 86:04dd9b1680ae 448 ((FLAG) == SDIO_FLAG_DATAEND) || \
bogdanm 86:04dd9b1680ae 449 ((FLAG) == SDIO_FLAG_STBITERR) || \
bogdanm 86:04dd9b1680ae 450 ((FLAG) == SDIO_FLAG_DBCKEND) || \
bogdanm 86:04dd9b1680ae 451 ((FLAG) == SDIO_FLAG_CMDACT) || \
bogdanm 86:04dd9b1680ae 452 ((FLAG) == SDIO_FLAG_TXACT) || \
bogdanm 86:04dd9b1680ae 453 ((FLAG) == SDIO_FLAG_RXACT) || \
bogdanm 86:04dd9b1680ae 454 ((FLAG) == SDIO_FLAG_TXFIFOHE) || \
bogdanm 86:04dd9b1680ae 455 ((FLAG) == SDIO_FLAG_RXFIFOHF) || \
bogdanm 86:04dd9b1680ae 456 ((FLAG) == SDIO_FLAG_TXFIFOF) || \
bogdanm 86:04dd9b1680ae 457 ((FLAG) == SDIO_FLAG_RXFIFOF) || \
bogdanm 86:04dd9b1680ae 458 ((FLAG) == SDIO_FLAG_TXFIFOE) || \
bogdanm 86:04dd9b1680ae 459 ((FLAG) == SDIO_FLAG_RXFIFOE) || \
bogdanm 86:04dd9b1680ae 460 ((FLAG) == SDIO_FLAG_TXDAVL) || \
bogdanm 86:04dd9b1680ae 461 ((FLAG) == SDIO_FLAG_RXDAVL) || \
bogdanm 86:04dd9b1680ae 462 ((FLAG) == SDIO_FLAG_SDIOIT) || \
bogdanm 86:04dd9b1680ae 463 ((FLAG) == SDIO_FLAG_CEATAEND))
bogdanm 86:04dd9b1680ae 464
bogdanm 86:04dd9b1680ae 465 #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
bogdanm 86:04dd9b1680ae 466
bogdanm 86:04dd9b1680ae 467 #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
bogdanm 86:04dd9b1680ae 468 ((IT) == SDIO_IT_DCRCFAIL) || \
bogdanm 86:04dd9b1680ae 469 ((IT) == SDIO_IT_CTIMEOUT) || \
bogdanm 86:04dd9b1680ae 470 ((IT) == SDIO_IT_DTIMEOUT) || \
bogdanm 86:04dd9b1680ae 471 ((IT) == SDIO_IT_TXUNDERR) || \
bogdanm 86:04dd9b1680ae 472 ((IT) == SDIO_IT_RXOVERR) || \
bogdanm 86:04dd9b1680ae 473 ((IT) == SDIO_IT_CMDREND) || \
bogdanm 86:04dd9b1680ae 474 ((IT) == SDIO_IT_CMDSENT) || \
bogdanm 86:04dd9b1680ae 475 ((IT) == SDIO_IT_DATAEND) || \
bogdanm 86:04dd9b1680ae 476 ((IT) == SDIO_IT_STBITERR) || \
bogdanm 86:04dd9b1680ae 477 ((IT) == SDIO_IT_DBCKEND) || \
bogdanm 86:04dd9b1680ae 478 ((IT) == SDIO_IT_CMDACT) || \
bogdanm 86:04dd9b1680ae 479 ((IT) == SDIO_IT_TXACT) || \
bogdanm 86:04dd9b1680ae 480 ((IT) == SDIO_IT_RXACT) || \
bogdanm 86:04dd9b1680ae 481 ((IT) == SDIO_IT_TXFIFOHE) || \
bogdanm 86:04dd9b1680ae 482 ((IT) == SDIO_IT_RXFIFOHF) || \
bogdanm 86:04dd9b1680ae 483 ((IT) == SDIO_IT_TXFIFOF) || \
bogdanm 86:04dd9b1680ae 484 ((IT) == SDIO_IT_RXFIFOF) || \
bogdanm 86:04dd9b1680ae 485 ((IT) == SDIO_IT_TXFIFOE) || \
bogdanm 86:04dd9b1680ae 486 ((IT) == SDIO_IT_RXFIFOE) || \
bogdanm 86:04dd9b1680ae 487 ((IT) == SDIO_IT_TXDAVL) || \
bogdanm 86:04dd9b1680ae 488 ((IT) == SDIO_IT_RXDAVL) || \
bogdanm 86:04dd9b1680ae 489 ((IT) == SDIO_IT_SDIOIT) || \
bogdanm 86:04dd9b1680ae 490 ((IT) == SDIO_IT_CEATAEND))
bogdanm 86:04dd9b1680ae 491
bogdanm 86:04dd9b1680ae 492 #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
bogdanm 86:04dd9b1680ae 493
bogdanm 86:04dd9b1680ae 494 /**
bogdanm 86:04dd9b1680ae 495 * @}
bogdanm 86:04dd9b1680ae 496 */
bogdanm 86:04dd9b1680ae 497
bogdanm 86:04dd9b1680ae 498
bogdanm 86:04dd9b1680ae 499 /** @defgroup SDIO_Instance_definition
bogdanm 86:04dd9b1680ae 500 * @{
bogdanm 86:04dd9b1680ae 501 */
bogdanm 86:04dd9b1680ae 502 #define IS_SDIO_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SDIO)
bogdanm 86:04dd9b1680ae 503
bogdanm 86:04dd9b1680ae 504 /**
bogdanm 86:04dd9b1680ae 505 * @}
bogdanm 86:04dd9b1680ae 506 */
bogdanm 86:04dd9b1680ae 507
bogdanm 86:04dd9b1680ae 508 /* Exported macro ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 509 /* ------------ SDIO registers bit address in the alias region -------------- */
bogdanm 86:04dd9b1680ae 510 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
bogdanm 86:04dd9b1680ae 511
bogdanm 86:04dd9b1680ae 512 /* --- CLKCR Register ---*/
bogdanm 86:04dd9b1680ae 513 /* Alias word address of CLKEN bit */
bogdanm 86:04dd9b1680ae 514 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
bogdanm 86:04dd9b1680ae 515 #define CLKEN_BitNumber 0x08
bogdanm 86:04dd9b1680ae 516 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4))
bogdanm 86:04dd9b1680ae 517
bogdanm 86:04dd9b1680ae 518 /* --- CMD Register ---*/
bogdanm 86:04dd9b1680ae 519 /* Alias word address of SDIOSUSPEND bit */
bogdanm 86:04dd9b1680ae 520 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
bogdanm 86:04dd9b1680ae 521 #define SDIOSUSPEND_BitNumber 0x0B
bogdanm 86:04dd9b1680ae 522 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4))
bogdanm 86:04dd9b1680ae 523
bogdanm 86:04dd9b1680ae 524 /* Alias word address of ENCMDCOMPL bit */
bogdanm 86:04dd9b1680ae 525 #define ENCMDCOMPL_BitNumber 0x0C
bogdanm 86:04dd9b1680ae 526 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4))
bogdanm 86:04dd9b1680ae 527
bogdanm 86:04dd9b1680ae 528 /* Alias word address of NIEN bit */
bogdanm 86:04dd9b1680ae 529 #define NIEN_BitNumber 0x0D
bogdanm 86:04dd9b1680ae 530 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4))
bogdanm 86:04dd9b1680ae 531
bogdanm 86:04dd9b1680ae 532 /* Alias word address of ATACMD bit */
bogdanm 86:04dd9b1680ae 533 #define ATACMD_BitNumber 0x0E
bogdanm 86:04dd9b1680ae 534 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4))
bogdanm 86:04dd9b1680ae 535
bogdanm 86:04dd9b1680ae 536 /* --- DCTRL Register ---*/
bogdanm 86:04dd9b1680ae 537 /* Alias word address of DMAEN bit */
bogdanm 86:04dd9b1680ae 538 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
bogdanm 86:04dd9b1680ae 539 #define DMAEN_BitNumber 0x03
bogdanm 86:04dd9b1680ae 540 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4))
bogdanm 86:04dd9b1680ae 541
bogdanm 86:04dd9b1680ae 542 /* Alias word address of RWSTART bit */
bogdanm 86:04dd9b1680ae 543 #define RWSTART_BitNumber 0x08
bogdanm 86:04dd9b1680ae 544 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4))
bogdanm 86:04dd9b1680ae 545
bogdanm 86:04dd9b1680ae 546 /* Alias word address of RWSTOP bit */
bogdanm 86:04dd9b1680ae 547 #define RWSTOP_BitNumber 0x09
bogdanm 86:04dd9b1680ae 548 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4))
bogdanm 86:04dd9b1680ae 549
bogdanm 86:04dd9b1680ae 550 /* Alias word address of RWMOD bit */
bogdanm 86:04dd9b1680ae 551 #define RWMOD_BitNumber 0x0A
bogdanm 86:04dd9b1680ae 552 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4))
bogdanm 86:04dd9b1680ae 553
bogdanm 86:04dd9b1680ae 554 /* Alias word address of SDIOEN bit */
bogdanm 86:04dd9b1680ae 555 #define SDIOEN_BitNumber 0x0B
bogdanm 86:04dd9b1680ae 556 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4))
bogdanm 86:04dd9b1680ae 557
bogdanm 86:04dd9b1680ae 558 /* ---------------------- SDIO registers bit mask --------------------------- */
bogdanm 86:04dd9b1680ae 559 /* --- CLKCR Register ---*/
bogdanm 86:04dd9b1680ae 560 /* CLKCR register clear mask */
bogdanm 86:04dd9b1680ae 561 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\
bogdanm 86:04dd9b1680ae 562 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\
bogdanm 86:04dd9b1680ae 563 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN))
bogdanm 86:04dd9b1680ae 564
bogdanm 86:04dd9b1680ae 565 /* --- PWRCTRL Register ---*/
bogdanm 86:04dd9b1680ae 566 /* --- DCTRL Register ---*/
bogdanm 86:04dd9b1680ae 567 /* SDIO DCTRL Clear Mask */
bogdanm 86:04dd9b1680ae 568 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\
bogdanm 86:04dd9b1680ae 569 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE))
bogdanm 86:04dd9b1680ae 570
bogdanm 86:04dd9b1680ae 571 /* --- CMD Register ---*/
bogdanm 86:04dd9b1680ae 572 /* CMD Register clear mask */
bogdanm 86:04dd9b1680ae 573 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\
bogdanm 86:04dd9b1680ae 574 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\
bogdanm 86:04dd9b1680ae 575 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND))
bogdanm 86:04dd9b1680ae 576
bogdanm 86:04dd9b1680ae 577 /* SDIO RESP Registers Address */
bogdanm 86:04dd9b1680ae 578 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
bogdanm 86:04dd9b1680ae 579
bogdanm 86:04dd9b1680ae 580 /* SDIO Intialization Frequency (400KHz max) */
bogdanm 86:04dd9b1680ae 581 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
bogdanm 86:04dd9b1680ae 582
bogdanm 86:04dd9b1680ae 583 /* SDIO Data Transfer Frequency (25MHz max) */
bogdanm 86:04dd9b1680ae 584 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
bogdanm 86:04dd9b1680ae 585
bogdanm 86:04dd9b1680ae 586 /** @defgroup SDIO_Interrupt_Clock
bogdanm 86:04dd9b1680ae 587 * @brief macros to handle interrupts and specific clock configurations
bogdanm 86:04dd9b1680ae 588 * @{
bogdanm 86:04dd9b1680ae 589 */
bogdanm 86:04dd9b1680ae 590
bogdanm 86:04dd9b1680ae 591 /**
bogdanm 86:04dd9b1680ae 592 * @brief Enable the SDIO device.
bogdanm 86:04dd9b1680ae 593 * @param None
bogdanm 86:04dd9b1680ae 594 * @retval None
bogdanm 86:04dd9b1680ae 595 */
bogdanm 86:04dd9b1680ae 596 #define __SDIO_ENABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 597
bogdanm 86:04dd9b1680ae 598 /**
bogdanm 86:04dd9b1680ae 599 * @brief Disable the SDIO device.
bogdanm 86:04dd9b1680ae 600 * @param None
bogdanm 86:04dd9b1680ae 601 * @retval None
bogdanm 86:04dd9b1680ae 602 */
bogdanm 86:04dd9b1680ae 603 #define __SDIO_DISABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 604
bogdanm 86:04dd9b1680ae 605 /**
bogdanm 86:04dd9b1680ae 606 * @brief Enable the SDIO DMA transfer.
bogdanm 86:04dd9b1680ae 607 * @param None
bogdanm 86:04dd9b1680ae 608 * @retval None
bogdanm 86:04dd9b1680ae 609 */
bogdanm 86:04dd9b1680ae 610 #define __SDIO_DMA_ENABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 611
bogdanm 86:04dd9b1680ae 612 /**
bogdanm 86:04dd9b1680ae 613 * @brief Disable the SDIO DMA transfer.
bogdanm 86:04dd9b1680ae 614 * @param None
bogdanm 86:04dd9b1680ae 615 * @retval None
bogdanm 86:04dd9b1680ae 616 */
bogdanm 86:04dd9b1680ae 617 #define __SDIO_DMA_DISABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 618
bogdanm 86:04dd9b1680ae 619 /**
bogdanm 86:04dd9b1680ae 620 * @brief Enable the SDIO device interrupt.
bogdanm 86:04dd9b1680ae 621 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 622 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
bogdanm 86:04dd9b1680ae 623 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 624 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 625 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 626 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 627 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 628 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 629 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 630 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 631 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 632 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 633 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 634 * bus mode interrupt
bogdanm 86:04dd9b1680ae 635 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 636 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 637 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 638 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 639 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 640 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 641 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 642 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 643 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 644 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 645 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 646 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 647 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 648 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 649 * @retval None
bogdanm 86:04dd9b1680ae 650 */
bogdanm 86:04dd9b1680ae 651 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 652
bogdanm 86:04dd9b1680ae 653 /**
bogdanm 86:04dd9b1680ae 654 * @brief Disable the SDIO device interrupt.
bogdanm 86:04dd9b1680ae 655 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 656 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
bogdanm 86:04dd9b1680ae 657 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 658 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 659 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 660 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 661 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 662 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 663 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 664 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 665 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 666 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 667 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 668 * bus mode interrupt
bogdanm 86:04dd9b1680ae 669 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 670 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 671 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 672 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 673 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 674 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 675 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 676 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 677 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 678 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 679 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 680 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 681 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 682 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 683 * @retval None
bogdanm 86:04dd9b1680ae 684 */
bogdanm 86:04dd9b1680ae 685 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
bogdanm 86:04dd9b1680ae 686
bogdanm 86:04dd9b1680ae 687 /**
bogdanm 86:04dd9b1680ae 688 * @brief Checks whether the specified SDIO flag is set or not.
bogdanm 86:04dd9b1680ae 689 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 690 * @param __FLAG__: specifies the flag to check.
bogdanm 86:04dd9b1680ae 691 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 692 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 86:04dd9b1680ae 693 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 86:04dd9b1680ae 694 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 86:04dd9b1680ae 695 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 86:04dd9b1680ae 696 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 86:04dd9b1680ae 697 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 86:04dd9b1680ae 698 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 86:04dd9b1680ae 699 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 86:04dd9b1680ae 700 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 86:04dd9b1680ae 701 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
bogdanm 86:04dd9b1680ae 702 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 86:04dd9b1680ae 703 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 86:04dd9b1680ae 704 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 86:04dd9b1680ae 705 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 86:04dd9b1680ae 706 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 86:04dd9b1680ae 707 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 86:04dd9b1680ae 708 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 86:04dd9b1680ae 709 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 86:04dd9b1680ae 710 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 86:04dd9b1680ae 711 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 86:04dd9b1680ae 712 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 86:04dd9b1680ae 713 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 86:04dd9b1680ae 714 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 86:04dd9b1680ae 715 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 716 * @retval The new state of SDIO_FLAG (SET or RESET).
bogdanm 86:04dd9b1680ae 717 */
bogdanm 86:04dd9b1680ae 718 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
bogdanm 86:04dd9b1680ae 719
bogdanm 86:04dd9b1680ae 720
bogdanm 86:04dd9b1680ae 721 /**
bogdanm 86:04dd9b1680ae 722 * @brief Clears the SDIO pending flags.
bogdanm 86:04dd9b1680ae 723 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 724 * @param __FLAG__: specifies the flag to clear.
bogdanm 86:04dd9b1680ae 725 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 726 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 86:04dd9b1680ae 727 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 86:04dd9b1680ae 728 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 86:04dd9b1680ae 729 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 86:04dd9b1680ae 730 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 86:04dd9b1680ae 731 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 86:04dd9b1680ae 732 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 86:04dd9b1680ae 733 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 86:04dd9b1680ae 734 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 86:04dd9b1680ae 735 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
bogdanm 86:04dd9b1680ae 736 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 86:04dd9b1680ae 737 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 86:04dd9b1680ae 738 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 739 * @retval None
bogdanm 86:04dd9b1680ae 740 */
bogdanm 86:04dd9b1680ae 741 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
bogdanm 86:04dd9b1680ae 742
bogdanm 86:04dd9b1680ae 743 /**
bogdanm 86:04dd9b1680ae 744 * @brief Checks whether the specified SDIO interrupt has occurred or not.
bogdanm 86:04dd9b1680ae 745 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 746 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
bogdanm 86:04dd9b1680ae 747 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 748 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 749 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 750 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 751 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 752 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 753 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 754 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 755 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 756 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 757 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 758 * bus mode interrupt
bogdanm 86:04dd9b1680ae 759 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 760 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 761 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 762 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 763 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 764 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 765 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 766 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 767 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 768 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 769 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 770 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 771 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 772 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 773 * @retval The new state of SDIO_IT (SET or RESET).
bogdanm 86:04dd9b1680ae 774 */
bogdanm 86:04dd9b1680ae 775 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 776
bogdanm 86:04dd9b1680ae 777 /**
bogdanm 86:04dd9b1680ae 778 * @brief Clears the SDIO's interrupt pending bits.
bogdanm 86:04dd9b1680ae 779 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 780 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 86:04dd9b1680ae 781 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 782 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 783 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 784 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 785 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 786 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 787 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 788 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 789 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 790 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 791 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 792 * bus mode interrupt
bogdanm 86:04dd9b1680ae 793 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 794 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 795 * @retval None
bogdanm 86:04dd9b1680ae 796 */
bogdanm 86:04dd9b1680ae 797 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 798
bogdanm 86:04dd9b1680ae 799 /**
bogdanm 86:04dd9b1680ae 800 * @brief Enable Start the SD I/O Read Wait operation.
bogdanm 86:04dd9b1680ae 801 * @param None
bogdanm 86:04dd9b1680ae 802 * @retval None
bogdanm 86:04dd9b1680ae 803 */
bogdanm 86:04dd9b1680ae 804 #define __SDIO_START_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
bogdanm 86:04dd9b1680ae 805
bogdanm 86:04dd9b1680ae 806 /**
bogdanm 86:04dd9b1680ae 807 * @brief Disable Start the SD I/O Read Wait operations.
bogdanm 86:04dd9b1680ae 808 * @param None
bogdanm 86:04dd9b1680ae 809 * @retval None
bogdanm 86:04dd9b1680ae 810 */
bogdanm 86:04dd9b1680ae 811 #define __SDIO_START_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
bogdanm 86:04dd9b1680ae 812
bogdanm 86:04dd9b1680ae 813 /**
bogdanm 86:04dd9b1680ae 814 * @brief Enable Start the SD I/O Read Wait operation.
bogdanm 86:04dd9b1680ae 815 * @param None
bogdanm 86:04dd9b1680ae 816 * @retval None
bogdanm 86:04dd9b1680ae 817 */
bogdanm 86:04dd9b1680ae 818 #define __SDIO_STOP_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
bogdanm 86:04dd9b1680ae 819
bogdanm 86:04dd9b1680ae 820 /**
bogdanm 86:04dd9b1680ae 821 * @brief Disable Stop the SD I/O Read Wait operations.
bogdanm 86:04dd9b1680ae 822 * @param None
bogdanm 86:04dd9b1680ae 823 * @retval None
bogdanm 86:04dd9b1680ae 824 */
bogdanm 86:04dd9b1680ae 825 #define __SDIO_STOP_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
bogdanm 86:04dd9b1680ae 826
bogdanm 86:04dd9b1680ae 827 /**
bogdanm 86:04dd9b1680ae 828 * @brief Enable the SD I/O Mode Operation.
bogdanm 86:04dd9b1680ae 829 * @param None
bogdanm 86:04dd9b1680ae 830 * @retval None
bogdanm 86:04dd9b1680ae 831 */
bogdanm 86:04dd9b1680ae 832 #define __SDIO_OPERATION_ENABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 833
bogdanm 86:04dd9b1680ae 834 /**
bogdanm 86:04dd9b1680ae 835 * @brief Disable the SD I/O Mode Operation.
bogdanm 86:04dd9b1680ae 836 * @param None
bogdanm 86:04dd9b1680ae 837 * @retval None
bogdanm 86:04dd9b1680ae 838 */
bogdanm 86:04dd9b1680ae 839 #define __SDIO_OPERATION_DISABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 840
bogdanm 86:04dd9b1680ae 841 /**
bogdanm 86:04dd9b1680ae 842 * @brief Enable the SD I/O Suspend command sending.
bogdanm 86:04dd9b1680ae 843 * @param None
bogdanm 86:04dd9b1680ae 844 * @retval None
bogdanm 86:04dd9b1680ae 845 */
bogdanm 86:04dd9b1680ae 846 #define __SDIO_SUSPEND_CMD_ENABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
bogdanm 86:04dd9b1680ae 847
bogdanm 86:04dd9b1680ae 848 /**
bogdanm 86:04dd9b1680ae 849 * @brief Disable the SD I/O Suspend command sending.
bogdanm 86:04dd9b1680ae 850 * @param None
bogdanm 86:04dd9b1680ae 851 * @retval None
bogdanm 86:04dd9b1680ae 852 */
bogdanm 86:04dd9b1680ae 853 #define __SDIO_SUSPEND_CMD_DISABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
bogdanm 86:04dd9b1680ae 854
bogdanm 86:04dd9b1680ae 855 /**
bogdanm 86:04dd9b1680ae 856 * @brief Enable the command completion signal.
bogdanm 86:04dd9b1680ae 857 * @param None
bogdanm 86:04dd9b1680ae 858 * @retval None
bogdanm 86:04dd9b1680ae 859 */
bogdanm 86:04dd9b1680ae 860 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
bogdanm 86:04dd9b1680ae 861
bogdanm 86:04dd9b1680ae 862 /**
bogdanm 86:04dd9b1680ae 863 * @brief Disable the command completion signal.
bogdanm 86:04dd9b1680ae 864 * @param None
bogdanm 86:04dd9b1680ae 865 * @retval None
bogdanm 86:04dd9b1680ae 866 */
bogdanm 86:04dd9b1680ae 867 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
bogdanm 86:04dd9b1680ae 868
bogdanm 86:04dd9b1680ae 869 /**
bogdanm 86:04dd9b1680ae 870 * @brief Enable the CE-ATA interrupt.
bogdanm 86:04dd9b1680ae 871 * @param None
bogdanm 86:04dd9b1680ae 872 * @retval None
bogdanm 86:04dd9b1680ae 873 */
bogdanm 86:04dd9b1680ae 874 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0)
bogdanm 86:04dd9b1680ae 875
bogdanm 86:04dd9b1680ae 876 /**
bogdanm 86:04dd9b1680ae 877 * @brief Disable the CE-ATA interrupt.
bogdanm 86:04dd9b1680ae 878 * @param None
bogdanm 86:04dd9b1680ae 879 * @retval None
bogdanm 86:04dd9b1680ae 880 */
bogdanm 86:04dd9b1680ae 881 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1)
bogdanm 86:04dd9b1680ae 882
bogdanm 86:04dd9b1680ae 883 /**
bogdanm 86:04dd9b1680ae 884 * @brief Enable send CE-ATA command (CMD61).
bogdanm 86:04dd9b1680ae 885 * @param None
bogdanm 86:04dd9b1680ae 886 * @retval None
bogdanm 86:04dd9b1680ae 887 */
bogdanm 86:04dd9b1680ae 888 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
bogdanm 86:04dd9b1680ae 889
bogdanm 86:04dd9b1680ae 890 /**
bogdanm 86:04dd9b1680ae 891 * @brief Disable send CE-ATA command (CMD61).
bogdanm 86:04dd9b1680ae 892 * @param None
bogdanm 86:04dd9b1680ae 893 * @retval None
bogdanm 86:04dd9b1680ae 894 */
bogdanm 86:04dd9b1680ae 895 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
bogdanm 86:04dd9b1680ae 896
bogdanm 86:04dd9b1680ae 897 /**
bogdanm 86:04dd9b1680ae 898 * @}
bogdanm 86:04dd9b1680ae 899 */
bogdanm 86:04dd9b1680ae 900
bogdanm 86:04dd9b1680ae 901 /**
bogdanm 86:04dd9b1680ae 902 * @}
bogdanm 86:04dd9b1680ae 903 */
bogdanm 86:04dd9b1680ae 904
bogdanm 86:04dd9b1680ae 905 /* Exported functions --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 906 /** @addtogroup SDIO_Exported_Functions
bogdanm 86:04dd9b1680ae 907 * @{
bogdanm 86:04dd9b1680ae 908 */
bogdanm 86:04dd9b1680ae 909
bogdanm 86:04dd9b1680ae 910 /* Initialization/de-initialization functions **********************************/
bogdanm 86:04dd9b1680ae 911 /** @addtogroup HAL_SDIO_Group1
bogdanm 86:04dd9b1680ae 912 * @{
bogdanm 86:04dd9b1680ae 913 */
bogdanm 86:04dd9b1680ae 914 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
bogdanm 86:04dd9b1680ae 915 /**
bogdanm 86:04dd9b1680ae 916 * @}
bogdanm 86:04dd9b1680ae 917 */
bogdanm 86:04dd9b1680ae 918
bogdanm 86:04dd9b1680ae 919 /* I/O operation functions *****************************************************/
bogdanm 86:04dd9b1680ae 920 /** @addtogroup HAL_SDIO_Group2
bogdanm 86:04dd9b1680ae 921 * @{
bogdanm 86:04dd9b1680ae 922 */
bogdanm 86:04dd9b1680ae 923 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 924 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 925 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData);
bogdanm 86:04dd9b1680ae 926 /**
bogdanm 86:04dd9b1680ae 927 * @}
bogdanm 86:04dd9b1680ae 928 */
bogdanm 86:04dd9b1680ae 929
bogdanm 86:04dd9b1680ae 930 /* Peripheral Control functions ************************************************/
bogdanm 86:04dd9b1680ae 931 /** @addtogroup HAL_SDIO_Group3
bogdanm 86:04dd9b1680ae 932 * @{
bogdanm 86:04dd9b1680ae 933 */
bogdanm 86:04dd9b1680ae 934 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 935 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 936 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 937
bogdanm 86:04dd9b1680ae 938 /* Command path state machine (CPSM) management functions */
bogdanm 86:04dd9b1680ae 939 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
bogdanm 86:04dd9b1680ae 940 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 941 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
bogdanm 86:04dd9b1680ae 942
bogdanm 86:04dd9b1680ae 943 /* Data path state machine (DPSM) management functions */
bogdanm 86:04dd9b1680ae 944 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct);
bogdanm 86:04dd9b1680ae 945 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 946 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 947
bogdanm 86:04dd9b1680ae 948 /* SDIO IO Cards mode management functions */
bogdanm 86:04dd9b1680ae 949 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
bogdanm 86:04dd9b1680ae 950
bogdanm 86:04dd9b1680ae 951 /**
bogdanm 86:04dd9b1680ae 952 * @}
bogdanm 86:04dd9b1680ae 953 */
bogdanm 86:04dd9b1680ae 954
bogdanm 86:04dd9b1680ae 955 /**
bogdanm 86:04dd9b1680ae 956 * @}
bogdanm 86:04dd9b1680ae 957 */
bogdanm 86:04dd9b1680ae 958
bogdanm 86:04dd9b1680ae 959 /**
bogdanm 86:04dd9b1680ae 960 * @}
bogdanm 86:04dd9b1680ae 961 */
bogdanm 86:04dd9b1680ae 962
bogdanm 86:04dd9b1680ae 963 /**
bogdanm 86:04dd9b1680ae 964 * @}
bogdanm 86:04dd9b1680ae 965 */
bogdanm 86:04dd9b1680ae 966
bogdanm 86:04dd9b1680ae 967 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 968 }
bogdanm 86:04dd9b1680ae 969 #endif
bogdanm 86:04dd9b1680ae 970
bogdanm 86:04dd9b1680ae 971 #endif /* __STM32F4xx_LL_SDMMC_H */
bogdanm 86:04dd9b1680ae 972
bogdanm 86:04dd9b1680ae 973 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/