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TARGET_NUCLEO_F401RE/stm32f4xx_hal_pcd.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
90:cb3d968589d8
Child:
99:dbbf35b96557
dgdgr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_pcd.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of PCD HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_PCD_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_PCD_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_ll_usb.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup PCD
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief PCD State structures definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef enum
emilmont 77:869cf507173a 63 {
Kojto 90:cb3d968589d8 64 HAL_PCD_STATE_RESET = 0x00,
Kojto 90:cb3d968589d8 65 HAL_PCD_STATE_READY = 0x01,
Kojto 90:cb3d968589d8 66 HAL_PCD_STATE_ERROR = 0x02,
Kojto 90:cb3d968589d8 67 HAL_PCD_STATE_BUSY = 0x03,
Kojto 90:cb3d968589d8 68 HAL_PCD_STATE_TIMEOUT = 0x04
emilmont 77:869cf507173a 69 } PCD_StateTypeDef;
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
emilmont 77:869cf507173a 73 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
emilmont 77:869cf507173a 74 typedef USB_OTG_EPTypeDef PCD_EPTypeDef ;
emilmont 77:869cf507173a 75
emilmont 77:869cf507173a 76 /**
emilmont 77:869cf507173a 77 * @brief PCD Handle Structure definition
emilmont 77:869cf507173a 78 */
emilmont 77:869cf507173a 79 typedef struct
emilmont 77:869cf507173a 80 {
emilmont 77:869cf507173a 81 PCD_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 82 PCD_InitTypeDef Init; /*!< PCD required parameters */
emilmont 77:869cf507173a 83 PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */
emilmont 77:869cf507173a 84 PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */
emilmont 77:869cf507173a 85 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
emilmont 77:869cf507173a 86 __IO PCD_StateTypeDef State; /*!< PCD communication state */
emilmont 77:869cf507173a 87 uint32_t Setup[12]; /*!< Setup packet buffer */
emilmont 77:869cf507173a 88 void *pData; /*!< Pointer to upper stack Handler */
emilmont 77:869cf507173a 89
emilmont 77:869cf507173a 90 } PCD_HandleTypeDef;
emilmont 77:869cf507173a 91
emilmont 77:869cf507173a 92 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 93 /** @defgroup PCD_Exported_Constants
emilmont 77:869cf507173a 94 * @{
emilmont 77:869cf507173a 95 */
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 /** @defgroup PCD_Speed
emilmont 77:869cf507173a 98 * @{
emilmont 77:869cf507173a 99 */
emilmont 77:869cf507173a 100 #define PCD_SPEED_HIGH 0
emilmont 77:869cf507173a 101 #define PCD_SPEED_HIGH_IN_FULL 1
bogdanm 81:7d30d6019079 102 #define PCD_SPEED_FULL 2
emilmont 77:869cf507173a 103 /**
emilmont 77:869cf507173a 104 * @}
emilmont 77:869cf507173a 105 */
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 /** @defgroup PCD_PHY_Module
emilmont 77:869cf507173a 108 * @{
emilmont 77:869cf507173a 109 */
emilmont 77:869cf507173a 110 #define PCD_PHY_ULPI 1
emilmont 77:869cf507173a 111 #define PCD_PHY_EMBEDDED 2
emilmont 77:869cf507173a 112 /**
emilmont 77:869cf507173a 113 * @}
emilmont 77:869cf507173a 114 */
emilmont 77:869cf507173a 115
emilmont 77:869cf507173a 116 /** @defgroup PCD_Instance_definition
emilmont 77:869cf507173a 117 * @{
emilmont 77:869cf507173a 118 */
emilmont 77:869cf507173a 119 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 120 #define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS) || \
emilmont 77:869cf507173a 121 ((INSTANCE) == USB_OTG_HS))
Kojto 90:cb3d968589d8 122 #elif defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
emilmont 77:869cf507173a 123 #define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS))
emilmont 77:869cf507173a 124 #endif
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 /**
emilmont 77:869cf507173a 127 * @}
emilmont 77:869cf507173a 128 */
emilmont 77:869cf507173a 129
emilmont 77:869cf507173a 130 /**
emilmont 77:869cf507173a 131 * @}
emilmont 77:869cf507173a 132 */
emilmont 77:869cf507173a 133
emilmont 77:869cf507173a 134 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 135
emilmont 77:869cf507173a 136 /** @defgroup PCD_Interrupt_Clock
emilmont 77:869cf507173a 137 * @brief macros to handle interrupts and specific clock configurations
emilmont 77:869cf507173a 138 * @{
emilmont 77:869cf507173a 139 */
emilmont 77:869cf507173a 140 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
emilmont 77:869cf507173a 141 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
emilmont 77:869cf507173a 142
Kojto 90:cb3d968589d8 143 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
Kojto 90:cb3d968589d8 144 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
Kojto 90:cb3d968589d8 145 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
bogdanm 81:7d30d6019079 146
bogdanm 81:7d30d6019079 147
bogdanm 81:7d30d6019079 148 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
bogdanm 81:7d30d6019079 149 ~(USB_OTG_PCGCCTL_STOPCLK)
bogdanm 81:7d30d6019079 150
bogdanm 81:7d30d6019079 151
bogdanm 81:7d30d6019079 152 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
bogdanm 81:7d30d6019079 153
bogdanm 81:7d30d6019079 154 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
bogdanm 81:7d30d6019079 155
bogdanm 81:7d30d6019079 156 #define USB_FS_EXTI_TRIGGER_RISING_EDGE ((uint32_t)0x08)
bogdanm 81:7d30d6019079 157 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE ((uint32_t)0x0C)
bogdanm 81:7d30d6019079 158 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE ((uint32_t)0x10)
bogdanm 81:7d30d6019079 159
bogdanm 81:7d30d6019079 160 #define USB_HS_EXTI_TRIGGER_RISING_EDGE ((uint32_t)0x08)
bogdanm 81:7d30d6019079 161 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE ((uint32_t)0x0C)
bogdanm 81:7d30d6019079 162 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE ((uint32_t)0x10)
bogdanm 81:7d30d6019079 163
bogdanm 81:7d30d6019079 164
bogdanm 81:7d30d6019079 165 #define USB_HS_EXTI_LINE_WAKEUP ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB HS EXTI Line */
bogdanm 81:7d30d6019079 166 #define USB_FS_EXTI_LINE_WAKEUP ((uint32_t)0x00040000) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
bogdanm 81:7d30d6019079 167
bogdanm 81:7d30d6019079 168
bogdanm 81:7d30d6019079 169
bogdanm 81:7d30d6019079 170 #define __HAL_USB_HS_EXTI_ENABLE_IT() EXTI->IMR |= (USB_HS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 171 #define __HAL_USB_HS_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_HS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 172 #define __HAL_USB_HS_EXTI_GET_FLAG() EXTI->PR & (USB_HS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 173 #define __HAL_USB_HS_EXTI_CLEAR_FLAG() EXTI->PR = (USB_HS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 174
bogdanm 81:7d30d6019079 175 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER() EXTI->FTSR &= ~(USB_HS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 176 EXTI->RTSR |= USB_HS_EXTI_LINE_WAKEUP
bogdanm 81:7d30d6019079 177
bogdanm 81:7d30d6019079 178
bogdanm 81:7d30d6019079 179 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (USB_HS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 180 EXTI->RTSR &= ~(USB_HS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 181
bogdanm 81:7d30d6019079 182
bogdanm 81:7d30d6019079 183 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(USB_HS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 184 EXTI->FTSR &= ~(USB_HS_EXTI_LINE_WAKEUP;)\
bogdanm 81:7d30d6019079 185 EXTI->RTSR |= USB_HS_EXTI_LINE_WAKEUP;\
bogdanm 81:7d30d6019079 186 EXTI->FTSR |= USB_HS_EXTI_LINE_WAKEUP
bogdanm 81:7d30d6019079 187
Kojto 90:cb3d968589d8 188 #define __HAL_USB_HS_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_FS_EXTI_LINE_WAKEUP)
Kojto 90:cb3d968589d8 189
Kojto 90:cb3d968589d8 190
bogdanm 81:7d30d6019079 191 #define __HAL_USB_FS_EXTI_ENABLE_IT() EXTI->IMR |= USB_FS_EXTI_LINE_WAKEUP
bogdanm 81:7d30d6019079 192 #define __HAL_USB_FS_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_FS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 193 #define __HAL_USB_FS_EXTI_GET_FLAG() EXTI->PR & (USB_FS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 194 #define __HAL_USB_FS_EXTI_CLEAR_FLAG() EXTI->PR = USB_FS_EXTI_LINE_WAKEUP
bogdanm 81:7d30d6019079 195
bogdanm 81:7d30d6019079 196 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER() EXTI->FTSR &= ~(USB_FS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 197 EXTI->RTSR |= USB_FS_EXTI_LINE_WAKEUP
bogdanm 81:7d30d6019079 198
bogdanm 81:7d30d6019079 199
bogdanm 81:7d30d6019079 200 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER() EXTI->FTSR |= (USB_FS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 201 EXTI->RTSR &= ~(USB_FS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 202
bogdanm 81:7d30d6019079 203
bogdanm 81:7d30d6019079 204 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(USB_FS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 205 EXTI->FTSR &= ~(USB_FS_EXTI_LINE_WAKEUP);\
bogdanm 81:7d30d6019079 206 EXTI->RTSR |= USB_FS_EXTI_LINE_WAKEUP;\
Kojto 90:cb3d968589d8 207 EXTI->FTSR |= USB_FS_EXTI_LINE_WAKEUP
Kojto 90:cb3d968589d8 208
Kojto 90:cb3d968589d8 209 #define __HAL_USB_FS_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_FS_EXTI_LINE_WAKEUP)
bogdanm 81:7d30d6019079 210
emilmont 77:869cf507173a 211 /**
emilmont 77:869cf507173a 212 * @}
emilmont 77:869cf507173a 213 */
emilmont 77:869cf507173a 214
Kojto 90:cb3d968589d8 215 /* Include PCD HAL Extension module */
Kojto 90:cb3d968589d8 216 #include "stm32f4xx_hal_pcd_ex.h"
Kojto 90:cb3d968589d8 217
emilmont 77:869cf507173a 218 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 221 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 222 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 223 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 224 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 225
emilmont 77:869cf507173a 226 /* I/O operation functions *****************************************************/
emilmont 77:869cf507173a 227 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 228 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 229 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 230 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 231
bogdanm 81:7d30d6019079 232 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
bogdanm 81:7d30d6019079 233 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
bogdanm 81:7d30d6019079 234 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 235 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 236 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 237 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 238 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 239 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
bogdanm 81:7d30d6019079 240 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
bogdanm 81:7d30d6019079 241 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 242 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 243
emilmont 77:869cf507173a 244 /* Peripheral Control functions ************************************************/
emilmont 77:869cf507173a 245 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 246 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 247 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
emilmont 77:869cf507173a 248 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
emilmont 77:869cf507173a 249 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
emilmont 77:869cf507173a 250 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
emilmont 77:869cf507173a 251 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
emilmont 77:869cf507173a 252 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
emilmont 77:869cf507173a 253 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
emilmont 77:869cf507173a 254 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
emilmont 77:869cf507173a 255 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
bogdanm 81:7d30d6019079 256 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
bogdanm 81:7d30d6019079 257 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
Kojto 90:cb3d968589d8 258
Kojto 90:cb3d968589d8 259 /* Create an alias to keep compatibility with the old name */
Kojto 90:cb3d968589d8 260 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
Kojto 90:cb3d968589d8 261 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
Kojto 90:cb3d968589d8 262
emilmont 77:869cf507173a 263 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 264 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
emilmont 77:869cf507173a 265
emilmont 77:869cf507173a 266 /**
emilmont 77:869cf507173a 267 * @}
emilmont 77:869cf507173a 268 */
emilmont 77:869cf507173a 269
emilmont 77:869cf507173a 270 /**
emilmont 77:869cf507173a 271 * @}
emilmont 77:869cf507173a 272 */
emilmont 77:869cf507173a 273
emilmont 77:869cf507173a 274 #ifdef __cplusplus
emilmont 77:869cf507173a 275 }
emilmont 77:869cf507173a 276 #endif
emilmont 77:869cf507173a 277
emilmont 77:869cf507173a 278
emilmont 77:869cf507173a 279 #endif /* __STM32F4xx_HAL_PCD_H */
emilmont 77:869cf507173a 280
emilmont 77:869cf507173a 281 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/