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TARGET_NUCLEO_F401RE/stm32f4xx_hal_crc.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
90:cb3d968589d8
Child:
99:dbbf35b96557
dgdgr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_crc.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of CRC HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_CRC_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_CRC_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup CRC
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief CRC HAL State Structure definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef enum
emilmont 77:869cf507173a 63 {
emilmont 77:869cf507173a 64 HAL_CRC_STATE_RESET = 0x00, /*!< CRC not yet initialized or disabled */
emilmont 77:869cf507173a 65 HAL_CRC_STATE_READY = 0x01, /*!< CRC initialized and ready for use */
emilmont 77:869cf507173a 66 HAL_CRC_STATE_BUSY = 0x02, /*!< CRC internal process is ongoing */
emilmont 77:869cf507173a 67 HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC timeout state */
emilmont 77:869cf507173a 68 HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */
emilmont 77:869cf507173a 69
emilmont 77:869cf507173a 70 }HAL_CRC_StateTypeDef;
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 /**
emilmont 77:869cf507173a 73 * @brief CRC handle Structure definition
emilmont 77:869cf507173a 74 */
emilmont 77:869cf507173a 75 typedef struct
emilmont 77:869cf507173a 76 {
emilmont 77:869cf507173a 77 CRC_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 78
emilmont 77:869cf507173a 79 HAL_LockTypeDef Lock; /*!< CRC locking object */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 }CRC_HandleTypeDef;
emilmont 77:869cf507173a 84
emilmont 77:869cf507173a 85 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 86 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 87
bogdanm 85:024bf7f99721 88 /** @brief Reset CRC handle state
bogdanm 85:024bf7f99721 89 * @param __HANDLE__: CRC handle
bogdanm 85:024bf7f99721 90 * @retval None
bogdanm 85:024bf7f99721 91 */
bogdanm 85:024bf7f99721 92 #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
bogdanm 85:024bf7f99721 93
emilmont 77:869cf507173a 94 /**
emilmont 77:869cf507173a 95 * @brief Resets CRC Data Register.
emilmont 77:869cf507173a 96 * @param __HANDLE__: CRC handle
emilmont 77:869cf507173a 97 * @retval None
emilmont 77:869cf507173a 98 */
emilmont 77:869cf507173a 99 #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
emilmont 77:869cf507173a 100
Kojto 90:cb3d968589d8 101 /**
Kojto 90:cb3d968589d8 102 * @brief Stores a 8-bit data in the Independent Data(ID) register.
Kojto 90:cb3d968589d8 103 * @param __HANDLE__: CRC handle
Kojto 90:cb3d968589d8 104 * @param __VALUE: 8-bit value to be stored in the ID register
Kojto 90:cb3d968589d8 105 * @retval None
Kojto 90:cb3d968589d8 106 */
Kojto 90:cb3d968589d8 107 #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (MODIFY_REG((__HANDLE__)->Instance->IDR, CRC_IDR_IDR, (__VALUE__))
Kojto 90:cb3d968589d8 108
Kojto 90:cb3d968589d8 109 /**
Kojto 90:cb3d968589d8 110 * @brief Returns the 8-bit data stored in the Independent Data(ID) register.
Kojto 90:cb3d968589d8 111 * @param __HANDLE__: CRC handle
Kojto 90:cb3d968589d8 112 * @retval 8-bit value of the ID register
Kojto 90:cb3d968589d8 113 */
Kojto 90:cb3d968589d8 114 #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
Kojto 90:cb3d968589d8 115
emilmont 77:869cf507173a 116 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 117
emilmont 77:869cf507173a 118 /* Initialization/de-initialization functions **********************************/
emilmont 77:869cf507173a 119 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
emilmont 77:869cf507173a 120 HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
bogdanm 81:7d30d6019079 121 void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
bogdanm 81:7d30d6019079 122 void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
emilmont 77:869cf507173a 123
emilmont 77:869cf507173a 124 /* Peripheral Control functions ************************************************/
emilmont 77:869cf507173a 125 uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
emilmont 77:869cf507173a 126 uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
emilmont 77:869cf507173a 127
emilmont 77:869cf507173a 128 /* Peripheral State functions **************************************************/
emilmont 77:869cf507173a 129 HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 /**
emilmont 77:869cf507173a 132 * @}
emilmont 77:869cf507173a 133 */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 /**
emilmont 77:869cf507173a 136 * @}
emilmont 77:869cf507173a 137 */
emilmont 77:869cf507173a 138
emilmont 77:869cf507173a 139 #ifdef __cplusplus
emilmont 77:869cf507173a 140 }
emilmont 77:869cf507173a 141 #endif
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 #endif /* __STM32F4xx_HAL_CRC_H */
emilmont 77:869cf507173a 144
emilmont 77:869cf507173a 145 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/