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TARGET_NUCLEO_F302R8/stm32f3xx_hal_tim_ex.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
90:cb3d968589d8 
dgdgr

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Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32f3xx_hal_tim_ex.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 12-Sept-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of TIM HAL Extended module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32F3xx_HAL_TIM_EX_H
Kojto 90:cb3d968589d8 40 #define __STM32F3xx_HAL_TIM_EX_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #include "stm32f3xx_hal_def.h"
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 90:cb3d968589d8 50 * @{
Kojto 90:cb3d968589d8 51 */
Kojto 90:cb3d968589d8 52
Kojto 90:cb3d968589d8 53 /** @addtogroup TIMEx
Kojto 90:cb3d968589d8 54 * @{
Kojto 90:cb3d968589d8 55 */
Kojto 90:cb3d968589d8 56
Kojto 90:cb3d968589d8 57 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 58 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
Kojto 90:cb3d968589d8 59 * @{
Kojto 90:cb3d968589d8 60 */
Kojto 90:cb3d968589d8 61
Kojto 90:cb3d968589d8 62 /**
Kojto 90:cb3d968589d8 63 * @brief TIM Hall sensor Configuration Structure definition
Kojto 90:cb3d968589d8 64 */
Kojto 90:cb3d968589d8 65
Kojto 90:cb3d968589d8 66 typedef struct
Kojto 90:cb3d968589d8 67 {
Kojto 90:cb3d968589d8 68
Kojto 90:cb3d968589d8 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
Kojto 90:cb3d968589d8 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto 90:cb3d968589d8 71
Kojto 90:cb3d968589d8 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
Kojto 90:cb3d968589d8 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
Kojto 90:cb3d968589d8 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 90:cb3d968589d8 77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
Kojto 90:cb3d968589d8 78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto 90:cb3d968589d8 79 } TIM_HallSensor_InitTypeDef;
Kojto 90:cb3d968589d8 80
Kojto 90:cb3d968589d8 81 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 90:cb3d968589d8 82 /**
Kojto 90:cb3d968589d8 83 * @brief TIM Master configuration Structure definition
Kojto 90:cb3d968589d8 84 * @note STM32F373xC and STM32F378xx: timer instances provide a single TRGO
Kojto 90:cb3d968589d8 85 * output
Kojto 90:cb3d968589d8 86 */
Kojto 90:cb3d968589d8 87 typedef struct {
Kojto 90:cb3d968589d8 88 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 90:cb3d968589d8 89 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 90:cb3d968589d8 90 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
Kojto 90:cb3d968589d8 91 This parameter can be a value of @ref TIM_Master_Slave_Mode */
Kojto 90:cb3d968589d8 92 }TIM_MasterConfigTypeDef;
Kojto 90:cb3d968589d8 93
Kojto 90:cb3d968589d8 94 /**
Kojto 90:cb3d968589d8 95 * @brief TIM Break and Dead time configuration Structure definition
Kojto 90:cb3d968589d8 96 * @note STM32F373xC and STM32F378xx: single break input with configurable polarity.
Kojto 90:cb3d968589d8 97 */
Kojto 90:cb3d968589d8 98 typedef struct
Kojto 90:cb3d968589d8 99 {
Kojto 90:cb3d968589d8 100 uint32_t OffStateRunMode; /*!< TIM off state in run mode
Kojto 90:cb3d968589d8 101 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 90:cb3d968589d8 102 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
Kojto 90:cb3d968589d8 103 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 90:cb3d968589d8 104 uint32_t LockLevel; /*!< TIM Lock level
Kojto 90:cb3d968589d8 105 This parameter can be a value of @ref TIM_Lock_level */
Kojto 90:cb3d968589d8 106 uint32_t DeadTime; /*!< TIM dead Time
Kojto 90:cb3d968589d8 107 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 90:cb3d968589d8 108 uint32_t BreakState; /*!< TIM Break State
Kojto 90:cb3d968589d8 109 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 90:cb3d968589d8 110 uint32_t BreakPolarity; /*!< TIM Break input polarity
Kojto 90:cb3d968589d8 111 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 90:cb3d968589d8 112 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 90:cb3d968589d8 113 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
Kojto 90:cb3d968589d8 114 } TIM_BreakDeadTimeConfigTypeDef;
Kojto 90:cb3d968589d8 115
Kojto 90:cb3d968589d8 116 #endif /* STM32F373xC || STM32F378xx */
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 119 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 90:cb3d968589d8 120 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 121 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 122 /**
Kojto 90:cb3d968589d8 123 * @brief TIM Break input(s) and Dead time configuration Structure definition
Kojto 90:cb3d968589d8 124 * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
Kojto 90:cb3d968589d8 125 * filter and polarity.
Kojto 90:cb3d968589d8 126 */
Kojto 90:cb3d968589d8 127 typedef struct
Kojto 90:cb3d968589d8 128 {
Kojto 90:cb3d968589d8 129 uint32_t OffStateRunMode; /*!< TIM off state in run mode
Kojto 90:cb3d968589d8 130 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 90:cb3d968589d8 131 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
Kojto 90:cb3d968589d8 132 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 90:cb3d968589d8 133 uint32_t LockLevel; /*!< TIM Lock level
Kojto 90:cb3d968589d8 134 This parameter can be a value of @ref TIM_Lock_level */
Kojto 90:cb3d968589d8 135 uint32_t DeadTime; /*!< TIM dead Time
Kojto 90:cb3d968589d8 136 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 90:cb3d968589d8 137 uint32_t BreakState; /*!< TIM Break State
Kojto 90:cb3d968589d8 138 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 90:cb3d968589d8 139 uint32_t BreakPolarity; /*!< TIM Break input polarity
Kojto 90:cb3d968589d8 140 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 90:cb3d968589d8 141 uint32_t BreakFilter; /*!< Specifies the brek input filter.
Kojto 90:cb3d968589d8 142 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 90:cb3d968589d8 143 uint32_t Break2State; /*!< TIM Break2 State
Kojto 90:cb3d968589d8 144 This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */
Kojto 90:cb3d968589d8 145 uint32_t Break2Polarity; /*!< TIM Break2 input polarity
Kojto 90:cb3d968589d8 146 This parameter can be a value of @ref TIMEx_Break2_Polarity */
Kojto 90:cb3d968589d8 147 uint32_t Break2Filter; /*!< TIM break2 input filter.
Kojto 90:cb3d968589d8 148 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 90:cb3d968589d8 149 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 90:cb3d968589d8 150 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
Kojto 90:cb3d968589d8 151 } TIM_BreakDeadTimeConfigTypeDef;
Kojto 90:cb3d968589d8 152
Kojto 90:cb3d968589d8 153 /**
Kojto 90:cb3d968589d8 154 * @brief TIM Master configuration Structure definition
Kojto 90:cb3d968589d8 155 * @note Advanced timers provide TRGO2 internal line which is redirected
Kojto 90:cb3d968589d8 156 * to the ADC
Kojto 90:cb3d968589d8 157 */
Kojto 90:cb3d968589d8 158 typedef struct {
Kojto 90:cb3d968589d8 159 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 90:cb3d968589d8 160 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 90:cb3d968589d8 161 uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
Kojto 90:cb3d968589d8 162 This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */
Kojto 90:cb3d968589d8 163 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
Kojto 90:cb3d968589d8 164 This parameter can be a value of @ref TIM_Master_Slave_Mode */
Kojto 90:cb3d968589d8 165 }TIM_MasterConfigTypeDef;
Kojto 90:cb3d968589d8 166 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 167 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 90:cb3d968589d8 168 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 169 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 90:cb3d968589d8 170 /**
Kojto 90:cb3d968589d8 171 * @}
Kojto 90:cb3d968589d8 172 */
Kojto 90:cb3d968589d8 173
Kojto 90:cb3d968589d8 174 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 175 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
Kojto 90:cb3d968589d8 176 * @{
Kojto 90:cb3d968589d8 177 */
Kojto 90:cb3d968589d8 178
Kojto 90:cb3d968589d8 179 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 90:cb3d968589d8 180 /** @defgroup TIMEx_Channel TIM Extended Channel
Kojto 90:cb3d968589d8 181 * @{
Kojto 90:cb3d968589d8 182 */
Kojto 90:cb3d968589d8 183 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 184 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto 90:cb3d968589d8 185 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
Kojto 90:cb3d968589d8 186 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
Kojto 90:cb3d968589d8 187 #define TIM_CHANNEL_ALL ((uint32_t)0x0018)
Kojto 90:cb3d968589d8 188
Kojto 90:cb3d968589d8 189 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 190 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 90:cb3d968589d8 191 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 90:cb3d968589d8 192 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 90:cb3d968589d8 193 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 90:cb3d968589d8 194
Kojto 90:cb3d968589d8 195 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 196 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 90:cb3d968589d8 197
Kojto 90:cb3d968589d8 198 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 199 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 90:cb3d968589d8 200
Kojto 90:cb3d968589d8 201 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 202 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 90:cb3d968589d8 203 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 90:cb3d968589d8 204 /**
Kojto 90:cb3d968589d8 205 * @}
Kojto 90:cb3d968589d8 206 */
Kojto 90:cb3d968589d8 207
Kojto 90:cb3d968589d8 208 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIM Extended Output Compare and PWM Modes
Kojto 90:cb3d968589d8 209 * @{
Kojto 90:cb3d968589d8 210 */
Kojto 90:cb3d968589d8 211
Kojto 90:cb3d968589d8 212 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 213 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 214 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
Kojto 90:cb3d968589d8 215 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1)
Kojto 90:cb3d968589d8 216 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 217 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M)
Kojto 90:cb3d968589d8 218 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 219 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 220
Kojto 90:cb3d968589d8 221 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
Kojto 90:cb3d968589d8 222 ((MODE) == TIM_OCMODE_PWM2))
Kojto 90:cb3d968589d8 223
Kojto 90:cb3d968589d8 224 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
Kojto 90:cb3d968589d8 225 ((MODE) == TIM_OCMODE_ACTIVE) || \
Kojto 90:cb3d968589d8 226 ((MODE) == TIM_OCMODE_INACTIVE) || \
Kojto 90:cb3d968589d8 227 ((MODE) == TIM_OCMODE_TOGGLE) || \
Kojto 90:cb3d968589d8 228 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
Kojto 90:cb3d968589d8 229 ((MODE) == TIM_OCMODE_FORCED_INACTIVE))
Kojto 90:cb3d968589d8 230 /**
Kojto 90:cb3d968589d8 231 * @}
Kojto 90:cb3d968589d8 232 */
Kojto 90:cb3d968589d8 233
Kojto 90:cb3d968589d8 234 /** @defgroup TIMEx_ClearInput_Source TIM Extended Clear Input Source
Kojto 90:cb3d968589d8 235 * @{
Kojto 90:cb3d968589d8 236 */
Kojto 90:cb3d968589d8 237 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto 90:cb3d968589d8 238 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 239
Kojto 90:cb3d968589d8 240 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \
Kojto 90:cb3d968589d8 241 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
Kojto 90:cb3d968589d8 242 /**
Kojto 90:cb3d968589d8 243 * @}
Kojto 90:cb3d968589d8 244 */
Kojto 90:cb3d968589d8 245
Kojto 90:cb3d968589d8 246 /** @defgroup TIMEx_Slave_Mode TIM Extended Slave Mode
Kojto 90:cb3d968589d8 247 * @{
Kojto 90:cb3d968589d8 248 */
Kojto 90:cb3d968589d8 249
Kojto 90:cb3d968589d8 250 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 251 #define TIM_SLAVEMODE_RESET ((uint16_t)0x0004)
Kojto 90:cb3d968589d8 252 #define TIM_SLAVEMODE_GATED ((uint16_t)0x0005)
Kojto 90:cb3d968589d8 253 #define TIM_SLAVEMODE_TRIGGER ((uint16_t)0x0006)
Kojto 90:cb3d968589d8 254 #define TIM_SLAVEMODE_EXTERNAL1 ((uint16_t)0x0007)
Kojto 90:cb3d968589d8 255
Kojto 90:cb3d968589d8 256 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
Kojto 90:cb3d968589d8 257 ((MODE) == TIM_SLAVEMODE_RESET) || \
Kojto 90:cb3d968589d8 258 ((MODE) == TIM_SLAVEMODE_GATED) || \
Kojto 90:cb3d968589d8 259 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
Kojto 90:cb3d968589d8 260 ((MODE) == TIM_SLAVEMODE_EXTERNAL1))
Kojto 90:cb3d968589d8 261 /**
Kojto 90:cb3d968589d8 262 * @}
Kojto 90:cb3d968589d8 263 */
Kojto 90:cb3d968589d8 264
Kojto 90:cb3d968589d8 265 /** @defgroup TIMEx_Event_Source TIM Extended Event Source
Kojto 90:cb3d968589d8 266 * @{
Kojto 90:cb3d968589d8 267 */
Kojto 90:cb3d968589d8 268
Kojto 90:cb3d968589d8 269 #define TIM_EventSource_Update TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 90:cb3d968589d8 270 #define TIM_EventSource_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 90:cb3d968589d8 271 #define TIM_EventSource_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 90:cb3d968589d8 272 #define TIM_EventSource_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 90:cb3d968589d8 273 #define TIM_EventSource_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 90:cb3d968589d8 274 #define TIM_EventSource_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 90:cb3d968589d8 275 #define TIM_EventSource_Trigger TIM_EGR_TG /*!< A trigger event is generated */
Kojto 90:cb3d968589d8 276 #define TIM_EventSource_Break TIM_EGR_BG /*!< A break event is generated */
Kojto 90:cb3d968589d8 277 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 90:cb3d968589d8 278
Kojto 90:cb3d968589d8 279 /**
Kojto 90:cb3d968589d8 280 * @}
Kojto 90:cb3d968589d8 281 */
Kojto 90:cb3d968589d8 282
Kojto 90:cb3d968589d8 283 /** @defgroup TIMEx_DMA_Base_address TIM Extended DMA BAse Address
Kojto 90:cb3d968589d8 284 * @{
Kojto 90:cb3d968589d8 285 */
Kojto 90:cb3d968589d8 286
Kojto 90:cb3d968589d8 287 #define TIM_DMABase_CR1 (0x00000000)
Kojto 90:cb3d968589d8 288 #define TIM_DMABase_CR2 (0x00000001)
Kojto 90:cb3d968589d8 289 #define TIM_DMABase_SMCR (0x00000002)
Kojto 90:cb3d968589d8 290 #define TIM_DMABase_DIER (0x00000003)
Kojto 90:cb3d968589d8 291 #define TIM_DMABase_SR (0x00000004)
Kojto 90:cb3d968589d8 292 #define TIM_DMABase_EGR (0x00000005)
Kojto 90:cb3d968589d8 293 #define TIM_DMABase_CCMR1 (0x00000006)
Kojto 90:cb3d968589d8 294 #define TIM_DMABase_CCMR2 (0x00000007)
Kojto 90:cb3d968589d8 295 #define TIM_DMABase_CCER (0x00000008)
Kojto 90:cb3d968589d8 296 #define TIM_DMABase_CNT (0x00000009)
Kojto 90:cb3d968589d8 297 #define TIM_DMABase_PSC (0x0000000A)
Kojto 90:cb3d968589d8 298 #define TIM_DMABase_ARR (0x0000000B)
Kojto 90:cb3d968589d8 299 #define TIM_DMABase_RCR (0x0000000C)
Kojto 90:cb3d968589d8 300 #define TIM_DMABase_CCR1 (0x0000000D)
Kojto 90:cb3d968589d8 301 #define TIM_DMABase_CCR2 (0x0000000E)
Kojto 90:cb3d968589d8 302 #define TIM_DMABase_CCR3 (0x0000000F)
Kojto 90:cb3d968589d8 303 #define TIM_DMABase_CCR4 (0x00000010)
Kojto 90:cb3d968589d8 304 #define TIM_DMABase_BDTR (0x00000011)
Kojto 90:cb3d968589d8 305 #define TIM_DMABase_DCR (0x00000012)
Kojto 90:cb3d968589d8 306 #define TIM_DMABase_OR (0x00000013)
Kojto 90:cb3d968589d8 307 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
Kojto 90:cb3d968589d8 308 ((BASE) == TIM_DMABase_CR2) || \
Kojto 90:cb3d968589d8 309 ((BASE) == TIM_DMABase_SMCR) || \
Kojto 90:cb3d968589d8 310 ((BASE) == TIM_DMABase_DIER) || \
Kojto 90:cb3d968589d8 311 ((BASE) == TIM_DMABase_SR) || \
Kojto 90:cb3d968589d8 312 ((BASE) == TIM_DMABase_EGR) || \
Kojto 90:cb3d968589d8 313 ((BASE) == TIM_DMABase_CCMR1) || \
Kojto 90:cb3d968589d8 314 ((BASE) == TIM_DMABase_CCMR2) || \
Kojto 90:cb3d968589d8 315 ((BASE) == TIM_DMABase_CCER) || \
Kojto 90:cb3d968589d8 316 ((BASE) == TIM_DMABase_CNT) || \
Kojto 90:cb3d968589d8 317 ((BASE) == TIM_DMABase_PSC) || \
Kojto 90:cb3d968589d8 318 ((BASE) == TIM_DMABase_ARR) || \
Kojto 90:cb3d968589d8 319 ((BASE) == TIM_DMABase_RCR) || \
Kojto 90:cb3d968589d8 320 ((BASE) == TIM_DMABase_CCR1) || \
Kojto 90:cb3d968589d8 321 ((BASE) == TIM_DMABase_CCR2) || \
Kojto 90:cb3d968589d8 322 ((BASE) == TIM_DMABase_CCR3) || \
Kojto 90:cb3d968589d8 323 ((BASE) == TIM_DMABase_CCR4) || \
Kojto 90:cb3d968589d8 324 ((BASE) == TIM_DMABase_BDTR) || \
Kojto 90:cb3d968589d8 325 ((BASE) == TIM_DMABase_DCR) || \
Kojto 90:cb3d968589d8 326 ((BASE) == TIM_DMABase_OR))
Kojto 90:cb3d968589d8 327 /**
Kojto 90:cb3d968589d8 328 * @}
Kojto 90:cb3d968589d8 329 */
Kojto 90:cb3d968589d8 330 #endif /* STM32F373xC || STM32F378xx */
Kojto 90:cb3d968589d8 331
Kojto 90:cb3d968589d8 332 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 333 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 90:cb3d968589d8 334 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 335 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 336 /** @defgroup TIMEx_Channel TIM Extended Channel
Kojto 90:cb3d968589d8 337 * @{
Kojto 90:cb3d968589d8 338 */
Kojto 90:cb3d968589d8 339
Kojto 90:cb3d968589d8 340 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 341 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto 90:cb3d968589d8 342 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
Kojto 90:cb3d968589d8 343 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
Kojto 90:cb3d968589d8 344 #define TIM_CHANNEL_5 ((uint32_t)0x0010)
Kojto 90:cb3d968589d8 345 #define TIM_CHANNEL_6 ((uint32_t)0x0014)
Kojto 90:cb3d968589d8 346 #define TIM_CHANNEL_ALL ((uint32_t)0x003C)
Kojto 90:cb3d968589d8 347
Kojto 90:cb3d968589d8 348 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 349 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 90:cb3d968589d8 350 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 90:cb3d968589d8 351 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 90:cb3d968589d8 352 ((CHANNEL) == TIM_CHANNEL_5) || \
Kojto 90:cb3d968589d8 353 ((CHANNEL) == TIM_CHANNEL_6) || \
Kojto 90:cb3d968589d8 354 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 90:cb3d968589d8 355
Kojto 90:cb3d968589d8 356 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 357 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 90:cb3d968589d8 358
Kojto 90:cb3d968589d8 359 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 360 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 90:cb3d968589d8 361
Kojto 90:cb3d968589d8 362 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 90:cb3d968589d8 363 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 90:cb3d968589d8 364 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 90:cb3d968589d8 365 /**
Kojto 90:cb3d968589d8 366 * @}
Kojto 90:cb3d968589d8 367 */
Kojto 90:cb3d968589d8 368
Kojto 90:cb3d968589d8 369 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIM Extended Output Compare and PWM Modes
Kojto 90:cb3d968589d8 370 * @{
Kojto 90:cb3d968589d8 371 */
Kojto 90:cb3d968589d8 372 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 373 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 374 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
Kojto 90:cb3d968589d8 375 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 376 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
Kojto 90:cb3d968589d8 377 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 378 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 379 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 380
Kojto 90:cb3d968589d8 381 #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
Kojto 90:cb3d968589d8 382 #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
Kojto 90:cb3d968589d8 383 #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 384 #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 385 #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
Kojto 90:cb3d968589d8 386 #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
Kojto 90:cb3d968589d8 387
Kojto 90:cb3d968589d8 388 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
Kojto 90:cb3d968589d8 389 ((MODE) == TIM_OCMODE_PWM2) || \
Kojto 90:cb3d968589d8 390 ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \
Kojto 90:cb3d968589d8 391 ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \
Kojto 90:cb3d968589d8 392 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
Kojto 90:cb3d968589d8 393 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2))
Kojto 90:cb3d968589d8 394
Kojto 90:cb3d968589d8 395 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
Kojto 90:cb3d968589d8 396 ((MODE) == TIM_OCMODE_ACTIVE) || \
Kojto 90:cb3d968589d8 397 ((MODE) == TIM_OCMODE_INACTIVE) || \
Kojto 90:cb3d968589d8 398 ((MODE) == TIM_OCMODE_TOGGLE) || \
Kojto 90:cb3d968589d8 399 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
Kojto 90:cb3d968589d8 400 ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \
Kojto 90:cb3d968589d8 401 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
Kojto 90:cb3d968589d8 402 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2))
Kojto 90:cb3d968589d8 403 /**
Kojto 90:cb3d968589d8 404 * @}
Kojto 90:cb3d968589d8 405 */
Kojto 90:cb3d968589d8 406
Kojto 90:cb3d968589d8 407 /** @defgroup TIMEx_ClearInput_Source TIM Extended Clear Input Source
Kojto 90:cb3d968589d8 408 * @{
Kojto 90:cb3d968589d8 409 */
Kojto 90:cb3d968589d8 410 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto 90:cb3d968589d8 411 #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
Kojto 90:cb3d968589d8 412 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 413
Kojto 90:cb3d968589d8 414 #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \
Kojto 90:cb3d968589d8 415 ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
Kojto 90:cb3d968589d8 416 ((MODE) == TIM_CLEARINPUTSOURCE_NONE))
Kojto 90:cb3d968589d8 417 /**
Kojto 90:cb3d968589d8 418 * @}
Kojto 90:cb3d968589d8 419 */
Kojto 90:cb3d968589d8 420
Kojto 90:cb3d968589d8 421 /** @defgroup TIMEx_BreakInput_Filter TIM Extended Break Input Filter
Kojto 90:cb3d968589d8 422 * @{
Kojto 90:cb3d968589d8 423 */
Kojto 90:cb3d968589d8 424
Kojto 90:cb3d968589d8 425 #define IS_TIM_BREAK_FILTER(BRKFILTER) ((BRKFILTER) <= 0xF)
Kojto 90:cb3d968589d8 426 /**
Kojto 90:cb3d968589d8 427 * @}
Kojto 90:cb3d968589d8 428 */
Kojto 90:cb3d968589d8 429
Kojto 90:cb3d968589d8 430 /** @defgroup TIMEx_Break2_Input_enable_disable TIMEX Break input 2 Enable
Kojto 90:cb3d968589d8 431 * @{
Kojto 90:cb3d968589d8 432 */
Kojto 90:cb3d968589d8 433 #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 434 #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
Kojto 90:cb3d968589d8 435
Kojto 90:cb3d968589d8 436 #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \
Kojto 90:cb3d968589d8 437 ((STATE) == TIM_BREAK2_DISABLE))
Kojto 90:cb3d968589d8 438 /**
Kojto 90:cb3d968589d8 439 * @}
Kojto 90:cb3d968589d8 440 */
Kojto 90:cb3d968589d8 441 /** @defgroup TIMEx_Break2_Polarity TIM Extended Break Input 2 Polarity
Kojto 90:cb3d968589d8 442 * @{
Kojto 90:cb3d968589d8 443 */
Kojto 90:cb3d968589d8 444 #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 445 #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
Kojto 90:cb3d968589d8 446
Kojto 90:cb3d968589d8 447 #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_BREAK2POLARITY_LOW) || \
Kojto 90:cb3d968589d8 448 ((POLARITY) == TIM_BREAK2POLARITY_HIGH))
Kojto 90:cb3d968589d8 449 /**
Kojto 90:cb3d968589d8 450 * @}
Kojto 90:cb3d968589d8 451 */
Kojto 90:cb3d968589d8 452
Kojto 90:cb3d968589d8 453 /** @defgroup TIMEx_Master_Mode_Selection_2 TIM Extended Master Mode Selection 2 (TRGO2)
Kojto 90:cb3d968589d8 454 * @{
Kojto 90:cb3d968589d8 455 */
Kojto 90:cb3d968589d8 456 #define TIM_TRGO2_RESET ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 457 #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 458 #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
Kojto 90:cb3d968589d8 459 #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 460 #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
Kojto 90:cb3d968589d8 461 #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 462 #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
Kojto 90:cb3d968589d8 463 #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 464 #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
Kojto 90:cb3d968589d8 465 #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 466 #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
Kojto 90:cb3d968589d8 467 #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 468 #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
Kojto 90:cb3d968589d8 469 #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 470 #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
Kojto 90:cb3d968589d8 471 #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 90:cb3d968589d8 472
Kojto 90:cb3d968589d8 473 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \
Kojto 90:cb3d968589d8 474 ((SOURCE) == TIM_TRGO2_ENABLE) || \
Kojto 90:cb3d968589d8 475 ((SOURCE) == TIM_TRGO2_UPDATE) || \
Kojto 90:cb3d968589d8 476 ((SOURCE) == TIM_TRGO2_OC1) || \
Kojto 90:cb3d968589d8 477 ((SOURCE) == TIM_TRGO2_OC1REF) || \
Kojto 90:cb3d968589d8 478 ((SOURCE) == TIM_TRGO2_OC2REF) || \
Kojto 90:cb3d968589d8 479 ((SOURCE) == TIM_TRGO2_OC3REF) || \
Kojto 90:cb3d968589d8 480 ((SOURCE) == TIM_TRGO2_OC3REF) || \
Kojto 90:cb3d968589d8 481 ((SOURCE) == TIM_TRGO2_OC4REF) || \
Kojto 90:cb3d968589d8 482 ((SOURCE) == TIM_TRGO2_OC5REF) || \
Kojto 90:cb3d968589d8 483 ((SOURCE) == TIM_TRGO2_OC6REF) || \
Kojto 90:cb3d968589d8 484 ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
Kojto 90:cb3d968589d8 485 ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
Kojto 90:cb3d968589d8 486 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
Kojto 90:cb3d968589d8 487 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
Kojto 90:cb3d968589d8 488 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
Kojto 90:cb3d968589d8 489 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
Kojto 90:cb3d968589d8 490 /**
Kojto 90:cb3d968589d8 491 * @}
Kojto 90:cb3d968589d8 492 */
Kojto 90:cb3d968589d8 493
Kojto 90:cb3d968589d8 494 /** @defgroup TIMEx_Slave_Mode TIM Extended Slave mode
Kojto 90:cb3d968589d8 495 * @{
Kojto 90:cb3d968589d8 496 */
Kojto 90:cb3d968589d8 497 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 90:cb3d968589d8 498 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
Kojto 90:cb3d968589d8 499 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
Kojto 90:cb3d968589d8 500 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
Kojto 90:cb3d968589d8 501 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
Kojto 90:cb3d968589d8 502 #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
Kojto 90:cb3d968589d8 503
Kojto 90:cb3d968589d8 504 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
Kojto 90:cb3d968589d8 505 ((MODE) == TIM_SLAVEMODE_RESET) || \
Kojto 90:cb3d968589d8 506 ((MODE) == TIM_SLAVEMODE_GATED) || \
Kojto 90:cb3d968589d8 507 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
Kojto 90:cb3d968589d8 508 ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \
Kojto 90:cb3d968589d8 509 ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
Kojto 90:cb3d968589d8 510 /**
Kojto 90:cb3d968589d8 511 * @}
Kojto 90:cb3d968589d8 512 */
Kojto 90:cb3d968589d8 513
Kojto 90:cb3d968589d8 514 /** @defgroup TIM_Event_Source TIM Extended Event Source
Kojto 90:cb3d968589d8 515 * @{
Kojto 90:cb3d968589d8 516 */
Kojto 90:cb3d968589d8 517
Kojto 90:cb3d968589d8 518 #define TIM_EventSource_Update TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 90:cb3d968589d8 519 #define TIM_EventSource_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 90:cb3d968589d8 520 #define TIM_EventSource_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 90:cb3d968589d8 521 #define TIM_EventSource_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 90:cb3d968589d8 522 #define TIM_EventSource_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 90:cb3d968589d8 523 #define TIM_EventSource_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 90:cb3d968589d8 524 #define TIM_EventSource_Trigger TIM_EGR_TG /*!< A trigger event is generated */
Kojto 90:cb3d968589d8 525 #define TIM_EventSource_Break TIM_EGR_BG /*!< A break event is generated */
Kojto 90:cb3d968589d8 526 #define TIM_EventSource_Break2 TIM_EGR_B2G /*!< A break 2 event is generated */
Kojto 90:cb3d968589d8 527 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFE00) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 90:cb3d968589d8 528
Kojto 90:cb3d968589d8 529 /**
Kojto 90:cb3d968589d8 530 * @}
Kojto 90:cb3d968589d8 531 */
Kojto 90:cb3d968589d8 532
Kojto 90:cb3d968589d8 533 /** @defgroup TIM_DMA_Base_address TIM Extended DMA Base Address
Kojto 90:cb3d968589d8 534 * @{
Kojto 90:cb3d968589d8 535 */
Kojto 90:cb3d968589d8 536
Kojto 90:cb3d968589d8 537 #define TIM_DMABase_CR1 (0x00000000)
Kojto 90:cb3d968589d8 538 #define TIM_DMABase_CR2 (0x00000001)
Kojto 90:cb3d968589d8 539 #define TIM_DMABase_SMCR (0x00000002)
Kojto 90:cb3d968589d8 540 #define TIM_DMABase_DIER (0x00000003)
Kojto 90:cb3d968589d8 541 #define TIM_DMABase_SR (0x00000004)
Kojto 90:cb3d968589d8 542 #define TIM_DMABase_EGR (0x00000005)
Kojto 90:cb3d968589d8 543 #define TIM_DMABase_CCMR1 (0x00000006)
Kojto 90:cb3d968589d8 544 #define TIM_DMABase_CCMR2 (0x00000007)
Kojto 90:cb3d968589d8 545 #define TIM_DMABase_CCER (0x00000008)
Kojto 90:cb3d968589d8 546 #define TIM_DMABase_CNT (0x00000009)
Kojto 90:cb3d968589d8 547 #define TIM_DMABase_PSC (0x0000000A)
Kojto 90:cb3d968589d8 548 #define TIM_DMABase_ARR (0x0000000B)
Kojto 90:cb3d968589d8 549 #define TIM_DMABase_RCR (0x0000000C)
Kojto 90:cb3d968589d8 550 #define TIM_DMABase_CCR1 (0x0000000D)
Kojto 90:cb3d968589d8 551 #define TIM_DMABase_CCR2 (0x0000000E)
Kojto 90:cb3d968589d8 552 #define TIM_DMABase_CCR3 (0x0000000F)
Kojto 90:cb3d968589d8 553 #define TIM_DMABase_CCR4 (0x00000010)
Kojto 90:cb3d968589d8 554 #define TIM_DMABase_BDTR (0x00000011)
Kojto 90:cb3d968589d8 555 #define TIM_DMABase_DCR (0x00000012)
Kojto 90:cb3d968589d8 556 #define TIM_DMABase_CCMR3 (0x00000015)
Kojto 90:cb3d968589d8 557 #define TIM_DMABase_CCR5 (0x00000016)
Kojto 90:cb3d968589d8 558 #define TIM_DMABase_CCR6 (0x00000017)
Kojto 90:cb3d968589d8 559 #define TIM_DMABase_OR (0x00000018)
Kojto 90:cb3d968589d8 560 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
Kojto 90:cb3d968589d8 561 ((BASE) == TIM_DMABase_CR2) || \
Kojto 90:cb3d968589d8 562 ((BASE) == TIM_DMABase_SMCR) || \
Kojto 90:cb3d968589d8 563 ((BASE) == TIM_DMABase_DIER) || \
Kojto 90:cb3d968589d8 564 ((BASE) == TIM_DMABase_SR) || \
Kojto 90:cb3d968589d8 565 ((BASE) == TIM_DMABase_EGR) || \
Kojto 90:cb3d968589d8 566 ((BASE) == TIM_DMABase_CCMR1) || \
Kojto 90:cb3d968589d8 567 ((BASE) == TIM_DMABase_CCMR2) || \
Kojto 90:cb3d968589d8 568 ((BASE) == TIM_DMABase_CCER) || \
Kojto 90:cb3d968589d8 569 ((BASE) == TIM_DMABase_CNT) || \
Kojto 90:cb3d968589d8 570 ((BASE) == TIM_DMABase_PSC) || \
Kojto 90:cb3d968589d8 571 ((BASE) == TIM_DMABase_ARR) || \
Kojto 90:cb3d968589d8 572 ((BASE) == TIM_DMABase_RCR) || \
Kojto 90:cb3d968589d8 573 ((BASE) == TIM_DMABase_CCR1) || \
Kojto 90:cb3d968589d8 574 ((BASE) == TIM_DMABase_CCR2) || \
Kojto 90:cb3d968589d8 575 ((BASE) == TIM_DMABase_CCR3) || \
Kojto 90:cb3d968589d8 576 ((BASE) == TIM_DMABase_CCR4) || \
Kojto 90:cb3d968589d8 577 ((BASE) == TIM_DMABase_BDTR) || \
Kojto 90:cb3d968589d8 578 ((BASE) == TIM_DMABase_CCMR3) || \
Kojto 90:cb3d968589d8 579 ((BASE) == TIM_DMABase_CCR5) || \
Kojto 90:cb3d968589d8 580 ((BASE) == TIM_DMABase_CCR6) || \
Kojto 90:cb3d968589d8 581 ((BASE) == TIM_DMABase_OR))
Kojto 90:cb3d968589d8 582 /**
Kojto 90:cb3d968589d8 583 * @}
Kojto 90:cb3d968589d8 584 */
Kojto 90:cb3d968589d8 585 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 586 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 90:cb3d968589d8 587 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 588 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 90:cb3d968589d8 589
Kojto 90:cb3d968589d8 590 #if defined(STM32F302xE) || \
Kojto 90:cb3d968589d8 591 defined(STM32F302xC) || \
Kojto 90:cb3d968589d8 592 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 593 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 594 /** @defgroup TIMEx_Remap TIM Extended Remapping
Kojto 90:cb3d968589d8 595 * @{
Kojto 90:cb3d968589d8 596 */
Kojto 90:cb3d968589d8 597 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 90:cb3d968589d8 598 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 90:cb3d968589d8 599 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 90:cb3d968589d8 600 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 90:cb3d968589d8 601 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 90:cb3d968589d8 602 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 90:cb3d968589d8 603 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 90:cb3d968589d8 604 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 90:cb3d968589d8 605
Kojto 90:cb3d968589d8 606 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM1_ADC1_NONE) ||\
Kojto 90:cb3d968589d8 607 ((REMAP) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 90:cb3d968589d8 608 ((REMAP) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 90:cb3d968589d8 609 ((REMAP) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 90:cb3d968589d8 610 ((REMAP) == TIM_TIM16_GPIO) ||\
Kojto 90:cb3d968589d8 611 ((REMAP) == TIM_TIM16_RTC) ||\
Kojto 90:cb3d968589d8 612 ((REMAP) == TIM_TIM16_HSE) ||\
Kojto 90:cb3d968589d8 613 ((REMAP) == TIM_TIM16_MCO))
Kojto 90:cb3d968589d8 614 /**
Kojto 90:cb3d968589d8 615 * @}
Kojto 90:cb3d968589d8 616 */
Kojto 90:cb3d968589d8 617 #endif /* STM32F302xE || */
Kojto 90:cb3d968589d8 618 /* STM32F302xC || */
Kojto 90:cb3d968589d8 619 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 620 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
Kojto 90:cb3d968589d8 621
Kojto 90:cb3d968589d8 622 #if defined(STM32F303xC) || defined(STM32F358xx)
Kojto 90:cb3d968589d8 623 /** @defgroup TIMEx_Remap TIM Extended Remapping 1
Kojto 90:cb3d968589d8 624 * @{
Kojto 90:cb3d968589d8 625 */
Kojto 90:cb3d968589d8 626 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 90:cb3d968589d8 627 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 90:cb3d968589d8 628 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 90:cb3d968589d8 629 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 90:cb3d968589d8 630 #define TIM_TIM8_ADC2_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 631 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /* !< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 90:cb3d968589d8 632 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /* !< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 90:cb3d968589d8 633 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /* !< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 90:cb3d968589d8 634 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 90:cb3d968589d8 635 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 90:cb3d968589d8 636 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 90:cb3d968589d8 637 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 90:cb3d968589d8 638
Kojto 90:cb3d968589d8 639 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
Kojto 90:cb3d968589d8 640 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 90:cb3d968589d8 641 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 90:cb3d968589d8 642 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 90:cb3d968589d8 643 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
Kojto 90:cb3d968589d8 644 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
Kojto 90:cb3d968589d8 645 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
Kojto 90:cb3d968589d8 646 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
Kojto 90:cb3d968589d8 647 ((REMAP1) == TIM_TIM16_GPIO) ||\
Kojto 90:cb3d968589d8 648 ((REMAP1) == TIM_TIM16_RTC) ||\
Kojto 90:cb3d968589d8 649 ((REMAP1) == TIM_TIM16_HSE) ||\
Kojto 90:cb3d968589d8 650 ((REMAP1) == TIM_TIM16_MCO))
Kojto 90:cb3d968589d8 651 /**
Kojto 90:cb3d968589d8 652 * @}
Kojto 90:cb3d968589d8 653 */
Kojto 90:cb3d968589d8 654
Kojto 90:cb3d968589d8 655 /** @defgroup TIMEx_Remap2 TIM Extended Remapping 2
Kojto 90:cb3d968589d8 656 * @{
Kojto 90:cb3d968589d8 657 */
Kojto 90:cb3d968589d8 658 #define TIM_TIM1_ADC4_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 90:cb3d968589d8 659 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /* !< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 90:cb3d968589d8 660 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /* !< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 90:cb3d968589d8 661 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /* !< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 90:cb3d968589d8 662 #define TIM_TIM8_ADC3_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 663 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /* !< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 90:cb3d968589d8 664 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /* !< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 90:cb3d968589d8 665 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /* !< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 90:cb3d968589d8 666 #define TIM_TIM16_NONE (0x00000000) /* !< Non significant value for TIM16 */
Kojto 90:cb3d968589d8 667
Kojto 90:cb3d968589d8 668 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
Kojto 90:cb3d968589d8 669 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
Kojto 90:cb3d968589d8 670 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
Kojto 90:cb3d968589d8 671 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
Kojto 90:cb3d968589d8 672 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
Kojto 90:cb3d968589d8 673 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
Kojto 90:cb3d968589d8 674 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
Kojto 90:cb3d968589d8 675 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
Kojto 90:cb3d968589d8 676 ((REMAP2) == TIM_TIM16_NONE))
Kojto 90:cb3d968589d8 677 /**
Kojto 90:cb3d968589d8 678 * @}
Kojto 90:cb3d968589d8 679 */
Kojto 90:cb3d968589d8 680 #endif /* STM32F303xC || STM32F358xx */
Kojto 90:cb3d968589d8 681
Kojto 90:cb3d968589d8 682 #if defined(STM32F303xE) || defined(STM32F398xx)
Kojto 90:cb3d968589d8 683 /** @defgroup TIMEx_Remap TIM Extended Remapping 1
Kojto 90:cb3d968589d8 684 * @{
Kojto 90:cb3d968589d8 685 */
Kojto 90:cb3d968589d8 686 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 90:cb3d968589d8 687 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 90:cb3d968589d8 688 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 90:cb3d968589d8 689 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 90:cb3d968589d8 690 #define TIM_TIM8_ADC2_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 691 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /* !< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 90:cb3d968589d8 692 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /* !< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 90:cb3d968589d8 693 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /* !< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 90:cb3d968589d8 694 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 90:cb3d968589d8 695 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 90:cb3d968589d8 696 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 90:cb3d968589d8 697 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 90:cb3d968589d8 698 #define TIM_TIM20_ADC3_NONE (0x00000000) /* !< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 699 #define TIM_TIM20_ADC3_AWD1 (0x00000001) /* !< TIM20_ETR is connected to ADC3 AWD1 */
Kojto 90:cb3d968589d8 700 #define TIM_TIM20_ADC3_AWD2 (0x00000002) /* !< TIM20_ETR is connected to ADC3 AWD2 */
Kojto 90:cb3d968589d8 701 #define TIM_TIM20_ADC3_AWD3 (0x00000003) /* !< TIM20_ETR is connected to ADC3 AWD3 */
Kojto 90:cb3d968589d8 702
Kojto 90:cb3d968589d8 703 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
Kojto 90:cb3d968589d8 704 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 90:cb3d968589d8 705 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 90:cb3d968589d8 706 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 90:cb3d968589d8 707 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
Kojto 90:cb3d968589d8 708 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
Kojto 90:cb3d968589d8 709 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
Kojto 90:cb3d968589d8 710 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
Kojto 90:cb3d968589d8 711 ((REMAP1) == TIM_TIM16_GPIO) ||\
Kojto 90:cb3d968589d8 712 ((REMAP1) == TIM_TIM16_RTC) ||\
Kojto 90:cb3d968589d8 713 ((REMAP1) == TIM_TIM16_HSE) ||\
Kojto 90:cb3d968589d8 714 ((REMAP1) == TIM_TIM16_MCO) ||\
Kojto 90:cb3d968589d8 715 ((REMAP1) == TIM_TIM20_ADC3_NONE) ||\
Kojto 90:cb3d968589d8 716 ((REMAP1) == TIM_TIM20_ADC3_AWD1) ||\
Kojto 90:cb3d968589d8 717 ((REMAP1) == TIM_TIM20_ADC3_AWD2) ||\
Kojto 90:cb3d968589d8 718 ((REMAP1) == TIM_TIM20_ADC3_AWD3))
Kojto 90:cb3d968589d8 719 /**
Kojto 90:cb3d968589d8 720 * @}
Kojto 90:cb3d968589d8 721 */
Kojto 90:cb3d968589d8 722
Kojto 90:cb3d968589d8 723 /** @defgroup TIMEx_Remap2 TIM Extended Remapping 2
Kojto 90:cb3d968589d8 724 * @{
Kojto 90:cb3d968589d8 725 */
Kojto 90:cb3d968589d8 726 #define TIM_TIM1_ADC4_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 90:cb3d968589d8 727 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /* !< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 90:cb3d968589d8 728 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /* !< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 90:cb3d968589d8 729 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /* !< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 90:cb3d968589d8 730 #define TIM_TIM8_ADC3_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 731 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /* !< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 90:cb3d968589d8 732 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /* !< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 90:cb3d968589d8 733 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /* !< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 90:cb3d968589d8 734 #define TIM_TIM16_NONE (0x00000000) /* !< Non significant value for TIM16 */
Kojto 90:cb3d968589d8 735 #define TIM_TIM20_ADC4_NONE (0x00000000) /* !< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 90:cb3d968589d8 736 #define TIM_TIM20_ADC4_AWD1 (0x00000004) /* !< TIM20_ETR is connected to ADC4 AWD1 */
Kojto 90:cb3d968589d8 737 #define TIM_TIM20_ADC4_AWD2 (0x00000008) /* !< TIM20_ETR is connected to ADC4 AWD2 */
Kojto 90:cb3d968589d8 738 #define TIM_TIM20_ADC4_AWD3 (0x0000000C) /* !< TIM20_ETR is connected to ADC4 AWD3 */
Kojto 90:cb3d968589d8 739
Kojto 90:cb3d968589d8 740 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
Kojto 90:cb3d968589d8 741 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
Kojto 90:cb3d968589d8 742 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
Kojto 90:cb3d968589d8 743 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
Kojto 90:cb3d968589d8 744 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
Kojto 90:cb3d968589d8 745 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
Kojto 90:cb3d968589d8 746 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
Kojto 90:cb3d968589d8 747 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
Kojto 90:cb3d968589d8 748 ((REMAP2) == TIM_TIM16_NONE) ||\
Kojto 90:cb3d968589d8 749 ((REMAP2) == TIM_TIM20_ADC4_NONE) ||\
Kojto 90:cb3d968589d8 750 ((REMAP2) == TIM_TIM20_ADC4_AWD1) ||\
Kojto 90:cb3d968589d8 751 ((REMAP2) == TIM_TIM20_ADC4_AWD2) ||\
Kojto 90:cb3d968589d8 752 ((REMAP2) == TIM_TIM20_ADC4_AWD3))
Kojto 90:cb3d968589d8 753 /**
Kojto 90:cb3d968589d8 754 * @}
Kojto 90:cb3d968589d8 755 */
Kojto 90:cb3d968589d8 756 #endif /* STM32F303xE || STM32F398xx */
Kojto 90:cb3d968589d8 757
Kojto 90:cb3d968589d8 758
Kojto 90:cb3d968589d8 759 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 90:cb3d968589d8 760 /** @defgroup TIMEx_Remap TIM Extended remapping
Kojto 90:cb3d968589d8 761 * @{
Kojto 90:cb3d968589d8 762 */
Kojto 90:cb3d968589d8 763
Kojto 90:cb3d968589d8 764 #define TIM_TIM2_TIM8_TRGO (0x00000000) /*!< TIM8 TRGOUT is connected to TIM2_ITR1 */
Kojto 90:cb3d968589d8 765 #define TIM_TIM2_ETH_PTP (0x00000400) /*!< PTP trigger output is connected to TIM2_ITR1 */
Kojto 90:cb3d968589d8 766 #define TIM_TIM2_USBFS_SOF (0x00000800) /*!< OTG FS SOF is connected to the TIM2_ITR1 input */
Kojto 90:cb3d968589d8 767 #define TIM_TIM2_USBHS_SOF (0x00000C00) /*!< OTG HS SOF is connected to the TIM2_ITR1 input */
Kojto 90:cb3d968589d8 768 #define TIM_TIM14_GPIO (0x00000000) /* !< TIM14 TI1 is connected to GPIO */
Kojto 90:cb3d968589d8 769 #define TIM_TIM14_RTC (0x00000001) /* !< TIM14 TI1 is connected to RTC_clock */
Kojto 90:cb3d968589d8 770 #define TIM_TIM14_HSE (0x00000002) /* !< TIM14 TI1 is connected to HSE/32 */
Kojto 90:cb3d968589d8 771 #define TIM_TIM14_MCO (0x00000003) /* !< TIM14 TI1 is connected to MCO */
Kojto 90:cb3d968589d8 772
Kojto 90:cb3d968589d8 773 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM2_TIM8_TRGO) ||\
Kojto 90:cb3d968589d8 774 ((REMAP) == TIM_TIM2_ETH_PTP) ||\
Kojto 90:cb3d968589d8 775 ((REMAP) == TIM_TIM2_USBFS_SOF) ||\
Kojto 90:cb3d968589d8 776 ((REMAP) == TIM_TIM2_USBHS_SOF) ||\
Kojto 90:cb3d968589d8 777 ((REMAP) == TIM_TIM14_GPIO) ||\
Kojto 90:cb3d968589d8 778 ((REMAP) == TIM_TIM14_RTC) ||\
Kojto 90:cb3d968589d8 779 ((REMAP) == TIM_TIM14_HSE) ||\
Kojto 90:cb3d968589d8 780 ((REMAP) == TIM_TIM14_MCO))
Kojto 90:cb3d968589d8 781
Kojto 90:cb3d968589d8 782 /**
Kojto 90:cb3d968589d8 783 * @}
Kojto 90:cb3d968589d8 784 */
Kojto 90:cb3d968589d8 785 #endif /* STM32F373xC || STM32F378xx */
Kojto 90:cb3d968589d8 786
Kojto 90:cb3d968589d8 787 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 788 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 90:cb3d968589d8 789 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 790 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 791 /** @defgroup TIMEx_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
Kojto 90:cb3d968589d8 792 * @{
Kojto 90:cb3d968589d8 793 */
Kojto 90:cb3d968589d8 794 #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
Kojto 90:cb3d968589d8 795 #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
Kojto 90:cb3d968589d8 796 #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
Kojto 90:cb3d968589d8 797 #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
Kojto 90:cb3d968589d8 798
Kojto 90:cb3d968589d8 799 #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000))
Kojto 90:cb3d968589d8 800 /**
Kojto 90:cb3d968589d8 801 * @}
Kojto 90:cb3d968589d8 802 */
Kojto 90:cb3d968589d8 803 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 804 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 90:cb3d968589d8 805 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 806 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 90:cb3d968589d8 807
Kojto 90:cb3d968589d8 808 /** @defgroup TIM_Clock_Filter TIM Clock Filter
Kojto 90:cb3d968589d8 809 * @{
Kojto 90:cb3d968589d8 810 */
Kojto 90:cb3d968589d8 811 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF)
Kojto 90:cb3d968589d8 812 /**
Kojto 90:cb3d968589d8 813 * @}
Kojto 90:cb3d968589d8 814 */
Kojto 90:cb3d968589d8 815
Kojto 90:cb3d968589d8 816 /**
Kojto 90:cb3d968589d8 817 * @}
Kojto 90:cb3d968589d8 818 */
Kojto 90:cb3d968589d8 819
Kojto 90:cb3d968589d8 820 /* Exported macro ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 821 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
Kojto 90:cb3d968589d8 822 * @{
Kojto 90:cb3d968589d8 823 */
Kojto 90:cb3d968589d8 824
Kojto 90:cb3d968589d8 825 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 90:cb3d968589d8 826 /**
Kojto 90:cb3d968589d8 827 * @brief Sets the TIM Capture Compare Register value on runtime without
Kojto 90:cb3d968589d8 828 * calling another time ConfigChannel function.
Kojto 90:cb3d968589d8 829 * @param __HANDLE__: TIM handle.
Kojto 90:cb3d968589d8 830 * @param __CHANNEL__ : TIM Channels to be configured.
Kojto 90:cb3d968589d8 831 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 832 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto 90:cb3d968589d8 833 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto 90:cb3d968589d8 834 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto 90:cb3d968589d8 835 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto 90:cb3d968589d8 836 * @param __COMPARE__: specifies the Capture Compare register new value.
Kojto 90:cb3d968589d8 837 * @retval None
Kojto 90:cb3d968589d8 838 */
Kojto 90:cb3d968589d8 839 #define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
Kojto 90:cb3d968589d8 840 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
Kojto 90:cb3d968589d8 841
Kojto 90:cb3d968589d8 842 /**
Kojto 90:cb3d968589d8 843 * @brief Gets the TIM Capture Compare Register value on runtime
Kojto 90:cb3d968589d8 844 * @param __HANDLE__: TIM handle.
Kojto 90:cb3d968589d8 845 * @param __CHANNEL__ : TIM Channel associated with the capture compare register
Kojto 90:cb3d968589d8 846 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 847 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
Kojto 90:cb3d968589d8 848 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
Kojto 90:cb3d968589d8 849 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
Kojto 90:cb3d968589d8 850 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
Kojto 90:cb3d968589d8 851 * @retval None
Kojto 90:cb3d968589d8 852 */
Kojto 90:cb3d968589d8 853 #define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
Kojto 90:cb3d968589d8 854 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
Kojto 90:cb3d968589d8 855 #endif /* STM32F373xC || STM32F378xx */
Kojto 90:cb3d968589d8 856
Kojto 90:cb3d968589d8 857 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 858 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 90:cb3d968589d8 859 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 860 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 861 /**
Kojto 90:cb3d968589d8 862 * @brief Sets the TIM Capture Compare Register value on runtime without
Kojto 90:cb3d968589d8 863 * calling another time ConfigChannel function.
Kojto 90:cb3d968589d8 864 * @param __HANDLE__: TIM handle.
Kojto 90:cb3d968589d8 865 * @param __CHANNEL__ : TIM Channels to be configured.
Kojto 90:cb3d968589d8 866 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 867 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto 90:cb3d968589d8 868 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto 90:cb3d968589d8 869 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto 90:cb3d968589d8 870 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto 90:cb3d968589d8 871 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
Kojto 90:cb3d968589d8 872 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
Kojto 90:cb3d968589d8 873 * @param __COMPARE__: specifies the Capture Compare register new value.
Kojto 90:cb3d968589d8 874 * @retval None
Kojto 90:cb3d968589d8 875 */
Kojto 90:cb3d968589d8 876 #define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
Kojto 90:cb3d968589d8 877 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
Kojto 90:cb3d968589d8 878 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
Kojto 90:cb3d968589d8 879 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
Kojto 90:cb3d968589d8 880 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
Kojto 90:cb3d968589d8 881 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
Kojto 90:cb3d968589d8 882 ((__HANDLE__)->Instance->CCR6 |= (__COMPARE__)))
Kojto 90:cb3d968589d8 883
Kojto 90:cb3d968589d8 884 /**
Kojto 90:cb3d968589d8 885 * @brief Gets the TIM Capture Compare Register value on runtime
Kojto 90:cb3d968589d8 886 * @param __HANDLE__: TIM handle.
Kojto 90:cb3d968589d8 887 * @param __CHANNEL__ : TIM Channel associated with the capture compare register
Kojto 90:cb3d968589d8 888 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 889 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
Kojto 90:cb3d968589d8 890 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
Kojto 90:cb3d968589d8 891 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
Kojto 90:cb3d968589d8 892 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
Kojto 90:cb3d968589d8 893 * @arg TIM_CHANNEL_5: get capture/compare 5 register value
Kojto 90:cb3d968589d8 894 * @arg TIM_CHANNEL_6: get capture/compare 6 register value
Kojto 90:cb3d968589d8 895 * @retval None
Kojto 90:cb3d968589d8 896 */
Kojto 90:cb3d968589d8 897 #define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
Kojto 90:cb3d968589d8 898 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
Kojto 90:cb3d968589d8 899 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
Kojto 90:cb3d968589d8 900 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
Kojto 90:cb3d968589d8 901 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
Kojto 90:cb3d968589d8 902 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
Kojto 90:cb3d968589d8 903 ((__HANDLE__)->Instance->CCR6))
Kojto 90:cb3d968589d8 904 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 905 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 90:cb3d968589d8 906 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 907 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 90:cb3d968589d8 908 /**
Kojto 90:cb3d968589d8 909 * @}
Kojto 90:cb3d968589d8 910 */
Kojto 90:cb3d968589d8 911
Kojto 90:cb3d968589d8 912 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 913 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
Kojto 90:cb3d968589d8 914 * @{
Kojto 90:cb3d968589d8 915 */
Kojto 90:cb3d968589d8 916
Kojto 90:cb3d968589d8 917 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
Kojto 90:cb3d968589d8 918 * @brief Timer Hall Sensor functions
Kojto 90:cb3d968589d8 919 * @{
Kojto 90:cb3d968589d8 920 */
Kojto 90:cb3d968589d8 921 /* Timer Hall Sensor functions **********************************************/
Kojto 90:cb3d968589d8 922 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
Kojto 90:cb3d968589d8 923 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 924
Kojto 90:cb3d968589d8 925 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 926 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 927
Kojto 90:cb3d968589d8 928 /* Blocking mode: Polling */
Kojto 90:cb3d968589d8 929 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 930 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 931 /* Non-Blocking mode: Interrupt */
Kojto 90:cb3d968589d8 932 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 933 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 934 /* Non-Blocking mode: DMA */
Kojto 90:cb3d968589d8 935 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
Kojto 90:cb3d968589d8 936 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 937 /**
Kojto 90:cb3d968589d8 938 * @}
Kojto 90:cb3d968589d8 939 */
Kojto 90:cb3d968589d8 940
Kojto 90:cb3d968589d8 941 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
Kojto 90:cb3d968589d8 942 * @brief Timer Complementary Output Compare functions
Kojto 90:cb3d968589d8 943 * @{
Kojto 90:cb3d968589d8 944 */
Kojto 90:cb3d968589d8 945 /* Timer Complementary Output Compare functions *****************************/
Kojto 90:cb3d968589d8 946 /* Blocking mode: Polling */
Kojto 90:cb3d968589d8 947 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 948 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 949
Kojto 90:cb3d968589d8 950 /* Non-Blocking mode: Interrupt */
Kojto 90:cb3d968589d8 951 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 952 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 953
Kojto 90:cb3d968589d8 954 /* Non-Blocking mode: DMA */
Kojto 90:cb3d968589d8 955 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
Kojto 90:cb3d968589d8 956 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 957 /**
Kojto 90:cb3d968589d8 958 * @}
Kojto 90:cb3d968589d8 959 */
Kojto 90:cb3d968589d8 960
Kojto 90:cb3d968589d8 961 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
Kojto 90:cb3d968589d8 962 * @brief Timer Complementary PWM functions
Kojto 90:cb3d968589d8 963 * @{
Kojto 90:cb3d968589d8 964 */
Kojto 90:cb3d968589d8 965 /* Timer Complementary PWM functions ****************************************/
Kojto 90:cb3d968589d8 966 /* Blocking mode: Polling */
Kojto 90:cb3d968589d8 967 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 968 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 969
Kojto 90:cb3d968589d8 970 /* Non-Blocking mode: Interrupt */
Kojto 90:cb3d968589d8 971 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 972 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 973 /* Non-Blocking mode: DMA */
Kojto 90:cb3d968589d8 974 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
Kojto 90:cb3d968589d8 975 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 90:cb3d968589d8 976 /**
Kojto 90:cb3d968589d8 977 * @}
Kojto 90:cb3d968589d8 978 */
Kojto 90:cb3d968589d8 979
Kojto 90:cb3d968589d8 980 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
Kojto 90:cb3d968589d8 981 * @brief Timer Complementary One Pulse functions
Kojto 90:cb3d968589d8 982 * @{
Kojto 90:cb3d968589d8 983 */
Kojto 90:cb3d968589d8 984 /* Timer Complementary One Pulse functions **********************************/
Kojto 90:cb3d968589d8 985 /* Blocking mode: Polling */
Kojto 90:cb3d968589d8 986 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 90:cb3d968589d8 987 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 90:cb3d968589d8 988
Kojto 90:cb3d968589d8 989 /* Non-Blocking mode: Interrupt */
Kojto 90:cb3d968589d8 990 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 90:cb3d968589d8 991 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 90:cb3d968589d8 992 /**
Kojto 90:cb3d968589d8 993 * @}
Kojto 90:cb3d968589d8 994 */
Kojto 90:cb3d968589d8 995
Kojto 90:cb3d968589d8 996 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
Kojto 90:cb3d968589d8 997 * @brief Peripheral Control functions
Kojto 90:cb3d968589d8 998 * @{
Kojto 90:cb3d968589d8 999 */
Kojto 90:cb3d968589d8 1000 /* Extended Control functions ************************************************/
Kojto 90:cb3d968589d8 1001 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 90:cb3d968589d8 1002 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 90:cb3d968589d8 1003 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 90:cb3d968589d8 1004 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
Kojto 90:cb3d968589d8 1005 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
Kojto 90:cb3d968589d8 1006
Kojto 90:cb3d968589d8 1007 #if defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 1008 defined(STM32F303xC) || defined(STM32F358xx)
Kojto 90:cb3d968589d8 1009 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap1, uint32_t Remap2);
Kojto 90:cb3d968589d8 1010 #endif /* STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 1011 /* STM32F303xC || STM32F358xx */
Kojto 90:cb3d968589d8 1012
Kojto 90:cb3d968589d8 1013 #if defined(STM32F302xE) || \
Kojto 90:cb3d968589d8 1014 defined(STM32F302xC) || \
Kojto 90:cb3d968589d8 1015 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 1016 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
Kojto 90:cb3d968589d8 1017 defined(STM32F373xC) || defined(STM32F378xx)
Kojto 90:cb3d968589d8 1018 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
Kojto 90:cb3d968589d8 1019 #endif /* STM32F302xE || */
Kojto 90:cb3d968589d8 1020 /* STM32F302xC || */
Kojto 90:cb3d968589d8 1021 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 1022 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
Kojto 90:cb3d968589d8 1023 /* STM32F373xC || STM32F378xx */
Kojto 90:cb3d968589d8 1024
Kojto 90:cb3d968589d8 1025 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 90:cb3d968589d8 1026 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 90:cb3d968589d8 1027 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 90:cb3d968589d8 1028 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 90:cb3d968589d8 1029 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
Kojto 90:cb3d968589d8 1030 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 90:cb3d968589d8 1031 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 90:cb3d968589d8 1032 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 90:cb3d968589d8 1033 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 90:cb3d968589d8 1034 /**
Kojto 90:cb3d968589d8 1035 * @}
Kojto 90:cb3d968589d8 1036 */
Kojto 90:cb3d968589d8 1037
Kojto 90:cb3d968589d8 1038 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
Kojto 90:cb3d968589d8 1039 * @brief Extended Callbacks functions
Kojto 90:cb3d968589d8 1040 * @{
Kojto 90:cb3d968589d8 1041 */
Kojto 90:cb3d968589d8 1042 /* Extended Callback *********************************************************/
Kojto 90:cb3d968589d8 1043 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 1044 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 1045 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
Kojto 90:cb3d968589d8 1046 /**
Kojto 90:cb3d968589d8 1047 * @}
Kojto 90:cb3d968589d8 1048 */
Kojto 90:cb3d968589d8 1049
Kojto 90:cb3d968589d8 1050 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
Kojto 90:cb3d968589d8 1051 * @brief Extended Peripheral State functions
Kojto 90:cb3d968589d8 1052 * @{
Kojto 90:cb3d968589d8 1053 */
Kojto 90:cb3d968589d8 1054 /* Extended Peripheral State functions **************************************/
Kojto 90:cb3d968589d8 1055 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
Kojto 90:cb3d968589d8 1056 /**
Kojto 90:cb3d968589d8 1057 * @}
Kojto 90:cb3d968589d8 1058 */
Kojto 90:cb3d968589d8 1059
Kojto 90:cb3d968589d8 1060 /**
Kojto 90:cb3d968589d8 1061 * @}
Kojto 90:cb3d968589d8 1062 */
Kojto 90:cb3d968589d8 1063
Kojto 90:cb3d968589d8 1064 /**
Kojto 90:cb3d968589d8 1065 * @}
Kojto 90:cb3d968589d8 1066 */
Kojto 90:cb3d968589d8 1067
Kojto 90:cb3d968589d8 1068 /**
Kojto 90:cb3d968589d8 1069 * @}
Kojto 90:cb3d968589d8 1070 */
Kojto 90:cb3d968589d8 1071
Kojto 90:cb3d968589d8 1072 #ifdef __cplusplus
Kojto 90:cb3d968589d8 1073 }
Kojto 90:cb3d968589d8 1074 #endif
Kojto 90:cb3d968589d8 1075
Kojto 90:cb3d968589d8 1076
Kojto 90:cb3d968589d8 1077 #endif /* __STM32F3xx_HAL_TIM_EX_H */
Kojto 90:cb3d968589d8 1078
Kojto 90:cb3d968589d8 1079 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/