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TARGET_NUCLEO_F302R8/stm32f3xx_hal_spi.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
90:cb3d968589d8 
dgdgr

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Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32f3xx_hal_spi.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 12-Sept-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of SPI HAL module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32F3xx_HAL_SPI_H
Kojto 90:cb3d968589d8 40 #define __STM32F3xx_HAL_SPI_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #include "stm32f3xx_hal_def.h"
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 90:cb3d968589d8 50 * @{
Kojto 90:cb3d968589d8 51 */
Kojto 90:cb3d968589d8 52
Kojto 90:cb3d968589d8 53 /** @addtogroup SPI
Kojto 90:cb3d968589d8 54 * @{
Kojto 90:cb3d968589d8 55 */
Kojto 90:cb3d968589d8 56
Kojto 90:cb3d968589d8 57 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 90:cb3d968589d8 59 * @{
Kojto 90:cb3d968589d8 60 */
Kojto 90:cb3d968589d8 61
Kojto 90:cb3d968589d8 62 /**
Kojto 90:cb3d968589d8 63 * @brief SPI Configuration Structure definition
Kojto 90:cb3d968589d8 64 */
Kojto 90:cb3d968589d8 65 typedef struct
Kojto 90:cb3d968589d8 66 {
Kojto 90:cb3d968589d8 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
Kojto 90:cb3d968589d8 68 This parameter can be a value of @ref SPI_mode */
Kojto 90:cb3d968589d8 69
Kojto 90:cb3d968589d8 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
Kojto 90:cb3d968589d8 71 This parameter can be a value of @ref SPI_Direction */
Kojto 90:cb3d968589d8 72
Kojto 90:cb3d968589d8 73 uint32_t DataSize; /*!< Specifies the SPI data size.
Kojto 90:cb3d968589d8 74 This parameter can be a value of @ref SPI_data_size */
Kojto 90:cb3d968589d8 75
Kojto 90:cb3d968589d8 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
Kojto 90:cb3d968589d8 77 This parameter can be a value of @ref SPI_Clock_Polarity */
Kojto 90:cb3d968589d8 78
Kojto 90:cb3d968589d8 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
Kojto 90:cb3d968589d8 80 This parameter can be a value of @ref SPI_Clock_Phase */
Kojto 90:cb3d968589d8 81
Kojto 90:cb3d968589d8 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
Kojto 90:cb3d968589d8 83 hardware (NSS pin) or by software using the SSI bit.
Kojto 90:cb3d968589d8 84 This parameter can be a value of @ref SPI_Slave_Select_management */
Kojto 90:cb3d968589d8 85
Kojto 90:cb3d968589d8 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
Kojto 90:cb3d968589d8 87 used to configure the transmit and receive SCK clock.
Kojto 90:cb3d968589d8 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
Kojto 90:cb3d968589d8 89 @note The communication clock is derived from the master
Kojto 90:cb3d968589d8 90 clock. The slave clock does not need to be set. */
Kojto 90:cb3d968589d8 91
Kojto 90:cb3d968589d8 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
Kojto 90:cb3d968589d8 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
Kojto 90:cb3d968589d8 94
Kojto 90:cb3d968589d8 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
Kojto 90:cb3d968589d8 96 This parameter can be a value of @ref SPI_TI_mode */
Kojto 90:cb3d968589d8 97
Kojto 90:cb3d968589d8 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
Kojto 90:cb3d968589d8 99 This parameter can be a value of @ref SPI_CRC_Calculation */
Kojto 90:cb3d968589d8 100
Kojto 90:cb3d968589d8 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
Kojto 90:cb3d968589d8 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
Kojto 90:cb3d968589d8 103
Kojto 90:cb3d968589d8 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
Kojto 90:cb3d968589d8 105 CRC Length is only used with Data8 and Data16, not other data size
Kojto 90:cb3d968589d8 106 This parameter must 0 or 1 or 2*/
Kojto 90:cb3d968589d8 107
Kojto 90:cb3d968589d8 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
Kojto 90:cb3d968589d8 109 This mode is activated by the NSSP bit in the SPIx_CR2 register and
Kojto 90:cb3d968589d8 110 it takes effect only if the SPI interface is configured as Motorola SPI
Kojto 90:cb3d968589d8 111 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
Kojto 90:cb3d968589d8 112 CPOL setting is ignored).. */
Kojto 90:cb3d968589d8 113 } SPI_InitTypeDef;
Kojto 90:cb3d968589d8 114
Kojto 90:cb3d968589d8 115 /**
Kojto 90:cb3d968589d8 116 * @brief HAL State structures definition
Kojto 90:cb3d968589d8 117 */
Kojto 90:cb3d968589d8 118 typedef enum
Kojto 90:cb3d968589d8 119 {
Kojto 90:cb3d968589d8 120 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
Kojto 90:cb3d968589d8 121 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
Kojto 90:cb3d968589d8 122 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
Kojto 90:cb3d968589d8 123 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
Kojto 90:cb3d968589d8 124 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
Kojto 90:cb3d968589d8 125 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */
Kojto 90:cb3d968589d8 126 HAL_SPI_STATE_TIMEOUT = 0x06, /*!< Timeout state */
Kojto 90:cb3d968589d8 127 HAL_SPI_STATE_ERROR = 0x07 /*!< Data Transmission and Reception process is ongoing */
Kojto 90:cb3d968589d8 128
Kojto 90:cb3d968589d8 129 }HAL_SPI_StateTypeDef;
Kojto 90:cb3d968589d8 130
Kojto 90:cb3d968589d8 131 /**
Kojto 90:cb3d968589d8 132 * @brief HAL SPI Error Code structure definition
Kojto 90:cb3d968589d8 133 */
Kojto 90:cb3d968589d8 134 typedef enum
Kojto 90:cb3d968589d8 135 {
Kojto 90:cb3d968589d8 136 HAL_SPI_ERROR_NONE = 0x00, /*!< No error */
Kojto 90:cb3d968589d8 137 HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */
Kojto 90:cb3d968589d8 138 HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */
Kojto 90:cb3d968589d8 139 HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */
Kojto 90:cb3d968589d8 140 HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */
Kojto 90:cb3d968589d8 141 HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */
Kojto 90:cb3d968589d8 142 HAL_SPI_ERROR_FLAG = 0x20, /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
Kojto 90:cb3d968589d8 143 HAL_SPI_ERROR_UNKNOW = 0x40, /*!< Unknow Error error */
Kojto 90:cb3d968589d8 144 }HAL_SPI_ErrorTypeDef;
Kojto 90:cb3d968589d8 145
Kojto 90:cb3d968589d8 146 /**
Kojto 90:cb3d968589d8 147 * @brief SPI handle Structure definition
Kojto 90:cb3d968589d8 148 */
Kojto 90:cb3d968589d8 149 typedef struct __SPI_HandleTypeDef
Kojto 90:cb3d968589d8 150 {
Kojto 90:cb3d968589d8 151 SPI_TypeDef *Instance; /* SPI registers base address */
Kojto 90:cb3d968589d8 152
Kojto 90:cb3d968589d8 153 SPI_InitTypeDef Init; /* SPI communication parameters */
Kojto 90:cb3d968589d8 154
Kojto 90:cb3d968589d8 155 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
Kojto 90:cb3d968589d8 156
Kojto 90:cb3d968589d8 157 uint16_t TxXferSize; /* SPI Tx Transfer size */
Kojto 90:cb3d968589d8 158
Kojto 90:cb3d968589d8 159 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
Kojto 90:cb3d968589d8 160
Kojto 90:cb3d968589d8 161 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
Kojto 90:cb3d968589d8 162
Kojto 90:cb3d968589d8 163 uint16_t RxXferSize; /* SPI Rx Transfer size */
Kojto 90:cb3d968589d8 164
Kojto 90:cb3d968589d8 165 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
Kojto 90:cb3d968589d8 166
Kojto 90:cb3d968589d8 167 uint32_t CRCSize; /* SPI CRC size used for the transfer */
Kojto 90:cb3d968589d8 168
Kojto 90:cb3d968589d8 169 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
Kojto 90:cb3d968589d8 170
Kojto 90:cb3d968589d8 171 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
Kojto 90:cb3d968589d8 172
Kojto 90:cb3d968589d8 173 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
Kojto 90:cb3d968589d8 174
Kojto 90:cb3d968589d8 175 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
Kojto 90:cb3d968589d8 176
Kojto 90:cb3d968589d8 177 HAL_LockTypeDef Lock; /* Locking object */
Kojto 90:cb3d968589d8 178
Kojto 90:cb3d968589d8 179 HAL_SPI_StateTypeDef State; /* SPI communication state */
Kojto 90:cb3d968589d8 180
Kojto 90:cb3d968589d8 181 HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */
Kojto 90:cb3d968589d8 182
Kojto 90:cb3d968589d8 183 }SPI_HandleTypeDef;
Kojto 90:cb3d968589d8 184
Kojto 90:cb3d968589d8 185 /**
Kojto 90:cb3d968589d8 186 * @}
Kojto 90:cb3d968589d8 187 */
Kojto 90:cb3d968589d8 188
Kojto 90:cb3d968589d8 189 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 190
Kojto 90:cb3d968589d8 191 /** @defgroup SPI_Exported_Constants SPI Exported Constants
Kojto 90:cb3d968589d8 192 * @{
Kojto 90:cb3d968589d8 193 */
Kojto 90:cb3d968589d8 194
Kojto 90:cb3d968589d8 195 /** @defgroup SPI_mode SPI mode
Kojto 90:cb3d968589d8 196 * @{
Kojto 90:cb3d968589d8 197 */
Kojto 90:cb3d968589d8 198
Kojto 90:cb3d968589d8 199 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 200 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
Kojto 90:cb3d968589d8 201 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 90:cb3d968589d8 202 ((MODE) == SPI_MODE_MASTER))
Kojto 90:cb3d968589d8 203 /**
Kojto 90:cb3d968589d8 204 * @}
Kojto 90:cb3d968589d8 205 */
Kojto 90:cb3d968589d8 206
Kojto 90:cb3d968589d8 207 /** @defgroup SPI_Direction SPI Direction
Kojto 90:cb3d968589d8 208 * @{
Kojto 90:cb3d968589d8 209 */
Kojto 90:cb3d968589d8 210 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 211 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
Kojto 90:cb3d968589d8 212 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
Kojto 90:cb3d968589d8 213
Kojto 90:cb3d968589d8 214 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 90:cb3d968589d8 215 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
Kojto 90:cb3d968589d8 216 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 90:cb3d968589d8 217
Kojto 90:cb3d968589d8 218 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 90:cb3d968589d8 219
Kojto 90:cb3d968589d8 220 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
Kojto 90:cb3d968589d8 221 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 90:cb3d968589d8 222 /**
Kojto 90:cb3d968589d8 223 * @}
Kojto 90:cb3d968589d8 224 */
Kojto 90:cb3d968589d8 225
Kojto 90:cb3d968589d8 226 /** @defgroup SPI_data_size SPI data size
Kojto 90:cb3d968589d8 227 * @{
Kojto 90:cb3d968589d8 228 */
Kojto 90:cb3d968589d8 229
Kojto 90:cb3d968589d8 230 #define SPI_DATASIZE_4BIT ((uint16_t)0x0300)
Kojto 90:cb3d968589d8 231 #define SPI_DATASIZE_5BIT ((uint16_t)0x0400)
Kojto 90:cb3d968589d8 232 #define SPI_DATASIZE_6BIT ((uint16_t)0x0500)
Kojto 90:cb3d968589d8 233 #define SPI_DATASIZE_7BIT ((uint16_t)0x0600)
Kojto 90:cb3d968589d8 234 #define SPI_DATASIZE_8BIT ((uint16_t)0x0700)
Kojto 90:cb3d968589d8 235 #define SPI_DATASIZE_9BIT ((uint16_t)0x0800)
Kojto 90:cb3d968589d8 236 #define SPI_DATASIZE_10BIT ((uint16_t)0x0900)
Kojto 90:cb3d968589d8 237 #define SPI_DATASIZE_11BIT ((uint16_t)0x0A00)
Kojto 90:cb3d968589d8 238 #define SPI_DATASIZE_12BIT ((uint16_t)0x0B00)
Kojto 90:cb3d968589d8 239 #define SPI_DATASIZE_13BIT ((uint16_t)0x0C00)
Kojto 90:cb3d968589d8 240 #define SPI_DATASIZE_14BIT ((uint16_t)0x0D00)
Kojto 90:cb3d968589d8 241 #define SPI_DATASIZE_15BIT ((uint16_t)0x0E00)
Kojto 90:cb3d968589d8 242 #define SPI_DATASIZE_16BIT ((uint16_t)0x0F00)
Kojto 90:cb3d968589d8 243 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 90:cb3d968589d8 244 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
Kojto 90:cb3d968589d8 245 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
Kojto 90:cb3d968589d8 246 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
Kojto 90:cb3d968589d8 247 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
Kojto 90:cb3d968589d8 248 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
Kojto 90:cb3d968589d8 249 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
Kojto 90:cb3d968589d8 250 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
Kojto 90:cb3d968589d8 251 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
Kojto 90:cb3d968589d8 252 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
Kojto 90:cb3d968589d8 253 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
Kojto 90:cb3d968589d8 254 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
Kojto 90:cb3d968589d8 255 ((DATASIZE) == SPI_DATASIZE_4BIT))
Kojto 90:cb3d968589d8 256
Kojto 90:cb3d968589d8 257 /**
Kojto 90:cb3d968589d8 258 * @}
Kojto 90:cb3d968589d8 259 */
Kojto 90:cb3d968589d8 260
Kojto 90:cb3d968589d8 261 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
Kojto 90:cb3d968589d8 262 * @{
Kojto 90:cb3d968589d8 263 */
Kojto 90:cb3d968589d8 264
Kojto 90:cb3d968589d8 265 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 266 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
Kojto 90:cb3d968589d8 267 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 90:cb3d968589d8 268 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 90:cb3d968589d8 269 /**
Kojto 90:cb3d968589d8 270 * @}
Kojto 90:cb3d968589d8 271 */
Kojto 90:cb3d968589d8 272
Kojto 90:cb3d968589d8 273 /** @defgroup SPI_Clock_Phase SPI Clock Phase
Kojto 90:cb3d968589d8 274 * @{
Kojto 90:cb3d968589d8 275 */
Kojto 90:cb3d968589d8 276
Kojto 90:cb3d968589d8 277 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 278 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
Kojto 90:cb3d968589d8 279 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 90:cb3d968589d8 280 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 90:cb3d968589d8 281 /**
Kojto 90:cb3d968589d8 282 * @}
Kojto 90:cb3d968589d8 283 */
Kojto 90:cb3d968589d8 284
Kojto 90:cb3d968589d8 285 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
Kojto 90:cb3d968589d8 286 * @{
Kojto 90:cb3d968589d8 287 */
Kojto 90:cb3d968589d8 288
Kojto 90:cb3d968589d8 289 #define SPI_NSS_SOFT SPI_CR1_SSM
Kojto 90:cb3d968589d8 290 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 291 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
Kojto 90:cb3d968589d8 292 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 90:cb3d968589d8 293 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 90:cb3d968589d8 294 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 90:cb3d968589d8 295
Kojto 90:cb3d968589d8 296 /**
Kojto 90:cb3d968589d8 297 * @}
Kojto 90:cb3d968589d8 298 */
Kojto 90:cb3d968589d8 299
Kojto 90:cb3d968589d8 300
Kojto 90:cb3d968589d8 301 /** @defgroup SPI_NSS SPI NSS pulse management
Kojto 90:cb3d968589d8 302 * @{
Kojto 90:cb3d968589d8 303 */
Kojto 90:cb3d968589d8 304 #define SPI_NSS_PULSE_ENABLED SPI_CR2_NSSP
Kojto 90:cb3d968589d8 305 #define SPI_NSS_PULSE_DISABLED ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 306
Kojto 90:cb3d968589d8 307 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLED) || \
Kojto 90:cb3d968589d8 308 ((NSSP) == SPI_NSS_PULSE_DISABLED))
Kojto 90:cb3d968589d8 309
Kojto 90:cb3d968589d8 310 /**
Kojto 90:cb3d968589d8 311 * @}
Kojto 90:cb3d968589d8 312 */
Kojto 90:cb3d968589d8 313
Kojto 90:cb3d968589d8 314
Kojto 90:cb3d968589d8 315 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
Kojto 90:cb3d968589d8 316 * @{
Kojto 90:cb3d968589d8 317 */
Kojto 90:cb3d968589d8 318
Kojto 90:cb3d968589d8 319 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 320 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
Kojto 90:cb3d968589d8 321 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
Kojto 90:cb3d968589d8 322 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
Kojto 90:cb3d968589d8 323 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
Kojto 90:cb3d968589d8 324 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
Kojto 90:cb3d968589d8 325 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
Kojto 90:cb3d968589d8 326 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
Kojto 90:cb3d968589d8 327 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 90:cb3d968589d8 328 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 90:cb3d968589d8 329 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 90:cb3d968589d8 330 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 90:cb3d968589d8 331 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 90:cb3d968589d8 332 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 90:cb3d968589d8 333 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 90:cb3d968589d8 334 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 90:cb3d968589d8 335 /**
Kojto 90:cb3d968589d8 336 * @}
Kojto 90:cb3d968589d8 337 */
Kojto 90:cb3d968589d8 338
Kojto 90:cb3d968589d8 339 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
Kojto 90:cb3d968589d8 340 * @{
Kojto 90:cb3d968589d8 341 */
Kojto 90:cb3d968589d8 342
Kojto 90:cb3d968589d8 343 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 344 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
Kojto 90:cb3d968589d8 345 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 90:cb3d968589d8 346 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 90:cb3d968589d8 347 /**
Kojto 90:cb3d968589d8 348 * @}
Kojto 90:cb3d968589d8 349 */
Kojto 90:cb3d968589d8 350
Kojto 90:cb3d968589d8 351 /** @defgroup SPI_TI_mode SPI TI mode
Kojto 90:cb3d968589d8 352 * @{
Kojto 90:cb3d968589d8 353 */
Kojto 90:cb3d968589d8 354
Kojto 90:cb3d968589d8 355 #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 356 #define SPI_TIMODE_ENABLED SPI_CR2_FRF
Kojto 90:cb3d968589d8 357 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
Kojto 90:cb3d968589d8 358 ((MODE) == SPI_TIMODE_ENABLED))
Kojto 90:cb3d968589d8 359 /**
Kojto 90:cb3d968589d8 360 * @}
Kojto 90:cb3d968589d8 361 */
Kojto 90:cb3d968589d8 362
Kojto 90:cb3d968589d8 363 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
Kojto 90:cb3d968589d8 364 * @{
Kojto 90:cb3d968589d8 365 */
Kojto 90:cb3d968589d8 366
Kojto 90:cb3d968589d8 367 #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 368 #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
Kojto 90:cb3d968589d8 369 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
Kojto 90:cb3d968589d8 370 ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
Kojto 90:cb3d968589d8 371 /**
Kojto 90:cb3d968589d8 372 * @}
Kojto 90:cb3d968589d8 373 */
Kojto 90:cb3d968589d8 374
Kojto 90:cb3d968589d8 375 /** @defgroup SPI_CRC_length SPI CRC length
Kojto 90:cb3d968589d8 376 * @{
Kojto 90:cb3d968589d8 377 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 378 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
Kojto 90:cb3d968589d8 379 * SPI_CRC_LENGTH_8BIT : CRC 8bit
Kojto 90:cb3d968589d8 380 * SPI_CRC_LENGTH_16BIT : CRC 16bit
Kojto 90:cb3d968589d8 381 */
Kojto 90:cb3d968589d8 382 #define SPI_CRC_LENGTH_DATASIZE 0
Kojto 90:cb3d968589d8 383 #define SPI_CRC_LENGTH_8BIT 1
Kojto 90:cb3d968589d8 384 #define SPI_CRC_LENGTH_16BIT 2
Kojto 90:cb3d968589d8 385 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
Kojto 90:cb3d968589d8 386 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
Kojto 90:cb3d968589d8 387 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
Kojto 90:cb3d968589d8 388 /**
Kojto 90:cb3d968589d8 389 * @}
Kojto 90:cb3d968589d8 390 */
Kojto 90:cb3d968589d8 391
Kojto 90:cb3d968589d8 392 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO reception threshold
Kojto 90:cb3d968589d8 393 * @{
Kojto 90:cb3d968589d8 394 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 395 * SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
Kojto 90:cb3d968589d8 396 * level is greater or equal to 1/2(16-bits).
Kojto 90:cb3d968589d8 397 * SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
Kojto 90:cb3d968589d8 398 * level is greater or equal to 1/4(8 bits).
Kojto 90:cb3d968589d8 399 */
Kojto 90:cb3d968589d8 400 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
Kojto 90:cb3d968589d8 401 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
Kojto 90:cb3d968589d8 402 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x0)
Kojto 90:cb3d968589d8 403
Kojto 90:cb3d968589d8 404 /**
Kojto 90:cb3d968589d8 405 * @}
Kojto 90:cb3d968589d8 406 */
Kojto 90:cb3d968589d8 407
Kojto 90:cb3d968589d8 408 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
Kojto 90:cb3d968589d8 409 * @brief SPI Interrupt definition
Kojto 90:cb3d968589d8 410 * Elements values convention: 0xXXXXXXXX
Kojto 90:cb3d968589d8 411 * - XXXXXXXX : Interrupt control mask
Kojto 90:cb3d968589d8 412 * @{
Kojto 90:cb3d968589d8 413 */
Kojto 90:cb3d968589d8 414 #define SPI_IT_TXE SPI_CR2_TXEIE
Kojto 90:cb3d968589d8 415 #define SPI_IT_RXNE SPI_CR2_RXNEIE
Kojto 90:cb3d968589d8 416 #define SPI_IT_ERR SPI_CR2_ERRIE
Kojto 90:cb3d968589d8 417 #define IS_SPI_IT(IT) (((IT) == SPI_IT_TXE) || \
Kojto 90:cb3d968589d8 418 ((IT) == SPI_IT_RXNE) || \
Kojto 90:cb3d968589d8 419 ((IT) == SPI_IT_ERR))
Kojto 90:cb3d968589d8 420 /**
Kojto 90:cb3d968589d8 421 * @}
Kojto 90:cb3d968589d8 422 */
Kojto 90:cb3d968589d8 423
Kojto 90:cb3d968589d8 424
Kojto 90:cb3d968589d8 425 /** @defgroup SPI_Flag_definition SPI Flag definition
Kojto 90:cb3d968589d8 426 * @brief Flag definition
Kojto 90:cb3d968589d8 427 * Elements values convention: 0xXXXXYYYY
Kojto 90:cb3d968589d8 428 * - XXXX : Flag register Index
Kojto 90:cb3d968589d8 429 * - YYYY : Flag mask
Kojto 90:cb3d968589d8 430 * @{
Kojto 90:cb3d968589d8 431 */
Kojto 90:cb3d968589d8 432 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
Kojto 90:cb3d968589d8 433 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
Kojto 90:cb3d968589d8 434 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
Kojto 90:cb3d968589d8 435 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
Kojto 90:cb3d968589d8 436 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
Kojto 90:cb3d968589d8 437 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
Kojto 90:cb3d968589d8 438 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
Kojto 90:cb3d968589d8 439 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
Kojto 90:cb3d968589d8 440 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
Kojto 90:cb3d968589d8 441 #define IS_SPI_FLAG(FLAG) (((FLAG) == SPI_FLAG_RXNE) || \
Kojto 90:cb3d968589d8 442 ((FLAG) == SPI_FLAG_TXE) || \
Kojto 90:cb3d968589d8 443 ((FLAG) == SPI_FLAG_BSY) || \
Kojto 90:cb3d968589d8 444 ((FLAG) == SPI_FLAG_CRCERR)|| \
Kojto 90:cb3d968589d8 445 ((FLAG) == SPI_FLAG_MODF) || \
Kojto 90:cb3d968589d8 446 ((FLAG) == SPI_FLAG_OVR) || \
Kojto 90:cb3d968589d8 447 ((FLAG) == SPI_FLAG_FTLVL) || \
Kojto 90:cb3d968589d8 448 ((FLAG) == SPI_FLAG_FRLVL) || \
Kojto 90:cb3d968589d8 449 ((FLAG) == SPI_IT_FRE))
Kojto 90:cb3d968589d8 450 /**
Kojto 90:cb3d968589d8 451 * @}
Kojto 90:cb3d968589d8 452 */
Kojto 90:cb3d968589d8 453
Kojto 90:cb3d968589d8 454
Kojto 90:cb3d968589d8 455 /** @defgroup SPI_transmission_fifo_status_level SPI transmission fifo status level
Kojto 90:cb3d968589d8 456 * @{
Kojto 90:cb3d968589d8 457 */
Kojto 90:cb3d968589d8 458
Kojto 90:cb3d968589d8 459 #define SPI_FTLVL_EMPTY ((uint16_t)0x0000)
Kojto 90:cb3d968589d8 460 #define SPI_FTLVL_QUARTER_FULL ((uint16_t)0x0800)
Kojto 90:cb3d968589d8 461 #define SPI_FTLVL_HALF_FULL ((uint16_t)0x1000)
Kojto 90:cb3d968589d8 462 #define SPI_FTLVL_FULL ((uint16_t)0x1800)
Kojto 90:cb3d968589d8 463
Kojto 90:cb3d968589d8 464
Kojto 90:cb3d968589d8 465 /**
Kojto 90:cb3d968589d8 466 * @}
Kojto 90:cb3d968589d8 467 */
Kojto 90:cb3d968589d8 468
Kojto 90:cb3d968589d8 469 /** @defgroup SPI_reception_fifo_status_level SPI reception fifo status level
Kojto 90:cb3d968589d8 470 * @{
Kojto 90:cb3d968589d8 471 */
Kojto 90:cb3d968589d8 472 #define SPI_FRLVL_EMPTY ((uint16_t)0x0000)
Kojto 90:cb3d968589d8 473 #define SPI_FRLVL_QUARTER_FULL ((uint16_t)0x0200)
Kojto 90:cb3d968589d8 474 #define SPI_FRLVL_HALF_FULL ((uint16_t)0x0400)
Kojto 90:cb3d968589d8 475 #define SPI_FRLVL_FULL ((uint16_t)0x0600)
Kojto 90:cb3d968589d8 476
Kojto 90:cb3d968589d8 477 /**
Kojto 90:cb3d968589d8 478 * @}
Kojto 90:cb3d968589d8 479 */
Kojto 90:cb3d968589d8 480
Kojto 90:cb3d968589d8 481 /**
Kojto 90:cb3d968589d8 482 * @}
Kojto 90:cb3d968589d8 483 */
Kojto 90:cb3d968589d8 484
Kojto 90:cb3d968589d8 485
Kojto 90:cb3d968589d8 486 /* Exported macros ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 487 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 90:cb3d968589d8 488 * @{
Kojto 90:cb3d968589d8 489 */
Kojto 90:cb3d968589d8 490
Kojto 90:cb3d968589d8 491 /** @brief Reset SPI handle state
Kojto 90:cb3d968589d8 492 * @param __HANDLE__: SPI handle.
Kojto 90:cb3d968589d8 493 * @retval None
Kojto 90:cb3d968589d8 494 */
Kojto 90:cb3d968589d8 495 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
Kojto 90:cb3d968589d8 496
Kojto 90:cb3d968589d8 497 /** @brief Enables or disables the specified SPI interrupts.
Kojto 90:cb3d968589d8 498 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 499 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 500 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
Kojto 90:cb3d968589d8 501 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 502 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 90:cb3d968589d8 503 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 90:cb3d968589d8 504 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 90:cb3d968589d8 505 * @retval None
Kojto 90:cb3d968589d8 506 */
Kojto 90:cb3d968589d8 507
Kojto 90:cb3d968589d8 508 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
Kojto 90:cb3d968589d8 509 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
Kojto 90:cb3d968589d8 510
Kojto 90:cb3d968589d8 511 /** @brief Checks if the specified SPI interrupt source is enabled or disabled.
Kojto 90:cb3d968589d8 512 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 513 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 514 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
Kojto 90:cb3d968589d8 515 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 516 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
Kojto 90:cb3d968589d8 517 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
Kojto 90:cb3d968589d8 518 * @arg SPI_IT_ERR: Error interrupt enable
Kojto 90:cb3d968589d8 519 * @retval The new state of __IT__ (TRUE or FALSE).
Kojto 90:cb3d968589d8 520 */
Kojto 90:cb3d968589d8 521 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 90:cb3d968589d8 522
Kojto 90:cb3d968589d8 523 /** @brief Checks whether the specified SPI flag is set or not.
Kojto 90:cb3d968589d8 524 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 525 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 526 * @param __FLAG__: specifies the flag to check.
Kojto 90:cb3d968589d8 527 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 528 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
Kojto 90:cb3d968589d8 529 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
Kojto 90:cb3d968589d8 530 * @arg SPI_FLAG_CRCERR: CRC error flag
Kojto 90:cb3d968589d8 531 * @arg SPI_FLAG_MODF: Mode fault flag
Kojto 90:cb3d968589d8 532 * @arg SPI_FLAG_OVR: Overrun flag
Kojto 90:cb3d968589d8 533 * @arg SPI_FLAG_BSY: Busy flag
Kojto 90:cb3d968589d8 534 * @arg SPI_FLAG_FRE: Frame format error flag
Kojto 90:cb3d968589d8 535 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 90:cb3d968589d8 536 */
Kojto 90:cb3d968589d8 537 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
Kojto 90:cb3d968589d8 538
Kojto 90:cb3d968589d8 539 /** @brief Clears the SPI CRCERR pending flag.
Kojto 90:cb3d968589d8 540 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 541 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 542 * @retval None
Kojto 90:cb3d968589d8 543 */
Kojto 90:cb3d968589d8 544 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
Kojto 90:cb3d968589d8 545
Kojto 90:cb3d968589d8 546 /** @brief Clears the SPI MODF pending flag.
Kojto 90:cb3d968589d8 547 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 548 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 549 *
Kojto 90:cb3d968589d8 550 * @retval None
Kojto 90:cb3d968589d8 551 */
Kojto 90:cb3d968589d8 552 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
Kojto 90:cb3d968589d8 553 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0)
Kojto 90:cb3d968589d8 554
Kojto 90:cb3d968589d8 555 /** @brief Clears the SPI OVR pending flag.
Kojto 90:cb3d968589d8 556 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 557 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 558 *
Kojto 90:cb3d968589d8 559 * @retval None
Kojto 90:cb3d968589d8 560 */
Kojto 90:cb3d968589d8 561 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
Kojto 90:cb3d968589d8 562 (__HANDLE__)->Instance->SR;}while(0)
Kojto 90:cb3d968589d8 563
Kojto 90:cb3d968589d8 564 /** @brief Clears the SPI FRE pending flag.
Kojto 90:cb3d968589d8 565 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 566 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 567 *
Kojto 90:cb3d968589d8 568 * @retval None
Kojto 90:cb3d968589d8 569 */
Kojto 90:cb3d968589d8 570 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR)
Kojto 90:cb3d968589d8 571
Kojto 90:cb3d968589d8 572 /** @brief Enables the SPI.
Kojto 90:cb3d968589d8 573 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 574 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 575 * @retval None
Kojto 90:cb3d968589d8 576 */
Kojto 90:cb3d968589d8 577 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
Kojto 90:cb3d968589d8 578
Kojto 90:cb3d968589d8 579 /** @brief Disables the SPI.
Kojto 90:cb3d968589d8 580 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 581 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 582 * @retval None
Kojto 90:cb3d968589d8 583 */
Kojto 90:cb3d968589d8 584 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
Kojto 90:cb3d968589d8 585
Kojto 90:cb3d968589d8 586 /** @brief Sets the SPI transmit-only mode.
Kojto 90:cb3d968589d8 587 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 588 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 589 * @retval None
Kojto 90:cb3d968589d8 590 */
Kojto 90:cb3d968589d8 591 #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 90:cb3d968589d8 592
Kojto 90:cb3d968589d8 593 /** @brief Sets the SPI receive-only mode.
Kojto 90:cb3d968589d8 594 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 595 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 596 * @retval None
Kojto 90:cb3d968589d8 597 */
Kojto 90:cb3d968589d8 598 #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
Kojto 90:cb3d968589d8 599
Kojto 90:cb3d968589d8 600 /** @brief Resets the CRC calculation of the SPI.
Kojto 90:cb3d968589d8 601 * @param __HANDLE__: specifies the SPI Handle.
Kojto 90:cb3d968589d8 602 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
Kojto 90:cb3d968589d8 603 * @retval None
Kojto 90:cb3d968589d8 604 */
Kojto 90:cb3d968589d8 605 #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
Kojto 90:cb3d968589d8 606 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 90:cb3d968589d8 607
Kojto 90:cb3d968589d8 608
Kojto 90:cb3d968589d8 609 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
Kojto 90:cb3d968589d8 610 /**
Kojto 90:cb3d968589d8 611 * @}
Kojto 90:cb3d968589d8 612 */
Kojto 90:cb3d968589d8 613
Kojto 90:cb3d968589d8 614 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 615 /** @addtogroup SPI_Exported_Functions SPI Exported Functions
Kojto 90:cb3d968589d8 616 * @{
Kojto 90:cb3d968589d8 617 */
Kojto 90:cb3d968589d8 618
Kojto 90:cb3d968589d8 619 /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 90:cb3d968589d8 620 * @{
Kojto 90:cb3d968589d8 621 */
Kojto 90:cb3d968589d8 622
Kojto 90:cb3d968589d8 623 /* Initialization and de-initialization functions ****************************/
Kojto 90:cb3d968589d8 624 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 625 HAL_StatusTypeDef HAL_SPI_InitExtended(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 626 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 627 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 628 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 629 /**
Kojto 90:cb3d968589d8 630 * @}
Kojto 90:cb3d968589d8 631 */
Kojto 90:cb3d968589d8 632
Kojto 90:cb3d968589d8 633 /** @addtogroup SPI_Exported_Functions_Group2 Input and Output operation functions
Kojto 90:cb3d968589d8 634 * @{
Kojto 90:cb3d968589d8 635 */
Kojto 90:cb3d968589d8 636
Kojto 90:cb3d968589d8 637 /* IO operation functions *****************************************************/
Kojto 90:cb3d968589d8 638 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 90:cb3d968589d8 639 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
Kojto 90:cb3d968589d8 640 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
Kojto 90:cb3d968589d8 641 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 90:cb3d968589d8 642 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 90:cb3d968589d8 643 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 90:cb3d968589d8 644 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 90:cb3d968589d8 645 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
Kojto 90:cb3d968589d8 646 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
Kojto 90:cb3d968589d8 647 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 648 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 649 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 650 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 651 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 652 /**
Kojto 90:cb3d968589d8 653 * @}
Kojto 90:cb3d968589d8 654 */
Kojto 90:cb3d968589d8 655
Kojto 90:cb3d968589d8 656 /** @addtogroup SPI_Exported_Functions_Group3 Peripheral Control functions
Kojto 90:cb3d968589d8 657 * @{
Kojto 90:cb3d968589d8 658 */
Kojto 90:cb3d968589d8 659
Kojto 90:cb3d968589d8 660 /* Peripheral State and Error functions ***************************************/
Kojto 90:cb3d968589d8 661 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 90:cb3d968589d8 662 /**
Kojto 90:cb3d968589d8 663 * @}
Kojto 90:cb3d968589d8 664 */
Kojto 90:cb3d968589d8 665
Kojto 90:cb3d968589d8 666 /**
Kojto 90:cb3d968589d8 667 * @}
Kojto 90:cb3d968589d8 668 */
Kojto 90:cb3d968589d8 669
Kojto 90:cb3d968589d8 670 /**
Kojto 90:cb3d968589d8 671 * @}
Kojto 90:cb3d968589d8 672 */
Kojto 90:cb3d968589d8 673
Kojto 90:cb3d968589d8 674 /**
Kojto 90:cb3d968589d8 675 * @}
Kojto 90:cb3d968589d8 676 */
Kojto 90:cb3d968589d8 677
Kojto 90:cb3d968589d8 678 #ifdef __cplusplus
Kojto 90:cb3d968589d8 679 }
Kojto 90:cb3d968589d8 680 #endif
Kojto 90:cb3d968589d8 681
Kojto 90:cb3d968589d8 682 #endif /* __STM32F3xx_HAL_SPI_H */
Kojto 90:cb3d968589d8 683
Kojto 90:cb3d968589d8 684 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/