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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_adc_ex.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
92:4fc01daae5a5
Child:
99:dbbf35b96557
dgdgr

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bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_adc.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief Header file of ADC HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
bogdanm 92:4fc01daae5a5 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_ADC_EX_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_ADC_EX_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup ADCEx
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /**
bogdanm 92:4fc01daae5a5 60 * @brief ADC Configuration injected Channel structure definition
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62 typedef struct
bogdanm 92:4fc01daae5a5 63 {
bogdanm 92:4fc01daae5a5 64 uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
bogdanm 92:4fc01daae5a5 65 This parameter can be a value of @ref ADC_channels */
bogdanm 92:4fc01daae5a5 66 uint32_t InjectedRank; /*!< The rank in the injected group sequencer
bogdanm 92:4fc01daae5a5 67 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
bogdanm 92:4fc01daae5a5 68 uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
bogdanm 92:4fc01daae5a5 69 This parameter can be a value of @ref ADC_sampling_times */
bogdanm 92:4fc01daae5a5 70 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
bogdanm 92:4fc01daae5a5 71 This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
bogdanm 92:4fc01daae5a5 72 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
bogdanm 92:4fc01daae5a5 73 injected channel group.
bogdanm 92:4fc01daae5a5 74 This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
bogdanm 92:4fc01daae5a5 75 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
bogdanm 92:4fc01daae5a5 76 conversion after regular one */
bogdanm 92:4fc01daae5a5 77 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
bogdanm 92:4fc01daae5a5 78 This parameter can be set to ENABLE or DISABLE. */
bogdanm 92:4fc01daae5a5 79 uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
bogdanm 92:4fc01daae5a5 80 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
bogdanm 92:4fc01daae5a5 81 uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
bogdanm 92:4fc01daae5a5 82 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
bogdanm 92:4fc01daae5a5 83 }ADC_InjectionConfTypeDef;
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 /**
bogdanm 92:4fc01daae5a5 86 * @brief ADC Configuration multi-mode structure definition
bogdanm 92:4fc01daae5a5 87 */
bogdanm 92:4fc01daae5a5 88 typedef struct
bogdanm 92:4fc01daae5a5 89 {
bogdanm 92:4fc01daae5a5 90 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
bogdanm 92:4fc01daae5a5 91 This parameter can be a value of @ref ADCEx_Common_mode */
bogdanm 92:4fc01daae5a5 92 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
bogdanm 92:4fc01daae5a5 93 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
bogdanm 92:4fc01daae5a5 94 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
bogdanm 92:4fc01daae5a5 95 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
bogdanm 92:4fc01daae5a5 96 }ADC_MultiModeTypeDef;
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 /** @defgroup ADCEx_Exported_Constants
bogdanm 92:4fc01daae5a5 101 * @{
bogdanm 92:4fc01daae5a5 102 */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104
bogdanm 92:4fc01daae5a5 105 /** @defgroup ADCEx_Common_mode
bogdanm 92:4fc01daae5a5 106 * @{
bogdanm 92:4fc01daae5a5 107 */
bogdanm 92:4fc01daae5a5 108 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 109 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
bogdanm 92:4fc01daae5a5 110 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
bogdanm 92:4fc01daae5a5 111 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 112 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
bogdanm 92:4fc01daae5a5 113 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 114 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 115 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 116 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
bogdanm 92:4fc01daae5a5 117 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 118 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
bogdanm 92:4fc01daae5a5 119 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 120 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
bogdanm 92:4fc01daae5a5 123 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
bogdanm 92:4fc01daae5a5 124 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
bogdanm 92:4fc01daae5a5 125 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
bogdanm 92:4fc01daae5a5 126 ((MODE) == ADC_DUALMODE_REGSIMULT) || \
bogdanm 92:4fc01daae5a5 127 ((MODE) == ADC_DUALMODE_INTERL) || \
bogdanm 92:4fc01daae5a5 128 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
bogdanm 92:4fc01daae5a5 129 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
bogdanm 92:4fc01daae5a5 130 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
bogdanm 92:4fc01daae5a5 131 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
bogdanm 92:4fc01daae5a5 132 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
bogdanm 92:4fc01daae5a5 133 ((MODE) == ADC_TRIPLEMODE_INTERL) || \
bogdanm 92:4fc01daae5a5 134 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
bogdanm 92:4fc01daae5a5 135 /**
bogdanm 92:4fc01daae5a5 136 * @}
bogdanm 92:4fc01daae5a5 137 */
bogdanm 92:4fc01daae5a5 138
bogdanm 92:4fc01daae5a5 139 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode
bogdanm 92:4fc01daae5a5 140 * @{
bogdanm 92:4fc01daae5a5 141 */
bogdanm 92:4fc01daae5a5 142 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
bogdanm 92:4fc01daae5a5 143 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
bogdanm 92:4fc01daae5a5 144 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
bogdanm 92:4fc01daae5a5 145 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
bogdanm 92:4fc01daae5a5 146
bogdanm 92:4fc01daae5a5 147 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
bogdanm 92:4fc01daae5a5 148 ((MODE) == ADC_DMAACCESSMODE_1) || \
bogdanm 92:4fc01daae5a5 149 ((MODE) == ADC_DMAACCESSMODE_2) || \
bogdanm 92:4fc01daae5a5 150 ((MODE) == ADC_DMAACCESSMODE_3))
bogdanm 92:4fc01daae5a5 151 /**
bogdanm 92:4fc01daae5a5 152 * @}
bogdanm 92:4fc01daae5a5 153 */
bogdanm 92:4fc01daae5a5 154
bogdanm 92:4fc01daae5a5 155 /** @defgroup ADCEx_External_trigger_edge_Injected
bogdanm 92:4fc01daae5a5 156 * @{
bogdanm 92:4fc01daae5a5 157 */
bogdanm 92:4fc01daae5a5 158 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 159 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
bogdanm 92:4fc01daae5a5 160 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
bogdanm 92:4fc01daae5a5 161 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
bogdanm 92:4fc01daae5a5 162
bogdanm 92:4fc01daae5a5 163 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
bogdanm 92:4fc01daae5a5 164 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
bogdanm 92:4fc01daae5a5 165 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
bogdanm 92:4fc01daae5a5 166 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
bogdanm 92:4fc01daae5a5 167 /**
bogdanm 92:4fc01daae5a5 168 * @}
bogdanm 92:4fc01daae5a5 169 */
bogdanm 92:4fc01daae5a5 170
bogdanm 92:4fc01daae5a5 171 /** @defgroup ADCEx_External_trigger_Source_Injected
bogdanm 92:4fc01daae5a5 172 * @{
bogdanm 92:4fc01daae5a5 173 */
bogdanm 92:4fc01daae5a5 174 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 175 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
bogdanm 92:4fc01daae5a5 176 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
bogdanm 92:4fc01daae5a5 177 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 178 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
bogdanm 92:4fc01daae5a5 179 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 180 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
bogdanm 92:4fc01daae5a5 181 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 182 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
bogdanm 92:4fc01daae5a5 183 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 184 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
bogdanm 92:4fc01daae5a5 185 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 186 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
bogdanm 92:4fc01daae5a5 187 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
bogdanm 92:4fc01daae5a5 188 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
bogdanm 92:4fc01daae5a5 189 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
bogdanm 92:4fc01daae5a5 190
bogdanm 92:4fc01daae5a5 191 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
bogdanm 92:4fc01daae5a5 192 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
bogdanm 92:4fc01daae5a5 193 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
bogdanm 92:4fc01daae5a5 194 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
bogdanm 92:4fc01daae5a5 195 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
bogdanm 92:4fc01daae5a5 196 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
bogdanm 92:4fc01daae5a5 197 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
bogdanm 92:4fc01daae5a5 198 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
bogdanm 92:4fc01daae5a5 199 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
bogdanm 92:4fc01daae5a5 200 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
bogdanm 92:4fc01daae5a5 201 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
bogdanm 92:4fc01daae5a5 202 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
bogdanm 92:4fc01daae5a5 203 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
bogdanm 92:4fc01daae5a5 204 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
bogdanm 92:4fc01daae5a5 205 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
bogdanm 92:4fc01daae5a5 206 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15))
bogdanm 92:4fc01daae5a5 207 /**
bogdanm 92:4fc01daae5a5 208 * @}
bogdanm 92:4fc01daae5a5 209 */
bogdanm 92:4fc01daae5a5 210
bogdanm 92:4fc01daae5a5 211 /** @defgroup ADCEx_injected_channel_selection
bogdanm 92:4fc01daae5a5 212 * @{
bogdanm 92:4fc01daae5a5 213 */
bogdanm 92:4fc01daae5a5 214 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
bogdanm 92:4fc01daae5a5 215 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
bogdanm 92:4fc01daae5a5 216 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
bogdanm 92:4fc01daae5a5 217 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
bogdanm 92:4fc01daae5a5 218
bogdanm 92:4fc01daae5a5 219 /**
bogdanm 92:4fc01daae5a5 220 * @}
bogdanm 92:4fc01daae5a5 221 */
bogdanm 92:4fc01daae5a5 222
bogdanm 92:4fc01daae5a5 223 /** @defgroup ADCEx_injected_length
bogdanm 92:4fc01daae5a5 224 * @{
bogdanm 92:4fc01daae5a5 225 */
bogdanm 92:4fc01daae5a5 226 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
bogdanm 92:4fc01daae5a5 227 /**
bogdanm 92:4fc01daae5a5 228 * @}
bogdanm 92:4fc01daae5a5 229 */
bogdanm 92:4fc01daae5a5 230
bogdanm 92:4fc01daae5a5 231 /** @defgroup ADCEx_injected_rank
bogdanm 92:4fc01daae5a5 232 * @{
bogdanm 92:4fc01daae5a5 233 */
bogdanm 92:4fc01daae5a5 234 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
bogdanm 92:4fc01daae5a5 235 /**
bogdanm 92:4fc01daae5a5 236 * @}
bogdanm 92:4fc01daae5a5 237 */
bogdanm 92:4fc01daae5a5 238
bogdanm 92:4fc01daae5a5 239 /**
bogdanm 92:4fc01daae5a5 240 * @}
bogdanm 92:4fc01daae5a5 241 */
bogdanm 92:4fc01daae5a5 242
bogdanm 92:4fc01daae5a5 243 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 244
bogdanm 92:4fc01daae5a5 245 /**
bogdanm 92:4fc01daae5a5 246 * @brief Set the selected injected Channel rank.
bogdanm 92:4fc01daae5a5 247 * @param _CHANNELNB_: Channel number.
bogdanm 92:4fc01daae5a5 248 * @param _RANKNB_: Rank number.
bogdanm 92:4fc01daae5a5 249 * @param _JSQR_JL_: Sequence length.
bogdanm 92:4fc01daae5a5 250 * @retval None
bogdanm 92:4fc01daae5a5 251 */
bogdanm 92:4fc01daae5a5 252 #define __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \
bogdanm 92:4fc01daae5a5 253 ((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
bogdanm 92:4fc01daae5a5 254
bogdanm 92:4fc01daae5a5 255 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 256
bogdanm 92:4fc01daae5a5 257 /* I/O operation functions ******************************************************/
bogdanm 92:4fc01daae5a5 258 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 259 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 260 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 261 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 262 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 263 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
bogdanm 92:4fc01daae5a5 264 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
bogdanm 92:4fc01daae5a5 265 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 266 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 267 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
bogdanm 92:4fc01daae5a5 268
bogdanm 92:4fc01daae5a5 269 /* Peripheral Control functions *************************************************/
bogdanm 92:4fc01daae5a5 270 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
bogdanm 92:4fc01daae5a5 271 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
bogdanm 92:4fc01daae5a5 272
bogdanm 92:4fc01daae5a5 273 /**
bogdanm 92:4fc01daae5a5 274 * @}
bogdanm 92:4fc01daae5a5 275 */
bogdanm 92:4fc01daae5a5 276
bogdanm 92:4fc01daae5a5 277 /**
bogdanm 92:4fc01daae5a5 278 * @}
bogdanm 92:4fc01daae5a5 279 */
bogdanm 92:4fc01daae5a5 280
bogdanm 92:4fc01daae5a5 281 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 282 }
bogdanm 92:4fc01daae5a5 283 #endif
bogdanm 92:4fc01daae5a5 284
bogdanm 92:4fc01daae5a5 285 #endif /*__STM32F4xx_ADC_EX_H */
bogdanm 92:4fc01daae5a5 286
bogdanm 92:4fc01daae5a5 287
bogdanm 92:4fc01daae5a5 288 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/