Ricardo Benitez / mbed

meh

Fork of mbed by mbed official

TARGET_LPC11U35_401/core_cmInstr.h@118:16969dd821af, 2016-04-05 (annotated)

Committer:
ricardobtez
Date:
Tue Apr 05 23:51:21 2016 +0000
Revision:
118:16969dd821af
Parent:
74:a842253909c9
Child:
110:165afa46840b
dgdgr

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 74:a842253909c9 1 /**************************************************************************//**
bogdanm 74:a842253909c9 2 * @file core_cmInstr.h
bogdanm 74:a842253909c9 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
bogdanm 74:a842253909c9 4 * @version V3.20
bogdanm 74:a842253909c9 5 * @date 05. March 2013
bogdanm 74:a842253909c9 6 *
bogdanm 74:a842253909c9 7 * @note
bogdanm 74:a842253909c9 8 *
bogdanm 74:a842253909c9 9 ******************************************************************************/
bogdanm 74:a842253909c9 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 74:a842253909c9 11
bogdanm 74:a842253909c9 12 All rights reserved.
bogdanm 74:a842253909c9 13 Redistribution and use in source and binary forms, with or without
bogdanm 74:a842253909c9 14 modification, are permitted provided that the following conditions are met:
bogdanm 74:a842253909c9 15 - Redistributions of source code must retain the above copyright
bogdanm 74:a842253909c9 16 notice, this list of conditions and the following disclaimer.
bogdanm 74:a842253909c9 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 74:a842253909c9 18 notice, this list of conditions and the following disclaimer in the
bogdanm 74:a842253909c9 19 documentation and/or other materials provided with the distribution.
bogdanm 74:a842253909c9 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 74:a842253909c9 21 to endorse or promote products derived from this software without
bogdanm 74:a842253909c9 22 specific prior written permission.
bogdanm 74:a842253909c9 23 *
bogdanm 74:a842253909c9 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 74:a842253909c9 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 74:a842253909c9 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 74:a842253909c9 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 74:a842253909c9 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 74:a842253909c9 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 74:a842253909c9 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 74:a842253909c9 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 74:a842253909c9 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 74:a842253909c9 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 74:a842253909c9 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 74:a842253909c9 35 ---------------------------------------------------------------------------*/
bogdanm 74:a842253909c9 36
bogdanm 74:a842253909c9 37
bogdanm 74:a842253909c9 38 #ifndef __CORE_CMINSTR_H
bogdanm 74:a842253909c9 39 #define __CORE_CMINSTR_H
bogdanm 74:a842253909c9 40
bogdanm 74:a842253909c9 41
bogdanm 74:a842253909c9 42 /* ########################## Core Instruction Access ######################### */
bogdanm 74:a842253909c9 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
bogdanm 74:a842253909c9 44 Access to dedicated instructions
bogdanm 74:a842253909c9 45 @{
bogdanm 74:a842253909c9 46 */
bogdanm 74:a842253909c9 47
bogdanm 74:a842253909c9 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 74:a842253909c9 49 /* ARM armcc specific functions */
bogdanm 74:a842253909c9 50
bogdanm 74:a842253909c9 51 #if (__ARMCC_VERSION < 400677)
bogdanm 74:a842253909c9 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 74:a842253909c9 53 #endif
bogdanm 74:a842253909c9 54
bogdanm 74:a842253909c9 55
bogdanm 74:a842253909c9 56 /** \brief No Operation
bogdanm 74:a842253909c9 57
bogdanm 74:a842253909c9 58 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 74:a842253909c9 59 */
bogdanm 74:a842253909c9 60 #define __NOP __nop
bogdanm 74:a842253909c9 61
bogdanm 74:a842253909c9 62
bogdanm 74:a842253909c9 63 /** \brief Wait For Interrupt
bogdanm 74:a842253909c9 64
bogdanm 74:a842253909c9 65 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 74:a842253909c9 66 until one of a number of events occurs.
bogdanm 74:a842253909c9 67 */
bogdanm 74:a842253909c9 68 #define __WFI __wfi
bogdanm 74:a842253909c9 69
bogdanm 74:a842253909c9 70
bogdanm 74:a842253909c9 71 /** \brief Wait For Event
bogdanm 74:a842253909c9 72
bogdanm 74:a842253909c9 73 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 74:a842253909c9 74 a low-power state until one of a number of events occurs.
bogdanm 74:a842253909c9 75 */
bogdanm 74:a842253909c9 76 #define __WFE __wfe
bogdanm 74:a842253909c9 77
bogdanm 74:a842253909c9 78
bogdanm 74:a842253909c9 79 /** \brief Send Event
bogdanm 74:a842253909c9 80
bogdanm 74:a842253909c9 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 74:a842253909c9 82 */
bogdanm 74:a842253909c9 83 #define __SEV __sev
bogdanm 74:a842253909c9 84
bogdanm 74:a842253909c9 85
bogdanm 74:a842253909c9 86 /** \brief Instruction Synchronization Barrier
bogdanm 74:a842253909c9 87
bogdanm 74:a842253909c9 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 74:a842253909c9 89 so that all instructions following the ISB are fetched from cache or
bogdanm 74:a842253909c9 90 memory, after the instruction has been completed.
bogdanm 74:a842253909c9 91 */
bogdanm 74:a842253909c9 92 #define __ISB() __isb(0xF)
bogdanm 74:a842253909c9 93
bogdanm 74:a842253909c9 94
bogdanm 74:a842253909c9 95 /** \brief Data Synchronization Barrier
bogdanm 74:a842253909c9 96
bogdanm 74:a842253909c9 97 This function acts as a special kind of Data Memory Barrier.
bogdanm 74:a842253909c9 98 It completes when all explicit memory accesses before this instruction complete.
bogdanm 74:a842253909c9 99 */
bogdanm 74:a842253909c9 100 #define __DSB() __dsb(0xF)
bogdanm 74:a842253909c9 101
bogdanm 74:a842253909c9 102
bogdanm 74:a842253909c9 103 /** \brief Data Memory Barrier
bogdanm 74:a842253909c9 104
bogdanm 74:a842253909c9 105 This function ensures the apparent order of the explicit memory operations before
bogdanm 74:a842253909c9 106 and after the instruction, without ensuring their completion.
bogdanm 74:a842253909c9 107 */
bogdanm 74:a842253909c9 108 #define __DMB() __dmb(0xF)
bogdanm 74:a842253909c9 109
bogdanm 74:a842253909c9 110
bogdanm 74:a842253909c9 111 /** \brief Reverse byte order (32 bit)
bogdanm 74:a842253909c9 112
bogdanm 74:a842253909c9 113 This function reverses the byte order in integer value.
bogdanm 74:a842253909c9 114
bogdanm 74:a842253909c9 115 \param [in] value Value to reverse
bogdanm 74:a842253909c9 116 \return Reversed value
bogdanm 74:a842253909c9 117 */
bogdanm 74:a842253909c9 118 #define __REV __rev
bogdanm 74:a842253909c9 119
bogdanm 74:a842253909c9 120
bogdanm 74:a842253909c9 121 /** \brief Reverse byte order (16 bit)
bogdanm 74:a842253909c9 122
bogdanm 74:a842253909c9 123 This function reverses the byte order in two unsigned short values.
bogdanm 74:a842253909c9 124
bogdanm 74:a842253909c9 125 \param [in] value Value to reverse
bogdanm 74:a842253909c9 126 \return Reversed value
bogdanm 74:a842253909c9 127 */
bogdanm 74:a842253909c9 128 #ifndef __NO_EMBEDDED_ASM
bogdanm 74:a842253909c9 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
bogdanm 74:a842253909c9 130 {
bogdanm 74:a842253909c9 131 rev16 r0, r0
bogdanm 74:a842253909c9 132 bx lr
bogdanm 74:a842253909c9 133 }
bogdanm 74:a842253909c9 134 #endif
bogdanm 74:a842253909c9 135
bogdanm 74:a842253909c9 136 /** \brief Reverse byte order in signed short value
bogdanm 74:a842253909c9 137
bogdanm 74:a842253909c9 138 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 74:a842253909c9 139
bogdanm 74:a842253909c9 140 \param [in] value Value to reverse
bogdanm 74:a842253909c9 141 \return Reversed value
bogdanm 74:a842253909c9 142 */
bogdanm 74:a842253909c9 143 #ifndef __NO_EMBEDDED_ASM
bogdanm 74:a842253909c9 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
bogdanm 74:a842253909c9 145 {
bogdanm 74:a842253909c9 146 revsh r0, r0
bogdanm 74:a842253909c9 147 bx lr
bogdanm 74:a842253909c9 148 }
bogdanm 74:a842253909c9 149 #endif
bogdanm 74:a842253909c9 150
bogdanm 74:a842253909c9 151
bogdanm 74:a842253909c9 152 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 74:a842253909c9 153
bogdanm 74:a842253909c9 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 74:a842253909c9 155
bogdanm 74:a842253909c9 156 \param [in] value Value to rotate
bogdanm 74:a842253909c9 157 \param [in] value Number of Bits to rotate
bogdanm 74:a842253909c9 158 \return Rotated value
bogdanm 74:a842253909c9 159 */
bogdanm 74:a842253909c9 160 #define __ROR __ror
bogdanm 74:a842253909c9 161
bogdanm 74:a842253909c9 162
bogdanm 74:a842253909c9 163 /** \brief Breakpoint
bogdanm 74:a842253909c9 164
bogdanm 74:a842253909c9 165 This function causes the processor to enter Debug state.
bogdanm 74:a842253909c9 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 74:a842253909c9 167
bogdanm 74:a842253909c9 168 \param [in] value is ignored by the processor.
bogdanm 74:a842253909c9 169 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 74:a842253909c9 170 */
bogdanm 74:a842253909c9 171 #define __BKPT(value) __breakpoint(value)
bogdanm 74:a842253909c9 172
bogdanm 74:a842253909c9 173
bogdanm 74:a842253909c9 174 #if (__CORTEX_M >= 0x03)
bogdanm 74:a842253909c9 175
bogdanm 74:a842253909c9 176 /** \brief Reverse bit order of value
bogdanm 74:a842253909c9 177
bogdanm 74:a842253909c9 178 This function reverses the bit order of the given value.
bogdanm 74:a842253909c9 179
bogdanm 74:a842253909c9 180 \param [in] value Value to reverse
bogdanm 74:a842253909c9 181 \return Reversed value
bogdanm 74:a842253909c9 182 */
bogdanm 74:a842253909c9 183 #define __RBIT __rbit
bogdanm 74:a842253909c9 184
bogdanm 74:a842253909c9 185
bogdanm 74:a842253909c9 186 /** \brief LDR Exclusive (8 bit)
bogdanm 74:a842253909c9 187
bogdanm 74:a842253909c9 188 This function performs a exclusive LDR command for 8 bit value.
bogdanm 74:a842253909c9 189
bogdanm 74:a842253909c9 190 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 191 \return value of type uint8_t at (*ptr)
bogdanm 74:a842253909c9 192 */
bogdanm 74:a842253909c9 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
bogdanm 74:a842253909c9 194
bogdanm 74:a842253909c9 195
bogdanm 74:a842253909c9 196 /** \brief LDR Exclusive (16 bit)
bogdanm 74:a842253909c9 197
bogdanm 74:a842253909c9 198 This function performs a exclusive LDR command for 16 bit values.
bogdanm 74:a842253909c9 199
bogdanm 74:a842253909c9 200 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 201 \return value of type uint16_t at (*ptr)
bogdanm 74:a842253909c9 202 */
bogdanm 74:a842253909c9 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
bogdanm 74:a842253909c9 204
bogdanm 74:a842253909c9 205
bogdanm 74:a842253909c9 206 /** \brief LDR Exclusive (32 bit)
bogdanm 74:a842253909c9 207
bogdanm 74:a842253909c9 208 This function performs a exclusive LDR command for 32 bit values.
bogdanm 74:a842253909c9 209
bogdanm 74:a842253909c9 210 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 211 \return value of type uint32_t at (*ptr)
bogdanm 74:a842253909c9 212 */
bogdanm 74:a842253909c9 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
bogdanm 74:a842253909c9 214
bogdanm 74:a842253909c9 215
bogdanm 74:a842253909c9 216 /** \brief STR Exclusive (8 bit)
bogdanm 74:a842253909c9 217
bogdanm 74:a842253909c9 218 This function performs a exclusive STR command for 8 bit values.
bogdanm 74:a842253909c9 219
bogdanm 74:a842253909c9 220 \param [in] value Value to store
bogdanm 74:a842253909c9 221 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 222 \return 0 Function succeeded
bogdanm 74:a842253909c9 223 \return 1 Function failed
bogdanm 74:a842253909c9 224 */
bogdanm 74:a842253909c9 225 #define __STREXB(value, ptr) __strex(value, ptr)
bogdanm 74:a842253909c9 226
bogdanm 74:a842253909c9 227
bogdanm 74:a842253909c9 228 /** \brief STR Exclusive (16 bit)
bogdanm 74:a842253909c9 229
bogdanm 74:a842253909c9 230 This function performs a exclusive STR command for 16 bit values.
bogdanm 74:a842253909c9 231
bogdanm 74:a842253909c9 232 \param [in] value Value to store
bogdanm 74:a842253909c9 233 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 234 \return 0 Function succeeded
bogdanm 74:a842253909c9 235 \return 1 Function failed
bogdanm 74:a842253909c9 236 */
bogdanm 74:a842253909c9 237 #define __STREXH(value, ptr) __strex(value, ptr)
bogdanm 74:a842253909c9 238
bogdanm 74:a842253909c9 239
bogdanm 74:a842253909c9 240 /** \brief STR Exclusive (32 bit)
bogdanm 74:a842253909c9 241
bogdanm 74:a842253909c9 242 This function performs a exclusive STR command for 32 bit values.
bogdanm 74:a842253909c9 243
bogdanm 74:a842253909c9 244 \param [in] value Value to store
bogdanm 74:a842253909c9 245 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 246 \return 0 Function succeeded
bogdanm 74:a842253909c9 247 \return 1 Function failed
bogdanm 74:a842253909c9 248 */
bogdanm 74:a842253909c9 249 #define __STREXW(value, ptr) __strex(value, ptr)
bogdanm 74:a842253909c9 250
bogdanm 74:a842253909c9 251
bogdanm 74:a842253909c9 252 /** \brief Remove the exclusive lock
bogdanm 74:a842253909c9 253
bogdanm 74:a842253909c9 254 This function removes the exclusive lock which is created by LDREX.
bogdanm 74:a842253909c9 255
bogdanm 74:a842253909c9 256 */
bogdanm 74:a842253909c9 257 #define __CLREX __clrex
bogdanm 74:a842253909c9 258
bogdanm 74:a842253909c9 259
bogdanm 74:a842253909c9 260 /** \brief Signed Saturate
bogdanm 74:a842253909c9 261
bogdanm 74:a842253909c9 262 This function saturates a signed value.
bogdanm 74:a842253909c9 263
bogdanm 74:a842253909c9 264 \param [in] value Value to be saturated
bogdanm 74:a842253909c9 265 \param [in] sat Bit position to saturate to (1..32)
bogdanm 74:a842253909c9 266 \return Saturated value
bogdanm 74:a842253909c9 267 */
bogdanm 74:a842253909c9 268 #define __SSAT __ssat
bogdanm 74:a842253909c9 269
bogdanm 74:a842253909c9 270
bogdanm 74:a842253909c9 271 /** \brief Unsigned Saturate
bogdanm 74:a842253909c9 272
bogdanm 74:a842253909c9 273 This function saturates an unsigned value.
bogdanm 74:a842253909c9 274
bogdanm 74:a842253909c9 275 \param [in] value Value to be saturated
bogdanm 74:a842253909c9 276 \param [in] sat Bit position to saturate to (0..31)
bogdanm 74:a842253909c9 277 \return Saturated value
bogdanm 74:a842253909c9 278 */
bogdanm 74:a842253909c9 279 #define __USAT __usat
bogdanm 74:a842253909c9 280
bogdanm 74:a842253909c9 281
bogdanm 74:a842253909c9 282 /** \brief Count leading zeros
bogdanm 74:a842253909c9 283
bogdanm 74:a842253909c9 284 This function counts the number of leading zeros of a data value.
bogdanm 74:a842253909c9 285
bogdanm 74:a842253909c9 286 \param [in] value Value to count the leading zeros
bogdanm 74:a842253909c9 287 \return number of leading zeros in value
bogdanm 74:a842253909c9 288 */
bogdanm 74:a842253909c9 289 #define __CLZ __clz
bogdanm 74:a842253909c9 290
bogdanm 74:a842253909c9 291 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 74:a842253909c9 292
bogdanm 74:a842253909c9 293
bogdanm 74:a842253909c9 294
bogdanm 74:a842253909c9 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 74:a842253909c9 296 /* IAR iccarm specific functions */
bogdanm 74:a842253909c9 297
bogdanm 74:a842253909c9 298 #include <cmsis_iar.h>
bogdanm 74:a842253909c9 299
bogdanm 74:a842253909c9 300
bogdanm 74:a842253909c9 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 74:a842253909c9 302 /* TI CCS specific functions */
bogdanm 74:a842253909c9 303
bogdanm 74:a842253909c9 304 #include <cmsis_ccs.h>
bogdanm 74:a842253909c9 305
bogdanm 74:a842253909c9 306
bogdanm 74:a842253909c9 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 74:a842253909c9 308 /* GNU gcc specific functions */
bogdanm 74:a842253909c9 309
bogdanm 74:a842253909c9 310 /* Define macros for porting to both thumb1 and thumb2.
bogdanm 74:a842253909c9 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
bogdanm 74:a842253909c9 312 * Otherwise, use general registers, specified by constrant "r" */
bogdanm 74:a842253909c9 313 #if defined (__thumb__) && !defined (__thumb2__)
bogdanm 74:a842253909c9 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
bogdanm 74:a842253909c9 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
bogdanm 74:a842253909c9 316 #else
bogdanm 74:a842253909c9 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
bogdanm 74:a842253909c9 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
bogdanm 74:a842253909c9 319 #endif
bogdanm 74:a842253909c9 320
bogdanm 74:a842253909c9 321 /** \brief No Operation
bogdanm 74:a842253909c9 322
bogdanm 74:a842253909c9 323 No Operation does nothing. This instruction can be used for code alignment purposes.
bogdanm 74:a842253909c9 324 */
bogdanm 74:a842253909c9 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
bogdanm 74:a842253909c9 326 {
bogdanm 74:a842253909c9 327 __ASM volatile ("nop");
bogdanm 74:a842253909c9 328 }
bogdanm 74:a842253909c9 329
bogdanm 74:a842253909c9 330
bogdanm 74:a842253909c9 331 /** \brief Wait For Interrupt
bogdanm 74:a842253909c9 332
bogdanm 74:a842253909c9 333 Wait For Interrupt is a hint instruction that suspends execution
bogdanm 74:a842253909c9 334 until one of a number of events occurs.
bogdanm 74:a842253909c9 335 */
bogdanm 74:a842253909c9 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
bogdanm 74:a842253909c9 337 {
bogdanm 74:a842253909c9 338 __ASM volatile ("wfi");
bogdanm 74:a842253909c9 339 }
bogdanm 74:a842253909c9 340
bogdanm 74:a842253909c9 341
bogdanm 74:a842253909c9 342 /** \brief Wait For Event
bogdanm 74:a842253909c9 343
bogdanm 74:a842253909c9 344 Wait For Event is a hint instruction that permits the processor to enter
bogdanm 74:a842253909c9 345 a low-power state until one of a number of events occurs.
bogdanm 74:a842253909c9 346 */
bogdanm 74:a842253909c9 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
bogdanm 74:a842253909c9 348 {
bogdanm 74:a842253909c9 349 __ASM volatile ("wfe");
bogdanm 74:a842253909c9 350 }
bogdanm 74:a842253909c9 351
bogdanm 74:a842253909c9 352
bogdanm 74:a842253909c9 353 /** \brief Send Event
bogdanm 74:a842253909c9 354
bogdanm 74:a842253909c9 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
bogdanm 74:a842253909c9 356 */
bogdanm 74:a842253909c9 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
bogdanm 74:a842253909c9 358 {
bogdanm 74:a842253909c9 359 __ASM volatile ("sev");
bogdanm 74:a842253909c9 360 }
bogdanm 74:a842253909c9 361
bogdanm 74:a842253909c9 362
bogdanm 74:a842253909c9 363 /** \brief Instruction Synchronization Barrier
bogdanm 74:a842253909c9 364
bogdanm 74:a842253909c9 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
bogdanm 74:a842253909c9 366 so that all instructions following the ISB are fetched from cache or
bogdanm 74:a842253909c9 367 memory, after the instruction has been completed.
bogdanm 74:a842253909c9 368 */
bogdanm 74:a842253909c9 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
bogdanm 74:a842253909c9 370 {
bogdanm 74:a842253909c9 371 __ASM volatile ("isb");
bogdanm 74:a842253909c9 372 }
bogdanm 74:a842253909c9 373
bogdanm 74:a842253909c9 374
bogdanm 74:a842253909c9 375 /** \brief Data Synchronization Barrier
bogdanm 74:a842253909c9 376
bogdanm 74:a842253909c9 377 This function acts as a special kind of Data Memory Barrier.
bogdanm 74:a842253909c9 378 It completes when all explicit memory accesses before this instruction complete.
bogdanm 74:a842253909c9 379 */
bogdanm 74:a842253909c9 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
bogdanm 74:a842253909c9 381 {
bogdanm 74:a842253909c9 382 __ASM volatile ("dsb");
bogdanm 74:a842253909c9 383 }
bogdanm 74:a842253909c9 384
bogdanm 74:a842253909c9 385
bogdanm 74:a842253909c9 386 /** \brief Data Memory Barrier
bogdanm 74:a842253909c9 387
bogdanm 74:a842253909c9 388 This function ensures the apparent order of the explicit memory operations before
bogdanm 74:a842253909c9 389 and after the instruction, without ensuring their completion.
bogdanm 74:a842253909c9 390 */
bogdanm 74:a842253909c9 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
bogdanm 74:a842253909c9 392 {
bogdanm 74:a842253909c9 393 __ASM volatile ("dmb");
bogdanm 74:a842253909c9 394 }
bogdanm 74:a842253909c9 395
bogdanm 74:a842253909c9 396
bogdanm 74:a842253909c9 397 /** \brief Reverse byte order (32 bit)
bogdanm 74:a842253909c9 398
bogdanm 74:a842253909c9 399 This function reverses the byte order in integer value.
bogdanm 74:a842253909c9 400
bogdanm 74:a842253909c9 401 \param [in] value Value to reverse
bogdanm 74:a842253909c9 402 \return Reversed value
bogdanm 74:a842253909c9 403 */
bogdanm 74:a842253909c9 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
bogdanm 74:a842253909c9 405 {
bogdanm 74:a842253909c9 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
bogdanm 74:a842253909c9 407 return __builtin_bswap32(value);
bogdanm 74:a842253909c9 408 #else
bogdanm 74:a842253909c9 409 uint32_t result;
bogdanm 74:a842253909c9 410
bogdanm 74:a842253909c9 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 74:a842253909c9 412 return(result);
bogdanm 74:a842253909c9 413 #endif
bogdanm 74:a842253909c9 414 }
bogdanm 74:a842253909c9 415
bogdanm 74:a842253909c9 416
bogdanm 74:a842253909c9 417 /** \brief Reverse byte order (16 bit)
bogdanm 74:a842253909c9 418
bogdanm 74:a842253909c9 419 This function reverses the byte order in two unsigned short values.
bogdanm 74:a842253909c9 420
bogdanm 74:a842253909c9 421 \param [in] value Value to reverse
bogdanm 74:a842253909c9 422 \return Reversed value
bogdanm 74:a842253909c9 423 */
bogdanm 74:a842253909c9 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
bogdanm 74:a842253909c9 425 {
bogdanm 74:a842253909c9 426 uint32_t result;
bogdanm 74:a842253909c9 427
bogdanm 74:a842253909c9 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 74:a842253909c9 429 return(result);
bogdanm 74:a842253909c9 430 }
bogdanm 74:a842253909c9 431
bogdanm 74:a842253909c9 432
bogdanm 74:a842253909c9 433 /** \brief Reverse byte order in signed short value
bogdanm 74:a842253909c9 434
bogdanm 74:a842253909c9 435 This function reverses the byte order in a signed short value with sign extension to integer.
bogdanm 74:a842253909c9 436
bogdanm 74:a842253909c9 437 \param [in] value Value to reverse
bogdanm 74:a842253909c9 438 \return Reversed value
bogdanm 74:a842253909c9 439 */
bogdanm 74:a842253909c9 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
bogdanm 74:a842253909c9 441 {
bogdanm 74:a842253909c9 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 74:a842253909c9 443 return (short)__builtin_bswap16(value);
bogdanm 74:a842253909c9 444 #else
bogdanm 74:a842253909c9 445 uint32_t result;
bogdanm 74:a842253909c9 446
bogdanm 74:a842253909c9 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
bogdanm 74:a842253909c9 448 return(result);
bogdanm 74:a842253909c9 449 #endif
bogdanm 74:a842253909c9 450 }
bogdanm 74:a842253909c9 451
bogdanm 74:a842253909c9 452
bogdanm 74:a842253909c9 453 /** \brief Rotate Right in unsigned value (32 bit)
bogdanm 74:a842253909c9 454
bogdanm 74:a842253909c9 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
bogdanm 74:a842253909c9 456
bogdanm 74:a842253909c9 457 \param [in] value Value to rotate
bogdanm 74:a842253909c9 458 \param [in] value Number of Bits to rotate
bogdanm 74:a842253909c9 459 \return Rotated value
bogdanm 74:a842253909c9 460 */
bogdanm 74:a842253909c9 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
bogdanm 74:a842253909c9 462 {
bogdanm 74:a842253909c9 463 return (op1 >> op2) | (op1 << (32 - op2));
bogdanm 74:a842253909c9 464 }
bogdanm 74:a842253909c9 465
bogdanm 74:a842253909c9 466
bogdanm 74:a842253909c9 467 /** \brief Breakpoint
bogdanm 74:a842253909c9 468
bogdanm 74:a842253909c9 469 This function causes the processor to enter Debug state.
bogdanm 74:a842253909c9 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
bogdanm 74:a842253909c9 471
bogdanm 74:a842253909c9 472 \param [in] value is ignored by the processor.
bogdanm 74:a842253909c9 473 If required, a debugger can use it to store additional information about the breakpoint.
bogdanm 74:a842253909c9 474 */
bogdanm 74:a842253909c9 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
bogdanm 74:a842253909c9 476
bogdanm 74:a842253909c9 477
bogdanm 74:a842253909c9 478 #if (__CORTEX_M >= 0x03)
bogdanm 74:a842253909c9 479
bogdanm 74:a842253909c9 480 /** \brief Reverse bit order of value
bogdanm 74:a842253909c9 481
bogdanm 74:a842253909c9 482 This function reverses the bit order of the given value.
bogdanm 74:a842253909c9 483
bogdanm 74:a842253909c9 484 \param [in] value Value to reverse
bogdanm 74:a842253909c9 485 \return Reversed value
bogdanm 74:a842253909c9 486 */
bogdanm 74:a842253909c9 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
bogdanm 74:a842253909c9 488 {
bogdanm 74:a842253909c9 489 uint32_t result;
bogdanm 74:a842253909c9 490
bogdanm 74:a842253909c9 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
bogdanm 74:a842253909c9 492 return(result);
bogdanm 74:a842253909c9 493 }
bogdanm 74:a842253909c9 494
bogdanm 74:a842253909c9 495
bogdanm 74:a842253909c9 496 /** \brief LDR Exclusive (8 bit)
bogdanm 74:a842253909c9 497
bogdanm 74:a842253909c9 498 This function performs a exclusive LDR command for 8 bit value.
bogdanm 74:a842253909c9 499
bogdanm 74:a842253909c9 500 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 501 \return value of type uint8_t at (*ptr)
bogdanm 74:a842253909c9 502 */
bogdanm 74:a842253909c9 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
bogdanm 74:a842253909c9 504 {
bogdanm 74:a842253909c9 505 uint32_t result;
bogdanm 74:a842253909c9 506
bogdanm 74:a842253909c9 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 74:a842253909c9 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 74:a842253909c9 509 #else
bogdanm 74:a842253909c9 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 74:a842253909c9 511 accepted by assembler. So has to use following less efficient pattern.
bogdanm 74:a842253909c9 512 */
bogdanm 74:a842253909c9 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 74:a842253909c9 514 #endif
bogdanm 74:a842253909c9 515 return(result);
bogdanm 74:a842253909c9 516 }
bogdanm 74:a842253909c9 517
bogdanm 74:a842253909c9 518
bogdanm 74:a842253909c9 519 /** \brief LDR Exclusive (16 bit)
bogdanm 74:a842253909c9 520
bogdanm 74:a842253909c9 521 This function performs a exclusive LDR command for 16 bit values.
bogdanm 74:a842253909c9 522
bogdanm 74:a842253909c9 523 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 524 \return value of type uint16_t at (*ptr)
bogdanm 74:a842253909c9 525 */
bogdanm 74:a842253909c9 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
bogdanm 74:a842253909c9 527 {
bogdanm 74:a842253909c9 528 uint32_t result;
bogdanm 74:a842253909c9 529
bogdanm 74:a842253909c9 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
bogdanm 74:a842253909c9 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 74:a842253909c9 532 #else
bogdanm 74:a842253909c9 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
bogdanm 74:a842253909c9 534 accepted by assembler. So has to use following less efficient pattern.
bogdanm 74:a842253909c9 535 */
bogdanm 74:a842253909c9 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
bogdanm 74:a842253909c9 537 #endif
bogdanm 74:a842253909c9 538 return(result);
bogdanm 74:a842253909c9 539 }
bogdanm 74:a842253909c9 540
bogdanm 74:a842253909c9 541
bogdanm 74:a842253909c9 542 /** \brief LDR Exclusive (32 bit)
bogdanm 74:a842253909c9 543
bogdanm 74:a842253909c9 544 This function performs a exclusive LDR command for 32 bit values.
bogdanm 74:a842253909c9 545
bogdanm 74:a842253909c9 546 \param [in] ptr Pointer to data
bogdanm 74:a842253909c9 547 \return value of type uint32_t at (*ptr)
bogdanm 74:a842253909c9 548 */
bogdanm 74:a842253909c9 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
bogdanm 74:a842253909c9 550 {
bogdanm 74:a842253909c9 551 uint32_t result;
bogdanm 74:a842253909c9 552
bogdanm 74:a842253909c9 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
bogdanm 74:a842253909c9 554 return(result);
bogdanm 74:a842253909c9 555 }
bogdanm 74:a842253909c9 556
bogdanm 74:a842253909c9 557
bogdanm 74:a842253909c9 558 /** \brief STR Exclusive (8 bit)
bogdanm 74:a842253909c9 559
bogdanm 74:a842253909c9 560 This function performs a exclusive STR command for 8 bit values.
bogdanm 74:a842253909c9 561
bogdanm 74:a842253909c9 562 \param [in] value Value to store
bogdanm 74:a842253909c9 563 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 564 \return 0 Function succeeded
bogdanm 74:a842253909c9 565 \return 1 Function failed
bogdanm 74:a842253909c9 566 */
bogdanm 74:a842253909c9 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
bogdanm 74:a842253909c9 568 {
bogdanm 74:a842253909c9 569 uint32_t result;
bogdanm 74:a842253909c9 570
bogdanm 74:a842253909c9 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 74:a842253909c9 572 return(result);
bogdanm 74:a842253909c9 573 }
bogdanm 74:a842253909c9 574
bogdanm 74:a842253909c9 575
bogdanm 74:a842253909c9 576 /** \brief STR Exclusive (16 bit)
bogdanm 74:a842253909c9 577
bogdanm 74:a842253909c9 578 This function performs a exclusive STR command for 16 bit values.
bogdanm 74:a842253909c9 579
bogdanm 74:a842253909c9 580 \param [in] value Value to store
bogdanm 74:a842253909c9 581 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 582 \return 0 Function succeeded
bogdanm 74:a842253909c9 583 \return 1 Function failed
bogdanm 74:a842253909c9 584 */
bogdanm 74:a842253909c9 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
bogdanm 74:a842253909c9 586 {
bogdanm 74:a842253909c9 587 uint32_t result;
bogdanm 74:a842253909c9 588
bogdanm 74:a842253909c9 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 74:a842253909c9 590 return(result);
bogdanm 74:a842253909c9 591 }
bogdanm 74:a842253909c9 592
bogdanm 74:a842253909c9 593
bogdanm 74:a842253909c9 594 /** \brief STR Exclusive (32 bit)
bogdanm 74:a842253909c9 595
bogdanm 74:a842253909c9 596 This function performs a exclusive STR command for 32 bit values.
bogdanm 74:a842253909c9 597
bogdanm 74:a842253909c9 598 \param [in] value Value to store
bogdanm 74:a842253909c9 599 \param [in] ptr Pointer to location
bogdanm 74:a842253909c9 600 \return 0 Function succeeded
bogdanm 74:a842253909c9 601 \return 1 Function failed
bogdanm 74:a842253909c9 602 */
bogdanm 74:a842253909c9 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
bogdanm 74:a842253909c9 604 {
bogdanm 74:a842253909c9 605 uint32_t result;
bogdanm 74:a842253909c9 606
bogdanm 74:a842253909c9 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
bogdanm 74:a842253909c9 608 return(result);
bogdanm 74:a842253909c9 609 }
bogdanm 74:a842253909c9 610
bogdanm 74:a842253909c9 611
bogdanm 74:a842253909c9 612 /** \brief Remove the exclusive lock
bogdanm 74:a842253909c9 613
bogdanm 74:a842253909c9 614 This function removes the exclusive lock which is created by LDREX.
bogdanm 74:a842253909c9 615
bogdanm 74:a842253909c9 616 */
bogdanm 74:a842253909c9 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
bogdanm 74:a842253909c9 618 {
bogdanm 74:a842253909c9 619 __ASM volatile ("clrex" ::: "memory");
bogdanm 74:a842253909c9 620 }
bogdanm 74:a842253909c9 621
bogdanm 74:a842253909c9 622
bogdanm 74:a842253909c9 623 /** \brief Signed Saturate
bogdanm 74:a842253909c9 624
bogdanm 74:a842253909c9 625 This function saturates a signed value.
bogdanm 74:a842253909c9 626
bogdanm 74:a842253909c9 627 \param [in] value Value to be saturated
bogdanm 74:a842253909c9 628 \param [in] sat Bit position to saturate to (1..32)
bogdanm 74:a842253909c9 629 \return Saturated value
bogdanm 74:a842253909c9 630 */
bogdanm 74:a842253909c9 631 #define __SSAT(ARG1,ARG2) \
bogdanm 74:a842253909c9 632 ({ \
bogdanm 74:a842253909c9 633 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 74:a842253909c9 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 74:a842253909c9 635 __RES; \
bogdanm 74:a842253909c9 636 })
bogdanm 74:a842253909c9 637
bogdanm 74:a842253909c9 638
bogdanm 74:a842253909c9 639 /** \brief Unsigned Saturate
bogdanm 74:a842253909c9 640
bogdanm 74:a842253909c9 641 This function saturates an unsigned value.
bogdanm 74:a842253909c9 642
bogdanm 74:a842253909c9 643 \param [in] value Value to be saturated
bogdanm 74:a842253909c9 644 \param [in] sat Bit position to saturate to (0..31)
bogdanm 74:a842253909c9 645 \return Saturated value
bogdanm 74:a842253909c9 646 */
bogdanm 74:a842253909c9 647 #define __USAT(ARG1,ARG2) \
bogdanm 74:a842253909c9 648 ({ \
bogdanm 74:a842253909c9 649 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 74:a842253909c9 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 74:a842253909c9 651 __RES; \
bogdanm 74:a842253909c9 652 })
bogdanm 74:a842253909c9 653
bogdanm 74:a842253909c9 654
bogdanm 74:a842253909c9 655 /** \brief Count leading zeros
bogdanm 74:a842253909c9 656
bogdanm 74:a842253909c9 657 This function counts the number of leading zeros of a data value.
bogdanm 74:a842253909c9 658
bogdanm 74:a842253909c9 659 \param [in] value Value to count the leading zeros
bogdanm 74:a842253909c9 660 \return number of leading zeros in value
bogdanm 74:a842253909c9 661 */
bogdanm 74:a842253909c9 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
bogdanm 74:a842253909c9 663 {
bogdanm 74:a842253909c9 664 uint32_t result;
bogdanm 74:a842253909c9 665
bogdanm 74:a842253909c9 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
bogdanm 74:a842253909c9 667 return(result);
bogdanm 74:a842253909c9 668 }
bogdanm 74:a842253909c9 669
bogdanm 74:a842253909c9 670 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 74:a842253909c9 671
bogdanm 74:a842253909c9 672
bogdanm 74:a842253909c9 673
bogdanm 74:a842253909c9 674
bogdanm 74:a842253909c9 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 74:a842253909c9 676 /* TASKING carm specific functions */
bogdanm 74:a842253909c9 677
bogdanm 74:a842253909c9 678 /*
bogdanm 74:a842253909c9 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 74:a842253909c9 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 74:a842253909c9 681 * Including the CMSIS ones.
bogdanm 74:a842253909c9 682 */
bogdanm 74:a842253909c9 683
bogdanm 74:a842253909c9 684 #endif
bogdanm 74:a842253909c9 685
bogdanm 74:a842253909c9 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
bogdanm 74:a842253909c9 687
bogdanm 74:a842253909c9 688 #endif /* __CORE_CMINSTR_H */