meh

Fork of mbed by mbed official

Committer:
bogdanm
Date:
Mon May 19 18:14:09 2014 +0100
Revision:
84:0b3ab51c8877
Child:
92:4fc01daae5a5
Release 84 of the mbed library

Main changes:

- added LPC11U68 to the official build
- Bug fixes and new features for ST Nucleo boards
- I2C fixes for Freescale targets
- Added nRF51822 exporters

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**
bogdanm 84:0b3ab51c8877 2 ******************************************************************************
bogdanm 84:0b3ab51c8877 3 * @file stm32l0xx_hal_irda.h
bogdanm 84:0b3ab51c8877 4 * @author MCD Application Team
bogdanm 84:0b3ab51c8877 5 * @version V1.0.0
bogdanm 84:0b3ab51c8877 6 * @date 22-April-2014
bogdanm 84:0b3ab51c8877 7 * @brief Header file of IRDA HAL module.
bogdanm 84:0b3ab51c8877 8 ******************************************************************************
bogdanm 84:0b3ab51c8877 9 * @attention
bogdanm 84:0b3ab51c8877 10 *
bogdanm 84:0b3ab51c8877 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 84:0b3ab51c8877 12 *
bogdanm 84:0b3ab51c8877 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 84:0b3ab51c8877 14 * are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 84:0b3ab51c8877 16 * this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 84:0b3ab51c8877 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 84:0b3ab51c8877 19 * and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 84:0b3ab51c8877 21 * may be used to endorse or promote products derived from this software
bogdanm 84:0b3ab51c8877 22 * without specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 84:0b3ab51c8877 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 84:0b3ab51c8877 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 84:0b3ab51c8877 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 84:0b3ab51c8877 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 84:0b3ab51c8877 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 84:0b3ab51c8877 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 84:0b3ab51c8877 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 34 *
bogdanm 84:0b3ab51c8877 35 ******************************************************************************
bogdanm 84:0b3ab51c8877 36 */
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 84:0b3ab51c8877 39 #ifndef __STM32L0xx_HAL_IRDA_H
bogdanm 84:0b3ab51c8877 40 #define __STM32L0xx_HAL_IRDA_H
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 43 extern "C" {
bogdanm 84:0b3ab51c8877 44 #endif
bogdanm 84:0b3ab51c8877 45
bogdanm 84:0b3ab51c8877 46 /* Includes ------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 47 #include "stm32l0xx_hal_def.h"
bogdanm 84:0b3ab51c8877 48
bogdanm 84:0b3ab51c8877 49 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 84:0b3ab51c8877 50 * @{
bogdanm 84:0b3ab51c8877 51 */
bogdanm 84:0b3ab51c8877 52
bogdanm 84:0b3ab51c8877 53 /** @addtogroup IRDA
bogdanm 84:0b3ab51c8877 54 * @{
bogdanm 84:0b3ab51c8877 55 */
bogdanm 84:0b3ab51c8877 56
bogdanm 84:0b3ab51c8877 57 /* Exported types ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 58
bogdanm 84:0b3ab51c8877 59 /**
bogdanm 84:0b3ab51c8877 60 * @brief IRDA Init Structure definition
bogdanm 84:0b3ab51c8877 61 */
bogdanm 84:0b3ab51c8877 62 typedef struct
bogdanm 84:0b3ab51c8877 63 {
bogdanm 84:0b3ab51c8877 64 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
bogdanm 84:0b3ab51c8877 65 The baud rate register is computed using the following formula:
bogdanm 84:0b3ab51c8877 66 Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */
bogdanm 84:0b3ab51c8877 67
bogdanm 84:0b3ab51c8877 68 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 84:0b3ab51c8877 69 This parameter can be a value of @ref IRDA_Word_Length */
bogdanm 84:0b3ab51c8877 70
bogdanm 84:0b3ab51c8877 71 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 84:0b3ab51c8877 72 This parameter can be a value of @ref IRDA_Parity
bogdanm 84:0b3ab51c8877 73 @note When parity is enabled, the computed parity is inserted
bogdanm 84:0b3ab51c8877 74 at the MSB position of the transmitted data (9th bit when
bogdanm 84:0b3ab51c8877 75 the word length is set to 9 data bits; 8th bit when the
bogdanm 84:0b3ab51c8877 76 word length is set to 8 data bits). */
bogdanm 84:0b3ab51c8877 77
bogdanm 84:0b3ab51c8877 78 uint16_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 84:0b3ab51c8877 79 This parameter can be a value of @ref IRDA_Mode */
bogdanm 84:0b3ab51c8877 80
bogdanm 84:0b3ab51c8877 81 uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock
bogdanm 84:0b3ab51c8877 82 to achieve low-power frequency.
bogdanm 84:0b3ab51c8877 83 @note Prescaler value 0 is forbidden */
bogdanm 84:0b3ab51c8877 84
bogdanm 84:0b3ab51c8877 85 uint16_t PowerMode; /*!< Specifies the IRDA power mode.
bogdanm 84:0b3ab51c8877 86 This parameter can be a value of @ref IRDA_Low_Power */
bogdanm 84:0b3ab51c8877 87 }IRDA_InitTypeDef;
bogdanm 84:0b3ab51c8877 88
bogdanm 84:0b3ab51c8877 89 /**
bogdanm 84:0b3ab51c8877 90 * @brief HAL IRDA State structures definition
bogdanm 84:0b3ab51c8877 91 */
bogdanm 84:0b3ab51c8877 92 typedef enum
bogdanm 84:0b3ab51c8877 93 {
bogdanm 84:0b3ab51c8877 94 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 84:0b3ab51c8877 95 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 84:0b3ab51c8877 96 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 84:0b3ab51c8877 97 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 84:0b3ab51c8877 98 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 84:0b3ab51c8877 99 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 84:0b3ab51c8877 100 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 84:0b3ab51c8877 101 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
bogdanm 84:0b3ab51c8877 102 }HAL_IRDA_StateTypeDef;
bogdanm 84:0b3ab51c8877 103
bogdanm 84:0b3ab51c8877 104 /**
bogdanm 84:0b3ab51c8877 105 * @brief HAL IRDA Error Code structure definition
bogdanm 84:0b3ab51c8877 106 */
bogdanm 84:0b3ab51c8877 107 typedef enum
bogdanm 84:0b3ab51c8877 108 {
bogdanm 84:0b3ab51c8877 109 HAL_IRDA_ERROR_NONE = 0x00, /*!< No error */
bogdanm 84:0b3ab51c8877 110 HAL_IRDA_ERROR_PE = 0x01, /*!< Parity error */
bogdanm 84:0b3ab51c8877 111 HAL_IRDA_ERROR_NE = 0x02, /*!< Noise error */
bogdanm 84:0b3ab51c8877 112 HAL_IRDA_ERROR_FE = 0x04, /*!< frame error */
bogdanm 84:0b3ab51c8877 113 HAL_IRDA_ERROR_ORE = 0x08, /*!< Overrun error */
bogdanm 84:0b3ab51c8877 114 HAL_IRDA_ERROR_DMA = 0x10 /*!< DMA transfer error */
bogdanm 84:0b3ab51c8877 115 }HAL_IRDA_ErrorTypeDef;
bogdanm 84:0b3ab51c8877 116
bogdanm 84:0b3ab51c8877 117 /**
bogdanm 84:0b3ab51c8877 118 * @brief IRDA clock sources definition
bogdanm 84:0b3ab51c8877 119 */
bogdanm 84:0b3ab51c8877 120 typedef enum
bogdanm 84:0b3ab51c8877 121 {
bogdanm 84:0b3ab51c8877 122 IRDA_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */
bogdanm 84:0b3ab51c8877 123 IRDA_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */
bogdanm 84:0b3ab51c8877 124 IRDA_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */
bogdanm 84:0b3ab51c8877 125 IRDA_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */
bogdanm 84:0b3ab51c8877 126 IRDA_CLOCKSOURCE_LSE = 0x08 /*!< LSE clock source */
bogdanm 84:0b3ab51c8877 127 }IRDA_ClockSourceTypeDef;
bogdanm 84:0b3ab51c8877 128
bogdanm 84:0b3ab51c8877 129 /**
bogdanm 84:0b3ab51c8877 130 * @brief IRDA handle Structure definition
bogdanm 84:0b3ab51c8877 131 */
bogdanm 84:0b3ab51c8877 132 typedef struct
bogdanm 84:0b3ab51c8877 133 {
bogdanm 84:0b3ab51c8877 134 USART_TypeDef *Instance; /* IRDA registers base address */
bogdanm 84:0b3ab51c8877 135
bogdanm 84:0b3ab51c8877 136 IRDA_InitTypeDef Init; /* IRDA communication parameters */
bogdanm 84:0b3ab51c8877 137
bogdanm 84:0b3ab51c8877 138 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140 uint16_t TxXferSize; /* IRDA Tx Transfer size */
bogdanm 84:0b3ab51c8877 141
bogdanm 84:0b3ab51c8877 142 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
bogdanm 84:0b3ab51c8877 143
bogdanm 84:0b3ab51c8877 144 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
bogdanm 84:0b3ab51c8877 145
bogdanm 84:0b3ab51c8877 146 uint16_t RxXferSize; /* IRDA Rx Transfer size */
bogdanm 84:0b3ab51c8877 147
bogdanm 84:0b3ab51c8877 148 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
bogdanm 84:0b3ab51c8877 149
bogdanm 84:0b3ab51c8877 150 uint16_t Mask; /* IRDA RX RDR register mask */
bogdanm 84:0b3ab51c8877 151
bogdanm 84:0b3ab51c8877 152 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 153
bogdanm 84:0b3ab51c8877 154 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
bogdanm 84:0b3ab51c8877 155
bogdanm 84:0b3ab51c8877 156 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 84:0b3ab51c8877 157
bogdanm 84:0b3ab51c8877 158 __IO HAL_IRDA_StateTypeDef State; /* IRDA communication state */
bogdanm 84:0b3ab51c8877 159
bogdanm 84:0b3ab51c8877 160 __IO HAL_IRDA_ErrorTypeDef ErrorCode; /* IRDA Error code */
bogdanm 84:0b3ab51c8877 161
bogdanm 84:0b3ab51c8877 162 }IRDA_HandleTypeDef;
bogdanm 84:0b3ab51c8877 163
bogdanm 84:0b3ab51c8877 164 /**
bogdanm 84:0b3ab51c8877 165 * @brief IRDA Configuration enumeration values definition
bogdanm 84:0b3ab51c8877 166 */
bogdanm 84:0b3ab51c8877 167
bogdanm 84:0b3ab51c8877 168 /* Exported constants --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 169 /** @defgroup IRDA_Exported_Constants IRDA Exported Constants
bogdanm 84:0b3ab51c8877 170 * @{
bogdanm 84:0b3ab51c8877 171 */
bogdanm 84:0b3ab51c8877 172
bogdanm 84:0b3ab51c8877 173 /** @defgroup IRDA_Parity IRDA Parity
bogdanm 84:0b3ab51c8877 174 * @{
bogdanm 84:0b3ab51c8877 175 */
bogdanm 84:0b3ab51c8877 176 #define IRDA_PARITY_NONE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 177 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 84:0b3ab51c8877 178 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 84:0b3ab51c8877 179 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
bogdanm 84:0b3ab51c8877 180 ((PARITY) == IRDA_PARITY_EVEN) || \
bogdanm 84:0b3ab51c8877 181 ((PARITY) == IRDA_PARITY_ODD))
bogdanm 84:0b3ab51c8877 182 /**
bogdanm 84:0b3ab51c8877 183 * @}
bogdanm 84:0b3ab51c8877 184 */
bogdanm 84:0b3ab51c8877 185
bogdanm 84:0b3ab51c8877 186
bogdanm 84:0b3ab51c8877 187 /** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode
bogdanm 84:0b3ab51c8877 188 * @{
bogdanm 84:0b3ab51c8877 189 */
bogdanm 84:0b3ab51c8877 190 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 84:0b3ab51c8877 191 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 84:0b3ab51c8877 192 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 84:0b3ab51c8877 193 #define IS_IRDA_TX_RX_MODE(MODE) ((((MODE) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
bogdanm 84:0b3ab51c8877 194 /**
bogdanm 84:0b3ab51c8877 195 * @}
bogdanm 84:0b3ab51c8877 196 */
bogdanm 84:0b3ab51c8877 197
bogdanm 84:0b3ab51c8877 198 /** @defgroup IRDA_Low_Power IRDA Low Power
bogdanm 84:0b3ab51c8877 199 * @{
bogdanm 84:0b3ab51c8877 200 */
bogdanm 84:0b3ab51c8877 201 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 202 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
bogdanm 84:0b3ab51c8877 203 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
bogdanm 84:0b3ab51c8877 204 ((MODE) == IRDA_POWERMODE_NORMAL))
bogdanm 84:0b3ab51c8877 205 /**
bogdanm 84:0b3ab51c8877 206 * @}
bogdanm 84:0b3ab51c8877 207 */
bogdanm 84:0b3ab51c8877 208
bogdanm 84:0b3ab51c8877 209 /** @defgroup IRDA_State IRDA State
bogdanm 84:0b3ab51c8877 210 * @{
bogdanm 84:0b3ab51c8877 211 */
bogdanm 84:0b3ab51c8877 212 #define IRDA_STATE_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 213 #define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE)
bogdanm 84:0b3ab51c8877 214 #define IS_IRDA_STATE(STATE) (((STATE) == IRDA_STATE_DISABLE) || \
bogdanm 84:0b3ab51c8877 215 ((STATE) == IRDA_STATE_ENABLE))
bogdanm 84:0b3ab51c8877 216 /**
bogdanm 84:0b3ab51c8877 217 * @}
bogdanm 84:0b3ab51c8877 218 */
bogdanm 84:0b3ab51c8877 219
bogdanm 84:0b3ab51c8877 220 /** @defgroup IRDA_Mode IRDA Mode
bogdanm 84:0b3ab51c8877 221 * @{
bogdanm 84:0b3ab51c8877 222 */
bogdanm 84:0b3ab51c8877 223 #define IRDA_MODE_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 224 #define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN)
bogdanm 84:0b3ab51c8877 225 #define IS_IRDA_MODE(STATE) (((STATE) == IRDA_MODE_DISABLE) || \
bogdanm 84:0b3ab51c8877 226 ((STATE) == IRDA_MODE_ENABLE))
bogdanm 84:0b3ab51c8877 227 /**
bogdanm 84:0b3ab51c8877 228 * @}
bogdanm 84:0b3ab51c8877 229 */
bogdanm 84:0b3ab51c8877 230
bogdanm 84:0b3ab51c8877 231 /** @defgroup IRDA_One_Bit IRDA One Bit Sampling
bogdanm 84:0b3ab51c8877 232 * @{
bogdanm 84:0b3ab51c8877 233 */
bogdanm 84:0b3ab51c8877 234 #define IRDA_ONE_BIT_SAMPLE_DISABLED ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 235 #define IRDA_ONE_BIT_SAMPLE_ENABLED ((uint32_t)USART_CR3_ONEBIT)
bogdanm 84:0b3ab51c8877 236 #define IS_IRDA_ONEBIT_SAMPLE(ONEBIT) (((ONEBIT) == IRDA_ONE_BIT_SAMPLE_DISABLED) || \
bogdanm 84:0b3ab51c8877 237 ((ONEBIT) == IRDA_ONE_BIT_SAMPLE_ENABLED))
bogdanm 84:0b3ab51c8877 238 /**
bogdanm 84:0b3ab51c8877 239 * @}
bogdanm 84:0b3ab51c8877 240 */
bogdanm 84:0b3ab51c8877 241
bogdanm 84:0b3ab51c8877 242 /** @defgroup IRDA_DMA_Tx IRDA DMA Tx
bogdanm 84:0b3ab51c8877 243 * @{
bogdanm 84:0b3ab51c8877 244 */
bogdanm 84:0b3ab51c8877 245 #define IRDA_DMA_TX_DISABLE ((uint32_t)0x00000000)
bogdanm 84:0b3ab51c8877 246 #define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
bogdanm 84:0b3ab51c8877 247 #define IS_IRDA_DMA_TX(DMATX) (((DMATX) == IRDA_DMA_TX_DISABLE) || \
bogdanm 84:0b3ab51c8877 248 ((DMATX) == IRDA_DMA_TX_ENABLE))
bogdanm 84:0b3ab51c8877 249 /**
bogdanm 84:0b3ab51c8877 250 * @}
bogdanm 84:0b3ab51c8877 251 */
bogdanm 84:0b3ab51c8877 252
bogdanm 84:0b3ab51c8877 253 /** @defgroup IRDA_DMA_Rx IRDA DMA Rx
bogdanm 84:0b3ab51c8877 254 * @{
bogdanm 84:0b3ab51c8877 255 */
bogdanm 84:0b3ab51c8877 256 #define IRDA_DMA_RX_DISABLE ((uint32_t)0x0000)
bogdanm 84:0b3ab51c8877 257 #define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
bogdanm 84:0b3ab51c8877 258 #define IS_IRDA_DMA_RX(DMARX) (((DMARX) == IRDA_DMA_RX_DISABLE) || \
bogdanm 84:0b3ab51c8877 259 ((DMARX) == IRDA_DMA_RX_ENABLE))
bogdanm 84:0b3ab51c8877 260 /**
bogdanm 84:0b3ab51c8877 261 * @}
bogdanm 84:0b3ab51c8877 262 */
bogdanm 84:0b3ab51c8877 263
bogdanm 84:0b3ab51c8877 264 /** @defgroup IRDA_Flags IRDA Flags
bogdanm 84:0b3ab51c8877 265 * Elements values convention: 0xXXXX
bogdanm 84:0b3ab51c8877 266 * - 0xXXXX : Flag mask in the ISR register
bogdanm 84:0b3ab51c8877 267 * @{
bogdanm 84:0b3ab51c8877 268 */
bogdanm 84:0b3ab51c8877 269 #define IRDA_FLAG_REACK ((uint32_t)0x00400000)
bogdanm 84:0b3ab51c8877 270 #define IRDA_FLAG_TEACK ((uint32_t)0x00200000)
bogdanm 84:0b3ab51c8877 271 #define IRDA_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm 84:0b3ab51c8877 272 #define IRDA_FLAG_ABRF ((uint32_t)0x00008000)
bogdanm 84:0b3ab51c8877 273 #define IRDA_FLAG_ABRE ((uint32_t)0x00004000)
bogdanm 84:0b3ab51c8877 274 #define IRDA_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 84:0b3ab51c8877 275 #define IRDA_FLAG_TC ((uint32_t)0x00000040)
bogdanm 84:0b3ab51c8877 276 #define IRDA_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 84:0b3ab51c8877 277 #define IRDA_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 84:0b3ab51c8877 278 #define IRDA_FLAG_NE ((uint32_t)0x00000004)
bogdanm 84:0b3ab51c8877 279 #define IRDA_FLAG_FE ((uint32_t)0x00000002)
bogdanm 84:0b3ab51c8877 280 #define IRDA_FLAG_PE ((uint32_t)0x00000001)
bogdanm 84:0b3ab51c8877 281 /**
bogdanm 84:0b3ab51c8877 282 * @}
bogdanm 84:0b3ab51c8877 283 */
bogdanm 84:0b3ab51c8877 284
bogdanm 84:0b3ab51c8877 285 /** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition
bogdanm 84:0b3ab51c8877 286 * Elements values convention: 0000ZZZZ0XXYYYYYb
bogdanm 84:0b3ab51c8877 287 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 84:0b3ab51c8877 288 * - XX : Interrupt source register (2bits)
bogdanm 84:0b3ab51c8877 289 * - 01: CR1 register
bogdanm 84:0b3ab51c8877 290 * - 10: CR2 register
bogdanm 84:0b3ab51c8877 291 * - 11: CR3 register
bogdanm 84:0b3ab51c8877 292 * - ZZZZ : Flag position in the ISR register(4bits)
bogdanm 84:0b3ab51c8877 293 * @{
bogdanm 84:0b3ab51c8877 294 */
bogdanm 84:0b3ab51c8877 295 #define IRDA_IT_PE ((uint16_t)0x0028)
bogdanm 84:0b3ab51c8877 296 #define IRDA_IT_TXE ((uint16_t)0x0727)
bogdanm 84:0b3ab51c8877 297 #define IRDA_IT_TC ((uint16_t)0x0626)
bogdanm 84:0b3ab51c8877 298 #define IRDA_IT_RXNE ((uint16_t)0x0525)
bogdanm 84:0b3ab51c8877 299 #define IRDA_IT_IDLE ((uint16_t)0x0424)
bogdanm 84:0b3ab51c8877 300
bogdanm 84:0b3ab51c8877 301
bogdanm 84:0b3ab51c8877 302
bogdanm 84:0b3ab51c8877 303 /** Elements values convention: 000000000XXYYYYYb
bogdanm 84:0b3ab51c8877 304 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 84:0b3ab51c8877 305 * - XX : Interrupt source register (2bits)
bogdanm 84:0b3ab51c8877 306 * - 01: CR1 register
bogdanm 84:0b3ab51c8877 307 * - 10: CR2 register
bogdanm 84:0b3ab51c8877 308 * - 11: CR3 register
bogdanm 84:0b3ab51c8877 309 */
bogdanm 84:0b3ab51c8877 310 #define IRDA_IT_ERR ((uint16_t)0x0060)
bogdanm 84:0b3ab51c8877 311
bogdanm 84:0b3ab51c8877 312 /** Elements values convention: 0000ZZZZ00000000b
bogdanm 84:0b3ab51c8877 313 * - ZZZZ : Flag position in the ISR register(4bits)
bogdanm 84:0b3ab51c8877 314 */
bogdanm 84:0b3ab51c8877 315 #define IRDA_IT_ORE ((uint16_t)0x0300)
bogdanm 84:0b3ab51c8877 316 #define IRDA_IT_NE ((uint16_t)0x0200)
bogdanm 84:0b3ab51c8877 317 #define IRDA_IT_FE ((uint16_t)0x0100)
bogdanm 84:0b3ab51c8877 318 /**
bogdanm 84:0b3ab51c8877 319 * @}
bogdanm 84:0b3ab51c8877 320 */
bogdanm 84:0b3ab51c8877 321
bogdanm 84:0b3ab51c8877 322 /** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags
bogdanm 84:0b3ab51c8877 323 * @{
bogdanm 84:0b3ab51c8877 324 */
bogdanm 84:0b3ab51c8877 325 #define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
bogdanm 84:0b3ab51c8877 326 #define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
bogdanm 84:0b3ab51c8877 327 #define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
bogdanm 84:0b3ab51c8877 328 #define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
bogdanm 84:0b3ab51c8877 329 #define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
bogdanm 84:0b3ab51c8877 330 /**
bogdanm 84:0b3ab51c8877 331 * @}
bogdanm 84:0b3ab51c8877 332 */
bogdanm 84:0b3ab51c8877 333
bogdanm 84:0b3ab51c8877 334
bogdanm 84:0b3ab51c8877 335
bogdanm 84:0b3ab51c8877 336 /** @defgroup IRDA_Request_Parameters IRDA Request Parameters
bogdanm 84:0b3ab51c8877 337 * @{
bogdanm 84:0b3ab51c8877 338 */
bogdanm 84:0b3ab51c8877 339 #define IRDA_AUTOBAUD_REQUEST ((uint16_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
bogdanm 84:0b3ab51c8877 340 #define IRDA_RXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
bogdanm 84:0b3ab51c8877 341 #define IRDA_TXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
bogdanm 84:0b3ab51c8877 342 #define IS_IRDA_REQUEST_PARAMETER(PARAM) (((PARAM) == IRDA_AUTOBAUD_REQUEST) || \
bogdanm 84:0b3ab51c8877 343 ((PARAM) == IRDA_SENDBREAK_REQUEST) || \
bogdanm 84:0b3ab51c8877 344 ((PARAM) == IRDA_MUTE_MODE_REQUEST) || \
bogdanm 84:0b3ab51c8877 345 ((PARAM) == IRDA_RXDATA_FLUSH_REQUEST) || \
bogdanm 84:0b3ab51c8877 346 ((PARAM) == IRDA_TXDATA_FLUSH_REQUEST))
bogdanm 84:0b3ab51c8877 347 /**
bogdanm 84:0b3ab51c8877 348 * @}
bogdanm 84:0b3ab51c8877 349 */
bogdanm 84:0b3ab51c8877 350
bogdanm 84:0b3ab51c8877 351 /** @defgroup IRDA_Interruption_Mask IRDA interruptions flag mask
bogdanm 84:0b3ab51c8877 352 * @{
bogdanm 84:0b3ab51c8877 353 */
bogdanm 84:0b3ab51c8877 354 #define IRDA_IT_MASK ((uint16_t)0x001F)
bogdanm 84:0b3ab51c8877 355 /**
bogdanm 84:0b3ab51c8877 356 * @}
bogdanm 84:0b3ab51c8877 357 */
bogdanm 84:0b3ab51c8877 358
bogdanm 84:0b3ab51c8877 359 /**
bogdanm 84:0b3ab51c8877 360 * @}
bogdanm 84:0b3ab51c8877 361 */
bogdanm 84:0b3ab51c8877 362
bogdanm 84:0b3ab51c8877 363
bogdanm 84:0b3ab51c8877 364 /* Exported macro ------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 365 /** @defgroup IRDA_Exported_Macros
bogdanm 84:0b3ab51c8877 366 * @{
bogdanm 84:0b3ab51c8877 367 */
bogdanm 84:0b3ab51c8877 368
bogdanm 84:0b3ab51c8877 369 /** @brief Reset IRDA handle state
bogdanm 84:0b3ab51c8877 370 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 371 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 372 * @retval None
bogdanm 84:0b3ab51c8877 373 */
bogdanm 84:0b3ab51c8877 374 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
bogdanm 84:0b3ab51c8877 375
bogdanm 84:0b3ab51c8877 376 /** @brief Check whether the specified IRDA flag is set or not.
bogdanm 84:0b3ab51c8877 377 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 378 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 379 * UART peripheral
bogdanm 84:0b3ab51c8877 380 * @param __FLAG__: specifies the flag to check.
bogdanm 84:0b3ab51c8877 381 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 382 * @arg IRDA_FLAG_REACK: Receive enable ackowledge flag
bogdanm 84:0b3ab51c8877 383 * @arg IRDA_FLAG_TEACK: Transmit enable ackowledge flag
bogdanm 84:0b3ab51c8877 384 * @arg IRDA_FLAG_BUSY: Busy flag
bogdanm 84:0b3ab51c8877 385 * @arg IRDA_FLAG_ABRF: Auto Baud rate detection flag
bogdanm 84:0b3ab51c8877 386 * @arg IRDA_FLAG_ABRE: Auto Baud rate detection error flag
bogdanm 84:0b3ab51c8877 387 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
bogdanm 84:0b3ab51c8877 388 * @arg IRDA_FLAG_TC: Transmission Complete flag
bogdanm 84:0b3ab51c8877 389 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
bogdanm 84:0b3ab51c8877 390 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
bogdanm 84:0b3ab51c8877 391 * @arg IRDA_FLAG_ORE: OverRun Error flag
bogdanm 84:0b3ab51c8877 392 * @arg IRDA_FLAG_NE: Noise Error flag
bogdanm 84:0b3ab51c8877 393 * @arg IRDA_FLAG_FE: Framing Error flag
bogdanm 84:0b3ab51c8877 394 * @arg IRDA_FLAG_PE: Parity Error flag
bogdanm 84:0b3ab51c8877 395 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 396 */
bogdanm 84:0b3ab51c8877 397 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
bogdanm 84:0b3ab51c8877 398
bogdanm 84:0b3ab51c8877 399 /** @brief Enable the specified IRDA interrupt.
bogdanm 84:0b3ab51c8877 400 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 401 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 402 * UART peripheral
bogdanm 84:0b3ab51c8877 403 * @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
bogdanm 84:0b3ab51c8877 404 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 405 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 406 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 407 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 408 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 409 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 410 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 411 * @retval None
bogdanm 84:0b3ab51c8877 412 */
bogdanm 84:0b3ab51c8877 413 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 |= (1 << ((__INTERRUPT__) & IRDA_IT_MASK))): \
bogdanm 84:0b3ab51c8877 414 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 |= (1 << ((__INTERRUPT__) & IRDA_IT_MASK))): \
bogdanm 84:0b3ab51c8877 415 ((__HANDLE__)->Instance->CR3 |= (1 << ((__INTERRUPT__) & IRDA_IT_MASK))))
bogdanm 84:0b3ab51c8877 416
bogdanm 84:0b3ab51c8877 417 /** @brief Disable the specified IRDA interrupt.
bogdanm 84:0b3ab51c8877 418 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 419 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 420 * @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
bogdanm 84:0b3ab51c8877 421 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 422 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 423 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 424 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 425 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 426 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 427 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 84:0b3ab51c8877 428 * @retval None
bogdanm 84:0b3ab51c8877 429 */
bogdanm 84:0b3ab51c8877 430 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & IRDA_IT_MASK))): \
bogdanm 84:0b3ab51c8877 431 ((((uint8_t)(__INTERRUPT__)) >> 5) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & IRDA_IT_MASK))): \
bogdanm 84:0b3ab51c8877 432 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & IRDA_IT_MASK))))
bogdanm 84:0b3ab51c8877 433
bogdanm 84:0b3ab51c8877 434 /** @brief Check whether the specified IRDA interrupt has occurred or not.
bogdanm 84:0b3ab51c8877 435 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 436 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 437 * @param __IT__: specifies the IRDA interrupt source to check.
bogdanm 84:0b3ab51c8877 438 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 439 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 440 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 441 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 442 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 443 * @arg IRDA_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 444 * @arg IRDA_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 445 * @arg IRDA_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 446 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 447 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 448 */
bogdanm 84:0b3ab51c8877 449 #define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
bogdanm 84:0b3ab51c8877 450
bogdanm 84:0b3ab51c8877 451 /** @brief Check whether the specified IRDA interrupt source is enabled.
bogdanm 84:0b3ab51c8877 452 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 453 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 454 * @param __IT__: specifies the IRDA interrupt source to check.
bogdanm 84:0b3ab51c8877 455 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 456 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 84:0b3ab51c8877 457 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 84:0b3ab51c8877 458 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 84:0b3ab51c8877 459 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 84:0b3ab51c8877 460 * @arg IRDA_IT_ORE: OverRun Error interrupt
bogdanm 84:0b3ab51c8877 461 * @arg IRDA_IT_NE: Noise Error interrupt
bogdanm 84:0b3ab51c8877 462 * @arg IRDA_IT_FE: Framing Error interrupt
bogdanm 84:0b3ab51c8877 463 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 84:0b3ab51c8877 464 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 84:0b3ab51c8877 465 */
bogdanm 84:0b3ab51c8877 466 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \
bogdanm 84:0b3ab51c8877 467 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & IRDA_IT_MASK)))
bogdanm 84:0b3ab51c8877 468
bogdanm 84:0b3ab51c8877 469 /** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
bogdanm 84:0b3ab51c8877 470 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 471 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 472 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
bogdanm 84:0b3ab51c8877 473 * to clear the corresponding interrupt
bogdanm 84:0b3ab51c8877 474 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 475 * @arg IRDA_CLEAR_PEF: Parity Error Clear Flag
bogdanm 84:0b3ab51c8877 476 * @arg IRDA_CLEAR_FEF: Framing Error Clear Flag
bogdanm 84:0b3ab51c8877 477 * @arg IRDA_CLEAR_NEF: Noise detected Clear Flag
bogdanm 84:0b3ab51c8877 478 * @arg IRDA_CLEAR_OREF: OverRun Error Clear Flag
bogdanm 84:0b3ab51c8877 479 * @arg IRDA_CLEAR_TCF: Transmission Complete Clear Flag
bogdanm 84:0b3ab51c8877 480 * @retval None
bogdanm 84:0b3ab51c8877 481 */
bogdanm 84:0b3ab51c8877 482 #define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__))
bogdanm 84:0b3ab51c8877 483
bogdanm 84:0b3ab51c8877 484 /** @brief Set a specific IRDA request flag.
bogdanm 84:0b3ab51c8877 485 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 486 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 487 * @param __REQ__: specifies the request flag to set
bogdanm 84:0b3ab51c8877 488 * This parameter can be one of the following values:
bogdanm 84:0b3ab51c8877 489 * @arg IRDA_AUTOBAUD_REQUEST: Auto-Baud Rate Request
bogdanm 84:0b3ab51c8877 490 * @arg IRDA_RXDATA_FLUSH_REQUEST: Receive Data flush Request
bogdanm 84:0b3ab51c8877 491 * @arg IRDA_TXDATA_FLUSH_REQUEST: Transmit data flush Request
bogdanm 84:0b3ab51c8877 492 *
bogdanm 84:0b3ab51c8877 493 * @retval None
bogdanm 84:0b3ab51c8877 494 */
bogdanm 84:0b3ab51c8877 495 #define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
bogdanm 84:0b3ab51c8877 496
bogdanm 84:0b3ab51c8877 497 /** @brief Enable UART/USART associated to IRDA Handle
bogdanm 84:0b3ab51c8877 498 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 499 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 500 * @retval None
bogdanm 84:0b3ab51c8877 501 */
bogdanm 84:0b3ab51c8877 502 #define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 84:0b3ab51c8877 503
bogdanm 84:0b3ab51c8877 504 /** @brief Disable UART/USART associated to IRDA Handle
bogdanm 84:0b3ab51c8877 505 * @param __HANDLE__: specifies the IRDA Handle.
bogdanm 84:0b3ab51c8877 506 * The Handle Instance which can be USART1 or USART2.
bogdanm 84:0b3ab51c8877 507 * @retval None
bogdanm 84:0b3ab51c8877 508 */
bogdanm 84:0b3ab51c8877 509 #define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 84:0b3ab51c8877 510
bogdanm 84:0b3ab51c8877 511 /** @brief Ensure that IRDA Baud rate is less or equal to maximum value
bogdanm 84:0b3ab51c8877 512 * @param __BAUDRATE__: specifies the IRDA Baudrate set by the user.
bogdanm 84:0b3ab51c8877 513 * @retval True or False
bogdanm 84:0b3ab51c8877 514 */
bogdanm 84:0b3ab51c8877 515 #define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201)
bogdanm 84:0b3ab51c8877 516
bogdanm 84:0b3ab51c8877 517 /** @brief Ensure that IRDA prescaler value is strictly larger than 0
bogdanm 84:0b3ab51c8877 518 * @param __PRESCALER__: specifies the IRDA prescaler value set by the user.
bogdanm 84:0b3ab51c8877 519 * @retval True or False
bogdanm 84:0b3ab51c8877 520 */
bogdanm 84:0b3ab51c8877 521 #define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0)
bogdanm 84:0b3ab51c8877 522
bogdanm 84:0b3ab51c8877 523 /**
bogdanm 84:0b3ab51c8877 524 * @}
bogdanm 84:0b3ab51c8877 525 */
bogdanm 84:0b3ab51c8877 526
bogdanm 84:0b3ab51c8877 527 /* Include IRDA HAL Extension module */
bogdanm 84:0b3ab51c8877 528 #include "stm32l0xx_hal_irda_ex.h"
bogdanm 84:0b3ab51c8877 529
bogdanm 84:0b3ab51c8877 530 /* Exported functions --------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 531 /* Initialization/de-initialization methods **********************************/
bogdanm 84:0b3ab51c8877 532 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 533 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 534 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 535 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 536
bogdanm 84:0b3ab51c8877 537 /* IO operation methods *******************************************************/
bogdanm 84:0b3ab51c8877 538 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 539 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 84:0b3ab51c8877 540 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 541 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 542 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 543 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 84:0b3ab51c8877 544 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 545 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 546 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 547 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 548
bogdanm 84:0b3ab51c8877 549 /* Peripheral State methods **************************************************/
bogdanm 84:0b3ab51c8877 550 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 551 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
bogdanm 84:0b3ab51c8877 552
bogdanm 84:0b3ab51c8877 553 /**
bogdanm 84:0b3ab51c8877 554 * @}
bogdanm 84:0b3ab51c8877 555 */
bogdanm 84:0b3ab51c8877 556
bogdanm 84:0b3ab51c8877 557 /**
bogdanm 84:0b3ab51c8877 558 * @}
bogdanm 84:0b3ab51c8877 559 */
bogdanm 84:0b3ab51c8877 560
bogdanm 84:0b3ab51c8877 561 #ifdef __cplusplus
bogdanm 84:0b3ab51c8877 562 }
bogdanm 84:0b3ab51c8877 563 #endif
bogdanm 84:0b3ab51c8877 564
bogdanm 84:0b3ab51c8877 565 #endif /* __STM32L0xx_HAL_IRDA_H */
bogdanm 84:0b3ab51c8877 566
bogdanm 84:0b3ab51c8877 567 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/