mattia griotti / Mbed 2 deprecated HelloWorld_IKS01A1

Simple "hello world" style program for X-NUCLEO-IKS01A1 MEMS Inertial

Dependencies:   BLE_API X_NUCLEO_IDB0XA1 X_NUCLEO_IKS01A1 mbed

Fork of HelloWorld_IKS01A1 by ST

misc.c@8:1c6281289d67, 2015-11-15 (annotated)

Committer:
n0tform3
Date:
Sun Nov 15 09:00:40 2015 +0000
Revision:
8:1c6281289d67
test with led

Who changed what in which revision?

UserRevisionLine numberNew contents of line
n0tform3 8:1c6281289d67 1 /**
n0tform3 8:1c6281289d67 2 ******************************************************************************
n0tform3 8:1c6281289d67 3 * @file misc.c
n0tform3 8:1c6281289d67 4 * @author MCD Application Team
n0tform3 8:1c6281289d67 5 * @version V1.0.0
n0tform3 8:1c6281289d67 6 * @date 30-September-2011
n0tform3 8:1c6281289d67 7 * @brief This file provides all the miscellaneous firmware functions (add-on
n0tform3 8:1c6281289d67 8 * to CMSIS functions).
n0tform3 8:1c6281289d67 9 *
n0tform3 8:1c6281289d67 10 * @verbatim
n0tform3 8:1c6281289d67 11 *
n0tform3 8:1c6281289d67 12 * ===================================================================
n0tform3 8:1c6281289d67 13 * How to configure Interrupts using driver
n0tform3 8:1c6281289d67 14 * ===================================================================
n0tform3 8:1c6281289d67 15 *
n0tform3 8:1c6281289d67 16 * This section provide functions allowing to configure the NVIC interrupts (IRQ).
n0tform3 8:1c6281289d67 17 * The Cortex-M4 exceptions are managed by CMSIS functions.
n0tform3 8:1c6281289d67 18 *
n0tform3 8:1c6281289d67 19 * 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
n0tform3 8:1c6281289d67 20 * function according to the following table.
n0tform3 8:1c6281289d67 21
n0tform3 8:1c6281289d67 22 * The table below gives the allowed values of the pre-emption priority and subpriority according
n0tform3 8:1c6281289d67 23 * to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
n0tform3 8:1c6281289d67 24 * ==========================================================================================================================
n0tform3 8:1c6281289d67 25 * NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
n0tform3 8:1c6281289d67 26 * ==========================================================================================================================
n0tform3 8:1c6281289d67 27 * NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
n0tform3 8:1c6281289d67 28 * | | | 4 bits for subpriority
n0tform3 8:1c6281289d67 29 * --------------------------------------------------------------------------------------------------------------------------
n0tform3 8:1c6281289d67 30 * NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
n0tform3 8:1c6281289d67 31 * | | | 3 bits for subpriority
n0tform3 8:1c6281289d67 32 * --------------------------------------------------------------------------------------------------------------------------
n0tform3 8:1c6281289d67 33 * NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
n0tform3 8:1c6281289d67 34 * | | | 2 bits for subpriority
n0tform3 8:1c6281289d67 35 * --------------------------------------------------------------------------------------------------------------------------
n0tform3 8:1c6281289d67 36 * NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
n0tform3 8:1c6281289d67 37 * | | | 1 bits for subpriority
n0tform3 8:1c6281289d67 38 * --------------------------------------------------------------------------------------------------------------------------
n0tform3 8:1c6281289d67 39 * NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
n0tform3 8:1c6281289d67 40 * | | | 0 bits for subpriority
n0tform3 8:1c6281289d67 41 * ==========================================================================================================================
n0tform3 8:1c6281289d67 42 *
n0tform3 8:1c6281289d67 43 * 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
n0tform3 8:1c6281289d67 44 *
n0tform3 8:1c6281289d67 45 * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
n0tform3 8:1c6281289d67 46 * The pending IRQ priority will be managed only by the subpriority.
n0tform3 8:1c6281289d67 47 *
n0tform3 8:1c6281289d67 48 * @note IRQ priority order (sorted by highest to lowest priority):
n0tform3 8:1c6281289d67 49 * - Lowest pre-emption priority
n0tform3 8:1c6281289d67 50 * - Lowest subpriority
n0tform3 8:1c6281289d67 51 * - Lowest hardware priority (IRQ number)
n0tform3 8:1c6281289d67 52 *
n0tform3 8:1c6281289d67 53 * @endverbatim
n0tform3 8:1c6281289d67 54 *
n0tform3 8:1c6281289d67 55 ******************************************************************************
n0tform3 8:1c6281289d67 56 * @attention
n0tform3 8:1c6281289d67 57 *
n0tform3 8:1c6281289d67 58 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
n0tform3 8:1c6281289d67 59 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
n0tform3 8:1c6281289d67 60 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
n0tform3 8:1c6281289d67 61 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
n0tform3 8:1c6281289d67 62 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
n0tform3 8:1c6281289d67 63 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
n0tform3 8:1c6281289d67 64 *
n0tform3 8:1c6281289d67 65 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
n0tform3 8:1c6281289d67 66 ******************************************************************************
n0tform3 8:1c6281289d67 67 */
n0tform3 8:1c6281289d67 68
n0tform3 8:1c6281289d67 69 /* Includes ------------------------------------------------------------------*/
n0tform3 8:1c6281289d67 70 #include "misc.h"
n0tform3 8:1c6281289d67 71
n0tform3 8:1c6281289d67 72 /** @addtogroup STM32F4xx_StdPeriph_Driver
n0tform3 8:1c6281289d67 73 * @{
n0tform3 8:1c6281289d67 74 */
n0tform3 8:1c6281289d67 75
n0tform3 8:1c6281289d67 76 /** @defgroup MISC
n0tform3 8:1c6281289d67 77 * @brief MISC driver modules
n0tform3 8:1c6281289d67 78 * @{
n0tform3 8:1c6281289d67 79 */
n0tform3 8:1c6281289d67 80
n0tform3 8:1c6281289d67 81 /* Private typedef -----------------------------------------------------------*/
n0tform3 8:1c6281289d67 82 /* Private define ------------------------------------------------------------*/
n0tform3 8:1c6281289d67 83 #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
n0tform3 8:1c6281289d67 84
n0tform3 8:1c6281289d67 85 /* Private macro -------------------------------------------------------------*/
n0tform3 8:1c6281289d67 86 /* Private variables ---------------------------------------------------------*/
n0tform3 8:1c6281289d67 87 /* Private function prototypes -----------------------------------------------*/
n0tform3 8:1c6281289d67 88 /* Private functions ---------------------------------------------------------*/
n0tform3 8:1c6281289d67 89
n0tform3 8:1c6281289d67 90 /** @defgroup MISC_Private_Functions
n0tform3 8:1c6281289d67 91 * @{
n0tform3 8:1c6281289d67 92 */
n0tform3 8:1c6281289d67 93
n0tform3 8:1c6281289d67 94 /**
n0tform3 8:1c6281289d67 95 * @brief Configures the priority grouping: pre-emption priority and subpriority.
n0tform3 8:1c6281289d67 96 * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
n0tform3 8:1c6281289d67 97 * This parameter can be one of the following values:
n0tform3 8:1c6281289d67 98 * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
n0tform3 8:1c6281289d67 99 * 4 bits for subpriority
n0tform3 8:1c6281289d67 100 * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
n0tform3 8:1c6281289d67 101 * 3 bits for subpriority
n0tform3 8:1c6281289d67 102 * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
n0tform3 8:1c6281289d67 103 * 2 bits for subpriority
n0tform3 8:1c6281289d67 104 * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
n0tform3 8:1c6281289d67 105 * 1 bits for subpriority
n0tform3 8:1c6281289d67 106 * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
n0tform3 8:1c6281289d67 107 * 0 bits for subpriority
n0tform3 8:1c6281289d67 108 * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
n0tform3 8:1c6281289d67 109 * The pending IRQ priority will be managed only by the subpriority.
n0tform3 8:1c6281289d67 110 * @retval None
n0tform3 8:1c6281289d67 111 */
n0tform3 8:1c6281289d67 112 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
n0tform3 8:1c6281289d67 113 {
n0tform3 8:1c6281289d67 114 /* Check the parameters */
n0tform3 8:1c6281289d67 115 assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
n0tform3 8:1c6281289d67 116
n0tform3 8:1c6281289d67 117 /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
n0tform3 8:1c6281289d67 118 SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
n0tform3 8:1c6281289d67 119 }
n0tform3 8:1c6281289d67 120
n0tform3 8:1c6281289d67 121 /**
n0tform3 8:1c6281289d67 122 * @brief Initializes the NVIC peripheral according to the specified
n0tform3 8:1c6281289d67 123 * parameters in the NVIC_InitStruct.
n0tform3 8:1c6281289d67 124 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
n0tform3 8:1c6281289d67 125 * function should be called before.
n0tform3 8:1c6281289d67 126 * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
n0tform3 8:1c6281289d67 127 * the configuration information for the specified NVIC peripheral.
n0tform3 8:1c6281289d67 128 * @retval None
n0tform3 8:1c6281289d67 129 */
n0tform3 8:1c6281289d67 130 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
n0tform3 8:1c6281289d67 131 {
n0tform3 8:1c6281289d67 132 uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
n0tform3 8:1c6281289d67 133
n0tform3 8:1c6281289d67 134 /* Check the parameters */
n0tform3 8:1c6281289d67 135 assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
n0tform3 8:1c6281289d67 136 assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
n0tform3 8:1c6281289d67 137 assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
n0tform3 8:1c6281289d67 138
n0tform3 8:1c6281289d67 139 if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
n0tform3 8:1c6281289d67 140 {
n0tform3 8:1c6281289d67 141 /* Compute the Corresponding IRQ Priority --------------------------------*/
n0tform3 8:1c6281289d67 142 tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
n0tform3 8:1c6281289d67 143 tmppre = (0x4 - tmppriority);
n0tform3 8:1c6281289d67 144 tmpsub = tmpsub >> tmppriority;
n0tform3 8:1c6281289d67 145
n0tform3 8:1c6281289d67 146 tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
n0tform3 8:1c6281289d67 147 tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
n0tform3 8:1c6281289d67 148
n0tform3 8:1c6281289d67 149 tmppriority = tmppriority << 0x04;
n0tform3 8:1c6281289d67 150
n0tform3 8:1c6281289d67 151 NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
n0tform3 8:1c6281289d67 152
n0tform3 8:1c6281289d67 153 /* Enable the Selected IRQ Channels --------------------------------------*/
n0tform3 8:1c6281289d67 154 NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
n0tform3 8:1c6281289d67 155 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
n0tform3 8:1c6281289d67 156 }
n0tform3 8:1c6281289d67 157 else
n0tform3 8:1c6281289d67 158 {
n0tform3 8:1c6281289d67 159 /* Disable the Selected IRQ Channels -------------------------------------*/
n0tform3 8:1c6281289d67 160 NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
n0tform3 8:1c6281289d67 161 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
n0tform3 8:1c6281289d67 162 }
n0tform3 8:1c6281289d67 163 }
n0tform3 8:1c6281289d67 164
n0tform3 8:1c6281289d67 165 /**
n0tform3 8:1c6281289d67 166 * @brief Sets the vector table location and Offset.
n0tform3 8:1c6281289d67 167 * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
n0tform3 8:1c6281289d67 168 * This parameter can be one of the following values:
n0tform3 8:1c6281289d67 169 * @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
n0tform3 8:1c6281289d67 170 * @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
n0tform3 8:1c6281289d67 171 * @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
n0tform3 8:1c6281289d67 172 * @retval None
n0tform3 8:1c6281289d67 173 */
n0tform3 8:1c6281289d67 174 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
n0tform3 8:1c6281289d67 175 {
n0tform3 8:1c6281289d67 176 /* Check the parameters */
n0tform3 8:1c6281289d67 177 assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
n0tform3 8:1c6281289d67 178 assert_param(IS_NVIC_OFFSET(Offset));
n0tform3 8:1c6281289d67 179
n0tform3 8:1c6281289d67 180 SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
n0tform3 8:1c6281289d67 181 }
n0tform3 8:1c6281289d67 182
n0tform3 8:1c6281289d67 183 /**
n0tform3 8:1c6281289d67 184 * @brief Selects the condition for the system to enter low power mode.
n0tform3 8:1c6281289d67 185 * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
n0tform3 8:1c6281289d67 186 * This parameter can be one of the following values:
n0tform3 8:1c6281289d67 187 * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
n0tform3 8:1c6281289d67 188 * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
n0tform3 8:1c6281289d67 189 * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
n0tform3 8:1c6281289d67 190 * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
n0tform3 8:1c6281289d67 191 * @retval None
n0tform3 8:1c6281289d67 192 */
n0tform3 8:1c6281289d67 193 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
n0tform3 8:1c6281289d67 194 {
n0tform3 8:1c6281289d67 195 /* Check the parameters */
n0tform3 8:1c6281289d67 196 assert_param(IS_NVIC_LP(LowPowerMode));
n0tform3 8:1c6281289d67 197 assert_param(IS_FUNCTIONAL_STATE(NewState));
n0tform3 8:1c6281289d67 198
n0tform3 8:1c6281289d67 199 if (NewState != DISABLE)
n0tform3 8:1c6281289d67 200 {
n0tform3 8:1c6281289d67 201 SCB->SCR |= LowPowerMode;
n0tform3 8:1c6281289d67 202 }
n0tform3 8:1c6281289d67 203 else
n0tform3 8:1c6281289d67 204 {
n0tform3 8:1c6281289d67 205 SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
n0tform3 8:1c6281289d67 206 }
n0tform3 8:1c6281289d67 207 }
n0tform3 8:1c6281289d67 208
n0tform3 8:1c6281289d67 209 /**
n0tform3 8:1c6281289d67 210 * @brief Configures the SysTick clock source.
n0tform3 8:1c6281289d67 211 * @param SysTick_CLKSource: specifies the SysTick clock source.
n0tform3 8:1c6281289d67 212 * This parameter can be one of the following values:
n0tform3 8:1c6281289d67 213 * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
n0tform3 8:1c6281289d67 214 * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
n0tform3 8:1c6281289d67 215 * @retval None
n0tform3 8:1c6281289d67 216 */
n0tform3 8:1c6281289d67 217 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
n0tform3 8:1c6281289d67 218 {
n0tform3 8:1c6281289d67 219 /* Check the parameters */
n0tform3 8:1c6281289d67 220 assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
n0tform3 8:1c6281289d67 221 if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
n0tform3 8:1c6281289d67 222 {
n0tform3 8:1c6281289d67 223 SysTick->CTRL |= SysTick_CLKSource_HCLK;
n0tform3 8:1c6281289d67 224 }
n0tform3 8:1c6281289d67 225 else
n0tform3 8:1c6281289d67 226 {
n0tform3 8:1c6281289d67 227 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
n0tform3 8:1c6281289d67 228 }
n0tform3 8:1c6281289d67 229 }
n0tform3 8:1c6281289d67 230
n0tform3 8:1c6281289d67 231 /**
n0tform3 8:1c6281289d67 232 * @}
n0tform3 8:1c6281289d67 233 */
n0tform3 8:1c6281289d67 234
n0tform3 8:1c6281289d67 235 /**
n0tform3 8:1c6281289d67 236 * @}
n0tform3 8:1c6281289d67 237 */
n0tform3 8:1c6281289d67 238
n0tform3 8:1c6281289d67 239 /**
n0tform3 8:1c6281289d67 240 * @}
n0tform3 8:1c6281289d67 241 */
n0tform3 8:1c6281289d67 242
n0tform3 8:1c6281289d67 243 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
n0tform3 8:1c6281289d67 244