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PeripheralNames.h@27:7110ebee3484, 2011-11-29 (annotated)

Committer:
emilmont
Date:
Tue Nov 29 14:59:27 2011 +0000
Revision:
27:7110ebee3484
Parent:
11:1c1ebd0324fa
Child:
28:667d61c9177b
New Libraries 11.11

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rolf.meyer@arm.com 11:1c1ebd0324fa 1 /* mbed Microcontroller Library - PeripheralNames
emilmont 27:7110ebee3484 2 * Copyright (C) 2008-2011 ARM Limited. All rights reserved.
rolf.meyer@arm.com 11:1c1ebd0324fa 3 *
rolf.meyer@arm.com 11:1c1ebd0324fa 4 * Provides the mappings for peripherals
rolf.meyer@arm.com 11:1c1ebd0324fa 5 */
rolf.meyer@arm.com 11:1c1ebd0324fa 6
rolf.meyer@arm.com 11:1c1ebd0324fa 7 #ifndef MBED_PERIPHERALNAMES_H
rolf.meyer@arm.com 11:1c1ebd0324fa 8 #define MBED_PERIPHERALNAMES_H
rolf.meyer@arm.com 11:1c1ebd0324fa 9
rolf.meyer@arm.com 11:1c1ebd0324fa 10 #include "cmsis.h"
rolf.meyer@arm.com 11:1c1ebd0324fa 11
rolf.meyer@arm.com 11:1c1ebd0324fa 12 #ifdef __cplusplus
rolf.meyer@arm.com 11:1c1ebd0324fa 13 extern "C" {
rolf.meyer@arm.com 11:1c1ebd0324fa 14 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 15
emilmont 27:7110ebee3484 16 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
emilmont 27:7110ebee3484 17
rolf.meyer@arm.com 11:1c1ebd0324fa 18 enum UARTName {
rolf.meyer@arm.com 11:1c1ebd0324fa 19 UART_0 = (int)LPC_UART0_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 20 , UART_1 = (int)LPC_UART1_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 21 , UART_2 = (int)LPC_UART2_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 22 , UART_3 = (int)LPC_UART3_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 23 };
emilmont 27:7110ebee3484 24 typedef enum UARTName UARTName;
rolf.meyer@arm.com 11:1c1ebd0324fa 25
rolf.meyer@arm.com 11:1c1ebd0324fa 26 enum ADCName {
rolf.meyer@arm.com 11:1c1ebd0324fa 27 ADC0_0 = 0
rolf.meyer@arm.com 11:1c1ebd0324fa 28 , ADC0_1
rolf.meyer@arm.com 11:1c1ebd0324fa 29 , ADC0_2
rolf.meyer@arm.com 11:1c1ebd0324fa 30 , ADC0_3
rolf.meyer@arm.com 11:1c1ebd0324fa 31 , ADC0_4
rolf.meyer@arm.com 11:1c1ebd0324fa 32 , ADC0_5
rolf.meyer@arm.com 11:1c1ebd0324fa 33 , ADC0_6
rolf.meyer@arm.com 11:1c1ebd0324fa 34 , ADC0_7
rolf.meyer@arm.com 11:1c1ebd0324fa 35 };
emilmont 27:7110ebee3484 36 typedef enum ADCName ADCName;
rolf.meyer@arm.com 11:1c1ebd0324fa 37
rolf.meyer@arm.com 11:1c1ebd0324fa 38 enum DACName {
rolf.meyer@arm.com 11:1c1ebd0324fa 39 DAC_0 = 0
rolf.meyer@arm.com 11:1c1ebd0324fa 40 };
emilmont 27:7110ebee3484 41 typedef enum DACName DACName;
rolf.meyer@arm.com 11:1c1ebd0324fa 42
rolf.meyer@arm.com 11:1c1ebd0324fa 43 enum SPIName {
rolf.meyer@arm.com 11:1c1ebd0324fa 44 SPI_0 = (int)LPC_SSP0_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 45 , SPI_1 = (int)LPC_SSP1_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 46 };
emilmont 27:7110ebee3484 47 typedef enum SPIName SPIName;
rolf.meyer@arm.com 11:1c1ebd0324fa 48
rolf.meyer@arm.com 11:1c1ebd0324fa 49 enum I2CName {
rolf.meyer@arm.com 11:1c1ebd0324fa 50 I2C_0 = (int)LPC_I2C0_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 51 , I2C_1 = (int)LPC_I2C1_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 52 , I2C_2 = (int)LPC_I2C2_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 53 };
emilmont 27:7110ebee3484 54 typedef enum I2CName I2CName;
rolf.meyer@arm.com 11:1c1ebd0324fa 55
rolf.meyer@arm.com 11:1c1ebd0324fa 56 enum PWMName {
rolf.meyer@arm.com 11:1c1ebd0324fa 57 PWM_1 = 1
rolf.meyer@arm.com 11:1c1ebd0324fa 58 , PWM_2
rolf.meyer@arm.com 11:1c1ebd0324fa 59 , PWM_3
rolf.meyer@arm.com 11:1c1ebd0324fa 60 , PWM_4
rolf.meyer@arm.com 11:1c1ebd0324fa 61 , PWM_5
rolf.meyer@arm.com 11:1c1ebd0324fa 62 , PWM_6
rolf.meyer@arm.com 11:1c1ebd0324fa 63 };
emilmont 27:7110ebee3484 64 typedef enum PWMName PWMName;
rolf.meyer@arm.com 11:1c1ebd0324fa 65
rolf.meyer@arm.com 11:1c1ebd0324fa 66 enum TimerName {
rolf.meyer@arm.com 11:1c1ebd0324fa 67 TIMER_0 = (int)LPC_TIM0_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 68 , TIMER_1 = (int)LPC_TIM1_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 69 , TIMER_2 = (int)LPC_TIM2_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 70 , TIMER_3 = (int)LPC_TIM3_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 71 };
emilmont 27:7110ebee3484 72 typedef enum TimerName TimerName;
rolf.meyer@arm.com 11:1c1ebd0324fa 73
rolf.meyer@arm.com 11:1c1ebd0324fa 74 enum CANName {
rolf.meyer@arm.com 11:1c1ebd0324fa 75 CAN_1 = (int)LPC_CAN1_BASE,
rolf.meyer@arm.com 11:1c1ebd0324fa 76 CAN_2 = (int)LPC_CAN2_BASE
rolf.meyer@arm.com 11:1c1ebd0324fa 77 };
emilmont 27:7110ebee3484 78 typedef enum CANName CANName;
rolf.meyer@arm.com 11:1c1ebd0324fa 79
rolf.meyer@arm.com 11:1c1ebd0324fa 80 #define STDIO_UART_TX USBTX
rolf.meyer@arm.com 11:1c1ebd0324fa 81 #define STDIO_UART_RX USBRX
rolf.meyer@arm.com 11:1c1ebd0324fa 82 #define STDIO_UART UART_0
rolf.meyer@arm.com 11:1c1ebd0324fa 83 #define US_TICKER_TIMER TIMER_3
rolf.meyer@arm.com 11:1c1ebd0324fa 84 #define US_TICKER_TIMER_IRQn TIMER3_IRQn
rolf.meyer@arm.com 11:1c1ebd0324fa 85
emilmont 27:7110ebee3484 86 #elif defined(TARGET_LPC11U24)
emilmont 27:7110ebee3484 87
emilmont 27:7110ebee3484 88 enum UARTName {
emilmont 27:7110ebee3484 89 UART_0 = (int)LPC_USART_BASE
emilmont 27:7110ebee3484 90 };
emilmont 27:7110ebee3484 91 typedef enum UARTName UARTName;
emilmont 27:7110ebee3484 92
emilmont 27:7110ebee3484 93 enum I2CName {
emilmont 27:7110ebee3484 94 I2C_0 = (int)LPC_I2C_BASE
emilmont 27:7110ebee3484 95 };
emilmont 27:7110ebee3484 96 typedef enum I2CName I2CName;
emilmont 27:7110ebee3484 97
emilmont 27:7110ebee3484 98 enum TimerName {
emilmont 27:7110ebee3484 99 TIMER_0 = (int)LPC_CT32B0_BASE
emilmont 27:7110ebee3484 100 , TIMER_1 = (int)LPC_CT32B1_BASE
emilmont 27:7110ebee3484 101 };
emilmont 27:7110ebee3484 102 typedef enum TimerName TimerName;
emilmont 27:7110ebee3484 103
emilmont 27:7110ebee3484 104 enum ADCName {
emilmont 27:7110ebee3484 105 ADC0_0 = 0
emilmont 27:7110ebee3484 106 , ADC0_1
emilmont 27:7110ebee3484 107 , ADC0_2
emilmont 27:7110ebee3484 108 , ADC0_3
emilmont 27:7110ebee3484 109 , ADC0_4
emilmont 27:7110ebee3484 110 , ADC0_5
emilmont 27:7110ebee3484 111 , ADC0_6
emilmont 27:7110ebee3484 112 , ADC0_7
emilmont 27:7110ebee3484 113 };
emilmont 27:7110ebee3484 114 typedef enum ADCName ADCName;
emilmont 27:7110ebee3484 115
emilmont 27:7110ebee3484 116 enum SPIName {
emilmont 27:7110ebee3484 117 SPI_0 = (int)LPC_SSP0_BASE
emilmont 27:7110ebee3484 118 , SPI_1 = (int)LPC_SSP1_BASE
emilmont 27:7110ebee3484 119 };
emilmont 27:7110ebee3484 120 typedef enum SPIName SPIName;
emilmont 27:7110ebee3484 121
emilmont 27:7110ebee3484 122 #define STDIO_UART_TX USBTX
emilmont 27:7110ebee3484 123 #define STDIO_UART_RX USBRX
emilmont 27:7110ebee3484 124 #define STDIO_UART UART_0
emilmont 27:7110ebee3484 125
emilmont 27:7110ebee3484 126 #define US_TICKER_TIMER TIMER_1
emilmont 27:7110ebee3484 127 #define US_TICKER_TIMER_IRQn TIMER_32_1_IRQn
emilmont 27:7110ebee3484 128
emilmont 27:7110ebee3484 129 #endif
emilmont 27:7110ebee3484 130
rolf.meyer@arm.com 11:1c1ebd0324fa 131 #ifdef __cplusplus
rolf.meyer@arm.com 11:1c1ebd0324fa 132 }
rolf.meyer@arm.com 11:1c1ebd0324fa 133 #endif
rolf.meyer@arm.com 11:1c1ebd0324fa 134
rolf.meyer@arm.com 11:1c1ebd0324fa 135 #endif