Nothing Special / mbed-STM32F100R6

mbed-dev library fork for STM32F100R6 microcontroller (LQFP64, 24MHz, 32kB flash, 4kB ram, 2-channel DAC, HDMI CEC, very cheap) . Use in online compiler (instead mbed library) with selected platform Nucleo F103RB.

Fork of mbed-dev by mbed official




Tested and working:

  • blink
  • system frequency 24Mhz (with external xtal 8Mhz)
  • stdio uart on pins PA_2-PA_3
  • Serial on pins PA_9-PA_10
  • AnalogOut on pins PA_4, PA_5 (DAC)
  • AnalogIn on pins PA_0, PA_1, PA_2, PA_3, PA_4, PA_5, PA_6, PA_7, PB_0, PB_1, PC_0, PC_1, PC_2, PC_3, PC_5, PC_5


    Notes:
  • TIM2 is used for mbed needs (eq Timer, Ticker, wait etc. )




    Simple test program:

    Import programtestF100R6

    simple tests for STM32F100R6 microcontroller with dedicated library

    Last commit 19 Mar 2017 by Nothing Special

targets/cmsis/core_cm4_simd.h@51:25d18ad142c8, 2017-03-19 (annotated)

Committer:
mega64
Date:
Sun Mar 19 23:16:34 2017 +0000
Revision:
51:25d18ad142c8
Parent:
0:9b334a45a8ff 
fixed incompatibility with the modified mbed environment Ch.n+1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file core_cm4_simd.h
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 0:9b334a45a8ff 4 * @version V3.20
bogdanm 0:9b334a45a8ff 5 * @date 25. February 2013
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * @note
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 ******************************************************************************/
bogdanm 0:9b334a45a8ff 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 0:9b334a45a8ff 11
bogdanm 0:9b334a45a8ff 12 All rights reserved.
bogdanm 0:9b334a45a8ff 13 Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 14 modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 15 - Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 16 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 18 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 19 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 0:9b334a45a8ff 21 to endorse or promote products derived from this software without
bogdanm 0:9b334a45a8ff 22 specific prior written permission.
bogdanm 0:9b334a45a8ff 23 *
bogdanm 0:9b334a45a8ff 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 0:9b334a45a8ff 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 0:9b334a45a8ff 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 0:9b334a45a8ff 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 0:9b334a45a8ff 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 0:9b334a45a8ff 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 0:9b334a45a8ff 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 0:9b334a45a8ff 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 0:9b334a45a8ff 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 35 ---------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 39 extern "C" {
bogdanm 0:9b334a45a8ff 40 #endif
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 0:9b334a45a8ff 43 #define __CORE_CM4_SIMD_H
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /*******************************************************************************
bogdanm 0:9b334a45a8ff 47 * Hardware Abstraction Layer
bogdanm 0:9b334a45a8ff 48 ******************************************************************************/
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 0:9b334a45a8ff 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 0:9b334a45a8ff 53 Access to dedicated SIMD instructions
bogdanm 0:9b334a45a8ff 54 @{
bogdanm 0:9b334a45a8ff 55 */
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 0:9b334a45a8ff 58 /* ARM armcc specific functions */
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 61 #define __SADD8 __sadd8
bogdanm 0:9b334a45a8ff 62 #define __QADD8 __qadd8
bogdanm 0:9b334a45a8ff 63 #define __SHADD8 __shadd8
bogdanm 0:9b334a45a8ff 64 #define __UADD8 __uadd8
bogdanm 0:9b334a45a8ff 65 #define __UQADD8 __uqadd8
bogdanm 0:9b334a45a8ff 66 #define __UHADD8 __uhadd8
bogdanm 0:9b334a45a8ff 67 #define __SSUB8 __ssub8
bogdanm 0:9b334a45a8ff 68 #define __QSUB8 __qsub8
bogdanm 0:9b334a45a8ff 69 #define __SHSUB8 __shsub8
bogdanm 0:9b334a45a8ff 70 #define __USUB8 __usub8
bogdanm 0:9b334a45a8ff 71 #define __UQSUB8 __uqsub8
bogdanm 0:9b334a45a8ff 72 #define __UHSUB8 __uhsub8
bogdanm 0:9b334a45a8ff 73 #define __SADD16 __sadd16
bogdanm 0:9b334a45a8ff 74 #define __QADD16 __qadd16
bogdanm 0:9b334a45a8ff 75 #define __SHADD16 __shadd16
bogdanm 0:9b334a45a8ff 76 #define __UADD16 __uadd16
bogdanm 0:9b334a45a8ff 77 #define __UQADD16 __uqadd16
bogdanm 0:9b334a45a8ff 78 #define __UHADD16 __uhadd16
bogdanm 0:9b334a45a8ff 79 #define __SSUB16 __ssub16
bogdanm 0:9b334a45a8ff 80 #define __QSUB16 __qsub16
bogdanm 0:9b334a45a8ff 81 #define __SHSUB16 __shsub16
bogdanm 0:9b334a45a8ff 82 #define __USUB16 __usub16
bogdanm 0:9b334a45a8ff 83 #define __UQSUB16 __uqsub16
bogdanm 0:9b334a45a8ff 84 #define __UHSUB16 __uhsub16
bogdanm 0:9b334a45a8ff 85 #define __SASX __sasx
bogdanm 0:9b334a45a8ff 86 #define __QASX __qasx
bogdanm 0:9b334a45a8ff 87 #define __SHASX __shasx
bogdanm 0:9b334a45a8ff 88 #define __UASX __uasx
bogdanm 0:9b334a45a8ff 89 #define __UQASX __uqasx
bogdanm 0:9b334a45a8ff 90 #define __UHASX __uhasx
bogdanm 0:9b334a45a8ff 91 #define __SSAX __ssax
bogdanm 0:9b334a45a8ff 92 #define __QSAX __qsax
bogdanm 0:9b334a45a8ff 93 #define __SHSAX __shsax
bogdanm 0:9b334a45a8ff 94 #define __USAX __usax
bogdanm 0:9b334a45a8ff 95 #define __UQSAX __uqsax
bogdanm 0:9b334a45a8ff 96 #define __UHSAX __uhsax
bogdanm 0:9b334a45a8ff 97 #define __USAD8 __usad8
bogdanm 0:9b334a45a8ff 98 #define __USADA8 __usada8
bogdanm 0:9b334a45a8ff 99 #define __SSAT16 __ssat16
bogdanm 0:9b334a45a8ff 100 #define __USAT16 __usat16
bogdanm 0:9b334a45a8ff 101 #define __UXTB16 __uxtb16
bogdanm 0:9b334a45a8ff 102 #define __UXTAB16 __uxtab16
bogdanm 0:9b334a45a8ff 103 #define __SXTB16 __sxtb16
bogdanm 0:9b334a45a8ff 104 #define __SXTAB16 __sxtab16
bogdanm 0:9b334a45a8ff 105 #define __SMUAD __smuad
bogdanm 0:9b334a45a8ff 106 #define __SMUADX __smuadx
bogdanm 0:9b334a45a8ff 107 #define __SMLAD __smlad
bogdanm 0:9b334a45a8ff 108 #define __SMLADX __smladx
bogdanm 0:9b334a45a8ff 109 #define __SMLALD __smlald
bogdanm 0:9b334a45a8ff 110 #define __SMLALDX __smlaldx
bogdanm 0:9b334a45a8ff 111 #define __SMUSD __smusd
bogdanm 0:9b334a45a8ff 112 #define __SMUSDX __smusdx
bogdanm 0:9b334a45a8ff 113 #define __SMLSD __smlsd
bogdanm 0:9b334a45a8ff 114 #define __SMLSDX __smlsdx
bogdanm 0:9b334a45a8ff 115 #define __SMLSLD __smlsld
bogdanm 0:9b334a45a8ff 116 #define __SMLSLDX __smlsldx
bogdanm 0:9b334a45a8ff 117 #define __SEL __sel
bogdanm 0:9b334a45a8ff 118 #define __QADD __qadd
bogdanm 0:9b334a45a8ff 119 #define __QSUB __qsub
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 0:9b334a45a8ff 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 0:9b334a45a8ff 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 0:9b334a45a8ff 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 131
bogdanm 0:9b334a45a8ff 132
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 0:9b334a45a8ff 135 /* IAR iccarm specific functions */
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 138 #include <cmsis_iar.h>
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142
bogdanm 0:9b334a45a8ff 143
bogdanm 0:9b334a45a8ff 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 0:9b334a45a8ff 145 /* TI CCS specific functions */
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 148 #include <cmsis_ccs.h>
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 0:9b334a45a8ff 155 /* GNU gcc specific functions */
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 159 {
bogdanm 0:9b334a45a8ff 160 uint32_t result;
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 163 return(result);
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 uint32_t result;
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 171 return(result);
bogdanm 0:9b334a45a8ff 172 }
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 175 {
bogdanm 0:9b334a45a8ff 176 uint32_t result;
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 179 return(result);
bogdanm 0:9b334a45a8ff 180 }
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 183 {
bogdanm 0:9b334a45a8ff 184 uint32_t result;
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 187 return(result);
bogdanm 0:9b334a45a8ff 188 }
bogdanm 0:9b334a45a8ff 189
bogdanm 0:9b334a45a8ff 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 191 {
bogdanm 0:9b334a45a8ff 192 uint32_t result;
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 195 return(result);
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 199 {
bogdanm 0:9b334a45a8ff 200 uint32_t result;
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 203 return(result);
bogdanm 0:9b334a45a8ff 204 }
bogdanm 0:9b334a45a8ff 205
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 208 {
bogdanm 0:9b334a45a8ff 209 uint32_t result;
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 212 return(result);
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 216 {
bogdanm 0:9b334a45a8ff 217 uint32_t result;
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 220 return(result);
bogdanm 0:9b334a45a8ff 221 }
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 224 {
bogdanm 0:9b334a45a8ff 225 uint32_t result;
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 228 return(result);
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 232 {
bogdanm 0:9b334a45a8ff 233 uint32_t result;
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 236 return(result);
bogdanm 0:9b334a45a8ff 237 }
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 240 {
bogdanm 0:9b334a45a8ff 241 uint32_t result;
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 244 return(result);
bogdanm 0:9b334a45a8ff 245 }
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 248 {
bogdanm 0:9b334a45a8ff 249 uint32_t result;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 252 return(result);
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 257 {
bogdanm 0:9b334a45a8ff 258 uint32_t result;
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 261 return(result);
bogdanm 0:9b334a45a8ff 262 }
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 265 {
bogdanm 0:9b334a45a8ff 266 uint32_t result;
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 269 return(result);
bogdanm 0:9b334a45a8ff 270 }
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 273 {
bogdanm 0:9b334a45a8ff 274 uint32_t result;
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 277 return(result);
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 281 {
bogdanm 0:9b334a45a8ff 282 uint32_t result;
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 285 return(result);
bogdanm 0:9b334a45a8ff 286 }
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 289 {
bogdanm 0:9b334a45a8ff 290 uint32_t result;
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 293 return(result);
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 297 {
bogdanm 0:9b334a45a8ff 298 uint32_t result;
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 301 return(result);
bogdanm 0:9b334a45a8ff 302 }
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 305 {
bogdanm 0:9b334a45a8ff 306 uint32_t result;
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 309 return(result);
bogdanm 0:9b334a45a8ff 310 }
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 uint32_t result;
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 317 return(result);
bogdanm 0:9b334a45a8ff 318 }
bogdanm 0:9b334a45a8ff 319
bogdanm 0:9b334a45a8ff 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 321 {
bogdanm 0:9b334a45a8ff 322 uint32_t result;
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 325 return(result);
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 329 {
bogdanm 0:9b334a45a8ff 330 uint32_t result;
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 333 return(result);
bogdanm 0:9b334a45a8ff 334 }
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 337 {
bogdanm 0:9b334a45a8ff 338 uint32_t result;
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 341 return(result);
bogdanm 0:9b334a45a8ff 342 }
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 345 {
bogdanm 0:9b334a45a8ff 346 uint32_t result;
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 349 return(result);
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 353 {
bogdanm 0:9b334a45a8ff 354 uint32_t result;
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 357 return(result);
bogdanm 0:9b334a45a8ff 358 }
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 361 {
bogdanm 0:9b334a45a8ff 362 uint32_t result;
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 365 return(result);
bogdanm 0:9b334a45a8ff 366 }
bogdanm 0:9b334a45a8ff 367
bogdanm 0:9b334a45a8ff 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 369 {
bogdanm 0:9b334a45a8ff 370 uint32_t result;
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 373 return(result);
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 uint32_t result;
bogdanm 0:9b334a45a8ff 379
bogdanm 0:9b334a45a8ff 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 381 return(result);
bogdanm 0:9b334a45a8ff 382 }
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 385 {
bogdanm 0:9b334a45a8ff 386 uint32_t result;
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 389 return(result);
bogdanm 0:9b334a45a8ff 390 }
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 393 {
bogdanm 0:9b334a45a8ff 394 uint32_t result;
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 397 return(result);
bogdanm 0:9b334a45a8ff 398 }
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 401 {
bogdanm 0:9b334a45a8ff 402 uint32_t result;
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 405 return(result);
bogdanm 0:9b334a45a8ff 406 }
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 409 {
bogdanm 0:9b334a45a8ff 410 uint32_t result;
bogdanm 0:9b334a45a8ff 411
bogdanm 0:9b334a45a8ff 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 413 return(result);
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415
bogdanm 0:9b334a45a8ff 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 417 {
bogdanm 0:9b334a45a8ff 418 uint32_t result;
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 421 return(result);
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 425 {
bogdanm 0:9b334a45a8ff 426 uint32_t result;
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 429 return(result);
bogdanm 0:9b334a45a8ff 430 }
bogdanm 0:9b334a45a8ff 431
bogdanm 0:9b334a45a8ff 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 433 {
bogdanm 0:9b334a45a8ff 434 uint32_t result;
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 437 return(result);
bogdanm 0:9b334a45a8ff 438 }
bogdanm 0:9b334a45a8ff 439
bogdanm 0:9b334a45a8ff 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 441 {
bogdanm 0:9b334a45a8ff 442 uint32_t result;
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 445 return(result);
bogdanm 0:9b334a45a8ff 446 }
bogdanm 0:9b334a45a8ff 447
bogdanm 0:9b334a45a8ff 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 uint32_t result;
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 453 return(result);
bogdanm 0:9b334a45a8ff 454 }
bogdanm 0:9b334a45a8ff 455
bogdanm 0:9b334a45a8ff 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 457 {
bogdanm 0:9b334a45a8ff 458 uint32_t result;
bogdanm 0:9b334a45a8ff 459
bogdanm 0:9b334a45a8ff 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 461 return(result);
bogdanm 0:9b334a45a8ff 462 }
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 465 ({ \
bogdanm 0:9b334a45a8ff 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 468 __RES; \
bogdanm 0:9b334a45a8ff 469 })
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 #define __USAT16(ARG1,ARG2) \
bogdanm 0:9b334a45a8ff 472 ({ \
bogdanm 0:9b334a45a8ff 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 0:9b334a45a8ff 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 0:9b334a45a8ff 475 __RES; \
bogdanm 0:9b334a45a8ff 476 })
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 0:9b334a45a8ff 479 {
bogdanm 0:9b334a45a8ff 480 uint32_t result;
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 0:9b334a45a8ff 483 return(result);
bogdanm 0:9b334a45a8ff 484 }
bogdanm 0:9b334a45a8ff 485
bogdanm 0:9b334a45a8ff 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 487 {
bogdanm 0:9b334a45a8ff 488 uint32_t result;
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 491 return(result);
bogdanm 0:9b334a45a8ff 492 }
bogdanm 0:9b334a45a8ff 493
bogdanm 0:9b334a45a8ff 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 0:9b334a45a8ff 495 {
bogdanm 0:9b334a45a8ff 496 uint32_t result;
bogdanm 0:9b334a45a8ff 497
bogdanm 0:9b334a45a8ff 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 0:9b334a45a8ff 499 return(result);
bogdanm 0:9b334a45a8ff 500 }
bogdanm 0:9b334a45a8ff 501
bogdanm 0:9b334a45a8ff 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 503 {
bogdanm 0:9b334a45a8ff 504 uint32_t result;
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 507 return(result);
bogdanm 0:9b334a45a8ff 508 }
bogdanm 0:9b334a45a8ff 509
bogdanm 0:9b334a45a8ff 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 511 {
bogdanm 0:9b334a45a8ff 512 uint32_t result;
bogdanm 0:9b334a45a8ff 513
bogdanm 0:9b334a45a8ff 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 515 return(result);
bogdanm 0:9b334a45a8ff 516 }
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 519 {
bogdanm 0:9b334a45a8ff 520 uint32_t result;
bogdanm 0:9b334a45a8ff 521
bogdanm 0:9b334a45a8ff 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 523 return(result);
bogdanm 0:9b334a45a8ff 524 }
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 527 {
bogdanm 0:9b334a45a8ff 528 uint32_t result;
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 531 return(result);
bogdanm 0:9b334a45a8ff 532 }
bogdanm 0:9b334a45a8ff 533
bogdanm 0:9b334a45a8ff 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 535 {
bogdanm 0:9b334a45a8ff 536 uint32_t result;
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 539 return(result);
bogdanm 0:9b334a45a8ff 540 }
bogdanm 0:9b334a45a8ff 541
bogdanm 0:9b334a45a8ff 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 543 ({ \
bogdanm 0:9b334a45a8ff 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 0:9b334a45a8ff 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 0:9b334a45a8ff 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 0:9b334a45a8ff 547 })
bogdanm 0:9b334a45a8ff 548
bogdanm 0:9b334a45a8ff 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 550 ({ \
bogdanm 0:9b334a45a8ff 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 0:9b334a45a8ff 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 0:9b334a45a8ff 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 0:9b334a45a8ff 554 })
bogdanm 0:9b334a45a8ff 555
bogdanm 0:9b334a45a8ff 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 557 {
bogdanm 0:9b334a45a8ff 558 uint32_t result;
bogdanm 0:9b334a45a8ff 559
bogdanm 0:9b334a45a8ff 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 561 return(result);
bogdanm 0:9b334a45a8ff 562 }
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 565 {
bogdanm 0:9b334a45a8ff 566 uint32_t result;
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 569 return(result);
bogdanm 0:9b334a45a8ff 570 }
bogdanm 0:9b334a45a8ff 571
bogdanm 0:9b334a45a8ff 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 573 {
bogdanm 0:9b334a45a8ff 574 uint32_t result;
bogdanm 0:9b334a45a8ff 575
bogdanm 0:9b334a45a8ff 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 577 return(result);
bogdanm 0:9b334a45a8ff 578 }
bogdanm 0:9b334a45a8ff 579
bogdanm 0:9b334a45a8ff 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 0:9b334a45a8ff 581 {
bogdanm 0:9b334a45a8ff 582 uint32_t result;
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 585 return(result);
bogdanm 0:9b334a45a8ff 586 }
bogdanm 0:9b334a45a8ff 587
bogdanm 0:9b334a45a8ff 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 589 ({ \
bogdanm 0:9b334a45a8ff 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 0:9b334a45a8ff 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 0:9b334a45a8ff 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 0:9b334a45a8ff 593 })
bogdanm 0:9b334a45a8ff 594
bogdanm 0:9b334a45a8ff 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 596 ({ \
bogdanm 0:9b334a45a8ff 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 0:9b334a45a8ff 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 0:9b334a45a8ff 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 0:9b334a45a8ff 600 })
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 uint32_t result;
bogdanm 0:9b334a45a8ff 605
bogdanm 0:9b334a45a8ff 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 607 return(result);
bogdanm 0:9b334a45a8ff 608 }
bogdanm 0:9b334a45a8ff 609
bogdanm 0:9b334a45a8ff 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 611 {
bogdanm 0:9b334a45a8ff 612 uint32_t result;
bogdanm 0:9b334a45a8ff 613
bogdanm 0:9b334a45a8ff 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 615 return(result);
bogdanm 0:9b334a45a8ff 616 }
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 uint32_t result;
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 0:9b334a45a8ff 623 return(result);
bogdanm 0:9b334a45a8ff 624 }
bogdanm 0:9b334a45a8ff 625
bogdanm 0:9b334a45a8ff 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 627 ({ \
bogdanm 0:9b334a45a8ff 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 0:9b334a45a8ff 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 0:9b334a45a8ff 630 __RES; \
bogdanm 0:9b334a45a8ff 631 })
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 0:9b334a45a8ff 634 ({ \
bogdanm 0:9b334a45a8ff 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 0:9b334a45a8ff 636 if (ARG3 == 0) \
bogdanm 0:9b334a45a8ff 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 0:9b334a45a8ff 638 else \
bogdanm 0:9b334a45a8ff 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 0:9b334a45a8ff 640 __RES; \
bogdanm 0:9b334a45a8ff 641 })
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 0:9b334a45a8ff 644 {
bogdanm 0:9b334a45a8ff 645 int32_t result;
bogdanm 0:9b334a45a8ff 646
bogdanm 0:9b334a45a8ff 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 0:9b334a45a8ff 648 return(result);
bogdanm 0:9b334a45a8ff 649 }
bogdanm 0:9b334a45a8ff 650
bogdanm 0:9b334a45a8ff 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653
bogdanm 0:9b334a45a8ff 654
bogdanm 0:9b334a45a8ff 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 0:9b334a45a8ff 656 /* TASKING carm specific functions */
bogdanm 0:9b334a45a8ff 657
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 660 /* not yet supported */
bogdanm 0:9b334a45a8ff 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663
bogdanm 0:9b334a45a8ff 664 #endif
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 0:9b334a45a8ff 667
bogdanm 0:9b334a45a8ff 668
bogdanm 0:9b334a45a8ff 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 0:9b334a45a8ff 670
bogdanm 0:9b334a45a8ff 671 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 672 }
bogdanm 0:9b334a45a8ff 673 #endif