mbed-dev library fork for STM32F100R6 microcontroller (LQFP64, 24MHz, 32kB flash, 4kB ram, 2-channel DAC, HDMI CEC, very cheap) . Use in online compiler (instead mbed library) with selected platform Nucleo F103RB.

Fork of mbed-dev by mbed official




Tested and working:

  • blink
  • system frequency 24Mhz (with external xtal 8Mhz)
  • stdio uart on pins PA_2-PA_3
  • Serial on pins PA_9-PA_10
  • AnalogOut on pins PA_4, PA_5 (DAC)
  • AnalogIn on pins PA_0, PA_1, PA_2, PA_3, PA_4, PA_5, PA_6, PA_7, PB_0, PB_1, PC_0, PC_1, PC_2, PC_3, PC_5, PC_5


    Notes:
  • TIM2 is used for mbed needs (eq Timer, Ticker, wait etc. )




    Simple test program:

    Import programtestF100R6

    simple tests for STM32F100R6 microcontroller with dedicated library

Committer:
mega64
Date:
Sun Mar 19 23:16:34 2017 +0000
Revision:
51:25d18ad142c8
Parent:
50:d2a4a5ee894a
fixed incompatibility with the modified mbed environment Ch.n+1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "SPI.h"
bogdanm 0:9b334a45a8ff 17
mega64 50:d2a4a5ee894a 18 // for 100F6 not implemented (N.S.)
mega64 50:d2a4a5ee894a 19 #undef DEVICE_SPI_ASYNCH
mega64 50:d2a4a5ee894a 20
mega64 50:d2a4a5ee894a 21
bogdanm 0:9b334a45a8ff 22 #if DEVICE_SPI
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 namespace mbed {
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 27 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
bogdanm 0:9b334a45a8ff 28 #endif
bogdanm 0:9b334a45a8ff 29
bogdanm 0:9b334a45a8ff 30 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
bogdanm 0:9b334a45a8ff 31 _spi(),
bogdanm 0:9b334a45a8ff 32 #if DEVICE_SPI_ASYNCH
bogdanm 0:9b334a45a8ff 33 _irq(this),
bogdanm 0:9b334a45a8ff 34 _usage(DMA_USAGE_NEVER),
bogdanm 0:9b334a45a8ff 35 #endif
bogdanm 0:9b334a45a8ff 36 _bits(8),
bogdanm 0:9b334a45a8ff 37 _mode(0),
bogdanm 0:9b334a45a8ff 38 _hz(1000000) {
bogdanm 0:9b334a45a8ff 39 spi_init(&_spi, mosi, miso, sclk, ssel);
bogdanm 0:9b334a45a8ff 40 spi_format(&_spi, _bits, _mode, 0);
bogdanm 0:9b334a45a8ff 41 spi_frequency(&_spi, _hz);
bogdanm 0:9b334a45a8ff 42 }
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 void SPI::format(int bits, int mode) {
bogdanm 0:9b334a45a8ff 45 _bits = bits;
bogdanm 0:9b334a45a8ff 46 _mode = mode;
bogdanm 0:9b334a45a8ff 47 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
bogdanm 0:9b334a45a8ff 48 aquire();
bogdanm 0:9b334a45a8ff 49 }
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 void SPI::frequency(int hz) {
bogdanm 0:9b334a45a8ff 52 _hz = hz;
bogdanm 0:9b334a45a8ff 53 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
bogdanm 0:9b334a45a8ff 54 aquire();
bogdanm 0:9b334a45a8ff 55 }
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 SPI* SPI::_owner = NULL;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
bogdanm 0:9b334a45a8ff 60 void SPI::aquire() {
bogdanm 0:9b334a45a8ff 61 if (_owner != this) {
bogdanm 0:9b334a45a8ff 62 spi_format(&_spi, _bits, _mode, 0);
bogdanm 0:9b334a45a8ff 63 spi_frequency(&_spi, _hz);
bogdanm 0:9b334a45a8ff 64 _owner = this;
bogdanm 0:9b334a45a8ff 65 }
bogdanm 0:9b334a45a8ff 66 }
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 int SPI::write(int value) {
bogdanm 0:9b334a45a8ff 69 aquire();
bogdanm 0:9b334a45a8ff 70 return spi_master_write(&_spi, value);
bogdanm 0:9b334a45a8ff 71 }
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 #if DEVICE_SPI_ASYNCH
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
bogdanm 0:9b334a45a8ff 76 {
bogdanm 0:9b334a45a8ff 77 if (spi_active(&_spi)) {
bogdanm 0:9b334a45a8ff 78 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
bogdanm 0:9b334a45a8ff 79 }
bogdanm 0:9b334a45a8ff 80 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
bogdanm 0:9b334a45a8ff 81 return 0;
bogdanm 0:9b334a45a8ff 82 }
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 void SPI::abort_transfer()
bogdanm 0:9b334a45a8ff 85 {
bogdanm 0:9b334a45a8ff 86 spi_abort_asynch(&_spi);
bogdanm 0:9b334a45a8ff 87 #if TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 88 dequeue_transaction();
bogdanm 0:9b334a45a8ff 89 #endif
bogdanm 0:9b334a45a8ff 90 }
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 void SPI::clear_transfer_buffer()
bogdanm 0:9b334a45a8ff 94 {
bogdanm 0:9b334a45a8ff 95 #if TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 96 _transaction_buffer.reset();
bogdanm 0:9b334a45a8ff 97 #endif
bogdanm 0:9b334a45a8ff 98 }
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 void SPI::abort_all_transfers()
bogdanm 0:9b334a45a8ff 101 {
bogdanm 0:9b334a45a8ff 102 clear_transfer_buffer();
bogdanm 0:9b334a45a8ff 103 abort_transfer();
bogdanm 0:9b334a45a8ff 104 }
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 int SPI::set_dma_usage(DMAUsage usage)
bogdanm 0:9b334a45a8ff 107 {
bogdanm 0:9b334a45a8ff 108 if (spi_active(&_spi)) {
bogdanm 0:9b334a45a8ff 109 return -1;
bogdanm 0:9b334a45a8ff 110 }
bogdanm 0:9b334a45a8ff 111 _usage = usage;
bogdanm 0:9b334a45a8ff 112 return 0;
bogdanm 0:9b334a45a8ff 113 }
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
bogdanm 0:9b334a45a8ff 116 {
bogdanm 0:9b334a45a8ff 117 #if TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 118 transaction_t t;
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 t.tx_buffer = const_cast<void *>(tx_buffer);
bogdanm 0:9b334a45a8ff 121 t.tx_length = tx_length;
bogdanm 0:9b334a45a8ff 122 t.rx_buffer = rx_buffer;
bogdanm 0:9b334a45a8ff 123 t.rx_length = rx_length;
bogdanm 0:9b334a45a8ff 124 t.event = event;
bogdanm 0:9b334a45a8ff 125 t.callback = callback;
bogdanm 0:9b334a45a8ff 126 t.width = bit_width;
bogdanm 0:9b334a45a8ff 127 Transaction<SPI> transaction(this, t);
bogdanm 0:9b334a45a8ff 128 if (_transaction_buffer.full()) {
bogdanm 0:9b334a45a8ff 129 return -1; // the buffer is full
bogdanm 0:9b334a45a8ff 130 } else {
bogdanm 0:9b334a45a8ff 131 _transaction_buffer.push(transaction);
bogdanm 0:9b334a45a8ff 132 return 0;
bogdanm 0:9b334a45a8ff 133 }
bogdanm 0:9b334a45a8ff 134 #else
bogdanm 0:9b334a45a8ff 135 return -1;
bogdanm 0:9b334a45a8ff 136 #endif
bogdanm 0:9b334a45a8ff 137 }
bogdanm 0:9b334a45a8ff 138
bogdanm 0:9b334a45a8ff 139 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
bogdanm 0:9b334a45a8ff 140 {
bogdanm 0:9b334a45a8ff 141 aquire();
bogdanm 0:9b334a45a8ff 142 _callback = callback;
bogdanm 0:9b334a45a8ff 143 _irq.callback(&SPI::irq_handler_asynch);
bogdanm 0:9b334a45a8ff 144 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
bogdanm 0:9b334a45a8ff 145 }
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 #if TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 void SPI::start_transaction(transaction_t *data)
bogdanm 0:9b334a45a8ff 150 {
bogdanm 0:9b334a45a8ff 151 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 void SPI::dequeue_transaction()
bogdanm 0:9b334a45a8ff 155 {
bogdanm 0:9b334a45a8ff 156 Transaction<SPI> t;
bogdanm 0:9b334a45a8ff 157 if (_transaction_buffer.pop(t)) {
bogdanm 0:9b334a45a8ff 158 SPI* obj = t.get_object();
bogdanm 0:9b334a45a8ff 159 transaction_t* data = t.get_transaction();
bogdanm 0:9b334a45a8ff 160 obj->start_transaction(data);
bogdanm 0:9b334a45a8ff 161 }
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 #endif
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 void SPI::irq_handler_asynch(void)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 int event = spi_irq_handler_asynch(&_spi);
bogdanm 0:9b334a45a8ff 169 if (_callback && (event & SPI_EVENT_ALL)) {
bogdanm 0:9b334a45a8ff 170 _callback.call(event & SPI_EVENT_ALL);
bogdanm 0:9b334a45a8ff 171 }
bogdanm 0:9b334a45a8ff 172 #if TRANSACTION_QUEUE_SIZE_SPI
bogdanm 0:9b334a45a8ff 173 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
bogdanm 0:9b334a45a8ff 174 // SPI peripheral is free (event happend), dequeue transaction
bogdanm 0:9b334a45a8ff 175 dequeue_transaction();
bogdanm 0:9b334a45a8ff 176 }
bogdanm 0:9b334a45a8ff 177 #endif
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 #endif
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 } // namespace mbed
bogdanm 0:9b334a45a8ff 183
bogdanm 0:9b334a45a8ff 184 #endif