Alvaro Cassinelli / hardwareIO

Hardware IO control: mirrors, lock in

adc.cpp@0:c19dc1d8b225, 2011-10-17 (annotated)

Committer:
mbedalvaro
Date:
Mon Oct 17 13:23:06 2011 +0000
Revision:
0:c19dc1d8b225
I wonder if perhaps it would be better to avoid a hardwareIO object, and instead have a set of global hardware functions... I think I will do this in the next revisions of this library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbedalvaro 0:c19dc1d8b225 1 /* mbed Library - ADC
mbedalvaro 0:c19dc1d8b225 2 * Copyright (c) 2010, sblandford
mbedalvaro 0:c19dc1d8b225 3 * released under MIT license http://mbed.org/licence/mit
mbedalvaro 0:c19dc1d8b225 4 */
mbedalvaro 0:c19dc1d8b225 5 #include "mbed.h"
mbedalvaro 0:c19dc1d8b225 6 #include "adc.h"
mbedalvaro 0:c19dc1d8b225 7
mbedalvaro 0:c19dc1d8b225 8
mbedalvaro 0:c19dc1d8b225 9 ADC adc(ADC_SAMPLE_RATE, 1);
mbedalvaro 0:c19dc1d8b225 10
mbedalvaro 0:c19dc1d8b225 11 ADC *ADC::instance;
mbedalvaro 0:c19dc1d8b225 12
mbedalvaro 0:c19dc1d8b225 13 ADC::ADC(int sample_rate, int cclk_div)
mbedalvaro 0:c19dc1d8b225 14 {
mbedalvaro 0:c19dc1d8b225 15
mbedalvaro 0:c19dc1d8b225 16 int i, adc_clk_freq, pclk, clock_div, max_div=1;
mbedalvaro 0:c19dc1d8b225 17
mbedalvaro 0:c19dc1d8b225 18 //Work out CCLK
mbedalvaro 0:c19dc1d8b225 19 adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
mbedalvaro 0:c19dc1d8b225 20 int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
mbedalvaro 0:c19dc1d8b225 21 int n = (LPC_SC->PLL0CFG >> 16) + 1;
mbedalvaro 0:c19dc1d8b225 22 int cclkdiv = LPC_SC->CCLKCFG + 1;
mbedalvaro 0:c19dc1d8b225 23 int Fcco = (2 * m * XTAL_FREQ) / n;
mbedalvaro 0:c19dc1d8b225 24 int cclk = Fcco / cclkdiv;
mbedalvaro 0:c19dc1d8b225 25
mbedalvaro 0:c19dc1d8b225 26 //Power up the ADC
mbedalvaro 0:c19dc1d8b225 27 LPC_SC->PCONP |= (1 << 12);
mbedalvaro 0:c19dc1d8b225 28 //Set clock at cclk / 1.
mbedalvaro 0:c19dc1d8b225 29 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
mbedalvaro 0:c19dc1d8b225 30 switch (cclk_div) {
mbedalvaro 0:c19dc1d8b225 31 case 1:
mbedalvaro 0:c19dc1d8b225 32 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 0:c19dc1d8b225 33 break;
mbedalvaro 0:c19dc1d8b225 34 case 2:
mbedalvaro 0:c19dc1d8b225 35 LPC_SC->PCLKSEL0 |= 0x2 << 24;
mbedalvaro 0:c19dc1d8b225 36 break;
mbedalvaro 0:c19dc1d8b225 37 case 4:
mbedalvaro 0:c19dc1d8b225 38 LPC_SC->PCLKSEL0 |= 0x0 << 24;
mbedalvaro 0:c19dc1d8b225 39 break;
mbedalvaro 0:c19dc1d8b225 40 case 8:
mbedalvaro 0:c19dc1d8b225 41 LPC_SC->PCLKSEL0 |= 0x3 << 24;
mbedalvaro 0:c19dc1d8b225 42 break;
mbedalvaro 0:c19dc1d8b225 43 default:
mbedalvaro 0:c19dc1d8b225 44 fprintf(stderr, "Warning: ADC CCLK clock divider must be 1, 2, 4 or 8. %u supplied.\n",
mbedalvaro 0:c19dc1d8b225 45 cclk_div);
mbedalvaro 0:c19dc1d8b225 46 fprintf(stderr, "Defaulting to 1.\n");
mbedalvaro 0:c19dc1d8b225 47 LPC_SC->PCLKSEL0 |= 0x1 << 24;
mbedalvaro 0:c19dc1d8b225 48 break;
mbedalvaro 0:c19dc1d8b225 49 }
mbedalvaro 0:c19dc1d8b225 50 pclk = cclk / cclk_div;
mbedalvaro 0:c19dc1d8b225 51 clock_div=pclk / adc_clk_freq;
mbedalvaro 0:c19dc1d8b225 52
mbedalvaro 0:c19dc1d8b225 53 if (clock_div > 0xFF) {
mbedalvaro 0:c19dc1d8b225 54 fprintf(stderr, "Warning: Clock division is %u which is above 255 limit. Re-Setting at limit.\n",
mbedalvaro 0:c19dc1d8b225 55 clock_div);
mbedalvaro 0:c19dc1d8b225 56 clock_div=0xFF;
mbedalvaro 0:c19dc1d8b225 57 }
mbedalvaro 0:c19dc1d8b225 58 if (clock_div == 0) {
mbedalvaro 0:c19dc1d8b225 59 fprintf(stderr, "Warning: Clock division is 0. Re-Setting to 1.\n");
mbedalvaro 0:c19dc1d8b225 60 clock_div=1;
mbedalvaro 0:c19dc1d8b225 61 }
mbedalvaro 0:c19dc1d8b225 62
mbedalvaro 0:c19dc1d8b225 63 _adc_clk_freq=pclk / clock_div;
mbedalvaro 0:c19dc1d8b225 64 if (_adc_clk_freq > MAX_ADC_CLOCK) {
mbedalvaro 0:c19dc1d8b225 65 fprintf(stderr, "Warning: Actual ADC sample rate of %u which is above %u limit\n",
mbedalvaro 0:c19dc1d8b225 66 _adc_clk_freq / CLKS_PER_SAMPLE, MAX_ADC_CLOCK / CLKS_PER_SAMPLE);
mbedalvaro 0:c19dc1d8b225 67 while ((pclk / max_div) > MAX_ADC_CLOCK) max_div++;
mbedalvaro 0:c19dc1d8b225 68 fprintf(stderr, "Maximum recommended sample rate is %u\n", (pclk / max_div) / CLKS_PER_SAMPLE);
mbedalvaro 0:c19dc1d8b225 69 }
mbedalvaro 0:c19dc1d8b225 70
mbedalvaro 0:c19dc1d8b225 71 LPC_ADC->ADCR =
mbedalvaro 0:c19dc1d8b225 72 ((clock_div - 1 ) << 8 ) | //Clkdiv
mbedalvaro 0:c19dc1d8b225 73 ( 1 << 21 ); //A/D operational
mbedalvaro 0:c19dc1d8b225 74
mbedalvaro 0:c19dc1d8b225 75 //Default no channels enabled
mbedalvaro 0:c19dc1d8b225 76 LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:c19dc1d8b225 77 //Default NULL global custom isr
mbedalvaro 0:c19dc1d8b225 78 _adc_g_isr = NULL;
mbedalvaro 0:c19dc1d8b225 79 //Initialize arrays
mbedalvaro 0:c19dc1d8b225 80 for (i=7; i>=0; i--) {
mbedalvaro 0:c19dc1d8b225 81 _adc_data[i] = 0;
mbedalvaro 0:c19dc1d8b225 82 _adc_isr[i] = NULL;
mbedalvaro 0:c19dc1d8b225 83 }
mbedalvaro 0:c19dc1d8b225 84
mbedalvaro 0:c19dc1d8b225 85
mbedalvaro 0:c19dc1d8b225 86 //* Attach IRQ
mbedalvaro 0:c19dc1d8b225 87 instance = this;
mbedalvaro 0:c19dc1d8b225 88 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 0:c19dc1d8b225 89
mbedalvaro 0:c19dc1d8b225 90 //Disable global interrupt
mbedalvaro 0:c19dc1d8b225 91 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 0:c19dc1d8b225 92
mbedalvaro 0:c19dc1d8b225 93 };
mbedalvaro 0:c19dc1d8b225 94
mbedalvaro 0:c19dc1d8b225 95 void ADC::_adcisr(void)
mbedalvaro 0:c19dc1d8b225 96 {
mbedalvaro 0:c19dc1d8b225 97 instance->adcisr();
mbedalvaro 0:c19dc1d8b225 98 }
mbedalvaro 0:c19dc1d8b225 99
mbedalvaro 0:c19dc1d8b225 100
mbedalvaro 0:c19dc1d8b225 101 void ADC::adcisr(void)
mbedalvaro 0:c19dc1d8b225 102 {
mbedalvaro 0:c19dc1d8b225 103 uint32_t stat;
mbedalvaro 0:c19dc1d8b225 104 int chan;
mbedalvaro 0:c19dc1d8b225 105
mbedalvaro 0:c19dc1d8b225 106 // Read status
mbedalvaro 0:c19dc1d8b225 107 stat = LPC_ADC->ADSTAT;
mbedalvaro 0:c19dc1d8b225 108 //Scan channels for over-run or done and update array
mbedalvaro 0:c19dc1d8b225 109 if (stat & 0x0101) _adc_data[0] = LPC_ADC->ADDR0;
mbedalvaro 0:c19dc1d8b225 110 if (stat & 0x0202) _adc_data[1] = LPC_ADC->ADDR1;
mbedalvaro 0:c19dc1d8b225 111 if (stat & 0x0404) _adc_data[2] = LPC_ADC->ADDR2;
mbedalvaro 0:c19dc1d8b225 112 if (stat & 0x0808) _adc_data[3] = LPC_ADC->ADDR3;
mbedalvaro 0:c19dc1d8b225 113 if (stat & 0x1010) _adc_data[4] = LPC_ADC->ADDR4;
mbedalvaro 0:c19dc1d8b225 114 if (stat & 0x2020) _adc_data[5] = LPC_ADC->ADDR5;
mbedalvaro 0:c19dc1d8b225 115 if (stat & 0x4040) _adc_data[6] = LPC_ADC->ADDR6;
mbedalvaro 0:c19dc1d8b225 116 if (stat & 0x8080) _adc_data[7] = LPC_ADC->ADDR7;
mbedalvaro 0:c19dc1d8b225 117
mbedalvaro 0:c19dc1d8b225 118 // Channel that triggered interrupt
mbedalvaro 0:c19dc1d8b225 119 chan = (LPC_ADC->ADGDR >> 24) & 0x07;
mbedalvaro 0:c19dc1d8b225 120 //User defined interrupt handlers
mbedalvaro 0:c19dc1d8b225 121 if (_adc_isr[chan] != NULL)
mbedalvaro 0:c19dc1d8b225 122 _adc_isr[chan](_adc_data[chan]);
mbedalvaro 0:c19dc1d8b225 123 if (_adc_g_isr != NULL)
mbedalvaro 0:c19dc1d8b225 124 _adc_g_isr(chan, _adc_data[chan]);
mbedalvaro 0:c19dc1d8b225 125 return;
mbedalvaro 0:c19dc1d8b225 126 }
mbedalvaro 0:c19dc1d8b225 127
mbedalvaro 0:c19dc1d8b225 128 int ADC::_pin_to_channel(PinName pin) {
mbedalvaro 0:c19dc1d8b225 129 int chan;
mbedalvaro 0:c19dc1d8b225 130 switch (pin) {
mbedalvaro 0:c19dc1d8b225 131 case p15://=p0.23 of LPC1768
mbedalvaro 0:c19dc1d8b225 132 default:
mbedalvaro 0:c19dc1d8b225 133 chan=0;
mbedalvaro 0:c19dc1d8b225 134 break;
mbedalvaro 0:c19dc1d8b225 135 case p16://=p0.24 of LPC1768
mbedalvaro 0:c19dc1d8b225 136 chan=1;
mbedalvaro 0:c19dc1d8b225 137 break;
mbedalvaro 0:c19dc1d8b225 138 case p17://=p0.25 of LPC1768
mbedalvaro 0:c19dc1d8b225 139 chan=2;
mbedalvaro 0:c19dc1d8b225 140 break;
mbedalvaro 0:c19dc1d8b225 141 case p18://=p0.26 of LPC1768
mbedalvaro 0:c19dc1d8b225 142 chan=3;
mbedalvaro 0:c19dc1d8b225 143 break;
mbedalvaro 0:c19dc1d8b225 144 case p19://=p1.30 of LPC1768
mbedalvaro 0:c19dc1d8b225 145 chan=4;
mbedalvaro 0:c19dc1d8b225 146 break;
mbedalvaro 0:c19dc1d8b225 147 case p20://=p1.31 of LPC1768
mbedalvaro 0:c19dc1d8b225 148 chan=5;
mbedalvaro 0:c19dc1d8b225 149 break;
mbedalvaro 0:c19dc1d8b225 150 }
mbedalvaro 0:c19dc1d8b225 151 return(chan);
mbedalvaro 0:c19dc1d8b225 152 }
mbedalvaro 0:c19dc1d8b225 153
mbedalvaro 0:c19dc1d8b225 154 PinName ADC::channel_to_pin(int chan) {
mbedalvaro 0:c19dc1d8b225 155 const PinName pin[8]={p15, p16, p17, p18, p19, p20, p15, p15};
mbedalvaro 0:c19dc1d8b225 156
mbedalvaro 0:c19dc1d8b225 157 if ((chan < 0) || (chan > 5))
mbedalvaro 0:c19dc1d8b225 158 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 0:c19dc1d8b225 159 return(pin[chan & 0x07]);
mbedalvaro 0:c19dc1d8b225 160 }
mbedalvaro 0:c19dc1d8b225 161
mbedalvaro 0:c19dc1d8b225 162
mbedalvaro 0:c19dc1d8b225 163 int ADC::channel_to_pin_number(int chan) {
mbedalvaro 0:c19dc1d8b225 164 const int pin[8]={15, 16, 17, 18, 19, 20, 0, 0};
mbedalvaro 0:c19dc1d8b225 165
mbedalvaro 0:c19dc1d8b225 166 if ((chan < 0) || (chan > 5))
mbedalvaro 0:c19dc1d8b225 167 fprintf(stderr, "ADC channel %u is outside range available to MBED pins.\n", chan);
mbedalvaro 0:c19dc1d8b225 168 return(pin[chan & 0x07]);
mbedalvaro 0:c19dc1d8b225 169 }
mbedalvaro 0:c19dc1d8b225 170
mbedalvaro 0:c19dc1d8b225 171
mbedalvaro 0:c19dc1d8b225 172 uint32_t ADC::_data_of_pin(PinName pin) {
mbedalvaro 0:c19dc1d8b225 173 //If in burst mode and at least one interrupt enabled then
mbedalvaro 0:c19dc1d8b225 174 //take all values from _adc_data
mbedalvaro 0:c19dc1d8b225 175 if (burst() && (LPC_ADC->ADINTEN & 0x3F)) {
mbedalvaro 0:c19dc1d8b225 176 return(_adc_data[_pin_to_channel(pin)]);
mbedalvaro 0:c19dc1d8b225 177 } else {
mbedalvaro 0:c19dc1d8b225 178 //Return current register value or last value from interrupt
mbedalvaro 0:c19dc1d8b225 179 switch (pin) {
mbedalvaro 0:c19dc1d8b225 180 case p15://=p0.23 of LPC1768
mbedalvaro 0:c19dc1d8b225 181 default:
mbedalvaro 0:c19dc1d8b225 182 return(LPC_ADC->ADINTEN & 0x01?_adc_data[0]:LPC_ADC->ADDR0);
mbedalvaro 0:c19dc1d8b225 183 case p16://=p0.24 of LPC1768
mbedalvaro 0:c19dc1d8b225 184 return(LPC_ADC->ADINTEN & 0x02?_adc_data[1]:LPC_ADC->ADDR1);
mbedalvaro 0:c19dc1d8b225 185 case p17://=p0.25 of LPC1768
mbedalvaro 0:c19dc1d8b225 186 return(LPC_ADC->ADINTEN & 0x04?_adc_data[2]:LPC_ADC->ADDR2);
mbedalvaro 0:c19dc1d8b225 187 case p18://=p0.26 of LPC1768:
mbedalvaro 0:c19dc1d8b225 188 return(LPC_ADC->ADINTEN & 0x08?_adc_data[3]:LPC_ADC->ADDR3);
mbedalvaro 0:c19dc1d8b225 189 case p19://=p1.30 of LPC1768
mbedalvaro 0:c19dc1d8b225 190 return(LPC_ADC->ADINTEN & 0x10?_adc_data[4]:LPC_ADC->ADDR4);
mbedalvaro 0:c19dc1d8b225 191 case p20://=p1.31 of LPC1768
mbedalvaro 0:c19dc1d8b225 192 return(LPC_ADC->ADINTEN & 0x20?_adc_data[5]:LPC_ADC->ADDR5);
mbedalvaro 0:c19dc1d8b225 193 }
mbedalvaro 0:c19dc1d8b225 194 }
mbedalvaro 0:c19dc1d8b225 195 }
mbedalvaro 0:c19dc1d8b225 196
mbedalvaro 0:c19dc1d8b225 197 //Enable or disable an ADC pin
mbedalvaro 0:c19dc1d8b225 198 void ADC::setup(PinName pin, int state) {
mbedalvaro 0:c19dc1d8b225 199 int chan;
mbedalvaro 0:c19dc1d8b225 200 chan=_pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 201 if ((state & 1) == 1) {
mbedalvaro 0:c19dc1d8b225 202 switch(pin) {
mbedalvaro 0:c19dc1d8b225 203 case p15://=p0.23 of LPC1768
mbedalvaro 0:c19dc1d8b225 204 default:
mbedalvaro 0:c19dc1d8b225 205 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:c19dc1d8b225 206 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 14;
mbedalvaro 0:c19dc1d8b225 207 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:c19dc1d8b225 208 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 14;
mbedalvaro 0:c19dc1d8b225 209 break;
mbedalvaro 0:c19dc1d8b225 210 case p16://=p0.24 of LPC1768
mbedalvaro 0:c19dc1d8b225 211 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:c19dc1d8b225 212 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 16;
mbedalvaro 0:c19dc1d8b225 213 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:c19dc1d8b225 214 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 16;
mbedalvaro 0:c19dc1d8b225 215 break;
mbedalvaro 0:c19dc1d8b225 216 case p17://=p0.25 of LPC1768
mbedalvaro 0:c19dc1d8b225 217 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:c19dc1d8b225 218 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 18;
mbedalvaro 0:c19dc1d8b225 219 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:c19dc1d8b225 220 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 18;
mbedalvaro 0:c19dc1d8b225 221 break;
mbedalvaro 0:c19dc1d8b225 222 case p18://=p0.26 of LPC1768:
mbedalvaro 0:c19dc1d8b225 223 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:c19dc1d8b225 224 LPC_PINCON->PINSEL1 |= (unsigned int)0x1 << 20;
mbedalvaro 0:c19dc1d8b225 225 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:c19dc1d8b225 226 LPC_PINCON->PINMODE1 |= (unsigned int)0x2 << 20;
mbedalvaro 0:c19dc1d8b225 227 break;
mbedalvaro 0:c19dc1d8b225 228 case p19://=p1.30 of LPC1768
mbedalvaro 0:c19dc1d8b225 229 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:c19dc1d8b225 230 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 28;
mbedalvaro 0:c19dc1d8b225 231 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:c19dc1d8b225 232 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 28;
mbedalvaro 0:c19dc1d8b225 233 break;
mbedalvaro 0:c19dc1d8b225 234 case p20://=p1.31 of LPC1768
mbedalvaro 0:c19dc1d8b225 235 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:c19dc1d8b225 236 LPC_PINCON->PINSEL3 |= (unsigned int)0x3 << 30;
mbedalvaro 0:c19dc1d8b225 237 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:c19dc1d8b225 238 LPC_PINCON->PINMODE3 |= (unsigned int)0x2 << 30;
mbedalvaro 0:c19dc1d8b225 239 break;
mbedalvaro 0:c19dc1d8b225 240 }
mbedalvaro 0:c19dc1d8b225 241 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 0:c19dc1d8b225 242 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:c19dc1d8b225 243 //Select channel
mbedalvaro 0:c19dc1d8b225 244 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 0:c19dc1d8b225 245 }
mbedalvaro 0:c19dc1d8b225 246 else {
mbedalvaro 0:c19dc1d8b225 247 switch(pin) {
mbedalvaro 0:c19dc1d8b225 248 case p15://=p0.23 of LPC1768
mbedalvaro 0:c19dc1d8b225 249 default:
mbedalvaro 0:c19dc1d8b225 250 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:c19dc1d8b225 251 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 14);
mbedalvaro 0:c19dc1d8b225 252 break;
mbedalvaro 0:c19dc1d8b225 253 case p16://=p0.24 of LPC1768
mbedalvaro 0:c19dc1d8b225 254 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:c19dc1d8b225 255 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 16);
mbedalvaro 0:c19dc1d8b225 256 break;
mbedalvaro 0:c19dc1d8b225 257 case p17://=p0.25 of LPC1768
mbedalvaro 0:c19dc1d8b225 258 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:c19dc1d8b225 259 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 18);
mbedalvaro 0:c19dc1d8b225 260 break;
mbedalvaro 0:c19dc1d8b225 261 case p18://=p0.26 of LPC1768:
mbedalvaro 0:c19dc1d8b225 262 LPC_PINCON->PINSEL1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:c19dc1d8b225 263 LPC_PINCON->PINMODE1 &= ~((unsigned int)0x3 << 20);
mbedalvaro 0:c19dc1d8b225 264 break;
mbedalvaro 0:c19dc1d8b225 265 case p19://=p1.30 of LPC1768
mbedalvaro 0:c19dc1d8b225 266 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:c19dc1d8b225 267 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 28);
mbedalvaro 0:c19dc1d8b225 268 break;
mbedalvaro 0:c19dc1d8b225 269 case p20://=p1.31 of LPC1768
mbedalvaro 0:c19dc1d8b225 270 LPC_PINCON->PINSEL3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:c19dc1d8b225 271 LPC_PINCON->PINMODE3 &= ~((unsigned int)0x3 << 30);
mbedalvaro 0:c19dc1d8b225 272 break;
mbedalvaro 0:c19dc1d8b225 273 }
mbedalvaro 0:c19dc1d8b225 274 LPC_ADC->ADCR &= ~(1 << chan);
mbedalvaro 0:c19dc1d8b225 275 }
mbedalvaro 0:c19dc1d8b225 276 }
mbedalvaro 0:c19dc1d8b225 277 //Return channel enabled/disabled state
mbedalvaro 0:c19dc1d8b225 278 int ADC::setup(PinName pin) {
mbedalvaro 0:c19dc1d8b225 279 int chan;
mbedalvaro 0:c19dc1d8b225 280
mbedalvaro 0:c19dc1d8b225 281 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 282 return((LPC_ADC->ADCR & (1 << chan)) >> chan);
mbedalvaro 0:c19dc1d8b225 283 }
mbedalvaro 0:c19dc1d8b225 284
mbedalvaro 0:c19dc1d8b225 285 //Select channel already setup
mbedalvaro 0:c19dc1d8b225 286 void ADC::select(PinName pin) {
mbedalvaro 0:c19dc1d8b225 287 int chan;
mbedalvaro 0:c19dc1d8b225 288
mbedalvaro 0:c19dc1d8b225 289 //Only one channel can be selected at a time if not in burst mode
mbedalvaro 0:c19dc1d8b225 290 if (!burst()) LPC_ADC->ADCR &= ~0xFF;
mbedalvaro 0:c19dc1d8b225 291 //Select channel
mbedalvaro 0:c19dc1d8b225 292 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 293 LPC_ADC->ADCR |= (1 << chan);
mbedalvaro 0:c19dc1d8b225 294 }
mbedalvaro 0:c19dc1d8b225 295
mbedalvaro 0:c19dc1d8b225 296 //Enable or disable burst mode
mbedalvaro 0:c19dc1d8b225 297 void ADC::burst(int state) {
mbedalvaro 0:c19dc1d8b225 298 if ((state & 1) == 1) {
mbedalvaro 0:c19dc1d8b225 299 if (startmode(0) != 0)
mbedalvaro 0:c19dc1d8b225 300 fprintf(stderr, "Warning. startmode is %u. Must be 0 for burst mode.\n", startmode(0));
mbedalvaro 0:c19dc1d8b225 301 LPC_ADC->ADCR |= (1 << 16);
mbedalvaro 0:c19dc1d8b225 302 }
mbedalvaro 0:c19dc1d8b225 303 else
mbedalvaro 0:c19dc1d8b225 304 LPC_ADC->ADCR &= ~(1 << 16);
mbedalvaro 0:c19dc1d8b225 305 }
mbedalvaro 0:c19dc1d8b225 306 //Return burst mode state
mbedalvaro 0:c19dc1d8b225 307 int ADC::burst(void) {
mbedalvaro 0:c19dc1d8b225 308 return((LPC_ADC->ADCR & (1 << 16)) >> 16);
mbedalvaro 0:c19dc1d8b225 309 }
mbedalvaro 0:c19dc1d8b225 310
mbedalvaro 0:c19dc1d8b225 311 //Set startmode and edge
mbedalvaro 0:c19dc1d8b225 312 void ADC::startmode(int mode, int edge) {
mbedalvaro 0:c19dc1d8b225 313 int lpc_adc_temp;
mbedalvaro 0:c19dc1d8b225 314
mbedalvaro 0:c19dc1d8b225 315 //Reset start mode and edge bit,
mbedalvaro 0:c19dc1d8b225 316 lpc_adc_temp = LPC_ADC->ADCR & ~(0x0F << 24);
mbedalvaro 0:c19dc1d8b225 317 //Write with new values
mbedalvaro 0:c19dc1d8b225 318 lpc_adc_temp |= ((mode & 7) << 24) | ((edge & 1) << 27);
mbedalvaro 0:c19dc1d8b225 319 LPC_ADC->ADCR = lpc_adc_temp;
mbedalvaro 0:c19dc1d8b225 320 }
mbedalvaro 0:c19dc1d8b225 321
mbedalvaro 0:c19dc1d8b225 322 //Return startmode state according to mode_edge=0: mode and mode_edge=1: edge
mbedalvaro 0:c19dc1d8b225 323 int ADC::startmode(int mode_edge){
mbedalvaro 0:c19dc1d8b225 324 switch (mode_edge) {
mbedalvaro 0:c19dc1d8b225 325 case 0:
mbedalvaro 0:c19dc1d8b225 326 default:
mbedalvaro 0:c19dc1d8b225 327 return((LPC_ADC->ADCR >> 24) & 0x07);
mbedalvaro 0:c19dc1d8b225 328 case 1:
mbedalvaro 0:c19dc1d8b225 329 return((LPC_ADC->ADCR >> 27) & 0x01);
mbedalvaro 0:c19dc1d8b225 330 }
mbedalvaro 0:c19dc1d8b225 331 }
mbedalvaro 0:c19dc1d8b225 332
mbedalvaro 0:c19dc1d8b225 333 //Start ADC conversion
mbedalvaro 0:c19dc1d8b225 334 void ADC::start(void) {
mbedalvaro 0:c19dc1d8b225 335 startmode(1,0);
mbedalvaro 0:c19dc1d8b225 336 }
mbedalvaro 0:c19dc1d8b225 337
mbedalvaro 0:c19dc1d8b225 338
mbedalvaro 0:c19dc1d8b225 339 //Set interrupt enable/disable for pin to state
mbedalvaro 0:c19dc1d8b225 340 void ADC::interrupt_state(PinName pin, int state) {
mbedalvaro 0:c19dc1d8b225 341 int chan;
mbedalvaro 0:c19dc1d8b225 342
mbedalvaro 0:c19dc1d8b225 343 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 344 if (state == 1) {
mbedalvaro 0:c19dc1d8b225 345 LPC_ADC->ADINTEN &= ~0x100;
mbedalvaro 0:c19dc1d8b225 346 LPC_ADC->ADINTEN |= 1 << chan;
mbedalvaro 0:c19dc1d8b225 347 /* Enable the ADC Interrupt */
mbedalvaro 0:c19dc1d8b225 348 NVIC_EnableIRQ(ADC_IRQn);
mbedalvaro 0:c19dc1d8b225 349 } else {
mbedalvaro 0:c19dc1d8b225 350 LPC_ADC->ADINTEN &= ~( 1 << chan );
mbedalvaro 0:c19dc1d8b225 351 //Disable interrrupt if no active pins left
mbedalvaro 0:c19dc1d8b225 352 if ((LPC_ADC->ADINTEN & 0xFF) == 0)
mbedalvaro 0:c19dc1d8b225 353 NVIC_DisableIRQ(ADC_IRQn);
mbedalvaro 0:c19dc1d8b225 354 }
mbedalvaro 0:c19dc1d8b225 355 }
mbedalvaro 0:c19dc1d8b225 356
mbedalvaro 0:c19dc1d8b225 357 //Return enable/disable state of interrupt for pin
mbedalvaro 0:c19dc1d8b225 358 int ADC::interrupt_state(PinName pin) {
mbedalvaro 0:c19dc1d8b225 359 int chan;
mbedalvaro 0:c19dc1d8b225 360
mbedalvaro 0:c19dc1d8b225 361 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 362 return((LPC_ADC->ADINTEN >> chan) & 0x01);
mbedalvaro 0:c19dc1d8b225 363 }
mbedalvaro 0:c19dc1d8b225 364
mbedalvaro 0:c19dc1d8b225 365
mbedalvaro 0:c19dc1d8b225 366 //Attach custom interrupt handler replacing default
mbedalvaro 0:c19dc1d8b225 367 void ADC::attach(void(*fptr)(void)) {
mbedalvaro 0:c19dc1d8b225 368 //* Attach IRQ
mbedalvaro 0:c19dc1d8b225 369 NVIC_SetVector(ADC_IRQn, (uint32_t)fptr);
mbedalvaro 0:c19dc1d8b225 370 }
mbedalvaro 0:c19dc1d8b225 371
mbedalvaro 0:c19dc1d8b225 372 //Restore default interrupt handler
mbedalvaro 0:c19dc1d8b225 373 void ADC::detach(void) {
mbedalvaro 0:c19dc1d8b225 374 //* Attach IRQ
mbedalvaro 0:c19dc1d8b225 375 instance = this;
mbedalvaro 0:c19dc1d8b225 376 NVIC_SetVector(ADC_IRQn, (uint32_t)&_adcisr);
mbedalvaro 0:c19dc1d8b225 377 }
mbedalvaro 0:c19dc1d8b225 378
mbedalvaro 0:c19dc1d8b225 379
mbedalvaro 0:c19dc1d8b225 380 //Append interrupt handler for pin to function isr
mbedalvaro 0:c19dc1d8b225 381 void ADC::append(PinName pin, void(*fptr)(uint32_t value)) {
mbedalvaro 0:c19dc1d8b225 382 int chan;
mbedalvaro 0:c19dc1d8b225 383
mbedalvaro 0:c19dc1d8b225 384 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 385 _adc_isr[chan] = fptr;
mbedalvaro 0:c19dc1d8b225 386 }
mbedalvaro 0:c19dc1d8b225 387
mbedalvaro 0:c19dc1d8b225 388 //Append interrupt handler for pin to function isr
mbedalvaro 0:c19dc1d8b225 389 void ADC::unappend(PinName pin) {
mbedalvaro 0:c19dc1d8b225 390 int chan;
mbedalvaro 0:c19dc1d8b225 391
mbedalvaro 0:c19dc1d8b225 392 chan = _pin_to_channel(pin);
mbedalvaro 0:c19dc1d8b225 393 _adc_isr[chan] = NULL;
mbedalvaro 0:c19dc1d8b225 394 }
mbedalvaro 0:c19dc1d8b225 395
mbedalvaro 0:c19dc1d8b225 396 //Unappend global interrupt handler to function isr
mbedalvaro 0:c19dc1d8b225 397 void ADC::append(void(*fptr)(int chan, uint32_t value)) {
mbedalvaro 0:c19dc1d8b225 398 _adc_g_isr = fptr;
mbedalvaro 0:c19dc1d8b225 399 }
mbedalvaro 0:c19dc1d8b225 400
mbedalvaro 0:c19dc1d8b225 401 //Detach global interrupt handler to function isr
mbedalvaro 0:c19dc1d8b225 402 void ADC::unappend() {
mbedalvaro 0:c19dc1d8b225 403 _adc_g_isr = NULL;
mbedalvaro 0:c19dc1d8b225 404 }
mbedalvaro 0:c19dc1d8b225 405
mbedalvaro 0:c19dc1d8b225 406 //Set ADC offset
mbedalvaro 0:c19dc1d8b225 407 void offset(int offset) {
mbedalvaro 0:c19dc1d8b225 408 LPC_ADC->ADTRM &= ~(0x07 << 4);
mbedalvaro 0:c19dc1d8b225 409 LPC_ADC->ADTRM |= (offset & 0x07) << 4;
mbedalvaro 0:c19dc1d8b225 410 }
mbedalvaro 0:c19dc1d8b225 411
mbedalvaro 0:c19dc1d8b225 412 //Return current ADC offset
mbedalvaro 0:c19dc1d8b225 413 int offset(void) {
mbedalvaro 0:c19dc1d8b225 414 return((LPC_ADC->ADTRM >> 4) & 0x07);
mbedalvaro 0:c19dc1d8b225 415 }
mbedalvaro 0:c19dc1d8b225 416
mbedalvaro 0:c19dc1d8b225 417 //Return value of ADC on pin
mbedalvaro 0:c19dc1d8b225 418 int ADC::read(PinName pin) {
mbedalvaro 0:c19dc1d8b225 419 //Reset DONE and OVERRUN flags of interrupt handled ADC data
mbedalvaro 0:c19dc1d8b225 420 _adc_data[_pin_to_channel(pin)] &= ~(((uint32_t)0x01 << 31) | ((uint32_t)0x01 << 30));
mbedalvaro 0:c19dc1d8b225 421 //Return value
mbedalvaro 0:c19dc1d8b225 422 return((_data_of_pin(pin) >> 4) & 0xFFF);
mbedalvaro 0:c19dc1d8b225 423 }
mbedalvaro 0:c19dc1d8b225 424
mbedalvaro 0:c19dc1d8b225 425 //Return DONE flag of ADC on pin
mbedalvaro 0:c19dc1d8b225 426 int ADC::done(PinName pin) {
mbedalvaro 0:c19dc1d8b225 427 return((_data_of_pin(pin) >> 31) & 0x01);
mbedalvaro 0:c19dc1d8b225 428 }
mbedalvaro 0:c19dc1d8b225 429
mbedalvaro 0:c19dc1d8b225 430 //Return OVERRUN flag of ADC on pin
mbedalvaro 0:c19dc1d8b225 431 int ADC::overrun(PinName pin) {
mbedalvaro 0:c19dc1d8b225 432 return((_data_of_pin(pin) >> 30) & 0x01);
mbedalvaro 0:c19dc1d8b225 433 }
mbedalvaro 0:c19dc1d8b225 434
mbedalvaro 0:c19dc1d8b225 435 int ADC::actual_adc_clock(void) {
mbedalvaro 0:c19dc1d8b225 436 return(_adc_clk_freq);
mbedalvaro 0:c19dc1d8b225 437 }
mbedalvaro 0:c19dc1d8b225 438
mbedalvaro 0:c19dc1d8b225 439 int ADC::actual_sample_rate(void) {
mbedalvaro 0:c19dc1d8b225 440 return(_adc_clk_freq / CLKS_PER_SAMPLE);
mbedalvaro 0:c19dc1d8b225 441 }