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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11UXX/pwmout_api.c@184:8b5ae2e87659, 2014-05-08 (annotated)

Committer:
mbed_official
Date:
Thu May 08 09:00:07 2014 +0100
Revision:
184:8b5ae2e87659
Parent:
175:906e2386ace8
Child:
227:7bd0639b8911
Synchronized with git revision f62e0e4d9f2f9570b94de981dfed959245f93612



Full URL: https://github.com/mbedmicro/mbed/commit/f62e0e4d9f2f9570b94de981dfed959245f93612/



LPC11UXX and LPCU13XX - Fix reset glitch in pwmout_write()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "pwmout_api.h"
emilmont 10:3bc89ef62ce7 17 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 18 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 19 #include "error.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #define TCR_CNT_EN 0x00000001
emilmont 10:3bc89ef62ce7 22 #define TCR_RESET 0x00000002
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 /* To have a PWM where we can change both the period and the duty cycle,
emilmont 10:3bc89ef62ce7 25 * we need an entire timer. With the following conventions:
emilmont 10:3bc89ef62ce7 26 * * MR3 is used for the PWM period
emilmont 10:3bc89ef62ce7 27 * * MR0, MR1, MR2 are used for the duty cycle
emilmont 10:3bc89ef62ce7 28 */
emilmont 10:3bc89ef62ce7 29 static const PinMap PinMap_PWM[] = {
emilmont 10:3bc89ef62ce7 30 /* CT16B0 */
emilmont 10:3bc89ef62ce7 31 {P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */
emilmont 10:3bc89ef62ce7 32 {P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */
emilmont 10:3bc89ef62ce7 33 {P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */
emilmont 10:3bc89ef62ce7 34
emilmont 10:3bc89ef62ce7 35 /* CT16B1 */
emilmont 10:3bc89ef62ce7 36 {P0_21, PWM_4, 1}, /* MR0 */
emilmont 10:3bc89ef62ce7 37 {P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */
emilmont 10:3bc89ef62ce7 38
emilmont 10:3bc89ef62ce7 39 /* CT32B0 */
emilmont 10:3bc89ef62ce7 40 {P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */
emilmont 10:3bc89ef62ce7 41 {P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */
emilmont 10:3bc89ef62ce7 42 {P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */
emilmont 10:3bc89ef62ce7 43
emilmont 10:3bc89ef62ce7 44 /* CT32B1 */
emilmont 10:3bc89ef62ce7 45 {P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */
emilmont 10:3bc89ef62ce7 46 {P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */
emilmont 10:3bc89ef62ce7 47 {P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */
emilmont 10:3bc89ef62ce7 48
emilmont 10:3bc89ef62ce7 49 {NC, NC, 0}
emilmont 10:3bc89ef62ce7 50 };
emilmont 10:3bc89ef62ce7 51
emilmont 10:3bc89ef62ce7 52 typedef struct {
emilmont 10:3bc89ef62ce7 53 uint8_t timer;
emilmont 10:3bc89ef62ce7 54 uint8_t mr;
emilmont 10:3bc89ef62ce7 55 } timer_mr;
emilmont 10:3bc89ef62ce7 56
emilmont 10:3bc89ef62ce7 57 static timer_mr pwm_timer_map[11] = {
emilmont 10:3bc89ef62ce7 58 {0, 0}, {0, 1}, {0, 2},
emilmont 10:3bc89ef62ce7 59 {1, 0}, {1, 1},
emilmont 10:3bc89ef62ce7 60 {2, 0}, {2, 1}, {2, 2},
emilmont 10:3bc89ef62ce7 61 {3, 0}, {3, 1}, {3, 2},
emilmont 10:3bc89ef62ce7 62 };
emilmont 10:3bc89ef62ce7 63
emilmont 10:3bc89ef62ce7 64 static LPC_CTxxBx_Type *Timers[4] = {
emilmont 10:3bc89ef62ce7 65 LPC_CT16B0, LPC_CT16B1,
emilmont 10:3bc89ef62ce7 66 LPC_CT32B0, LPC_CT32B1
emilmont 10:3bc89ef62ce7 67 };
emilmont 10:3bc89ef62ce7 68
emilmont 10:3bc89ef62ce7 69 void pwmout_init(pwmout_t* obj, PinName pin) {
emilmont 10:3bc89ef62ce7 70 // determine the channel
emilmont 10:3bc89ef62ce7 71 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
bogdanm 19:398f4c622e1b 72 if (pwm == (PWMName)NC)
emilmont 10:3bc89ef62ce7 73 error("PwmOut pin mapping failed");
emilmont 10:3bc89ef62ce7 74
emilmont 10:3bc89ef62ce7 75 obj->pwm = pwm;
emilmont 10:3bc89ef62ce7 76
emilmont 10:3bc89ef62ce7 77 // Timer registers
emilmont 10:3bc89ef62ce7 78 timer_mr tid = pwm_timer_map[pwm];
emilmont 10:3bc89ef62ce7 79 LPC_CTxxBx_Type *timer = Timers[tid.timer];
emilmont 10:3bc89ef62ce7 80
emilmont 10:3bc89ef62ce7 81 // Disable timer
emilmont 10:3bc89ef62ce7 82 timer->TCR = 0;
emilmont 10:3bc89ef62ce7 83
emilmont 10:3bc89ef62ce7 84 // Power the correspondent timer
emilmont 10:3bc89ef62ce7 85 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << (tid.timer + 7);
emilmont 10:3bc89ef62ce7 86
emilmont 10:3bc89ef62ce7 87 /* Enable PWM function */
emilmont 10:3bc89ef62ce7 88 timer->PWMC = (1 << 3)|(1 << 2)|(1 << 1)|(1 << 0);
emilmont 10:3bc89ef62ce7 89
emilmont 10:3bc89ef62ce7 90 /* Reset Functionality on MR3 controlling the PWM period */
emilmont 10:3bc89ef62ce7 91 timer->MCR = 1 << 10;
emilmont 10:3bc89ef62ce7 92
emilmont 10:3bc89ef62ce7 93 // default to 20ms: standard for servos, and fine for e.g. brightness control
emilmont 10:3bc89ef62ce7 94 pwmout_period_ms(obj, 20);
emilmont 10:3bc89ef62ce7 95 pwmout_write (obj, 0);
emilmont 10:3bc89ef62ce7 96
emilmont 10:3bc89ef62ce7 97 // Wire pinout
emilmont 10:3bc89ef62ce7 98 pinmap_pinout(pin, PinMap_PWM);
emilmont 10:3bc89ef62ce7 99 }
emilmont 10:3bc89ef62ce7 100
emilmont 10:3bc89ef62ce7 101 void pwmout_free(pwmout_t* obj) {
emilmont 10:3bc89ef62ce7 102 // [TODO]
emilmont 10:3bc89ef62ce7 103 }
emilmont 10:3bc89ef62ce7 104
emilmont 10:3bc89ef62ce7 105 void pwmout_write(pwmout_t* obj, float value) {
emilmont 10:3bc89ef62ce7 106 if (value < 0.0f) {
emilmont 10:3bc89ef62ce7 107 value = 0.0;
emilmont 10:3bc89ef62ce7 108 } else if (value > 1.0f) {
emilmont 10:3bc89ef62ce7 109 value = 1.0;
emilmont 10:3bc89ef62ce7 110 }
emilmont 10:3bc89ef62ce7 111
emilmont 10:3bc89ef62ce7 112 timer_mr tid = pwm_timer_map[obj->pwm];
emilmont 10:3bc89ef62ce7 113 LPC_CTxxBx_Type *timer = Timers[tid.timer];
emilmont 10:3bc89ef62ce7 114 uint32_t t_off = timer->MR3 - (uint32_t)((float)(timer->MR3) * value);
emilmont 10:3bc89ef62ce7 115
emilmont 10:3bc89ef62ce7 116 timer->MR[tid.mr] = t_off;
emilmont 10:3bc89ef62ce7 117 }
emilmont 10:3bc89ef62ce7 118
emilmont 10:3bc89ef62ce7 119 float pwmout_read(pwmout_t* obj) {
emilmont 10:3bc89ef62ce7 120 timer_mr tid = pwm_timer_map[obj->pwm];
emilmont 10:3bc89ef62ce7 121 LPC_CTxxBx_Type *timer = Timers[tid.timer];
emilmont 10:3bc89ef62ce7 122
emilmont 10:3bc89ef62ce7 123 float v = (float)(timer->MR3 - timer->MR[tid.mr]) / (float)(timer->MR3);
emilmont 10:3bc89ef62ce7 124 return (v > 1.0f) ? (1.0f) : (v);
emilmont 10:3bc89ef62ce7 125 }
emilmont 10:3bc89ef62ce7 126
emilmont 10:3bc89ef62ce7 127 void pwmout_period(pwmout_t* obj, float seconds) {
emilmont 10:3bc89ef62ce7 128 pwmout_period_us(obj, seconds * 1000000.0f);
emilmont 10:3bc89ef62ce7 129 }
emilmont 10:3bc89ef62ce7 130
emilmont 10:3bc89ef62ce7 131 void pwmout_period_ms(pwmout_t* obj, int ms) {
emilmont 10:3bc89ef62ce7 132 pwmout_period_us(obj, ms * 1000);
emilmont 10:3bc89ef62ce7 133 }
emilmont 10:3bc89ef62ce7 134
emilmont 10:3bc89ef62ce7 135 // Set the PWM period, keeping the duty cycle the same.
emilmont 10:3bc89ef62ce7 136 void pwmout_period_us(pwmout_t* obj, int us) {
emilmont 10:3bc89ef62ce7 137 int i = 0;
mbed_official 63:a46ad637dc84 138 uint32_t period_ticks = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000);
emilmont 10:3bc89ef62ce7 139
emilmont 10:3bc89ef62ce7 140 timer_mr tid = pwm_timer_map[obj->pwm];
emilmont 10:3bc89ef62ce7 141 LPC_CTxxBx_Type *timer = Timers[tid.timer];
emilmont 10:3bc89ef62ce7 142 uint32_t old_period_ticks = timer->MR3;
mbed_official 63:a46ad637dc84 143
mbed_official 63:a46ad637dc84 144 // for 16bit timer, set prescaler to avoid overflow
mbed_official 175:906e2386ace8 145 if (timer == LPC_CT16B0 || timer == LPC_CT16B1) {
mbed_official 175:906e2386ace8 146 uint16_t high_period_ticks = period_ticks >> 16;
mbed_official 63:a46ad637dc84 147 timer->PR = high_period_ticks;
mbed_official 63:a46ad637dc84 148 period_ticks /= (high_period_ticks + 1);
mbed_official 63:a46ad637dc84 149 }
emilmont 10:3bc89ef62ce7 150
emilmont 10:3bc89ef62ce7 151 timer->TCR = TCR_RESET;
emilmont 10:3bc89ef62ce7 152 timer->MR3 = period_ticks;
emilmont 10:3bc89ef62ce7 153
emilmont 10:3bc89ef62ce7 154 // Scale the pulse width to preserve the duty ratio
emilmont 10:3bc89ef62ce7 155 if (old_period_ticks > 0) {
emilmont 10:3bc89ef62ce7 156 for (i=0; i<3; i++) {
emilmont 10:3bc89ef62ce7 157 uint32_t t_off = period_ticks - (uint32_t)(((uint64_t)timer->MR[i] * (uint64_t)period_ticks) / (uint64_t)old_period_ticks);
emilmont 10:3bc89ef62ce7 158 timer->MR[i] = t_off;
emilmont 10:3bc89ef62ce7 159 }
emilmont 10:3bc89ef62ce7 160 }
emilmont 10:3bc89ef62ce7 161 timer->TCR = TCR_CNT_EN;
emilmont 10:3bc89ef62ce7 162 }
emilmont 10:3bc89ef62ce7 163
emilmont 10:3bc89ef62ce7 164 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
emilmont 10:3bc89ef62ce7 165 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
emilmont 10:3bc89ef62ce7 166 }
emilmont 10:3bc89ef62ce7 167
emilmont 10:3bc89ef62ce7 168 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
emilmont 10:3bc89ef62ce7 169 pwmout_pulsewidth_us(obj, ms * 1000);
emilmont 10:3bc89ef62ce7 170 }
emilmont 10:3bc89ef62ce7 171
emilmont 10:3bc89ef62ce7 172 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
emilmont 10:3bc89ef62ce7 173 timer_mr tid = pwm_timer_map[obj->pwm];
emilmont 10:3bc89ef62ce7 174 LPC_CTxxBx_Type *timer = Timers[tid.timer];
mbed_official 63:a46ad637dc84 175 uint32_t t_on = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000 / (timer->PR + 1));
emilmont 10:3bc89ef62ce7 176
emilmont 10:3bc89ef62ce7 177 timer->TCR = TCR_RESET;
emilmont 10:3bc89ef62ce7 178 if (t_on > timer->MR3) {
emilmont 10:3bc89ef62ce7 179 pwmout_period_us(obj, us);
mbed_official 63:a46ad637dc84 180 t_on = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000 / (timer->PR + 1));
emilmont 10:3bc89ef62ce7 181 }
emilmont 10:3bc89ef62ce7 182 uint32_t t_off = timer->MR3 - t_on;
emilmont 10:3bc89ef62ce7 183 timer->MR[tid.mr] = t_off;
emilmont 10:3bc89ef62ce7 184 timer->TCR = TCR_CNT_EN;
emilmont 10:3bc89ef62ce7 185 }