Diff: targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/TARGET_TB_SENSE_12/device_peripherals.h

Revision:

164:289d4deac6e4

Parent:

161:2cc1468da177

Child:

181:57724642e740

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/TARGET_TB_SENSE_12/device_peripherals.h	Wed May 10 12:06:41 2017 +0100
@@ -0,0 +1,57 @@
+/***************************************************************************//**
+ * @file device_peripherals.h
+ *******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
+ *******************************************************************************
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************/
+#ifndef MBED_DEVICE_PERIPHERALS_H
+#define MBED_DEVICE_PERIPHERALS_H
+
+/* us ticker */
+#define US_TICKER_TIMER         TIMER0
+#define US_TICKER_TIMER_CLOCK   cmuClock_TIMER0
+#define US_TICKER_TIMER_IRQ     TIMER0_IRQn
+
+/* PWM */
+#define PWM_TIMER        TIMER1
+#define PWM_TIMER_CLOCK  cmuClock_TIMER1
+#define PWM_ROUTE        TIMER_ROUTE_LOCATION_LOC1
+
+/* Crystal calibration */
+#if !defined(CMU_HFXOINIT_WSTK_DEFAULT)
+#define CMU_HFXOINIT_WSTK_DEFAULT                                               \
+{                                                                               \
+  false,        /* Low-noise mode for EFR32 */                                  \
+  false,        /* Disable auto-start on EM0/1 entry */                         \
+  false,        /* Disable auto-select on EM0/1 entry */                        \
+  false,        /* Disable auto-start and select on RAC wakeup */               \
+  _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT,                                           \
+  0x142,        /* Steady-state CTUNE for TBSENSE boards without load caps */   \
+  _CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT,                                      \
+  _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT,                                    \
+  0x7,          /* Recommended steady-state XO core bias current */             \
+  0x6,          /* Recommended peak detection threshold */                      \
+  _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT,                                 \
+  0xA,          /* Recommended peak detection timeout  */                       \
+  _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT,                                   \
+  _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT,                                  \
+  cmuOscMode_Crystal,                                                           \
+}
+#endif
+#endif