Mark Radbourne / Mbed 2 deprecated FXOS8700CQ_To_Azure_IoT

Simple sample that demonstrates reading the FXOS8700CQ accelerometer, convert the data to JSON and send to an Azure IoT Hub.

Dependencies:   azure_umqtt_c iothub_mqtt_transport mbed-rtos mbed wolfSSL Socket lwip-eth lwip-sys lwip

FXOS8700CQ/FXOS8700CQ.cpp@7:2564d95cbf81, 2017-04-25 (annotated)

Committer:
markrad
Date:
Tue Apr 25 01:33:13 2017 +0000
Revision:
7:2564d95cbf81
Parent:
6:0bffe8529f60 
Fix bug in NTP library. Clean up code some.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
markrad 6:0bffe8529f60 1 #include "FXOS8700CQ.h"
markrad 6:0bffe8529f60 2
markrad 6:0bffe8529f60 3 uint8_t status_reg; // Status register contents
markrad 6:0bffe8529f60 4 uint8_t raw[FXOS8700CQ_READ_LEN]; // Buffer for reading out stored data
markrad 6:0bffe8529f60 5
markrad 6:0bffe8529f60 6 // Construct class and its contents
markrad 6:0bffe8529f60 7 FXOS8700CQ::FXOS8700CQ(PinName sda, PinName scl, int addr) : dev_i2c(sda, scl), dev_addr(addr)
markrad 6:0bffe8529f60 8 {
markrad 6:0bffe8529f60 9 // Initialization of the FXOS8700CQ
markrad 6:0bffe8529f60 10 dev_i2c.frequency(I2C_400K); // Use maximum I2C frequency
markrad 6:0bffe8529f60 11 uint8_t data[6] = {0, 0, 0, 0, 0, 0}; // to write over I2C: device register, up to 5 bytes data
markrad 6:0bffe8529f60 12
markrad 6:0bffe8529f60 13 // TODO: verify WHOAMI?
markrad 6:0bffe8529f60 14
markrad 6:0bffe8529f60 15 // Place peripheral in standby for configuration, resetting CTRL_REG1
markrad 6:0bffe8529f60 16 data[0] = FXOS8700CQ_CTRL_REG1;
markrad 6:0bffe8529f60 17 data[1] = 0x00; // this will unset CTRL_REG1:active
markrad 6:0bffe8529f60 18 write_regs(data, 2);
markrad 6:0bffe8529f60 19
markrad 6:0bffe8529f60 20 // Now that the device is in standby, configure registers at will
markrad 6:0bffe8529f60 21
markrad 6:0bffe8529f60 22 // Setup for write-though for CTRL_REG series
markrad 6:0bffe8529f60 23 // Keep data[0] as FXOS8700CQ_CTRL_REG1
markrad 6:0bffe8529f60 24 data[1] =
markrad 6:0bffe8529f60 25 // FXOS8700CQ_CTRL_REG1_LNOISE | // Turn on lnoise to reduce noise
markrad 6:0bffe8529f60 26 // FXOS8700CQ_CTRL_REG1_DR3(1) | // Set to 200Hz
markrad 6:0bffe8529f60 27 FXOS8700CQ_CTRL_REG1_ASLP_RATE2(1) | // 0b01 gives sleep rate of 12.5Hz
markrad 6:0bffe8529f60 28 FXOS8700CQ_CTRL_REG1_DR3(1); // 0x001 gives ODR of 400Hz/200Hz hybrid
markrad 6:0bffe8529f60 29
markrad 6:0bffe8529f60 30 // FXOS8700CQ_CTRL_REG2;
markrad 6:0bffe8529f60 31 data[2] =
markrad 6:0bffe8529f60 32 FXOS8700CQ_CTRL_REG2_SMODS2(3) | // 0b11 gives low power sleep oversampling mode
markrad 6:0bffe8529f60 33 FXOS8700CQ_CTRL_REG2_MODS2(1); // 0b01 gives low noise, low power oversampling mode
markrad 6:0bffe8529f60 34
markrad 6:0bffe8529f60 35 // No configuration changes from default 0x00 in CTRL_REG3
markrad 6:0bffe8529f60 36 // Interrupts will be active low, their outputs in push-pull mode
markrad 6:0bffe8529f60 37 data[3] = 0x00;
markrad 6:0bffe8529f60 38
markrad 6:0bffe8529f60 39 // FXOS8700CQ_CTRL_REG4;
markrad 6:0bffe8529f60 40 data[4] =
markrad 6:0bffe8529f60 41 FXOS8700CQ_CTRL_REG4_INT_EN_DRDY; // Enable the Data-Ready interrupt
markrad 6:0bffe8529f60 42
markrad 6:0bffe8529f60 43 // No configuration changes from default 0x00 in CTRL_REG5
markrad 6:0bffe8529f60 44 // Data-Ready interrupt will appear on INT2
markrad 6:0bffe8529f60 45 data[5] = 0x00;
markrad 6:0bffe8529f60 46
markrad 6:0bffe8529f60 47 // Write to the 5 CTRL_REG registers
markrad 6:0bffe8529f60 48 write_regs(data, 6);
markrad 6:0bffe8529f60 49
markrad 6:0bffe8529f60 50 // FXOS8700CQ_XYZ_DATA_CFG
markrad 6:0bffe8529f60 51 data[0] = FXOS8700CQ_XYZ_DATA_CFG;
markrad 6:0bffe8529f60 52 data[1] =
markrad 6:0bffe8529f60 53 FXOS8700CQ_XYZ_DATA_CFG_FS2(1); // 0x01 gives 4g full range, 0.488mg/LSB
markrad 6:0bffe8529f60 54 write_regs(data, 2);
markrad 6:0bffe8529f60 55
markrad 6:0bffe8529f60 56 // Setup for write-through for M_CTRL_REG series
markrad 6:0bffe8529f60 57 data[0] = FXOS8700CQ_M_CTRL_REG1;
markrad 6:0bffe8529f60 58 data[1] =
markrad 6:0bffe8529f60 59 FXOS8700CQ_M_CTRL_REG1_M_ACAL | // set automatic calibration
markrad 6:0bffe8529f60 60 FXOS8700CQ_M_CTRL_REG1_MO_OS3(7) | // use maximum magnetic oversampling
markrad 6:0bffe8529f60 61 FXOS8700CQ_M_CTRL_REG1_M_HMS2(3); // enable hybrid sampling (both sensors)
markrad 6:0bffe8529f60 62
markrad 6:0bffe8529f60 63 // FXOS8700CQ_M_CTRL_REG2
markrad 6:0bffe8529f60 64 data[2] =
markrad 6:0bffe8529f60 65 FXOS8700CQ_M_CTRL_REG2_HYB_AUTOINC_MODE;
markrad 6:0bffe8529f60 66
markrad 6:0bffe8529f60 67 // FXOS8700CQ_M_CTRL_REG3
markrad 6:0bffe8529f60 68 data[3] =
markrad 6:0bffe8529f60 69 FXOS8700CQ_M_CTRL_REG3_M_ASLP_OS3(7); // maximum sleep magnetic oversampling
markrad 6:0bffe8529f60 70
markrad 6:0bffe8529f60 71 // Write to the 3 M_CTRL_REG registers
markrad 6:0bffe8529f60 72 write_regs(data, 4);
markrad 6:0bffe8529f60 73
markrad 6:0bffe8529f60 74 // Peripheral is configured, but disabled
markrad 6:0bffe8529f60 75 enabled = false;
markrad 6:0bffe8529f60 76 }
markrad 6:0bffe8529f60 77
markrad 6:0bffe8529f60 78 // Destruct class
markrad 6:0bffe8529f60 79 FXOS8700CQ::~FXOS8700CQ(void) {}
markrad 6:0bffe8529f60 80
markrad 6:0bffe8529f60 81
markrad 6:0bffe8529f60 82 void FXOS8700CQ::enable(void)
markrad 6:0bffe8529f60 83 {
markrad 6:0bffe8529f60 84 uint8_t data[2];
markrad 6:0bffe8529f60 85 read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
markrad 6:0bffe8529f60 86 data[1] |= FXOS8700CQ_CTRL_REG1_ACTIVE;
markrad 6:0bffe8529f60 87 data[0] = FXOS8700CQ_CTRL_REG1;
markrad 6:0bffe8529f60 88 write_regs(data, 2); // write back
markrad 6:0bffe8529f60 89
markrad 6:0bffe8529f60 90 enabled = true;
markrad 6:0bffe8529f60 91 }
markrad 6:0bffe8529f60 92
markrad 6:0bffe8529f60 93 void FXOS8700CQ::disable(void)
markrad 6:0bffe8529f60 94 {
markrad 6:0bffe8529f60 95 uint8_t data[2];
markrad 6:0bffe8529f60 96 read_regs( FXOS8700CQ_CTRL_REG1, &data[1], 1);
markrad 6:0bffe8529f60 97 data[0] = FXOS8700CQ_CTRL_REG1;
markrad 6:0bffe8529f60 98 data[1] &= ~FXOS8700CQ_CTRL_REG1_ACTIVE;
markrad 6:0bffe8529f60 99 write_regs(data, 2); // write back
markrad 6:0bffe8529f60 100
markrad 6:0bffe8529f60 101 enabled = false;
markrad 6:0bffe8529f60 102 }
markrad 6:0bffe8529f60 103
markrad 6:0bffe8529f60 104
markrad 6:0bffe8529f60 105 uint8_t FXOS8700CQ::status(void)
markrad 6:0bffe8529f60 106 {
markrad 6:0bffe8529f60 107 read_regs(FXOS8700CQ_STATUS, &status_reg, 1);
markrad 6:0bffe8529f60 108 return status_reg;
markrad 6:0bffe8529f60 109 }
markrad 6:0bffe8529f60 110
markrad 6:0bffe8529f60 111 uint8_t FXOS8700CQ::get_whoami(void)
markrad 6:0bffe8529f60 112 {
markrad 6:0bffe8529f60 113 uint8_t databyte = 0x00;
markrad 6:0bffe8529f60 114 read_regs(FXOS8700CQ_WHOAMI, &databyte, 1);
markrad 6:0bffe8529f60 115 return databyte;
markrad 6:0bffe8529f60 116 }
markrad 6:0bffe8529f60 117
markrad 6:0bffe8529f60 118 uint8_t FXOS8700CQ::get_data(SRAWDATA *accel_data, SRAWDATA *magn_data)
markrad 6:0bffe8529f60 119 {
markrad 6:0bffe8529f60 120 if(!enabled) {
markrad 6:0bffe8529f60 121 return 1;
markrad 6:0bffe8529f60 122 }
markrad 6:0bffe8529f60 123
markrad 6:0bffe8529f60 124 read_regs(FXOS8700CQ_M_OUT_X_MSB, raw, FXOS8700CQ_READ_LEN);
markrad 6:0bffe8529f60 125
markrad 6:0bffe8529f60 126 // Pull out 16-bit, 2's complement magnetometer data
markrad 6:0bffe8529f60 127 magn_data->x = (raw[0] << 8) | raw[1];
markrad 6:0bffe8529f60 128 magn_data->y = (raw[2] << 8) | raw[3];
markrad 6:0bffe8529f60 129 magn_data->z = (raw[4] << 8) | raw[5];
markrad 6:0bffe8529f60 130
markrad 6:0bffe8529f60 131 // Pull out 14-bit, 2's complement, right-justified accelerometer data
markrad 6:0bffe8529f60 132 accel_data->x = (raw[6] << 8) | raw[7];
markrad 6:0bffe8529f60 133 accel_data->y = (raw[8] << 8) | raw[9];
markrad 6:0bffe8529f60 134 accel_data->z = (raw[10] << 8) | raw[11];
markrad 6:0bffe8529f60 135
markrad 6:0bffe8529f60 136 // Have to apply corrections to make the int16_t correct
markrad 6:0bffe8529f60 137 if(accel_data->x > UINT14_MAX/2) {
markrad 6:0bffe8529f60 138 accel_data->x -= UINT14_MAX;
markrad 6:0bffe8529f60 139 }
markrad 6:0bffe8529f60 140 if(accel_data->y > UINT14_MAX/2) {
markrad 6:0bffe8529f60 141 accel_data->y -= UINT14_MAX;
markrad 6:0bffe8529f60 142 }
markrad 6:0bffe8529f60 143 if(accel_data->z > UINT14_MAX/2) {
markrad 6:0bffe8529f60 144 accel_data->z -= UINT14_MAX;
markrad 6:0bffe8529f60 145 }
markrad 6:0bffe8529f60 146
markrad 6:0bffe8529f60 147 return 0;
markrad 6:0bffe8529f60 148 }
markrad 6:0bffe8529f60 149
markrad 6:0bffe8529f60 150 uint8_t FXOS8700CQ::get_accel_scale(void)
markrad 6:0bffe8529f60 151 {
markrad 6:0bffe8529f60 152 uint8_t data = 0x00;
markrad 6:0bffe8529f60 153 read_regs(FXOS8700CQ_XYZ_DATA_CFG, &data, 1);
markrad 6:0bffe8529f60 154 data &= FXOS8700CQ_XYZ_DATA_CFG_FS2(3); // mask with 0b11
markrad 6:0bffe8529f60 155
markrad 6:0bffe8529f60 156 // Choose output value based on masked data
markrad 6:0bffe8529f60 157 switch(data) {
markrad 6:0bffe8529f60 158 case FXOS8700CQ_XYZ_DATA_CFG_FS2(0):
markrad 6:0bffe8529f60 159 return 2;
markrad 6:0bffe8529f60 160 case FXOS8700CQ_XYZ_DATA_CFG_FS2(1):
markrad 6:0bffe8529f60 161 return 4;
markrad 6:0bffe8529f60 162 case FXOS8700CQ_XYZ_DATA_CFG_FS2(2):
markrad 6:0bffe8529f60 163 return 8;
markrad 6:0bffe8529f60 164 default:
markrad 6:0bffe8529f60 165 return 0;
markrad 6:0bffe8529f60 166 }
markrad 6:0bffe8529f60 167 }
markrad 6:0bffe8529f60 168
markrad 6:0bffe8529f60 169 // Private methods
markrad 6:0bffe8529f60 170
markrad 6:0bffe8529f60 171 // Excepting the call to dev_i2c.frequency() in the constructor,
markrad 6:0bffe8529f60 172 // the use of the mbed I2C class is restricted to these methods
markrad 6:0bffe8529f60 173 void FXOS8700CQ::read_regs(int reg_addr, uint8_t* data, int len)
markrad 6:0bffe8529f60 174 {
markrad 6:0bffe8529f60 175 char t[1] = {reg_addr};
markrad 6:0bffe8529f60 176 dev_i2c.write(dev_addr, t, 1, true);
markrad 6:0bffe8529f60 177 dev_i2c.read(dev_addr, (char *)data, len);
markrad 6:0bffe8529f60 178 }
markrad 6:0bffe8529f60 179
markrad 6:0bffe8529f60 180 void FXOS8700CQ::write_regs(uint8_t* data, int len)
markrad 6:0bffe8529f60 181 {
markrad 6:0bffe8529f60 182 dev_i2c.write(dev_addr, (char*)data, len);
markrad 6:0bffe8529f60 183 }