Dni Przedsiebierczosci Demo

Dependencies:   mbed

Committer:
ketjow
Date:
Fri Apr 21 08:25:54 2017 +0000
Revision:
0:eb5dfc6d9eae
Initial

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ketjow 0:eb5dfc6d9eae 1 #include "FRDM-s401.h" // 4x7 segdisplay
ketjow 0:eb5dfc6d9eae 2
ketjow 0:eb5dfc6d9eae 3
ketjow 0:eb5dfc6d9eae 4 #if 1 // VREF to VLL1
ketjow 0:eb5dfc6d9eae 5 /* Following configuration is used for LCD default initialization */
ketjow 0:eb5dfc6d9eae 6 #define _LCDRVEN (1) //
ketjow 0:eb5dfc6d9eae 7 #define _LCDRVTRIM (8) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 8 #define _LCDCPSEL (1) // charge pump select 0 or 1
ketjow 0:eb5dfc6d9eae 9 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 10 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 11 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
ketjow 0:eb5dfc6d9eae 12
ketjow 0:eb5dfc6d9eae 13 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
ketjow 0:eb5dfc6d9eae 14 #define _LCDSUPPLY (1)
ketjow 0:eb5dfc6d9eae 15 #define _LCDHREF (0) // 0 or 1
ketjow 0:eb5dfc6d9eae 16 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
ketjow 0:eb5dfc6d9eae 17 #define _LCDLCK (1) //Any number between 0 and 7
ketjow 0:eb5dfc6d9eae 18 #define _LCDBLINKRATE (3) //Any number between 0 and 7
ketjow 0:eb5dfc6d9eae 19
ketjow 0:eb5dfc6d9eae 20
ketjow 0:eb5dfc6d9eae 21 #else //VLL3 to VDD internally
ketjow 0:eb5dfc6d9eae 22 /* Following configuration is used for LCD default initialization */
ketjow 0:eb5dfc6d9eae 23 #define _LCDCLKSOURCE (1) // 0 -- External clock 1 -- Alternate clock
ketjow 0:eb5dfc6d9eae 24 #define _LCDALRCLKSOURCE (0) // 0 -- External clock 1 -- Alternate clock
ketjow 0:eb5dfc6d9eae 25 #define _LCDCLKPSL (0) // Clock divider to generate the LCD Waveforms
ketjow 0:eb5dfc6d9eae 26 #define _LCDSUPPLY (0)
ketjow 0:eb5dfc6d9eae 27 #define _LCDLOADADJUST (3) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 28 #define _LCDALTDIV (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 29 #define _LCDRVTRIM (0) // CPSEL = 1 0 -- 8000 pf 1 -- 6000 pf 2 -- 4000 pf 3 -- 2000 pf
ketjow 0:eb5dfc6d9eae 30 #define _LCDHREF (0) // 0 or 1
ketjow 0:eb5dfc6d9eae 31 #define _LCDCPSEL (1) // 0 or 1
ketjow 0:eb5dfc6d9eae 32 #define _LCDRVEN (0) //
ketjow 0:eb5dfc6d9eae 33 #define _LCDBLINKRATE (3) // Any number between 0 and 7
ketjow 0:eb5dfc6d9eae 34 #define _LCDLCK (0) // Any number between 0 and 7
ketjow 0:eb5dfc6d9eae 35
ketjow 0:eb5dfc6d9eae 36 #endif
ketjow 0:eb5dfc6d9eae 37
ketjow 0:eb5dfc6d9eae 38
ketjow 0:eb5dfc6d9eae 39
ketjow 0:eb5dfc6d9eae 40
ketjow 0:eb5dfc6d9eae 41 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 0 ~|~|~|~|~|~|~|~|~|~|~|~|~*/
ketjow 0:eb5dfc6d9eae 42 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 43 #define _LCDINTENABLE (1)
ketjow 0:eb5dfc6d9eae 44
ketjow 0:eb5dfc6d9eae 45 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Control Register 1 ~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 46 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 47 #define _LCDFRAMEINTERRUPT (0) //0 Disable Frame Frequency Interrupt
ketjow 0:eb5dfc6d9eae 48 //1 Enable an LCD interrupt that coincides with the LCD frame frequency
ketjow 0:eb5dfc6d9eae 49 #define _LCDFULLCPLDIRIVE (0) // 0 GPIO shared with the LCD. Inputs levels and internal pullup reference to VDD
ketjow 0:eb5dfc6d9eae 50 // 1 If VSUPPLY=11and RVEN=0. Inputs levels and internal pullup reference to VLL3
ketjow 0:eb5dfc6d9eae 51 #define _LCDWAITMODE (0) // 0 Allows the LCD driver and charge pump to continue running during wait mode
ketjow 0:eb5dfc6d9eae 52 // 1 Disable the LCD when the MCU goes into wait mode
ketjow 0:eb5dfc6d9eae 53 #define _LCDSTOPMODE (0) // 0 Allows the LCD driver and charge pump to continue running during stop2 or stop3
ketjow 0:eb5dfc6d9eae 54 // 1 Disable the LCD when and charge pump when the MCU goes into stop2 or stop3
ketjow 0:eb5dfc6d9eae 55
ketjow 0:eb5dfc6d9eae 56 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Voltage Supply Register ~|~|~|~|~|~|~|~|~|~|~|~*/
ketjow 0:eb5dfc6d9eae 57 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 58 #define _LCDHIGHREF (0) //0 Divide input VIREG=1.0v
ketjow 0:eb5dfc6d9eae 59 //1 Do not divide the input VIREG=1.67v
ketjow 0:eb5dfc6d9eae 60 #define _LCDBBYPASS (0) //Determines whether the internal LCD op amp buffer is bypassed
ketjow 0:eb5dfc6d9eae 61 //0 Buffered mode
ketjow 0:eb5dfc6d9eae 62 //1 Unbuffered mode
ketjow 0:eb5dfc6d9eae 63
ketjow 0:eb5dfc6d9eae 64 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Regulated Voltage Control |~|~|~|~|~|~|~|~|~|~*/
ketjow 0:eb5dfc6d9eae 65 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 66 #define _LCDCONTRAST (1) //Contrast by software 0 -- Disable 1-- Enable
ketjow 0:eb5dfc6d9eae 67 #define _LVLCONTRAST (0) //Any number between 0 and 15, if the number is bigger the glass gets darker
ketjow 0:eb5dfc6d9eae 68
ketjow 0:eb5dfc6d9eae 69 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~ LCD Blink Control Register ~|~|~|~|~|~|~|~|~|~|~|~*/
ketjow 0:eb5dfc6d9eae 70 /*~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|~|*/
ketjow 0:eb5dfc6d9eae 71 #define _LCDBLINKCONTROL (1) //0 Disable blink mode
ketjow 0:eb5dfc6d9eae 72 //1 Enable blink mode
ketjow 0:eb5dfc6d9eae 73 #define _LCDALTMODE (0) //0 Normal display
ketjow 0:eb5dfc6d9eae 74 //1 Alternate display for 4 backplanes or less the LCD backplane sequencer changes to otuput an alternate display
ketjow 0:eb5dfc6d9eae 75 #define _LCDBLANKDISP (0) //0 Do not blank display
ketjow 0:eb5dfc6d9eae 76 //1 Blank display if you put it in 0 the text before blank is manteined
ketjow 0:eb5dfc6d9eae 77 #define _LCDBLINKMODE (0) //0 Display blank during the blink period
ketjow 0:eb5dfc6d9eae 78 //1 Display alternate displat during blink period (Ignored if duty is 5 or greater)
ketjow 0:eb5dfc6d9eae 79
ketjow 0:eb5dfc6d9eae 80
ketjow 0:eb5dfc6d9eae 81 //Calculated values
ketjow 0:eb5dfc6d9eae 82 #define _LCDUSEDPINS (_LCDFRONTPLANES + _LCDBACKPLANES)
ketjow 0:eb5dfc6d9eae 83 #define _LCDDUTY (_LCDBACKPLANES-1) //Any number between 0 and 7
ketjow 0:eb5dfc6d9eae 84 #define LCD_WF_BASE LCD->WF8B[0]
ketjow 0:eb5dfc6d9eae 85
ketjow 0:eb5dfc6d9eae 86 // General definitions used by the LCD library
ketjow 0:eb5dfc6d9eae 87 #define LCD_WF(x) *((uint8 *)&LCD_WF_BASE + x)
ketjow 0:eb5dfc6d9eae 88
ketjow 0:eb5dfc6d9eae 89 /*LCD Fault Detections Consts*/
ketjow 0:eb5dfc6d9eae 90 #define FP_TYPE 0x00 // pin is a Front Plane
ketjow 0:eb5dfc6d9eae 91 #define BP_TYPE 0x80 // pin is Back Plane
ketjow 0:eb5dfc6d9eae 92
ketjow 0:eb5dfc6d9eae 93 // Fault Detect Preescaler Options
ketjow 0:eb5dfc6d9eae 94 #define FDPRS_1 0
ketjow 0:eb5dfc6d9eae 95 #define FDPRS_2 1
ketjow 0:eb5dfc6d9eae 96 #define FDPRS_4 2
ketjow 0:eb5dfc6d9eae 97 #define FDPRS_8 3
ketjow 0:eb5dfc6d9eae 98 #define FDPRS_16 4
ketjow 0:eb5dfc6d9eae 99 #define FDPRS_32 5
ketjow 0:eb5dfc6d9eae 100 #define FDPRS_64 6
ketjow 0:eb5dfc6d9eae 101 #define FDPRS_128 7
ketjow 0:eb5dfc6d9eae 102
ketjow 0:eb5dfc6d9eae 103 // Fault Detect Sample Window Width Values
ketjow 0:eb5dfc6d9eae 104 #define FDSWW_4 0
ketjow 0:eb5dfc6d9eae 105 #define FDSWW_8 1
ketjow 0:eb5dfc6d9eae 106 #define FDSWW_16 2
ketjow 0:eb5dfc6d9eae 107 #define FDSWW_32 3
ketjow 0:eb5dfc6d9eae 108 #define FDSWW_64 4
ketjow 0:eb5dfc6d9eae 109 #define FDSWW_128 5
ketjow 0:eb5dfc6d9eae 110 #define FDSWW_256 6
ketjow 0:eb5dfc6d9eae 111 #define FDSWW_512 7
ketjow 0:eb5dfc6d9eae 112
ketjow 0:eb5dfc6d9eae 113 /*
ketjow 0:eb5dfc6d9eae 114 Mask Bit definitions used f
ketjow 0:eb5dfc6d9eae 115 */
ketjow 0:eb5dfc6d9eae 116 #define mBIT0 1
ketjow 0:eb5dfc6d9eae 117 #define mBIT1 2
ketjow 0:eb5dfc6d9eae 118 #define mBIT2 4
ketjow 0:eb5dfc6d9eae 119 #define mBIT3 8
ketjow 0:eb5dfc6d9eae 120 #define mBIT4 16
ketjow 0:eb5dfc6d9eae 121 #define mBIT5 32
ketjow 0:eb5dfc6d9eae 122 #define mBIT6 64
ketjow 0:eb5dfc6d9eae 123 #define mBIT7 128
ketjow 0:eb5dfc6d9eae 124 #define mBIT8 256
ketjow 0:eb5dfc6d9eae 125 #define mBIT9 512
ketjow 0:eb5dfc6d9eae 126 #define mBIT10 1024
ketjow 0:eb5dfc6d9eae 127 #define mBIT11 2048
ketjow 0:eb5dfc6d9eae 128 #define mBIT12 4096
ketjow 0:eb5dfc6d9eae 129 #define mBIT13 8192
ketjow 0:eb5dfc6d9eae 130 #define mBIT14 16384
ketjow 0:eb5dfc6d9eae 131 #define mBIT15 32768
ketjow 0:eb5dfc6d9eae 132 #define mBIT16 65536
ketjow 0:eb5dfc6d9eae 133 #define mBIT17 131072
ketjow 0:eb5dfc6d9eae 134 #define mBIT18 262144
ketjow 0:eb5dfc6d9eae 135 #define mBIT19 524288
ketjow 0:eb5dfc6d9eae 136 #define mBIT20 1048576
ketjow 0:eb5dfc6d9eae 137 #define mBIT21 2097152
ketjow 0:eb5dfc6d9eae 138 #define mBIT22 4194304
ketjow 0:eb5dfc6d9eae 139 #define mBIT23 8388608
ketjow 0:eb5dfc6d9eae 140 #define mBIT24 16777216
ketjow 0:eb5dfc6d9eae 141 #define mBIT25 33554432
ketjow 0:eb5dfc6d9eae 142 #define mBIT26 67108864
ketjow 0:eb5dfc6d9eae 143 #define mBIT27 134217728
ketjow 0:eb5dfc6d9eae 144 #define mBIT28 268435456
ketjow 0:eb5dfc6d9eae 145 #define mBIT29 536870912
ketjow 0:eb5dfc6d9eae 146 #define mBIT30 1073741824
ketjow 0:eb5dfc6d9eae 147 #define mBIT31 2147483648
ketjow 0:eb5dfc6d9eae 148
ketjow 0:eb5dfc6d9eae 149 #define mBIT32 1
ketjow 0:eb5dfc6d9eae 150 #define mBIT33 2
ketjow 0:eb5dfc6d9eae 151 #define mBIT34 4
ketjow 0:eb5dfc6d9eae 152 #define mBIT35 8
ketjow 0:eb5dfc6d9eae 153 #define mBIT36 16
ketjow 0:eb5dfc6d9eae 154 #define mBIT37 32
ketjow 0:eb5dfc6d9eae 155 #define mBIT38 64
ketjow 0:eb5dfc6d9eae 156 #define mBIT39 128
ketjow 0:eb5dfc6d9eae 157 #define mBIT40 256
ketjow 0:eb5dfc6d9eae 158 #define mBIT41 512
ketjow 0:eb5dfc6d9eae 159 #define mBIT42 1024
ketjow 0:eb5dfc6d9eae 160 #define mBIT43 2048
ketjow 0:eb5dfc6d9eae 161 #define mBIT44 4096
ketjow 0:eb5dfc6d9eae 162 #define mBIT45 8192
ketjow 0:eb5dfc6d9eae 163 #define mBIT46 16384
ketjow 0:eb5dfc6d9eae 164 #define mBIT47 32768
ketjow 0:eb5dfc6d9eae 165 #define mBIT48 65536
ketjow 0:eb5dfc6d9eae 166 #define mBIT49 131072
ketjow 0:eb5dfc6d9eae 167 #define mBIT50 262144
ketjow 0:eb5dfc6d9eae 168 #define mBIT51 524288
ketjow 0:eb5dfc6d9eae 169 #define mBIT52 1048576
ketjow 0:eb5dfc6d9eae 170 #define mBIT53 2097152
ketjow 0:eb5dfc6d9eae 171 #define mBIT54 4194304
ketjow 0:eb5dfc6d9eae 172 #define mBIT55 8388608
ketjow 0:eb5dfc6d9eae 173 #define mBIT56 16777216
ketjow 0:eb5dfc6d9eae 174 #define mBIT57 33554432
ketjow 0:eb5dfc6d9eae 175 #define mBIT58 67108864
ketjow 0:eb5dfc6d9eae 176 #define mBIT59 134217728
ketjow 0:eb5dfc6d9eae 177 #define mBIT60 268435456
ketjow 0:eb5dfc6d9eae 178 #define mBIT61 536870912
ketjow 0:eb5dfc6d9eae 179 #define mBIT62 1073741824
ketjow 0:eb5dfc6d9eae 180 #define mBIT63 2147483648
ketjow 0:eb5dfc6d9eae 181
ketjow 0:eb5dfc6d9eae 182
ketjow 0:eb5dfc6d9eae 183