onewire 1-wire ds18x20 ds2450 multi-channel
DS2450.h@0:8c4e1841eb30, 2012-03-02 (annotated)
- Committer:
- fblanc
- Date:
- Fri Mar 02 08:29:49 2012 +0000
- Revision:
- 0:8c4e1841eb30
v1.1 onewire multi-channel
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
fblanc | 0:8c4e1841eb30 | 1 | /* DS2450 specific values (see datasheet www.maxim-ic.com/datasheet/index.mvp/id/2921) */ |
fblanc | 0:8c4e1841eb30 | 2 | #ifndef _DS2450_ |
fblanc | 0:8c4e1841eb30 | 3 | #define _DS2450_ |
fblanc | 0:8c4e1841eb30 | 4 | #define DS2450_ID 0x20 |
fblanc | 0:8c4e1841eb30 | 5 | #define DS2450_READ_MEMORY 0xAA |
fblanc | 0:8c4e1841eb30 | 6 | #define DS2450_WRITE_MEMORY 0x55 |
fblanc | 0:8c4e1841eb30 | 7 | #define DS2450_CONVERT 0x3C |
fblanc | 0:8c4e1841eb30 | 8 | |
fblanc | 0:8c4e1841eb30 | 9 | #define DS2450_SP_SIZE 13 |
fblanc | 0:8c4e1841eb30 | 10 | #define DS2450_PAGE0 0x00 |
fblanc | 0:8c4e1841eb30 | 11 | #define DS2450_PAGE1 0x08 |
fblanc | 0:8c4e1841eb30 | 12 | #define DS2450_PAGE2 0x10 |
fblanc | 0:8c4e1841eb30 | 13 | #define DS2450_PAGE3 0x18 |
fblanc | 0:8c4e1841eb30 | 14 | |
fblanc | 0:8c4e1841eb30 | 15 | #define DS2450_ADCA 0x00 //channel A |
fblanc | 0:8c4e1841eb30 | 16 | #define DS2450_ADCB 0x02 //channel B |
fblanc | 0:8c4e1841eb30 | 17 | #define DS2450_ADCC 0x04 //channel C |
fblanc | 0:8c4e1841eb30 | 18 | #define DS2450_ADCD 0x06 //channel D |
fblanc | 0:8c4e1841eb30 | 19 | |
fblanc | 0:8c4e1841eb30 | 20 | #define DS2450_IR_2V5 0x00 //input voltage range 2.55V |
fblanc | 0:8c4e1841eb30 | 21 | #define DS2450_IR_5V1 0x01 //input voltage range 5.1V |
fblanc | 0:8c4e1841eb30 | 22 | #define DS2450_AFH 0x20 //flag alarm value higher |
fblanc | 0:8c4e1841eb30 | 23 | #define DS2450_AFL 0x10 //flag alarm value lower |
fblanc | 0:8c4e1841eb30 | 24 | #define DS2450_AEH_ENABLE 0x08 //alarm value higher enable |
fblanc | 0:8c4e1841eb30 | 25 | #define DS2450_AEL_ENABLE 0x04 //alarm value lower enable |
fblanc | 0:8c4e1841eb30 | 26 | |
fblanc | 0:8c4e1841eb30 | 27 | #define DS2450_DISABLE_OUT 0x00 //disable ouput |
fblanc | 0:8c4e1841eb30 | 28 | #define DS2450_ENABLE_OUT 0x80//enable ouput |
fblanc | 0:8c4e1841eb30 | 29 | |
fblanc | 0:8c4e1841eb30 | 30 | #define DS2450_16_BIT 0x00 //ADC 16bits enable ouput |
fblanc | 0:8c4e1841eb30 | 31 | #define DS2450_15_BIT 0x0F //ADC 15bits enable ouput |
fblanc | 0:8c4e1841eb30 | 32 | #define DS2450_12_BIT 0x0C //ADC 12bits enable ouput |
fblanc | 0:8c4e1841eb30 | 33 | #define DS2450_8_BIT 0x08 //ADC 8bits enable ouput |
fblanc | 0:8c4e1841eb30 | 34 | #define DS2450_1_BIT 0x01 //ADC 1bits enable ouput |
fblanc | 0:8c4e1841eb30 | 35 | uint8_t DS2450_read_page(uint8_t id[], uint8_t adresse, uint8_t *val); |
fblanc | 0:8c4e1841eb30 | 36 | uint8_t DS2450_read_page(uint8_t n,uint8_t id[], uint8_t adresse, uint8_t *val); |
fblanc | 0:8c4e1841eb30 | 37 | uint8_t DS2450_convert(uint8_t id[], uint8_t input_select_mask,uint8_t read_out_control); |
fblanc | 0:8c4e1841eb30 | 38 | uint8_t DS2450_convert(uint8_t n,uint8_t id[], uint8_t input_select_mask,uint8_t read_out_control); |
fblanc | 0:8c4e1841eb30 | 39 | uint8_t DS2450_read_ADC(uint8_t id[], uint16_t adc[]); |
fblanc | 0:8c4e1841eb30 | 40 | uint8_t DS2450_read_ADC(uint8_t n,uint8_t id[], uint16_t adc[]); |
fblanc | 0:8c4e1841eb30 | 41 | uint8_t DS2450_start_and_read_ADC(uint8_t id[], uint16_t adc[]); |
fblanc | 0:8c4e1841eb30 | 42 | uint8_t DS2450_start_and_read_ADC(uint8_t n,uint8_t id[], uint16_t adc[]); |
fblanc | 0:8c4e1841eb30 | 43 | uint8_t DS2450_configure_channel_ADC(uint8_t id[],uint8_t channel,uint8_t conflsb,uint8_t confmsb); |
fblanc | 0:8c4e1841eb30 | 44 | uint8_t DS2450_configure_channel_ADC(uint8_t n,uint8_t id[],uint8_t channel,uint8_t conflsb,uint8_t confmsb); |
fblanc | 0:8c4e1841eb30 | 45 | uint8_t DS2450_configure_page(uint8_t id[], uint8_t adresse,uint8_t configpage[]); |
fblanc | 0:8c4e1841eb30 | 46 | uint8_t DS2450_configure_page(uint8_t n,uint8_t id[], uint8_t adresse,uint8_t configpage[]); |
fblanc | 0:8c4e1841eb30 | 47 | #endif |