Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NUCLEO_F303K8/stm32f3xx_hal_tim_ex.h@109:9296ab0bfc11, 2015-10-29 (annotated)

Committer:
Kojto
Date:
Thu Oct 29 08:40:18 2015 +0000
Revision:
109:9296ab0bfc11
Release 109  of the mbed library



Changes:

- new platforms - NUCLEO_F042K6, WIZNWIKI_W7500ECO

- MTS targets - bootloaders update to 0.1.1

- STM F7 - RTC enable fixes

- STM F4 - i2c pending stop before start fix

- STM all targets - analogout normalization fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f3xx_hal_tim_ex.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 109:9296ab0bfc11 5 * @version V1.1.0
Kojto 109:9296ab0bfc11 6 * @date 12-Sept-2014
Kojto 109:9296ab0bfc11 7 * @brief Header file of TIM HAL Extended module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 109:9296ab0bfc11 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F3xx_HAL_TIM_EX_H
Kojto 109:9296ab0bfc11 40 #define __STM32F3xx_HAL_TIM_EX_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 47 #include "stm32f3xx_hal_def.h"
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 109:9296ab0bfc11 50 * @{
Kojto 109:9296ab0bfc11 51 */
Kojto 109:9296ab0bfc11 52
Kojto 109:9296ab0bfc11 53 /** @addtogroup TIMEx
Kojto 109:9296ab0bfc11 54 * @{
Kojto 109:9296ab0bfc11 55 */
Kojto 109:9296ab0bfc11 56
Kojto 109:9296ab0bfc11 57 /* Exported types ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 58 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
Kojto 109:9296ab0bfc11 59 * @{
Kojto 109:9296ab0bfc11 60 */
Kojto 109:9296ab0bfc11 61
Kojto 109:9296ab0bfc11 62 /**
Kojto 109:9296ab0bfc11 63 * @brief TIM Hall sensor Configuration Structure definition
Kojto 109:9296ab0bfc11 64 */
Kojto 109:9296ab0bfc11 65
Kojto 109:9296ab0bfc11 66 typedef struct
Kojto 109:9296ab0bfc11 67 {
Kojto 109:9296ab0bfc11 68
Kojto 109:9296ab0bfc11 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
Kojto 109:9296ab0bfc11 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
Kojto 109:9296ab0bfc11 71
Kojto 109:9296ab0bfc11 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
Kojto 109:9296ab0bfc11 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
Kojto 109:9296ab0bfc11 74
Kojto 109:9296ab0bfc11 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
Kojto 109:9296ab0bfc11 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 109:9296ab0bfc11 77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
Kojto 109:9296ab0bfc11 78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
Kojto 109:9296ab0bfc11 79 } TIM_HallSensor_InitTypeDef;
Kojto 109:9296ab0bfc11 80
Kojto 109:9296ab0bfc11 81 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 109:9296ab0bfc11 82 /**
Kojto 109:9296ab0bfc11 83 * @brief TIM Master configuration Structure definition
Kojto 109:9296ab0bfc11 84 * @note STM32F373xC and STM32F378xx: timer instances provide a single TRGO
Kojto 109:9296ab0bfc11 85 * output
Kojto 109:9296ab0bfc11 86 */
Kojto 109:9296ab0bfc11 87 typedef struct {
Kojto 109:9296ab0bfc11 88 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 109:9296ab0bfc11 89 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 109:9296ab0bfc11 90 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
Kojto 109:9296ab0bfc11 91 This parameter can be a value of @ref TIM_Master_Slave_Mode */
Kojto 109:9296ab0bfc11 92 }TIM_MasterConfigTypeDef;
Kojto 109:9296ab0bfc11 93
Kojto 109:9296ab0bfc11 94 /**
Kojto 109:9296ab0bfc11 95 * @brief TIM Break and Dead time configuration Structure definition
Kojto 109:9296ab0bfc11 96 * @note STM32F373xC and STM32F378xx: single break input with configurable polarity.
Kojto 109:9296ab0bfc11 97 */
Kojto 109:9296ab0bfc11 98 typedef struct
Kojto 109:9296ab0bfc11 99 {
Kojto 109:9296ab0bfc11 100 uint32_t OffStateRunMode; /*!< TIM off state in run mode
Kojto 109:9296ab0bfc11 101 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 109:9296ab0bfc11 102 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
Kojto 109:9296ab0bfc11 103 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 109:9296ab0bfc11 104 uint32_t LockLevel; /*!< TIM Lock level
Kojto 109:9296ab0bfc11 105 This parameter can be a value of @ref TIM_Lock_level */
Kojto 109:9296ab0bfc11 106 uint32_t DeadTime; /*!< TIM dead Time
Kojto 109:9296ab0bfc11 107 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 109:9296ab0bfc11 108 uint32_t BreakState; /*!< TIM Break State
Kojto 109:9296ab0bfc11 109 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 109:9296ab0bfc11 110 uint32_t BreakPolarity; /*!< TIM Break input polarity
Kojto 109:9296ab0bfc11 111 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 109:9296ab0bfc11 112 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 109:9296ab0bfc11 113 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
Kojto 109:9296ab0bfc11 114 } TIM_BreakDeadTimeConfigTypeDef;
Kojto 109:9296ab0bfc11 115
Kojto 109:9296ab0bfc11 116 #endif /* STM32F373xC || STM32F378xx */
Kojto 109:9296ab0bfc11 117
Kojto 109:9296ab0bfc11 118 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 119 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 109:9296ab0bfc11 120 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 121 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 122 /**
Kojto 109:9296ab0bfc11 123 * @brief TIM Break input(s) and Dead time configuration Structure definition
Kojto 109:9296ab0bfc11 124 * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
Kojto 109:9296ab0bfc11 125 * filter and polarity.
Kojto 109:9296ab0bfc11 126 */
Kojto 109:9296ab0bfc11 127 typedef struct
Kojto 109:9296ab0bfc11 128 {
Kojto 109:9296ab0bfc11 129 uint32_t OffStateRunMode; /*!< TIM off state in run mode
Kojto 109:9296ab0bfc11 130 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 109:9296ab0bfc11 131 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
Kojto 109:9296ab0bfc11 132 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 109:9296ab0bfc11 133 uint32_t LockLevel; /*!< TIM Lock level
Kojto 109:9296ab0bfc11 134 This parameter can be a value of @ref TIM_Lock_level */
Kojto 109:9296ab0bfc11 135 uint32_t DeadTime; /*!< TIM dead Time
Kojto 109:9296ab0bfc11 136 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 109:9296ab0bfc11 137 uint32_t BreakState; /*!< TIM Break State
Kojto 109:9296ab0bfc11 138 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 109:9296ab0bfc11 139 uint32_t BreakPolarity; /*!< TIM Break input polarity
Kojto 109:9296ab0bfc11 140 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 109:9296ab0bfc11 141 uint32_t BreakFilter; /*!< Specifies the brek input filter.
Kojto 109:9296ab0bfc11 142 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 109:9296ab0bfc11 143 uint32_t Break2State; /*!< TIM Break2 State
Kojto 109:9296ab0bfc11 144 This parameter can be a value of @ref TIMEx_Break2_Input_enable_disable */
Kojto 109:9296ab0bfc11 145 uint32_t Break2Polarity; /*!< TIM Break2 input polarity
Kojto 109:9296ab0bfc11 146 This parameter can be a value of @ref TIMEx_Break2_Polarity */
Kojto 109:9296ab0bfc11 147 uint32_t Break2Filter; /*!< TIM break2 input filter.
Kojto 109:9296ab0bfc11 148 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
Kojto 109:9296ab0bfc11 149 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
Kojto 109:9296ab0bfc11 150 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
Kojto 109:9296ab0bfc11 151 } TIM_BreakDeadTimeConfigTypeDef;
Kojto 109:9296ab0bfc11 152
Kojto 109:9296ab0bfc11 153 /**
Kojto 109:9296ab0bfc11 154 * @brief TIM Master configuration Structure definition
Kojto 109:9296ab0bfc11 155 * @note Advanced timers provide TRGO2 internal line which is redirected
Kojto 109:9296ab0bfc11 156 * to the ADC
Kojto 109:9296ab0bfc11 157 */
Kojto 109:9296ab0bfc11 158 typedef struct {
Kojto 109:9296ab0bfc11 159 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
Kojto 109:9296ab0bfc11 160 This parameter can be a value of @ref TIM_Master_Mode_Selection */
Kojto 109:9296ab0bfc11 161 uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
Kojto 109:9296ab0bfc11 162 This parameter can be a value of @ref TIMEx_Master_Mode_Selection_2 */
Kojto 109:9296ab0bfc11 163 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
Kojto 109:9296ab0bfc11 164 This parameter can be a value of @ref TIM_Master_Slave_Mode */
Kojto 109:9296ab0bfc11 165 }TIM_MasterConfigTypeDef;
Kojto 109:9296ab0bfc11 166 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 167 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 109:9296ab0bfc11 168 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 169 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 109:9296ab0bfc11 170 /**
Kojto 109:9296ab0bfc11 171 * @}
Kojto 109:9296ab0bfc11 172 */
Kojto 109:9296ab0bfc11 173
Kojto 109:9296ab0bfc11 174 /* Exported constants --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 175 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
Kojto 109:9296ab0bfc11 176 * @{
Kojto 109:9296ab0bfc11 177 */
Kojto 109:9296ab0bfc11 178
Kojto 109:9296ab0bfc11 179 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 109:9296ab0bfc11 180 /** @defgroup TIMEx_Channel TIM Extended Channel
Kojto 109:9296ab0bfc11 181 * @{
Kojto 109:9296ab0bfc11 182 */
Kojto 109:9296ab0bfc11 183 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 184 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto 109:9296ab0bfc11 185 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
Kojto 109:9296ab0bfc11 186 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
Kojto 109:9296ab0bfc11 187 #define TIM_CHANNEL_ALL ((uint32_t)0x0018)
Kojto 109:9296ab0bfc11 188
Kojto 109:9296ab0bfc11 189 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 190 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 109:9296ab0bfc11 191 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 109:9296ab0bfc11 192 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 109:9296ab0bfc11 193 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 109:9296ab0bfc11 194
Kojto 109:9296ab0bfc11 195 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 196 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 109:9296ab0bfc11 197
Kojto 109:9296ab0bfc11 198 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 199 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 109:9296ab0bfc11 200
Kojto 109:9296ab0bfc11 201 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 202 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 109:9296ab0bfc11 203 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 109:9296ab0bfc11 204 /**
Kojto 109:9296ab0bfc11 205 * @}
Kojto 109:9296ab0bfc11 206 */
Kojto 109:9296ab0bfc11 207
Kojto 109:9296ab0bfc11 208 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIM Extended Output Compare and PWM Modes
Kojto 109:9296ab0bfc11 209 * @{
Kojto 109:9296ab0bfc11 210 */
Kojto 109:9296ab0bfc11 211
Kojto 109:9296ab0bfc11 212 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 213 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 214 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
Kojto 109:9296ab0bfc11 215 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_1)
Kojto 109:9296ab0bfc11 216 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 217 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M)
Kojto 109:9296ab0bfc11 218 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 219 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 220
Kojto 109:9296ab0bfc11 221 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
Kojto 109:9296ab0bfc11 222 ((MODE) == TIM_OCMODE_PWM2))
Kojto 109:9296ab0bfc11 223
Kojto 109:9296ab0bfc11 224 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
Kojto 109:9296ab0bfc11 225 ((MODE) == TIM_OCMODE_ACTIVE) || \
Kojto 109:9296ab0bfc11 226 ((MODE) == TIM_OCMODE_INACTIVE) || \
Kojto 109:9296ab0bfc11 227 ((MODE) == TIM_OCMODE_TOGGLE) || \
Kojto 109:9296ab0bfc11 228 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
Kojto 109:9296ab0bfc11 229 ((MODE) == TIM_OCMODE_FORCED_INACTIVE))
Kojto 109:9296ab0bfc11 230 /**
Kojto 109:9296ab0bfc11 231 * @}
Kojto 109:9296ab0bfc11 232 */
Kojto 109:9296ab0bfc11 233
Kojto 109:9296ab0bfc11 234 /** @defgroup TIMEx_ClearInput_Source TIM Extended Clear Input Source
Kojto 109:9296ab0bfc11 235 * @{
Kojto 109:9296ab0bfc11 236 */
Kojto 109:9296ab0bfc11 237 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto 109:9296ab0bfc11 238 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 239
Kojto 109:9296ab0bfc11 240 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \
Kojto 109:9296ab0bfc11 241 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
Kojto 109:9296ab0bfc11 242 /**
Kojto 109:9296ab0bfc11 243 * @}
Kojto 109:9296ab0bfc11 244 */
Kojto 109:9296ab0bfc11 245
Kojto 109:9296ab0bfc11 246 /** @defgroup TIMEx_Slave_Mode TIM Extended Slave Mode
Kojto 109:9296ab0bfc11 247 * @{
Kojto 109:9296ab0bfc11 248 */
Kojto 109:9296ab0bfc11 249
Kojto 109:9296ab0bfc11 250 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 251 #define TIM_SLAVEMODE_RESET ((uint16_t)0x0004)
Kojto 109:9296ab0bfc11 252 #define TIM_SLAVEMODE_GATED ((uint16_t)0x0005)
Kojto 109:9296ab0bfc11 253 #define TIM_SLAVEMODE_TRIGGER ((uint16_t)0x0006)
Kojto 109:9296ab0bfc11 254 #define TIM_SLAVEMODE_EXTERNAL1 ((uint16_t)0x0007)
Kojto 109:9296ab0bfc11 255
Kojto 109:9296ab0bfc11 256 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
Kojto 109:9296ab0bfc11 257 ((MODE) == TIM_SLAVEMODE_RESET) || \
Kojto 109:9296ab0bfc11 258 ((MODE) == TIM_SLAVEMODE_GATED) || \
Kojto 109:9296ab0bfc11 259 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
Kojto 109:9296ab0bfc11 260 ((MODE) == TIM_SLAVEMODE_EXTERNAL1))
Kojto 109:9296ab0bfc11 261 /**
Kojto 109:9296ab0bfc11 262 * @}
Kojto 109:9296ab0bfc11 263 */
Kojto 109:9296ab0bfc11 264
Kojto 109:9296ab0bfc11 265 /** @defgroup TIMEx_Event_Source TIM Extended Event Source
Kojto 109:9296ab0bfc11 266 * @{
Kojto 109:9296ab0bfc11 267 */
Kojto 109:9296ab0bfc11 268
Kojto 109:9296ab0bfc11 269 #define TIM_EventSource_Update TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 109:9296ab0bfc11 270 #define TIM_EventSource_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 109:9296ab0bfc11 271 #define TIM_EventSource_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 109:9296ab0bfc11 272 #define TIM_EventSource_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 109:9296ab0bfc11 273 #define TIM_EventSource_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 109:9296ab0bfc11 274 #define TIM_EventSource_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 109:9296ab0bfc11 275 #define TIM_EventSource_Trigger TIM_EGR_TG /*!< A trigger event is generated */
Kojto 109:9296ab0bfc11 276 #define TIM_EventSource_Break TIM_EGR_BG /*!< A break event is generated */
Kojto 109:9296ab0bfc11 277 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFF00) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 109:9296ab0bfc11 278
Kojto 109:9296ab0bfc11 279 /**
Kojto 109:9296ab0bfc11 280 * @}
Kojto 109:9296ab0bfc11 281 */
Kojto 109:9296ab0bfc11 282
Kojto 109:9296ab0bfc11 283 /** @defgroup TIMEx_DMA_Base_address TIM Extended DMA BAse Address
Kojto 109:9296ab0bfc11 284 * @{
Kojto 109:9296ab0bfc11 285 */
Kojto 109:9296ab0bfc11 286
Kojto 109:9296ab0bfc11 287 #define TIM_DMABase_CR1 (0x00000000)
Kojto 109:9296ab0bfc11 288 #define TIM_DMABase_CR2 (0x00000001)
Kojto 109:9296ab0bfc11 289 #define TIM_DMABase_SMCR (0x00000002)
Kojto 109:9296ab0bfc11 290 #define TIM_DMABase_DIER (0x00000003)
Kojto 109:9296ab0bfc11 291 #define TIM_DMABase_SR (0x00000004)
Kojto 109:9296ab0bfc11 292 #define TIM_DMABase_EGR (0x00000005)
Kojto 109:9296ab0bfc11 293 #define TIM_DMABase_CCMR1 (0x00000006)
Kojto 109:9296ab0bfc11 294 #define TIM_DMABase_CCMR2 (0x00000007)
Kojto 109:9296ab0bfc11 295 #define TIM_DMABase_CCER (0x00000008)
Kojto 109:9296ab0bfc11 296 #define TIM_DMABase_CNT (0x00000009)
Kojto 109:9296ab0bfc11 297 #define TIM_DMABase_PSC (0x0000000A)
Kojto 109:9296ab0bfc11 298 #define TIM_DMABase_ARR (0x0000000B)
Kojto 109:9296ab0bfc11 299 #define TIM_DMABase_RCR (0x0000000C)
Kojto 109:9296ab0bfc11 300 #define TIM_DMABase_CCR1 (0x0000000D)
Kojto 109:9296ab0bfc11 301 #define TIM_DMABase_CCR2 (0x0000000E)
Kojto 109:9296ab0bfc11 302 #define TIM_DMABase_CCR3 (0x0000000F)
Kojto 109:9296ab0bfc11 303 #define TIM_DMABase_CCR4 (0x00000010)
Kojto 109:9296ab0bfc11 304 #define TIM_DMABase_BDTR (0x00000011)
Kojto 109:9296ab0bfc11 305 #define TIM_DMABase_DCR (0x00000012)
Kojto 109:9296ab0bfc11 306 #define TIM_DMABase_OR (0x00000013)
Kojto 109:9296ab0bfc11 307 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
Kojto 109:9296ab0bfc11 308 ((BASE) == TIM_DMABase_CR2) || \
Kojto 109:9296ab0bfc11 309 ((BASE) == TIM_DMABase_SMCR) || \
Kojto 109:9296ab0bfc11 310 ((BASE) == TIM_DMABase_DIER) || \
Kojto 109:9296ab0bfc11 311 ((BASE) == TIM_DMABase_SR) || \
Kojto 109:9296ab0bfc11 312 ((BASE) == TIM_DMABase_EGR) || \
Kojto 109:9296ab0bfc11 313 ((BASE) == TIM_DMABase_CCMR1) || \
Kojto 109:9296ab0bfc11 314 ((BASE) == TIM_DMABase_CCMR2) || \
Kojto 109:9296ab0bfc11 315 ((BASE) == TIM_DMABase_CCER) || \
Kojto 109:9296ab0bfc11 316 ((BASE) == TIM_DMABase_CNT) || \
Kojto 109:9296ab0bfc11 317 ((BASE) == TIM_DMABase_PSC) || \
Kojto 109:9296ab0bfc11 318 ((BASE) == TIM_DMABase_ARR) || \
Kojto 109:9296ab0bfc11 319 ((BASE) == TIM_DMABase_RCR) || \
Kojto 109:9296ab0bfc11 320 ((BASE) == TIM_DMABase_CCR1) || \
Kojto 109:9296ab0bfc11 321 ((BASE) == TIM_DMABase_CCR2) || \
Kojto 109:9296ab0bfc11 322 ((BASE) == TIM_DMABase_CCR3) || \
Kojto 109:9296ab0bfc11 323 ((BASE) == TIM_DMABase_CCR4) || \
Kojto 109:9296ab0bfc11 324 ((BASE) == TIM_DMABase_BDTR) || \
Kojto 109:9296ab0bfc11 325 ((BASE) == TIM_DMABase_DCR) || \
Kojto 109:9296ab0bfc11 326 ((BASE) == TIM_DMABase_OR))
Kojto 109:9296ab0bfc11 327 /**
Kojto 109:9296ab0bfc11 328 * @}
Kojto 109:9296ab0bfc11 329 */
Kojto 109:9296ab0bfc11 330 #endif /* STM32F373xC || STM32F378xx */
Kojto 109:9296ab0bfc11 331
Kojto 109:9296ab0bfc11 332 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 333 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 109:9296ab0bfc11 334 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 335 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 336 /** @defgroup TIMEx_Channel TIM Extended Channel
Kojto 109:9296ab0bfc11 337 * @{
Kojto 109:9296ab0bfc11 338 */
Kojto 109:9296ab0bfc11 339
Kojto 109:9296ab0bfc11 340 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 341 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
Kojto 109:9296ab0bfc11 342 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
Kojto 109:9296ab0bfc11 343 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
Kojto 109:9296ab0bfc11 344 #define TIM_CHANNEL_5 ((uint32_t)0x0010)
Kojto 109:9296ab0bfc11 345 #define TIM_CHANNEL_6 ((uint32_t)0x0014)
Kojto 109:9296ab0bfc11 346 #define TIM_CHANNEL_ALL ((uint32_t)0x003C)
Kojto 109:9296ab0bfc11 347
Kojto 109:9296ab0bfc11 348 #define IS_TIM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 349 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 109:9296ab0bfc11 350 ((CHANNEL) == TIM_CHANNEL_3) || \
Kojto 109:9296ab0bfc11 351 ((CHANNEL) == TIM_CHANNEL_4) || \
Kojto 109:9296ab0bfc11 352 ((CHANNEL) == TIM_CHANNEL_5) || \
Kojto 109:9296ab0bfc11 353 ((CHANNEL) == TIM_CHANNEL_6) || \
Kojto 109:9296ab0bfc11 354 ((CHANNEL) == TIM_CHANNEL_ALL))
Kojto 109:9296ab0bfc11 355
Kojto 109:9296ab0bfc11 356 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 357 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 109:9296ab0bfc11 358
Kojto 109:9296ab0bfc11 359 #define IS_TIM_OPM_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 360 ((CHANNEL) == TIM_CHANNEL_2))
Kojto 109:9296ab0bfc11 361
Kojto 109:9296ab0bfc11 362 #define IS_TIM_COMPLEMENTARY_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
Kojto 109:9296ab0bfc11 363 ((CHANNEL) == TIM_CHANNEL_2) || \
Kojto 109:9296ab0bfc11 364 ((CHANNEL) == TIM_CHANNEL_3))
Kojto 109:9296ab0bfc11 365 /**
Kojto 109:9296ab0bfc11 366 * @}
Kojto 109:9296ab0bfc11 367 */
Kojto 109:9296ab0bfc11 368
Kojto 109:9296ab0bfc11 369 /** @defgroup TIMEx_Output_Compare_and_PWM_modes TIM Extended Output Compare and PWM Modes
Kojto 109:9296ab0bfc11 370 * @{
Kojto 109:9296ab0bfc11 371 */
Kojto 109:9296ab0bfc11 372 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 373 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 374 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
Kojto 109:9296ab0bfc11 375 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 376 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
Kojto 109:9296ab0bfc11 377 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 378 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 379 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 380
Kojto 109:9296ab0bfc11 381 #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
Kojto 109:9296ab0bfc11 382 #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
Kojto 109:9296ab0bfc11 383 #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 384 #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 385 #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
Kojto 109:9296ab0bfc11 386 #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
Kojto 109:9296ab0bfc11 387
Kojto 109:9296ab0bfc11 388 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \
Kojto 109:9296ab0bfc11 389 ((MODE) == TIM_OCMODE_PWM2) || \
Kojto 109:9296ab0bfc11 390 ((MODE) == TIM_OCMODE_COMBINED_PWM1) || \
Kojto 109:9296ab0bfc11 391 ((MODE) == TIM_OCMODE_COMBINED_PWM2) || \
Kojto 109:9296ab0bfc11 392 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
Kojto 109:9296ab0bfc11 393 ((MODE) == TIM_OCMODE_ASSYMETRIC_PWM2))
Kojto 109:9296ab0bfc11 394
Kojto 109:9296ab0bfc11 395 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \
Kojto 109:9296ab0bfc11 396 ((MODE) == TIM_OCMODE_ACTIVE) || \
Kojto 109:9296ab0bfc11 397 ((MODE) == TIM_OCMODE_INACTIVE) || \
Kojto 109:9296ab0bfc11 398 ((MODE) == TIM_OCMODE_TOGGLE) || \
Kojto 109:9296ab0bfc11 399 ((MODE) == TIM_OCMODE_FORCED_ACTIVE) || \
Kojto 109:9296ab0bfc11 400 ((MODE) == TIM_OCMODE_FORCED_INACTIVE) || \
Kojto 109:9296ab0bfc11 401 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
Kojto 109:9296ab0bfc11 402 ((MODE) == TIM_OCMODE_RETRIGERRABLE_OPM2))
Kojto 109:9296ab0bfc11 403 /**
Kojto 109:9296ab0bfc11 404 * @}
Kojto 109:9296ab0bfc11 405 */
Kojto 109:9296ab0bfc11 406
Kojto 109:9296ab0bfc11 407 /** @defgroup TIMEx_ClearInput_Source TIM Extended Clear Input Source
Kojto 109:9296ab0bfc11 408 * @{
Kojto 109:9296ab0bfc11 409 */
Kojto 109:9296ab0bfc11 410 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
Kojto 109:9296ab0bfc11 411 #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
Kojto 109:9296ab0bfc11 412 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 413
Kojto 109:9296ab0bfc11 414 #define IS_TIM_CLEARINPUT_SOURCE(MODE) (((MODE) == TIM_CLEARINPUTSOURCE_ETR) || \
Kojto 109:9296ab0bfc11 415 ((MODE) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
Kojto 109:9296ab0bfc11 416 ((MODE) == TIM_CLEARINPUTSOURCE_NONE))
Kojto 109:9296ab0bfc11 417 /**
Kojto 109:9296ab0bfc11 418 * @}
Kojto 109:9296ab0bfc11 419 */
Kojto 109:9296ab0bfc11 420
Kojto 109:9296ab0bfc11 421 /** @defgroup TIMEx_BreakInput_Filter TIM Extended Break Input Filter
Kojto 109:9296ab0bfc11 422 * @{
Kojto 109:9296ab0bfc11 423 */
Kojto 109:9296ab0bfc11 424
Kojto 109:9296ab0bfc11 425 #define IS_TIM_BREAK_FILTER(BRKFILTER) ((BRKFILTER) <= 0xF)
Kojto 109:9296ab0bfc11 426 /**
Kojto 109:9296ab0bfc11 427 * @}
Kojto 109:9296ab0bfc11 428 */
Kojto 109:9296ab0bfc11 429
Kojto 109:9296ab0bfc11 430 /** @defgroup TIMEx_Break2_Input_enable_disable TIMEX Break input 2 Enable
Kojto 109:9296ab0bfc11 431 * @{
Kojto 109:9296ab0bfc11 432 */
Kojto 109:9296ab0bfc11 433 #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 434 #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
Kojto 109:9296ab0bfc11 435
Kojto 109:9296ab0bfc11 436 #define IS_TIM_BREAK2_STATE(STATE) (((STATE) == TIM_BREAK2_ENABLE) || \
Kojto 109:9296ab0bfc11 437 ((STATE) == TIM_BREAK2_DISABLE))
Kojto 109:9296ab0bfc11 438 /**
Kojto 109:9296ab0bfc11 439 * @}
Kojto 109:9296ab0bfc11 440 */
Kojto 109:9296ab0bfc11 441 /** @defgroup TIMEx_Break2_Polarity TIM Extended Break Input 2 Polarity
Kojto 109:9296ab0bfc11 442 * @{
Kojto 109:9296ab0bfc11 443 */
Kojto 109:9296ab0bfc11 444 #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 445 #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
Kojto 109:9296ab0bfc11 446
Kojto 109:9296ab0bfc11 447 #define IS_TIM_BREAK2_POLARITY(POLARITY) (((POLARITY) == TIM_BREAK2POLARITY_LOW) || \
Kojto 109:9296ab0bfc11 448 ((POLARITY) == TIM_BREAK2POLARITY_HIGH))
Kojto 109:9296ab0bfc11 449 /**
Kojto 109:9296ab0bfc11 450 * @}
Kojto 109:9296ab0bfc11 451 */
Kojto 109:9296ab0bfc11 452
Kojto 109:9296ab0bfc11 453 /** @defgroup TIMEx_Master_Mode_Selection_2 TIM Extended Master Mode Selection 2 (TRGO2)
Kojto 109:9296ab0bfc11 454 * @{
Kojto 109:9296ab0bfc11 455 */
Kojto 109:9296ab0bfc11 456 #define TIM_TRGO2_RESET ((uint32_t)0x00000000)
Kojto 109:9296ab0bfc11 457 #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 458 #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
Kojto 109:9296ab0bfc11 459 #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 460 #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
Kojto 109:9296ab0bfc11 461 #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 462 #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
Kojto 109:9296ab0bfc11 463 #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 464 #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
Kojto 109:9296ab0bfc11 465 #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 466 #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
Kojto 109:9296ab0bfc11 467 #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 468 #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
Kojto 109:9296ab0bfc11 469 #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 470 #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
Kojto 109:9296ab0bfc11 471 #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
Kojto 109:9296ab0bfc11 472
Kojto 109:9296ab0bfc11 473 #define IS_TIM_TRGO2_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO2_RESET) || \
Kojto 109:9296ab0bfc11 474 ((SOURCE) == TIM_TRGO2_ENABLE) || \
Kojto 109:9296ab0bfc11 475 ((SOURCE) == TIM_TRGO2_UPDATE) || \
Kojto 109:9296ab0bfc11 476 ((SOURCE) == TIM_TRGO2_OC1) || \
Kojto 109:9296ab0bfc11 477 ((SOURCE) == TIM_TRGO2_OC1REF) || \
Kojto 109:9296ab0bfc11 478 ((SOURCE) == TIM_TRGO2_OC2REF) || \
Kojto 109:9296ab0bfc11 479 ((SOURCE) == TIM_TRGO2_OC3REF) || \
Kojto 109:9296ab0bfc11 480 ((SOURCE) == TIM_TRGO2_OC3REF) || \
Kojto 109:9296ab0bfc11 481 ((SOURCE) == TIM_TRGO2_OC4REF) || \
Kojto 109:9296ab0bfc11 482 ((SOURCE) == TIM_TRGO2_OC5REF) || \
Kojto 109:9296ab0bfc11 483 ((SOURCE) == TIM_TRGO2_OC6REF) || \
Kojto 109:9296ab0bfc11 484 ((SOURCE) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
Kojto 109:9296ab0bfc11 485 ((SOURCE) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
Kojto 109:9296ab0bfc11 486 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
Kojto 109:9296ab0bfc11 487 ((SOURCE) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
Kojto 109:9296ab0bfc11 488 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
Kojto 109:9296ab0bfc11 489 ((SOURCE) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
Kojto 109:9296ab0bfc11 490 /**
Kojto 109:9296ab0bfc11 491 * @}
Kojto 109:9296ab0bfc11 492 */
Kojto 109:9296ab0bfc11 493
Kojto 109:9296ab0bfc11 494 /** @defgroup TIMEx_Slave_Mode TIM Extended Slave mode
Kojto 109:9296ab0bfc11 495 * @{
Kojto 109:9296ab0bfc11 496 */
Kojto 109:9296ab0bfc11 497 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
Kojto 109:9296ab0bfc11 498 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
Kojto 109:9296ab0bfc11 499 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
Kojto 109:9296ab0bfc11 500 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
Kojto 109:9296ab0bfc11 501 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
Kojto 109:9296ab0bfc11 502 #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
Kojto 109:9296ab0bfc11 503
Kojto 109:9296ab0bfc11 504 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SLAVEMODE_DISABLE) || \
Kojto 109:9296ab0bfc11 505 ((MODE) == TIM_SLAVEMODE_RESET) || \
Kojto 109:9296ab0bfc11 506 ((MODE) == TIM_SLAVEMODE_GATED) || \
Kojto 109:9296ab0bfc11 507 ((MODE) == TIM_SLAVEMODE_TRIGGER) || \
Kojto 109:9296ab0bfc11 508 ((MODE) == TIM_SLAVEMODE_EXTERNAL1) || \
Kojto 109:9296ab0bfc11 509 ((MODE) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
Kojto 109:9296ab0bfc11 510 /**
Kojto 109:9296ab0bfc11 511 * @}
Kojto 109:9296ab0bfc11 512 */
Kojto 109:9296ab0bfc11 513
Kojto 109:9296ab0bfc11 514 /** @defgroup TIM_Event_Source TIM Extended Event Source
Kojto 109:9296ab0bfc11 515 * @{
Kojto 109:9296ab0bfc11 516 */
Kojto 109:9296ab0bfc11 517
Kojto 109:9296ab0bfc11 518 #define TIM_EventSource_Update TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
Kojto 109:9296ab0bfc11 519 #define TIM_EventSource_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
Kojto 109:9296ab0bfc11 520 #define TIM_EventSource_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
Kojto 109:9296ab0bfc11 521 #define TIM_EventSource_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
Kojto 109:9296ab0bfc11 522 #define TIM_EventSource_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
Kojto 109:9296ab0bfc11 523 #define TIM_EventSource_COM TIM_EGR_COMG /*!< A commutation event is generated */
Kojto 109:9296ab0bfc11 524 #define TIM_EventSource_Trigger TIM_EGR_TG /*!< A trigger event is generated */
Kojto 109:9296ab0bfc11 525 #define TIM_EventSource_Break TIM_EGR_BG /*!< A break event is generated */
Kojto 109:9296ab0bfc11 526 #define TIM_EventSource_Break2 TIM_EGR_B2G /*!< A break 2 event is generated */
Kojto 109:9296ab0bfc11 527 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & 0xFFFFFE00) == 0x00000000) && ((SOURCE) != 0x00000000))
Kojto 109:9296ab0bfc11 528
Kojto 109:9296ab0bfc11 529 /**
Kojto 109:9296ab0bfc11 530 * @}
Kojto 109:9296ab0bfc11 531 */
Kojto 109:9296ab0bfc11 532
Kojto 109:9296ab0bfc11 533 /** @defgroup TIM_DMA_Base_address TIM Extended DMA Base Address
Kojto 109:9296ab0bfc11 534 * @{
Kojto 109:9296ab0bfc11 535 */
Kojto 109:9296ab0bfc11 536
Kojto 109:9296ab0bfc11 537 #define TIM_DMABase_CR1 (0x00000000)
Kojto 109:9296ab0bfc11 538 #define TIM_DMABase_CR2 (0x00000001)
Kojto 109:9296ab0bfc11 539 #define TIM_DMABase_SMCR (0x00000002)
Kojto 109:9296ab0bfc11 540 #define TIM_DMABase_DIER (0x00000003)
Kojto 109:9296ab0bfc11 541 #define TIM_DMABase_SR (0x00000004)
Kojto 109:9296ab0bfc11 542 #define TIM_DMABase_EGR (0x00000005)
Kojto 109:9296ab0bfc11 543 #define TIM_DMABase_CCMR1 (0x00000006)
Kojto 109:9296ab0bfc11 544 #define TIM_DMABase_CCMR2 (0x00000007)
Kojto 109:9296ab0bfc11 545 #define TIM_DMABase_CCER (0x00000008)
Kojto 109:9296ab0bfc11 546 #define TIM_DMABase_CNT (0x00000009)
Kojto 109:9296ab0bfc11 547 #define TIM_DMABase_PSC (0x0000000A)
Kojto 109:9296ab0bfc11 548 #define TIM_DMABase_ARR (0x0000000B)
Kojto 109:9296ab0bfc11 549 #define TIM_DMABase_RCR (0x0000000C)
Kojto 109:9296ab0bfc11 550 #define TIM_DMABase_CCR1 (0x0000000D)
Kojto 109:9296ab0bfc11 551 #define TIM_DMABase_CCR2 (0x0000000E)
Kojto 109:9296ab0bfc11 552 #define TIM_DMABase_CCR3 (0x0000000F)
Kojto 109:9296ab0bfc11 553 #define TIM_DMABase_CCR4 (0x00000010)
Kojto 109:9296ab0bfc11 554 #define TIM_DMABase_BDTR (0x00000011)
Kojto 109:9296ab0bfc11 555 #define TIM_DMABase_DCR (0x00000012)
Kojto 109:9296ab0bfc11 556 #define TIM_DMABase_CCMR3 (0x00000015)
Kojto 109:9296ab0bfc11 557 #define TIM_DMABase_CCR5 (0x00000016)
Kojto 109:9296ab0bfc11 558 #define TIM_DMABase_CCR6 (0x00000017)
Kojto 109:9296ab0bfc11 559 #define TIM_DMABase_OR (0x00000018)
Kojto 109:9296ab0bfc11 560 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \
Kojto 109:9296ab0bfc11 561 ((BASE) == TIM_DMABase_CR2) || \
Kojto 109:9296ab0bfc11 562 ((BASE) == TIM_DMABase_SMCR) || \
Kojto 109:9296ab0bfc11 563 ((BASE) == TIM_DMABase_DIER) || \
Kojto 109:9296ab0bfc11 564 ((BASE) == TIM_DMABase_SR) || \
Kojto 109:9296ab0bfc11 565 ((BASE) == TIM_DMABase_EGR) || \
Kojto 109:9296ab0bfc11 566 ((BASE) == TIM_DMABase_CCMR1) || \
Kojto 109:9296ab0bfc11 567 ((BASE) == TIM_DMABase_CCMR2) || \
Kojto 109:9296ab0bfc11 568 ((BASE) == TIM_DMABase_CCER) || \
Kojto 109:9296ab0bfc11 569 ((BASE) == TIM_DMABase_CNT) || \
Kojto 109:9296ab0bfc11 570 ((BASE) == TIM_DMABase_PSC) || \
Kojto 109:9296ab0bfc11 571 ((BASE) == TIM_DMABase_ARR) || \
Kojto 109:9296ab0bfc11 572 ((BASE) == TIM_DMABase_RCR) || \
Kojto 109:9296ab0bfc11 573 ((BASE) == TIM_DMABase_CCR1) || \
Kojto 109:9296ab0bfc11 574 ((BASE) == TIM_DMABase_CCR2) || \
Kojto 109:9296ab0bfc11 575 ((BASE) == TIM_DMABase_CCR3) || \
Kojto 109:9296ab0bfc11 576 ((BASE) == TIM_DMABase_CCR4) || \
Kojto 109:9296ab0bfc11 577 ((BASE) == TIM_DMABase_BDTR) || \
Kojto 109:9296ab0bfc11 578 ((BASE) == TIM_DMABase_CCMR3) || \
Kojto 109:9296ab0bfc11 579 ((BASE) == TIM_DMABase_CCR5) || \
Kojto 109:9296ab0bfc11 580 ((BASE) == TIM_DMABase_CCR6) || \
Kojto 109:9296ab0bfc11 581 ((BASE) == TIM_DMABase_OR))
Kojto 109:9296ab0bfc11 582 /**
Kojto 109:9296ab0bfc11 583 * @}
Kojto 109:9296ab0bfc11 584 */
Kojto 109:9296ab0bfc11 585 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 586 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 109:9296ab0bfc11 587 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 588 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 109:9296ab0bfc11 589
Kojto 109:9296ab0bfc11 590 #if defined(STM32F302xE) || \
Kojto 109:9296ab0bfc11 591 defined(STM32F302xC) || \
Kojto 109:9296ab0bfc11 592 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 593 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 594 /** @defgroup TIMEx_Remap TIM Extended Remapping
Kojto 109:9296ab0bfc11 595 * @{
Kojto 109:9296ab0bfc11 596 */
Kojto 109:9296ab0bfc11 597 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 109:9296ab0bfc11 598 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 109:9296ab0bfc11 599 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 109:9296ab0bfc11 600 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 109:9296ab0bfc11 601 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 109:9296ab0bfc11 602 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 109:9296ab0bfc11 603 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 109:9296ab0bfc11 604 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 109:9296ab0bfc11 605
Kojto 109:9296ab0bfc11 606 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM1_ADC1_NONE) ||\
Kojto 109:9296ab0bfc11 607 ((REMAP) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 109:9296ab0bfc11 608 ((REMAP) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 109:9296ab0bfc11 609 ((REMAP) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 109:9296ab0bfc11 610 ((REMAP) == TIM_TIM16_GPIO) ||\
Kojto 109:9296ab0bfc11 611 ((REMAP) == TIM_TIM16_RTC) ||\
Kojto 109:9296ab0bfc11 612 ((REMAP) == TIM_TIM16_HSE) ||\
Kojto 109:9296ab0bfc11 613 ((REMAP) == TIM_TIM16_MCO))
Kojto 109:9296ab0bfc11 614 /**
Kojto 109:9296ab0bfc11 615 * @}
Kojto 109:9296ab0bfc11 616 */
Kojto 109:9296ab0bfc11 617 #endif /* STM32F302xE || */
Kojto 109:9296ab0bfc11 618 /* STM32F302xC || */
Kojto 109:9296ab0bfc11 619 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 620 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
Kojto 109:9296ab0bfc11 621
Kojto 109:9296ab0bfc11 622 #if defined(STM32F303xC) || defined(STM32F358xx)
Kojto 109:9296ab0bfc11 623 /** @defgroup TIMEx_Remap TIM Extended Remapping 1
Kojto 109:9296ab0bfc11 624 * @{
Kojto 109:9296ab0bfc11 625 */
Kojto 109:9296ab0bfc11 626 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 109:9296ab0bfc11 627 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 109:9296ab0bfc11 628 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 109:9296ab0bfc11 629 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 109:9296ab0bfc11 630 #define TIM_TIM8_ADC2_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 631 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /* !< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 109:9296ab0bfc11 632 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /* !< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 109:9296ab0bfc11 633 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /* !< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 109:9296ab0bfc11 634 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 109:9296ab0bfc11 635 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 109:9296ab0bfc11 636 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 109:9296ab0bfc11 637 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 109:9296ab0bfc11 638
Kojto 109:9296ab0bfc11 639 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
Kojto 109:9296ab0bfc11 640 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 109:9296ab0bfc11 641 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 109:9296ab0bfc11 642 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 109:9296ab0bfc11 643 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
Kojto 109:9296ab0bfc11 644 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
Kojto 109:9296ab0bfc11 645 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
Kojto 109:9296ab0bfc11 646 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
Kojto 109:9296ab0bfc11 647 ((REMAP1) == TIM_TIM16_GPIO) ||\
Kojto 109:9296ab0bfc11 648 ((REMAP1) == TIM_TIM16_RTC) ||\
Kojto 109:9296ab0bfc11 649 ((REMAP1) == TIM_TIM16_HSE) ||\
Kojto 109:9296ab0bfc11 650 ((REMAP1) == TIM_TIM16_MCO))
Kojto 109:9296ab0bfc11 651 /**
Kojto 109:9296ab0bfc11 652 * @}
Kojto 109:9296ab0bfc11 653 */
Kojto 109:9296ab0bfc11 654
Kojto 109:9296ab0bfc11 655 /** @defgroup TIMEx_Remap2 TIM Extended Remapping 2
Kojto 109:9296ab0bfc11 656 * @{
Kojto 109:9296ab0bfc11 657 */
Kojto 109:9296ab0bfc11 658 #define TIM_TIM1_ADC4_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 109:9296ab0bfc11 659 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /* !< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 109:9296ab0bfc11 660 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /* !< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 109:9296ab0bfc11 661 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /* !< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 109:9296ab0bfc11 662 #define TIM_TIM8_ADC3_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 663 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /* !< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 109:9296ab0bfc11 664 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /* !< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 109:9296ab0bfc11 665 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /* !< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 109:9296ab0bfc11 666 #define TIM_TIM16_NONE (0x00000000) /* !< Non significant value for TIM16 */
Kojto 109:9296ab0bfc11 667
Kojto 109:9296ab0bfc11 668 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
Kojto 109:9296ab0bfc11 669 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
Kojto 109:9296ab0bfc11 670 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
Kojto 109:9296ab0bfc11 671 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
Kojto 109:9296ab0bfc11 672 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
Kojto 109:9296ab0bfc11 673 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
Kojto 109:9296ab0bfc11 674 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
Kojto 109:9296ab0bfc11 675 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
Kojto 109:9296ab0bfc11 676 ((REMAP2) == TIM_TIM16_NONE))
Kojto 109:9296ab0bfc11 677 /**
Kojto 109:9296ab0bfc11 678 * @}
Kojto 109:9296ab0bfc11 679 */
Kojto 109:9296ab0bfc11 680 #endif /* STM32F303xC || STM32F358xx */
Kojto 109:9296ab0bfc11 681
Kojto 109:9296ab0bfc11 682 #if defined(STM32F303xE) || defined(STM32F398xx)
Kojto 109:9296ab0bfc11 683 /** @defgroup TIMEx_Remap TIM Extended Remapping 1
Kojto 109:9296ab0bfc11 684 * @{
Kojto 109:9296ab0bfc11 685 */
Kojto 109:9296ab0bfc11 686 #define TIM_TIM1_ADC1_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 109:9296ab0bfc11 687 #define TIM_TIM1_ADC1_AWD1 (0x00000001) /* !< TIM1_ETR is connected to ADC1 AWD1 */
Kojto 109:9296ab0bfc11 688 #define TIM_TIM1_ADC1_AWD2 (0x00000002) /* !< TIM1_ETR is connected to ADC1 AWD2 */
Kojto 109:9296ab0bfc11 689 #define TIM_TIM1_ADC1_AWD3 (0x00000003) /* !< TIM1_ETR is connected to ADC1 AWD3 */
Kojto 109:9296ab0bfc11 690 #define TIM_TIM8_ADC2_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 691 #define TIM_TIM8_ADC2_AWD1 (0x00000001) /* !< TIM8_ETR is connected to ADC2 AWD1 */
Kojto 109:9296ab0bfc11 692 #define TIM_TIM8_ADC2_AWD2 (0x00000002) /* !< TIM8_ETR is connected to ADC2 AWD2 */
Kojto 109:9296ab0bfc11 693 #define TIM_TIM8_ADC2_AWD3 (0x00000003) /* !< TIM8_ETR is connected to ADC2 AWD3 */
Kojto 109:9296ab0bfc11 694 #define TIM_TIM16_GPIO (0x00000000) /* !< TIM16 TI1 is connected to GPIO */
Kojto 109:9296ab0bfc11 695 #define TIM_TIM16_RTC (0x00000001) /* !< TIM16 TI1 is connected to RTC_clock */
Kojto 109:9296ab0bfc11 696 #define TIM_TIM16_HSE (0x00000002) /* !< TIM16 TI1 is connected to HSE/32 */
Kojto 109:9296ab0bfc11 697 #define TIM_TIM16_MCO (0x00000003) /* !< TIM16 TI1 is connected to MCO */
Kojto 109:9296ab0bfc11 698 #define TIM_TIM20_ADC3_NONE (0x00000000) /* !< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 699 #define TIM_TIM20_ADC3_AWD1 (0x00000001) /* !< TIM20_ETR is connected to ADC3 AWD1 */
Kojto 109:9296ab0bfc11 700 #define TIM_TIM20_ADC3_AWD2 (0x00000002) /* !< TIM20_ETR is connected to ADC3 AWD2 */
Kojto 109:9296ab0bfc11 701 #define TIM_TIM20_ADC3_AWD3 (0x00000003) /* !< TIM20_ETR is connected to ADC3 AWD3 */
Kojto 109:9296ab0bfc11 702
Kojto 109:9296ab0bfc11 703 #define IS_TIM_REMAP(REMAP1) (((REMAP1) == TIM_TIM1_ADC1_NONE) ||\
Kojto 109:9296ab0bfc11 704 ((REMAP1) == TIM_TIM1_ADC1_AWD1) ||\
Kojto 109:9296ab0bfc11 705 ((REMAP1) == TIM_TIM1_ADC1_AWD2) ||\
Kojto 109:9296ab0bfc11 706 ((REMAP1) == TIM_TIM1_ADC1_AWD3) ||\
Kojto 109:9296ab0bfc11 707 ((REMAP1) == TIM_TIM8_ADC2_NONE) ||\
Kojto 109:9296ab0bfc11 708 ((REMAP1) == TIM_TIM8_ADC2_AWD1) ||\
Kojto 109:9296ab0bfc11 709 ((REMAP1) == TIM_TIM8_ADC2_AWD2) ||\
Kojto 109:9296ab0bfc11 710 ((REMAP1) == TIM_TIM8_ADC2_AWD3) ||\
Kojto 109:9296ab0bfc11 711 ((REMAP1) == TIM_TIM16_GPIO) ||\
Kojto 109:9296ab0bfc11 712 ((REMAP1) == TIM_TIM16_RTC) ||\
Kojto 109:9296ab0bfc11 713 ((REMAP1) == TIM_TIM16_HSE) ||\
Kojto 109:9296ab0bfc11 714 ((REMAP1) == TIM_TIM16_MCO) ||\
Kojto 109:9296ab0bfc11 715 ((REMAP1) == TIM_TIM20_ADC3_NONE) ||\
Kojto 109:9296ab0bfc11 716 ((REMAP1) == TIM_TIM20_ADC3_AWD1) ||\
Kojto 109:9296ab0bfc11 717 ((REMAP1) == TIM_TIM20_ADC3_AWD2) ||\
Kojto 109:9296ab0bfc11 718 ((REMAP1) == TIM_TIM20_ADC3_AWD3))
Kojto 109:9296ab0bfc11 719 /**
Kojto 109:9296ab0bfc11 720 * @}
Kojto 109:9296ab0bfc11 721 */
Kojto 109:9296ab0bfc11 722
Kojto 109:9296ab0bfc11 723 /** @defgroup TIMEx_Remap2 TIM Extended Remapping 2
Kojto 109:9296ab0bfc11 724 * @{
Kojto 109:9296ab0bfc11 725 */
Kojto 109:9296ab0bfc11 726 #define TIM_TIM1_ADC4_NONE (0x00000000) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
Kojto 109:9296ab0bfc11 727 #define TIM_TIM1_ADC4_AWD1 (0x00000004) /* !< TIM1_ETR is connected to ADC4 AWD1 */
Kojto 109:9296ab0bfc11 728 #define TIM_TIM1_ADC4_AWD2 (0x00000008) /* !< TIM1_ETR is connected to ADC4 AWD2 */
Kojto 109:9296ab0bfc11 729 #define TIM_TIM1_ADC4_AWD3 (0x0000000C) /* !< TIM1_ETR is connected to ADC4 AWD3 */
Kojto 109:9296ab0bfc11 730 #define TIM_TIM8_ADC3_NONE (0x00000000) /* !< TIM8_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 731 #define TIM_TIM8_ADC3_AWD1 (0x00000004) /* !< TIM8_ETR is connected to ADC3 AWD1 */
Kojto 109:9296ab0bfc11 732 #define TIM_TIM8_ADC3_AWD2 (0x00000008) /* !< TIM8_ETR is connected to ADC3 AWD2 */
Kojto 109:9296ab0bfc11 733 #define TIM_TIM8_ADC3_AWD3 (0x0000000C) /* !< TIM8_ETR is connected to ADC3 AWD3 */
Kojto 109:9296ab0bfc11 734 #define TIM_TIM16_NONE (0x00000000) /* !< Non significant value for TIM16 */
Kojto 109:9296ab0bfc11 735 #define TIM_TIM20_ADC4_NONE (0x00000000) /* !< TIM20_ETR is not connected to any AWD (analog watchdog) */
Kojto 109:9296ab0bfc11 736 #define TIM_TIM20_ADC4_AWD1 (0x00000004) /* !< TIM20_ETR is connected to ADC4 AWD1 */
Kojto 109:9296ab0bfc11 737 #define TIM_TIM20_ADC4_AWD2 (0x00000008) /* !< TIM20_ETR is connected to ADC4 AWD2 */
Kojto 109:9296ab0bfc11 738 #define TIM_TIM20_ADC4_AWD3 (0x0000000C) /* !< TIM20_ETR is connected to ADC4 AWD3 */
Kojto 109:9296ab0bfc11 739
Kojto 109:9296ab0bfc11 740 #define IS_TIM_REMAP2(REMAP2) (((REMAP2) == TIM_TIM1_ADC4_NONE) ||\
Kojto 109:9296ab0bfc11 741 ((REMAP2) == TIM_TIM1_ADC4_AWD1) ||\
Kojto 109:9296ab0bfc11 742 ((REMAP2) == TIM_TIM1_ADC4_AWD2) ||\
Kojto 109:9296ab0bfc11 743 ((REMAP2) == TIM_TIM1_ADC4_AWD3) ||\
Kojto 109:9296ab0bfc11 744 ((REMAP2) == TIM_TIM8_ADC3_NONE) ||\
Kojto 109:9296ab0bfc11 745 ((REMAP2) == TIM_TIM8_ADC3_AWD1) ||\
Kojto 109:9296ab0bfc11 746 ((REMAP2) == TIM_TIM8_ADC3_AWD2) ||\
Kojto 109:9296ab0bfc11 747 ((REMAP2) == TIM_TIM8_ADC3_AWD3) ||\
Kojto 109:9296ab0bfc11 748 ((REMAP2) == TIM_TIM16_NONE) ||\
Kojto 109:9296ab0bfc11 749 ((REMAP2) == TIM_TIM20_ADC4_NONE) ||\
Kojto 109:9296ab0bfc11 750 ((REMAP2) == TIM_TIM20_ADC4_AWD1) ||\
Kojto 109:9296ab0bfc11 751 ((REMAP2) == TIM_TIM20_ADC4_AWD2) ||\
Kojto 109:9296ab0bfc11 752 ((REMAP2) == TIM_TIM20_ADC4_AWD3))
Kojto 109:9296ab0bfc11 753 /**
Kojto 109:9296ab0bfc11 754 * @}
Kojto 109:9296ab0bfc11 755 */
Kojto 109:9296ab0bfc11 756 #endif /* STM32F303xE || STM32F398xx */
Kojto 109:9296ab0bfc11 757
Kojto 109:9296ab0bfc11 758
Kojto 109:9296ab0bfc11 759 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 109:9296ab0bfc11 760 /** @defgroup TIMEx_Remap TIM Extended remapping
Kojto 109:9296ab0bfc11 761 * @{
Kojto 109:9296ab0bfc11 762 */
Kojto 109:9296ab0bfc11 763
Kojto 109:9296ab0bfc11 764 #define TIM_TIM2_TIM8_TRGO (0x00000000) /*!< TIM8 TRGOUT is connected to TIM2_ITR1 */
Kojto 109:9296ab0bfc11 765 #define TIM_TIM2_ETH_PTP (0x00000400) /*!< PTP trigger output is connected to TIM2_ITR1 */
Kojto 109:9296ab0bfc11 766 #define TIM_TIM2_USBFS_SOF (0x00000800) /*!< OTG FS SOF is connected to the TIM2_ITR1 input */
Kojto 109:9296ab0bfc11 767 #define TIM_TIM2_USBHS_SOF (0x00000C00) /*!< OTG HS SOF is connected to the TIM2_ITR1 input */
Kojto 109:9296ab0bfc11 768 #define TIM_TIM14_GPIO (0x00000000) /* !< TIM14 TI1 is connected to GPIO */
Kojto 109:9296ab0bfc11 769 #define TIM_TIM14_RTC (0x00000001) /* !< TIM14 TI1 is connected to RTC_clock */
Kojto 109:9296ab0bfc11 770 #define TIM_TIM14_HSE (0x00000002) /* !< TIM14 TI1 is connected to HSE/32 */
Kojto 109:9296ab0bfc11 771 #define TIM_TIM14_MCO (0x00000003) /* !< TIM14 TI1 is connected to MCO */
Kojto 109:9296ab0bfc11 772
Kojto 109:9296ab0bfc11 773 #define IS_TIM_REMAP(REMAP) (((REMAP) == TIM_TIM2_TIM8_TRGO) ||\
Kojto 109:9296ab0bfc11 774 ((REMAP) == TIM_TIM2_ETH_PTP) ||\
Kojto 109:9296ab0bfc11 775 ((REMAP) == TIM_TIM2_USBFS_SOF) ||\
Kojto 109:9296ab0bfc11 776 ((REMAP) == TIM_TIM2_USBHS_SOF) ||\
Kojto 109:9296ab0bfc11 777 ((REMAP) == TIM_TIM14_GPIO) ||\
Kojto 109:9296ab0bfc11 778 ((REMAP) == TIM_TIM14_RTC) ||\
Kojto 109:9296ab0bfc11 779 ((REMAP) == TIM_TIM14_HSE) ||\
Kojto 109:9296ab0bfc11 780 ((REMAP) == TIM_TIM14_MCO))
Kojto 109:9296ab0bfc11 781
Kojto 109:9296ab0bfc11 782 /**
Kojto 109:9296ab0bfc11 783 * @}
Kojto 109:9296ab0bfc11 784 */
Kojto 109:9296ab0bfc11 785 #endif /* STM32F373xC || STM32F378xx */
Kojto 109:9296ab0bfc11 786
Kojto 109:9296ab0bfc11 787 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 788 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 109:9296ab0bfc11 789 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 790 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 791 /** @defgroup TIMEx_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
Kojto 109:9296ab0bfc11 792 * @{
Kojto 109:9296ab0bfc11 793 */
Kojto 109:9296ab0bfc11 794 #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
Kojto 109:9296ab0bfc11 795 #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
Kojto 109:9296ab0bfc11 796 #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
Kojto 109:9296ab0bfc11 797 #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
Kojto 109:9296ab0bfc11 798
Kojto 109:9296ab0bfc11 799 #define IS_TIM_GROUPCH5(OCREF) ((((OCREF) & 0x1FFFFFFF) == 0x00000000))
Kojto 109:9296ab0bfc11 800 /**
Kojto 109:9296ab0bfc11 801 * @}
Kojto 109:9296ab0bfc11 802 */
Kojto 109:9296ab0bfc11 803 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 804 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 109:9296ab0bfc11 805 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 806 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 109:9296ab0bfc11 807
Kojto 109:9296ab0bfc11 808 /** @defgroup TIM_Clock_Filter TIM Clock Filter
Kojto 109:9296ab0bfc11 809 * @{
Kojto 109:9296ab0bfc11 810 */
Kojto 109:9296ab0bfc11 811 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF)
Kojto 109:9296ab0bfc11 812 /**
Kojto 109:9296ab0bfc11 813 * @}
Kojto 109:9296ab0bfc11 814 */
Kojto 109:9296ab0bfc11 815
Kojto 109:9296ab0bfc11 816 /**
Kojto 109:9296ab0bfc11 817 * @}
Kojto 109:9296ab0bfc11 818 */
Kojto 109:9296ab0bfc11 819
Kojto 109:9296ab0bfc11 820 /* Exported macro ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 821 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
Kojto 109:9296ab0bfc11 822 * @{
Kojto 109:9296ab0bfc11 823 */
Kojto 109:9296ab0bfc11 824
Kojto 109:9296ab0bfc11 825 #if defined(STM32F373xC) || defined(STM32F378xx)
Kojto 109:9296ab0bfc11 826 /**
Kojto 109:9296ab0bfc11 827 * @brief Sets the TIM Capture Compare Register value on runtime without
Kojto 109:9296ab0bfc11 828 * calling another time ConfigChannel function.
Kojto 109:9296ab0bfc11 829 * @param __HANDLE__: TIM handle.
Kojto 109:9296ab0bfc11 830 * @param __CHANNEL__ : TIM Channels to be configured.
Kojto 109:9296ab0bfc11 831 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 832 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto 109:9296ab0bfc11 833 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto 109:9296ab0bfc11 834 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto 109:9296ab0bfc11 835 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto 109:9296ab0bfc11 836 * @param __COMPARE__: specifies the Capture Compare register new value.
Kojto 109:9296ab0bfc11 837 * @retval None
Kojto 109:9296ab0bfc11 838 */
Kojto 109:9296ab0bfc11 839 #define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
Kojto 109:9296ab0bfc11 840 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)) = (__COMPARE__))
Kojto 109:9296ab0bfc11 841
Kojto 109:9296ab0bfc11 842 /**
Kojto 109:9296ab0bfc11 843 * @brief Gets the TIM Capture Compare Register value on runtime
Kojto 109:9296ab0bfc11 844 * @param __HANDLE__: TIM handle.
Kojto 109:9296ab0bfc11 845 * @param __CHANNEL__ : TIM Channel associated with the capture compare register
Kojto 109:9296ab0bfc11 846 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 847 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
Kojto 109:9296ab0bfc11 848 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
Kojto 109:9296ab0bfc11 849 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
Kojto 109:9296ab0bfc11 850 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
Kojto 109:9296ab0bfc11 851 * @retval None
Kojto 109:9296ab0bfc11 852 */
Kojto 109:9296ab0bfc11 853 #define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
Kojto 109:9296ab0bfc11 854 (*(__IO uint32_t *)(&((__HANDLE__)->Instance->CCR1) + ((__CHANNEL__) >> 2)))
Kojto 109:9296ab0bfc11 855 #endif /* STM32F373xC || STM32F378xx */
Kojto 109:9296ab0bfc11 856
Kojto 109:9296ab0bfc11 857 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 858 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 109:9296ab0bfc11 859 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 860 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 861 /**
Kojto 109:9296ab0bfc11 862 * @brief Sets the TIM Capture Compare Register value on runtime without
Kojto 109:9296ab0bfc11 863 * calling another time ConfigChannel function.
Kojto 109:9296ab0bfc11 864 * @param __HANDLE__: TIM handle.
Kojto 109:9296ab0bfc11 865 * @param __CHANNEL__ : TIM Channels to be configured.
Kojto 109:9296ab0bfc11 866 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 867 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
Kojto 109:9296ab0bfc11 868 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
Kojto 109:9296ab0bfc11 869 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
Kojto 109:9296ab0bfc11 870 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
Kojto 109:9296ab0bfc11 871 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
Kojto 109:9296ab0bfc11 872 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
Kojto 109:9296ab0bfc11 873 * @param __COMPARE__: specifies the Capture Compare register new value.
Kojto 109:9296ab0bfc11 874 * @retval None
Kojto 109:9296ab0bfc11 875 */
Kojto 109:9296ab0bfc11 876 #define __HAL_TIM_SetCompare(__HANDLE__, __CHANNEL__, __COMPARE__) \
Kojto 109:9296ab0bfc11 877 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
Kojto 109:9296ab0bfc11 878 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
Kojto 109:9296ab0bfc11 879 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
Kojto 109:9296ab0bfc11 880 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
Kojto 109:9296ab0bfc11 881 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
Kojto 109:9296ab0bfc11 882 ((__HANDLE__)->Instance->CCR6 |= (__COMPARE__)))
Kojto 109:9296ab0bfc11 883
Kojto 109:9296ab0bfc11 884 /**
Kojto 109:9296ab0bfc11 885 * @brief Gets the TIM Capture Compare Register value on runtime
Kojto 109:9296ab0bfc11 886 * @param __HANDLE__: TIM handle.
Kojto 109:9296ab0bfc11 887 * @param __CHANNEL__ : TIM Channel associated with the capture compare register
Kojto 109:9296ab0bfc11 888 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 889 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
Kojto 109:9296ab0bfc11 890 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
Kojto 109:9296ab0bfc11 891 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
Kojto 109:9296ab0bfc11 892 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
Kojto 109:9296ab0bfc11 893 * @arg TIM_CHANNEL_5: get capture/compare 5 register value
Kojto 109:9296ab0bfc11 894 * @arg TIM_CHANNEL_6: get capture/compare 6 register value
Kojto 109:9296ab0bfc11 895 * @retval None
Kojto 109:9296ab0bfc11 896 */
Kojto 109:9296ab0bfc11 897 #define __HAL_TIM_GetCompare(__HANDLE__, __CHANNEL__) \
Kojto 109:9296ab0bfc11 898 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
Kojto 109:9296ab0bfc11 899 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
Kojto 109:9296ab0bfc11 900 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
Kojto 109:9296ab0bfc11 901 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
Kojto 109:9296ab0bfc11 902 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
Kojto 109:9296ab0bfc11 903 ((__HANDLE__)->Instance->CCR6))
Kojto 109:9296ab0bfc11 904 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 905 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 109:9296ab0bfc11 906 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 907 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 109:9296ab0bfc11 908 /**
Kojto 109:9296ab0bfc11 909 * @}
Kojto 109:9296ab0bfc11 910 */
Kojto 109:9296ab0bfc11 911
Kojto 109:9296ab0bfc11 912 /* Exported functions --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 913 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
Kojto 109:9296ab0bfc11 914 * @{
Kojto 109:9296ab0bfc11 915 */
Kojto 109:9296ab0bfc11 916
Kojto 109:9296ab0bfc11 917 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
Kojto 109:9296ab0bfc11 918 * @brief Timer Hall Sensor functions
Kojto 109:9296ab0bfc11 919 * @{
Kojto 109:9296ab0bfc11 920 */
Kojto 109:9296ab0bfc11 921 /* Timer Hall Sensor functions **********************************************/
Kojto 109:9296ab0bfc11 922 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
Kojto 109:9296ab0bfc11 923 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 924
Kojto 109:9296ab0bfc11 925 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 926 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 927
Kojto 109:9296ab0bfc11 928 /* Blocking mode: Polling */
Kojto 109:9296ab0bfc11 929 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 930 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 931 /* Non-Blocking mode: Interrupt */
Kojto 109:9296ab0bfc11 932 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 933 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 934 /* Non-Blocking mode: DMA */
Kojto 109:9296ab0bfc11 935 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
Kojto 109:9296ab0bfc11 936 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 937 /**
Kojto 109:9296ab0bfc11 938 * @}
Kojto 109:9296ab0bfc11 939 */
Kojto 109:9296ab0bfc11 940
Kojto 109:9296ab0bfc11 941 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
Kojto 109:9296ab0bfc11 942 * @brief Timer Complementary Output Compare functions
Kojto 109:9296ab0bfc11 943 * @{
Kojto 109:9296ab0bfc11 944 */
Kojto 109:9296ab0bfc11 945 /* Timer Complementary Output Compare functions *****************************/
Kojto 109:9296ab0bfc11 946 /* Blocking mode: Polling */
Kojto 109:9296ab0bfc11 947 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 948 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 949
Kojto 109:9296ab0bfc11 950 /* Non-Blocking mode: Interrupt */
Kojto 109:9296ab0bfc11 951 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 952 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 953
Kojto 109:9296ab0bfc11 954 /* Non-Blocking mode: DMA */
Kojto 109:9296ab0bfc11 955 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
Kojto 109:9296ab0bfc11 956 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 957 /**
Kojto 109:9296ab0bfc11 958 * @}
Kojto 109:9296ab0bfc11 959 */
Kojto 109:9296ab0bfc11 960
Kojto 109:9296ab0bfc11 961 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
Kojto 109:9296ab0bfc11 962 * @brief Timer Complementary PWM functions
Kojto 109:9296ab0bfc11 963 * @{
Kojto 109:9296ab0bfc11 964 */
Kojto 109:9296ab0bfc11 965 /* Timer Complementary PWM functions ****************************************/
Kojto 109:9296ab0bfc11 966 /* Blocking mode: Polling */
Kojto 109:9296ab0bfc11 967 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 968 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 969
Kojto 109:9296ab0bfc11 970 /* Non-Blocking mode: Interrupt */
Kojto 109:9296ab0bfc11 971 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 972 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 973 /* Non-Blocking mode: DMA */
Kojto 109:9296ab0bfc11 974 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
Kojto 109:9296ab0bfc11 975 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
Kojto 109:9296ab0bfc11 976 /**
Kojto 109:9296ab0bfc11 977 * @}
Kojto 109:9296ab0bfc11 978 */
Kojto 109:9296ab0bfc11 979
Kojto 109:9296ab0bfc11 980 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
Kojto 109:9296ab0bfc11 981 * @brief Timer Complementary One Pulse functions
Kojto 109:9296ab0bfc11 982 * @{
Kojto 109:9296ab0bfc11 983 */
Kojto 109:9296ab0bfc11 984 /* Timer Complementary One Pulse functions **********************************/
Kojto 109:9296ab0bfc11 985 /* Blocking mode: Polling */
Kojto 109:9296ab0bfc11 986 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 109:9296ab0bfc11 987 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 109:9296ab0bfc11 988
Kojto 109:9296ab0bfc11 989 /* Non-Blocking mode: Interrupt */
Kojto 109:9296ab0bfc11 990 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 109:9296ab0bfc11 991 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
Kojto 109:9296ab0bfc11 992 /**
Kojto 109:9296ab0bfc11 993 * @}
Kojto 109:9296ab0bfc11 994 */
Kojto 109:9296ab0bfc11 995
Kojto 109:9296ab0bfc11 996 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
Kojto 109:9296ab0bfc11 997 * @brief Peripheral Control functions
Kojto 109:9296ab0bfc11 998 * @{
Kojto 109:9296ab0bfc11 999 */
Kojto 109:9296ab0bfc11 1000 /* Extended Control functions ************************************************/
Kojto 109:9296ab0bfc11 1001 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 109:9296ab0bfc11 1002 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 109:9296ab0bfc11 1003 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
Kojto 109:9296ab0bfc11 1004 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
Kojto 109:9296ab0bfc11 1005 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
Kojto 109:9296ab0bfc11 1006
Kojto 109:9296ab0bfc11 1007 #if defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 1008 defined(STM32F303xC) || defined(STM32F358xx)
Kojto 109:9296ab0bfc11 1009 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap1, uint32_t Remap2);
Kojto 109:9296ab0bfc11 1010 #endif /* STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 1011 /* STM32F303xC || STM32F358xx */
Kojto 109:9296ab0bfc11 1012
Kojto 109:9296ab0bfc11 1013 #if defined(STM32F302xE) || \
Kojto 109:9296ab0bfc11 1014 defined(STM32F302xC) || \
Kojto 109:9296ab0bfc11 1015 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 1016 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
Kojto 109:9296ab0bfc11 1017 defined(STM32F373xC) || defined(STM32F378xx)
Kojto 109:9296ab0bfc11 1018 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
Kojto 109:9296ab0bfc11 1019 #endif /* STM32F302xE || */
Kojto 109:9296ab0bfc11 1020 /* STM32F302xC || */
Kojto 109:9296ab0bfc11 1021 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 1022 /* STM32F301x8 || STM32F302x8 || STM32F318xx || */
Kojto 109:9296ab0bfc11 1023 /* STM32F373xC || STM32F378xx */
Kojto 109:9296ab0bfc11 1024
Kojto 109:9296ab0bfc11 1025 #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
Kojto 109:9296ab0bfc11 1026 defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
Kojto 109:9296ab0bfc11 1027 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
Kojto 109:9296ab0bfc11 1028 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
Kojto 109:9296ab0bfc11 1029 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
Kojto 109:9296ab0bfc11 1030 #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
Kojto 109:9296ab0bfc11 1031 /* STM32F302xC || STM32F303xC || STM32F358xx || */
Kojto 109:9296ab0bfc11 1032 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
Kojto 109:9296ab0bfc11 1033 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
Kojto 109:9296ab0bfc11 1034 /**
Kojto 109:9296ab0bfc11 1035 * @}
Kojto 109:9296ab0bfc11 1036 */
Kojto 109:9296ab0bfc11 1037
Kojto 109:9296ab0bfc11 1038 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
Kojto 109:9296ab0bfc11 1039 * @brief Extended Callbacks functions
Kojto 109:9296ab0bfc11 1040 * @{
Kojto 109:9296ab0bfc11 1041 */
Kojto 109:9296ab0bfc11 1042 /* Extended Callback *********************************************************/
Kojto 109:9296ab0bfc11 1043 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 1044 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 1045 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 1046 /**
Kojto 109:9296ab0bfc11 1047 * @}
Kojto 109:9296ab0bfc11 1048 */
Kojto 109:9296ab0bfc11 1049
Kojto 109:9296ab0bfc11 1050 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
Kojto 109:9296ab0bfc11 1051 * @brief Extended Peripheral State functions
Kojto 109:9296ab0bfc11 1052 * @{
Kojto 109:9296ab0bfc11 1053 */
Kojto 109:9296ab0bfc11 1054 /* Extended Peripheral State functions **************************************/
Kojto 109:9296ab0bfc11 1055 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
Kojto 109:9296ab0bfc11 1056 /**
Kojto 109:9296ab0bfc11 1057 * @}
Kojto 109:9296ab0bfc11 1058 */
Kojto 109:9296ab0bfc11 1059
Kojto 109:9296ab0bfc11 1060 /**
Kojto 109:9296ab0bfc11 1061 * @}
Kojto 109:9296ab0bfc11 1062 */
Kojto 109:9296ab0bfc11 1063
Kojto 109:9296ab0bfc11 1064 /**
Kojto 109:9296ab0bfc11 1065 * @}
Kojto 109:9296ab0bfc11 1066 */
Kojto 109:9296ab0bfc11 1067
Kojto 109:9296ab0bfc11 1068 /**
Kojto 109:9296ab0bfc11 1069 * @}
Kojto 109:9296ab0bfc11 1070 */
Kojto 109:9296ab0bfc11 1071
Kojto 109:9296ab0bfc11 1072 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 1073 }
Kojto 109:9296ab0bfc11 1074 #endif
Kojto 109:9296ab0bfc11 1075
Kojto 109:9296ab0bfc11 1076
Kojto 109:9296ab0bfc11 1077 #endif /* __STM32F3xx_HAL_TIM_EX_H */
Kojto 109:9296ab0bfc11 1078
Kojto 109:9296ab0bfc11 1079 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/