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TARGET_NUCLEO_F401RE/stm32f4xx_hal_tim_ex.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_tim_ex.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
emilmont 77:869cf507173a 7 * @brief Header file of TIM HAL Extension module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_TIM_EX_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
Kojto 99:dbbf35b96557 49 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup TIMEx
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup TIMEx_Exported_Types TIM Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
Kojto 99:dbbf35b96557 61
emilmont 77:869cf507173a 62 /**
emilmont 77:869cf507173a 63 * @brief TIM Hall sensor Configuration Structure definition
emilmont 77:869cf507173a 64 */
emilmont 77:869cf507173a 65
emilmont 77:869cf507173a 66 typedef struct
emilmont 77:869cf507173a 67 {
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
emilmont 77:869cf507173a 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
emilmont 77:869cf507173a 71
emilmont 77:869cf507173a 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
emilmont 77:869cf507173a 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
emilmont 77:869cf507173a 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
emilmont 77:869cf507173a 77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
emilmont 77:869cf507173a 78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 79 } TIM_HallSensor_InitTypeDef;
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 /**
emilmont 77:869cf507173a 82 * @brief TIM Master configuration Structure definition
emilmont 77:869cf507173a 83 */
emilmont 77:869cf507173a 84 typedef struct {
bogdanm 85:024bf7f99721 85 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
Kojto 90:cb3d968589d8 86 This parameter can be a value of @ref TIM_Master_Mode_Selection */
bogdanm 85:024bf7f99721 87 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
Kojto 90:cb3d968589d8 88 This parameter can be a value of @ref TIM_Master_Slave_Mode */
emilmont 77:869cf507173a 89 }TIM_MasterConfigTypeDef;
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 /**
emilmont 77:869cf507173a 92 * @brief TIM Break and Dead time configuration Structure definition
emilmont 77:869cf507173a 93 */
emilmont 77:869cf507173a 94 typedef struct
emilmont 77:869cf507173a 95 {
Kojto 99:dbbf35b96557 96 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
Kojto 90:cb3d968589d8 97 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
Kojto 99:dbbf35b96557 98 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
Kojto 90:cb3d968589d8 99 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
Kojto 99:dbbf35b96557 100 uint32_t LockLevel; /*!< TIM Lock level.
Kojto 90:cb3d968589d8 101 This parameter can be a value of @ref TIM_Lock_level */
Kojto 99:dbbf35b96557 102 uint32_t DeadTime; /*!< TIM dead Time.
emilmont 77:869cf507173a 103 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
Kojto 99:dbbf35b96557 104 uint32_t BreakState; /*!< TIM Break State.
Kojto 90:cb3d968589d8 105 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
Kojto 99:dbbf35b96557 106 uint32_t BreakPolarity; /*!< TIM Break input polarity.
Kojto 90:cb3d968589d8 107 This parameter can be a value of @ref TIM_Break_Polarity */
Kojto 99:dbbf35b96557 108 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
Kojto 90:cb3d968589d8 109 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
emilmont 77:869cf507173a 110 }TIM_BreakDeadTimeConfigTypeDef;
Kojto 99:dbbf35b96557 111 /**
Kojto 99:dbbf35b96557 112 * @}
Kojto 99:dbbf35b96557 113 */
Kojto 99:dbbf35b96557 114
emilmont 77:869cf507173a 115 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 116 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
emilmont 77:869cf507173a 117 * @{
emilmont 77:869cf507173a 118 */
bogdanm 85:024bf7f99721 119
Kojto 99:dbbf35b96557 120 /** @defgroup TIMEx_Remap TIM Remap
emilmont 77:869cf507173a 121 * @{
emilmont 77:869cf507173a 122 */
emilmont 77:869cf507173a 123 #define TIM_TIM2_TIM8_TRGO (0x00000000)
emilmont 77:869cf507173a 124 #define TIM_TIM2_ETH_PTP (0x00000400)
emilmont 77:869cf507173a 125 #define TIM_TIM2_USBFS_SOF (0x00000800)
emilmont 77:869cf507173a 126 #define TIM_TIM2_USBHS_SOF (0x00000C00)
emilmont 77:869cf507173a 127 #define TIM_TIM5_GPIO (0x00000000)
emilmont 77:869cf507173a 128 #define TIM_TIM5_LSI (0x00000040)
emilmont 77:869cf507173a 129 #define TIM_TIM5_LSE (0x00000080)
emilmont 77:869cf507173a 130 #define TIM_TIM5_RTC (0x000000C0)
emilmont 77:869cf507173a 131 #define TIM_TIM11_GPIO (0x00000000)
emilmont 77:869cf507173a 132 #define TIM_TIM11_HSE (0x00000002)
emilmont 77:869cf507173a 133
Kojto 99:dbbf35b96557 134 #if defined (STM32F446xx)
Kojto 99:dbbf35b96557 135 #define TIM_TIM11_SPDIFRX (0x00000001)
Kojto 99:dbbf35b96557 136 #endif /* STM32F446xx */
Kojto 99:dbbf35b96557 137 /**
Kojto 99:dbbf35b96557 138 * @}
Kojto 110:165afa46840b 139 */
Kojto 110:165afa46840b 140
Kojto 110:165afa46840b 141 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
Kojto 110:165afa46840b 142 /** @defgroup TIMEx_SystemBreakInput TIM System Break Input
Kojto 110:165afa46840b 143 * @{
Kojto 110:165afa46840b 144 */
Kojto 110:165afa46840b 145 #define TIM_SYSTEMBREAKINPUT_HARDFAULT ((uint32_t)0x00000001) /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
Kojto 110:165afa46840b 146 #define TIM_SYSTEMBREAKINPUT_PVD ((uint32_t)0x00000004) /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
Kojto 110:165afa46840b 147 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD ((uint32_t)0x00000005) /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
Kojto 110:165afa46840b 148 /**
Kojto 110:165afa46840b 149 * @}
Kojto 110:165afa46840b 150 */
Kojto 110:165afa46840b 151 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
Kojto 110:165afa46840b 152
emilmont 77:869cf507173a 153 /**
emilmont 77:869cf507173a 154 * @}
emilmont 77:869cf507173a 155 */
Kojto 99:dbbf35b96557 156 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 157 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 158 /** @addtogroup TIMEx_Exported_Functions
Kojto 99:dbbf35b96557 159 * @{
Kojto 99:dbbf35b96557 160 */
emilmont 77:869cf507173a 161
Kojto 99:dbbf35b96557 162 /** @addtogroup TIMEx_Exported_Functions_Group1
Kojto 99:dbbf35b96557 163 * @{
Kojto 99:dbbf35b96557 164 */
emilmont 77:869cf507173a 165 /* Timer Hall Sensor functions **********************************************/
emilmont 77:869cf507173a 166 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
emilmont 77:869cf507173a 167 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 168
emilmont 77:869cf507173a 169 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 170 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 171
emilmont 77:869cf507173a 172 /* Blocking mode: Polling */
emilmont 77:869cf507173a 173 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 174 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 175 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 176 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 177 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
emilmont 77:869cf507173a 178 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 179 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 180 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
Kojto 99:dbbf35b96557 181 /**
Kojto 99:dbbf35b96557 182 * @}
Kojto 99:dbbf35b96557 183 */
emilmont 77:869cf507173a 184
Kojto 99:dbbf35b96557 185 /** @addtogroup TIMEx_Exported_Functions_Group2
Kojto 99:dbbf35b96557 186 * @{
Kojto 99:dbbf35b96557 187 */
emilmont 77:869cf507173a 188 /* Timer Complementary Output Compare functions *****************************/
emilmont 77:869cf507173a 189 /* Blocking mode: Polling */
emilmont 77:869cf507173a 190 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 191 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 194 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 195 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 196
emilmont 77:869cf507173a 197 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 198 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 199 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
Kojto 99:dbbf35b96557 200 /**
Kojto 99:dbbf35b96557 201 * @}
Kojto 99:dbbf35b96557 202 */
emilmont 77:869cf507173a 203
Kojto 99:dbbf35b96557 204 /** @addtogroup TIMEx_Exported_Functions_Group3
Kojto 99:dbbf35b96557 205 * @{
Kojto 99:dbbf35b96557 206 */
emilmont 77:869cf507173a 207 /* Timer Complementary PWM functions ****************************************/
emilmont 77:869cf507173a 208 /* Blocking mode: Polling */
emilmont 77:869cf507173a 209 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 210 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 211
emilmont 77:869cf507173a 212 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 213 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 214 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
emilmont 77:869cf507173a 215 /* Non-Blocking mode: DMA */
emilmont 77:869cf507173a 216 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
emilmont 77:869cf507173a 217 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
Kojto 99:dbbf35b96557 218 /**
Kojto 99:dbbf35b96557 219 * @}
Kojto 99:dbbf35b96557 220 */
emilmont 77:869cf507173a 221
Kojto 99:dbbf35b96557 222 /** @addtogroup TIMEx_Exported_Functions_Group4
Kojto 99:dbbf35b96557 223 * @{
Kojto 99:dbbf35b96557 224 */
emilmont 77:869cf507173a 225 /* Timer Complementary One Pulse functions **********************************/
emilmont 77:869cf507173a 226 /* Blocking mode: Polling */
emilmont 77:869cf507173a 227 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 228 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 229
emilmont 77:869cf507173a 230 /* Non-Blocking mode: Interrupt */
emilmont 77:869cf507173a 231 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
emilmont 77:869cf507173a 232 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
Kojto 99:dbbf35b96557 233 /**
Kojto 99:dbbf35b96557 234 * @}
Kojto 99:dbbf35b96557 235 */
emilmont 77:869cf507173a 236
Kojto 99:dbbf35b96557 237 /** @addtogroup TIMEx_Exported_Functions_Group5
Kojto 99:dbbf35b96557 238 * @{
Kojto 99:dbbf35b96557 239 */
Kojto 99:dbbf35b96557 240 /* Extension Control functions ************************************************/
emilmont 77:869cf507173a 241 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 242 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 243 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
emilmont 77:869cf507173a 244 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
emilmont 77:869cf507173a 245 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
emilmont 77:869cf507173a 246 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
Kojto 99:dbbf35b96557 247 /**
Kojto 99:dbbf35b96557 248 * @}
Kojto 99:dbbf35b96557 249 */
emilmont 77:869cf507173a 250
Kojto 99:dbbf35b96557 251 /** @addtogroup TIMEx_Exported_Functions_Group6
Kojto 99:dbbf35b96557 252 * @{
Kojto 99:dbbf35b96557 253 */
emilmont 77:869cf507173a 254 /* Extension Callback *********************************************************/
bogdanm 81:7d30d6019079 255 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
bogdanm 81:7d30d6019079 256 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
Kojto 99:dbbf35b96557 257 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 258 /**
Kojto 99:dbbf35b96557 259 * @}
Kojto 99:dbbf35b96557 260 */
emilmont 77:869cf507173a 261
Kojto 99:dbbf35b96557 262 /** @addtogroup TIMEx_Exported_Functions_Group7
Kojto 99:dbbf35b96557 263 * @{
Kojto 99:dbbf35b96557 264 */
emilmont 77:869cf507173a 265 /* Extension Peripheral State functions **************************************/
emilmont 77:869cf507173a 266 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
Kojto 99:dbbf35b96557 267 /**
Kojto 99:dbbf35b96557 268 * @}
Kojto 99:dbbf35b96557 269 */
Kojto 99:dbbf35b96557 270
Kojto 99:dbbf35b96557 271 /**
Kojto 99:dbbf35b96557 272 * @}
Kojto 99:dbbf35b96557 273 */
Kojto 99:dbbf35b96557 274
Kojto 99:dbbf35b96557 275 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 276 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 277 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 278 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 279 /** @defgroup TIMEx_Private_Macros TIM Private Macros
Kojto 99:dbbf35b96557 280 * @{
Kojto 99:dbbf35b96557 281 */
Kojto 99:dbbf35b96557 282 #if defined (STM32F446xx)
Kojto 99:dbbf35b96557 283 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
Kojto 99:dbbf35b96557 284 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
Kojto 99:dbbf35b96557 285 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
Kojto 99:dbbf35b96557 286 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
Kojto 99:dbbf35b96557 287 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
Kojto 99:dbbf35b96557 288 ((TIM_REMAP) == TIM_TIM5_LSI)||\
Kojto 99:dbbf35b96557 289 ((TIM_REMAP) == TIM_TIM5_LSE)||\
Kojto 99:dbbf35b96557 290 ((TIM_REMAP) == TIM_TIM5_RTC)||\
Kojto 99:dbbf35b96557 291 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
Kojto 99:dbbf35b96557 292 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
Kojto 99:dbbf35b96557 293 ((TIM_REMAP) == TIM_TIM11_HSE))
Kojto 99:dbbf35b96557 294 #else
Kojto 99:dbbf35b96557 295 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
Kojto 99:dbbf35b96557 296 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
Kojto 99:dbbf35b96557 297 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
Kojto 99:dbbf35b96557 298 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
Kojto 99:dbbf35b96557 299 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
Kojto 99:dbbf35b96557 300 ((TIM_REMAP) == TIM_TIM5_LSI)||\
Kojto 99:dbbf35b96557 301 ((TIM_REMAP) == TIM_TIM5_LSE)||\
Kojto 99:dbbf35b96557 302 ((TIM_REMAP) == TIM_TIM5_RTC)||\
Kojto 99:dbbf35b96557 303 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
Kojto 99:dbbf35b96557 304 ((TIM_REMAP) == TIM_TIM11_HSE))
Kojto 99:dbbf35b96557 305 #endif /* STM32F446xx */
Kojto 99:dbbf35b96557 306
Kojto 110:165afa46840b 307 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
Kojto 110:165afa46840b 308 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
Kojto 110:165afa46840b 309 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
Kojto 110:165afa46840b 310 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
Kojto 110:165afa46840b 311
Kojto 110:165afa46840b 312 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
Kojto 99:dbbf35b96557 313
Kojto 99:dbbf35b96557 314 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF)
Kojto 99:dbbf35b96557 315 /**
Kojto 99:dbbf35b96557 316 * @}
Kojto 99:dbbf35b96557 317 */
Kojto 99:dbbf35b96557 318
Kojto 99:dbbf35b96557 319 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 320 /** @defgroup TIMEx_Private_Functions TIM Private Functions
Kojto 99:dbbf35b96557 321 * @{
Kojto 99:dbbf35b96557 322 */
Kojto 99:dbbf35b96557 323
Kojto 99:dbbf35b96557 324 /**
Kojto 99:dbbf35b96557 325 * @}
Kojto 99:dbbf35b96557 326 */
emilmont 77:869cf507173a 327
emilmont 77:869cf507173a 328 /**
emilmont 77:869cf507173a 329 * @}
emilmont 77:869cf507173a 330 */
emilmont 77:869cf507173a 331
emilmont 77:869cf507173a 332 /**
emilmont 77:869cf507173a 333 * @}
Kojto 99:dbbf35b96557 334 */
Kojto 99:dbbf35b96557 335
emilmont 77:869cf507173a 336 #ifdef __cplusplus
emilmont 77:869cf507173a 337 }
emilmont 77:869cf507173a 338 #endif
emilmont 77:869cf507173a 339
emilmont 77:869cf507173a 340 #endif /* __STM32F4xx_HAL_TIM_EX_H */
emilmont 77:869cf507173a 341
emilmont 77:869cf507173a 342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/