Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_NUCLEO_F303K8/stm32f3xx_hal_dma.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
109:9296ab0bfc11 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 109:9296ab0bfc11 1 /**
Kojto 109:9296ab0bfc11 2 ******************************************************************************
Kojto 109:9296ab0bfc11 3 * @file stm32f3xx_hal_dma.h
Kojto 109:9296ab0bfc11 4 * @author MCD Application Team
Kojto 109:9296ab0bfc11 5 * @version V1.1.0
Kojto 109:9296ab0bfc11 6 * @date 12-Sept-2014
Kojto 109:9296ab0bfc11 7 * @brief Header file of DMA HAL module.
Kojto 109:9296ab0bfc11 8 ******************************************************************************
Kojto 109:9296ab0bfc11 9 * @attention
Kojto 109:9296ab0bfc11 10 *
Kojto 109:9296ab0bfc11 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 109:9296ab0bfc11 12 *
Kojto 109:9296ab0bfc11 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 109:9296ab0bfc11 14 * are permitted provided that the following conditions are met:
Kojto 109:9296ab0bfc11 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 109:9296ab0bfc11 16 * this list of conditions and the following disclaimer.
Kojto 109:9296ab0bfc11 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 109:9296ab0bfc11 18 * this list of conditions and the following disclaimer in the documentation
Kojto 109:9296ab0bfc11 19 * and/or other materials provided with the distribution.
Kojto 109:9296ab0bfc11 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 109:9296ab0bfc11 21 * may be used to endorse or promote products derived from this software
Kojto 109:9296ab0bfc11 22 * without specific prior written permission.
Kojto 109:9296ab0bfc11 23 *
Kojto 109:9296ab0bfc11 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 109:9296ab0bfc11 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 109:9296ab0bfc11 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 109:9296ab0bfc11 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 109:9296ab0bfc11 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 109:9296ab0bfc11 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 109:9296ab0bfc11 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 109:9296ab0bfc11 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 109:9296ab0bfc11 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 109:9296ab0bfc11 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 109:9296ab0bfc11 34 *
Kojto 109:9296ab0bfc11 35 ******************************************************************************
Kojto 109:9296ab0bfc11 36 */
Kojto 109:9296ab0bfc11 37
Kojto 109:9296ab0bfc11 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 109:9296ab0bfc11 39 #ifndef __STM32F3xx_HAL_DMA_H
Kojto 109:9296ab0bfc11 40 #define __STM32F3xx_HAL_DMA_H
Kojto 109:9296ab0bfc11 41
Kojto 109:9296ab0bfc11 42 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 43 extern "C" {
Kojto 109:9296ab0bfc11 44 #endif
Kojto 109:9296ab0bfc11 45
Kojto 109:9296ab0bfc11 46 /* Includes ------------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 47 #include "stm32f3xx_hal_def.h"
Kojto 109:9296ab0bfc11 48
Kojto 109:9296ab0bfc11 49 /** @addtogroup STM32F3xx_HAL_Driver
Kojto 109:9296ab0bfc11 50 * @{
Kojto 109:9296ab0bfc11 51 */
Kojto 109:9296ab0bfc11 52
Kojto 109:9296ab0bfc11 53 /** @addtogroup DMA DMA HAL module driver
Kojto 109:9296ab0bfc11 54 * @{
Kojto 109:9296ab0bfc11 55 */
Kojto 109:9296ab0bfc11 56
Kojto 109:9296ab0bfc11 57 /* Exported types ------------------------------------------------------------*/
Kojto 109:9296ab0bfc11 58 /** @defgroup DMA_Exported_Types DMA Exported Types
Kojto 109:9296ab0bfc11 59 * @{
Kojto 109:9296ab0bfc11 60 */
Kojto 109:9296ab0bfc11 61
Kojto 109:9296ab0bfc11 62 /**
Kojto 109:9296ab0bfc11 63 * @brief DMA Configuration Structure definition
Kojto 109:9296ab0bfc11 64 */
Kojto 109:9296ab0bfc11 65 typedef struct
Kojto 109:9296ab0bfc11 66 {
Kojto 109:9296ab0bfc11 67 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto 109:9296ab0bfc11 68 from memory to memory or from peripheral to memory.
Kojto 109:9296ab0bfc11 69 This parameter can be a value of @ref DMA_Data_transfer_direction */
Kojto 109:9296ab0bfc11 70
Kojto 109:9296ab0bfc11 71 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
Kojto 109:9296ab0bfc11 72 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
Kojto 109:9296ab0bfc11 73
Kojto 109:9296ab0bfc11 74 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
Kojto 109:9296ab0bfc11 75 This parameter can be a value of @ref DMA_Memory_incremented_mode */
Kojto 109:9296ab0bfc11 76
Kojto 109:9296ab0bfc11 77 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
Kojto 109:9296ab0bfc11 78 This parameter can be a value of @ref DMA_Peripheral_data_size */
Kojto 109:9296ab0bfc11 79
Kojto 109:9296ab0bfc11 80 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
Kojto 109:9296ab0bfc11 81 This parameter can be a value of @ref DMA_Memory_data_size */
Kojto 109:9296ab0bfc11 82
Kojto 109:9296ab0bfc11 83 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
Kojto 109:9296ab0bfc11 84 This parameter can be a value of @ref DMA_mode
Kojto 109:9296ab0bfc11 85 @note The circular buffer mode cannot be used if the memory-to-memory
Kojto 109:9296ab0bfc11 86 data transfer is configured on the selected Channel */
Kojto 109:9296ab0bfc11 87
Kojto 109:9296ab0bfc11 88 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
Kojto 109:9296ab0bfc11 89 This parameter can be a value of @ref DMA_Priority_level */
Kojto 109:9296ab0bfc11 90
Kojto 109:9296ab0bfc11 91 } DMA_InitTypeDef;
Kojto 109:9296ab0bfc11 92
Kojto 109:9296ab0bfc11 93 /**
Kojto 109:9296ab0bfc11 94 * @brief DMA Configuration enumeration values definition
Kojto 109:9296ab0bfc11 95 */
Kojto 109:9296ab0bfc11 96 typedef enum
Kojto 109:9296ab0bfc11 97 {
Kojto 109:9296ab0bfc11 98 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
Kojto 109:9296ab0bfc11 99 DMA_PRIORITY = 1, /*!< Control related priority level Parameter in DMA_InitTypeDef */
Kojto 109:9296ab0bfc11 100
Kojto 109:9296ab0bfc11 101 } DMA_ControlTypeDef;
Kojto 109:9296ab0bfc11 102
Kojto 109:9296ab0bfc11 103 /**
Kojto 109:9296ab0bfc11 104 * @brief HAL DMA State structures definition
Kojto 109:9296ab0bfc11 105 */
Kojto 109:9296ab0bfc11 106 typedef enum
Kojto 109:9296ab0bfc11 107 {
Kojto 109:9296ab0bfc11 108 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
Kojto 109:9296ab0bfc11 109 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
Kojto 109:9296ab0bfc11 110 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
Kojto 109:9296ab0bfc11 111 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
Kojto 109:9296ab0bfc11 112 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
Kojto 109:9296ab0bfc11 113 HAL_DMA_STATE_ERROR = 0x04, /*!< DMA error state */
Kojto 109:9296ab0bfc11 114
Kojto 109:9296ab0bfc11 115 }HAL_DMA_StateTypeDef;
Kojto 109:9296ab0bfc11 116
Kojto 109:9296ab0bfc11 117 /**
Kojto 109:9296ab0bfc11 118 * @brief HAL DMA Error Code structure definition
Kojto 109:9296ab0bfc11 119 */
Kojto 109:9296ab0bfc11 120 typedef enum
Kojto 109:9296ab0bfc11 121 {
Kojto 109:9296ab0bfc11 122 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
Kojto 109:9296ab0bfc11 123 HAL_DMA_HALF_TRANSFER = 0x01, /*!< Half Transfer */
Kojto 109:9296ab0bfc11 124
Kojto 109:9296ab0bfc11 125 }HAL_DMA_LevelCompleteTypeDef;
Kojto 109:9296ab0bfc11 126
Kojto 109:9296ab0bfc11 127
Kojto 109:9296ab0bfc11 128 /**
Kojto 109:9296ab0bfc11 129 * @brief DMA handle Structure definition
Kojto 109:9296ab0bfc11 130 */
Kojto 109:9296ab0bfc11 131 typedef struct __DMA_HandleTypeDef
Kojto 109:9296ab0bfc11 132 {
Kojto 109:9296ab0bfc11 133 DMA_Channel_TypeDef *Instance; /*!< Register base address */
Kojto 109:9296ab0bfc11 134
Kojto 109:9296ab0bfc11 135 DMA_InitTypeDef Init; /*!< DMA communication parameters */
Kojto 109:9296ab0bfc11 136
Kojto 109:9296ab0bfc11 137 HAL_LockTypeDef Lock; /*!< DMA locking object */
Kojto 109:9296ab0bfc11 138
Kojto 109:9296ab0bfc11 139 HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
Kojto 109:9296ab0bfc11 140
Kojto 109:9296ab0bfc11 141 void *Parent; /*!< Parent object state */
Kojto 109:9296ab0bfc11 142
Kojto 109:9296ab0bfc11 143 void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
Kojto 109:9296ab0bfc11 144
Kojto 109:9296ab0bfc11 145 void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
Kojto 109:9296ab0bfc11 146
Kojto 109:9296ab0bfc11 147 void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
Kojto 109:9296ab0bfc11 148
Kojto 109:9296ab0bfc11 149 __IO uint32_t ErrorCode; /*!< DMA Error code */
Kojto 109:9296ab0bfc11 150
Kojto 109:9296ab0bfc11 151 } DMA_HandleTypeDef;
Kojto 109:9296ab0bfc11 152 /**
Kojto 109:9296ab0bfc11 153 * @}
Kojto 109:9296ab0bfc11 154 */
Kojto 109:9296ab0bfc11 155
Kojto 109:9296ab0bfc11 156 /* Exported constants --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 157 /** @defgroup DMA_Exported_Constants DMA Exported Constants
Kojto 109:9296ab0bfc11 158 * @{
Kojto 109:9296ab0bfc11 159 */
Kojto 109:9296ab0bfc11 160
Kojto 109:9296ab0bfc11 161 /** @defgroup DMA_Error_Code DMA Error Code
Kojto 109:9296ab0bfc11 162 * @{
Kojto 109:9296ab0bfc11 163 */
Kojto 109:9296ab0bfc11 164 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 109:9296ab0bfc11 165 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
Kojto 109:9296ab0bfc11 166 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
Kojto 109:9296ab0bfc11 167 /**
Kojto 109:9296ab0bfc11 168 * @}
Kojto 109:9296ab0bfc11 169 */
Kojto 109:9296ab0bfc11 170
Kojto 109:9296ab0bfc11 171
Kojto 109:9296ab0bfc11 172 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
Kojto 109:9296ab0bfc11 173 * @{
Kojto 109:9296ab0bfc11 174 */
Kojto 109:9296ab0bfc11 175 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
Kojto 109:9296ab0bfc11 176 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
Kojto 109:9296ab0bfc11 177 #define DMA_MEMORY_TO_MEMORY ((uint32_t)(DMA_CCR_MEM2MEM)) /*!< Memory to memory direction */
Kojto 109:9296ab0bfc11 178
Kojto 109:9296ab0bfc11 179 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
Kojto 109:9296ab0bfc11 180 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
Kojto 109:9296ab0bfc11 181 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
Kojto 109:9296ab0bfc11 182 /**
Kojto 109:9296ab0bfc11 183 * @}
Kojto 109:9296ab0bfc11 184 */
Kojto 109:9296ab0bfc11 185
Kojto 109:9296ab0bfc11 186 /** @defgroup DMA_Data_buffer_size DMA Data buffer size
Kojto 109:9296ab0bfc11 187 * @{
Kojto 109:9296ab0bfc11 188 */
Kojto 109:9296ab0bfc11 189 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
Kojto 109:9296ab0bfc11 190 /**
Kojto 109:9296ab0bfc11 191 * @}
Kojto 109:9296ab0bfc11 192 */
Kojto 109:9296ab0bfc11 193
Kojto 109:9296ab0bfc11 194 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
Kojto 109:9296ab0bfc11 195 * @{
Kojto 109:9296ab0bfc11 196 */
Kojto 109:9296ab0bfc11 197 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
Kojto 109:9296ab0bfc11 198 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
Kojto 109:9296ab0bfc11 199
Kojto 109:9296ab0bfc11 200 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
Kojto 109:9296ab0bfc11 201 ((STATE) == DMA_PINC_DISABLE))
Kojto 109:9296ab0bfc11 202 /**
Kojto 109:9296ab0bfc11 203 * @}
Kojto 109:9296ab0bfc11 204 */
Kojto 109:9296ab0bfc11 205
Kojto 109:9296ab0bfc11 206 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
Kojto 109:9296ab0bfc11 207 * @{
Kojto 109:9296ab0bfc11 208 */
Kojto 109:9296ab0bfc11 209 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
Kojto 109:9296ab0bfc11 210 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
Kojto 109:9296ab0bfc11 211
Kojto 109:9296ab0bfc11 212 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
Kojto 109:9296ab0bfc11 213 ((STATE) == DMA_MINC_DISABLE))
Kojto 109:9296ab0bfc11 214 /**
Kojto 109:9296ab0bfc11 215 * @}
Kojto 109:9296ab0bfc11 216 */
Kojto 109:9296ab0bfc11 217
Kojto 109:9296ab0bfc11 218 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
Kojto 109:9296ab0bfc11 219 * @{
Kojto 109:9296ab0bfc11 220 */
Kojto 109:9296ab0bfc11 221 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
Kojto 109:9296ab0bfc11 222 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
Kojto 109:9296ab0bfc11 223 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
Kojto 109:9296ab0bfc11 224
Kojto 109:9296ab0bfc11 225 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
Kojto 109:9296ab0bfc11 226 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
Kojto 109:9296ab0bfc11 227 ((SIZE) == DMA_PDATAALIGN_WORD))
Kojto 109:9296ab0bfc11 228 /**
Kojto 109:9296ab0bfc11 229 * @}
Kojto 109:9296ab0bfc11 230 */
Kojto 109:9296ab0bfc11 231
Kojto 109:9296ab0bfc11 232
Kojto 109:9296ab0bfc11 233 /** @defgroup DMA_Memory_data_size DMA Memory data size
Kojto 109:9296ab0bfc11 234 * @{
Kojto 109:9296ab0bfc11 235 */
Kojto 109:9296ab0bfc11 236 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
Kojto 109:9296ab0bfc11 237 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
Kojto 109:9296ab0bfc11 238 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
Kojto 109:9296ab0bfc11 239
Kojto 109:9296ab0bfc11 240 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
Kojto 109:9296ab0bfc11 241 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
Kojto 109:9296ab0bfc11 242 ((SIZE) == DMA_MDATAALIGN_WORD ))
Kojto 109:9296ab0bfc11 243 /**
Kojto 109:9296ab0bfc11 244 * @}
Kojto 109:9296ab0bfc11 245 */
Kojto 109:9296ab0bfc11 246
Kojto 109:9296ab0bfc11 247 /** @defgroup DMA_mode DMA mode
Kojto 109:9296ab0bfc11 248 * @{
Kojto 109:9296ab0bfc11 249 */
Kojto 109:9296ab0bfc11 250 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */
Kojto 109:9296ab0bfc11 251 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular Mode */
Kojto 109:9296ab0bfc11 252
Kojto 109:9296ab0bfc11 253 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
Kojto 109:9296ab0bfc11 254 ((MODE) == DMA_CIRCULAR))
Kojto 109:9296ab0bfc11 255 /**
Kojto 109:9296ab0bfc11 256 * @}
Kojto 109:9296ab0bfc11 257 */
Kojto 109:9296ab0bfc11 258
Kojto 109:9296ab0bfc11 259 /** @defgroup DMA_Priority_level DMA Priority level
Kojto 109:9296ab0bfc11 260 * @{
Kojto 109:9296ab0bfc11 261 */
Kojto 109:9296ab0bfc11 262 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
Kojto 109:9296ab0bfc11 263 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
Kojto 109:9296ab0bfc11 264 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
Kojto 109:9296ab0bfc11 265 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
Kojto 109:9296ab0bfc11 266
Kojto 109:9296ab0bfc11 267 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
Kojto 109:9296ab0bfc11 268 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
Kojto 109:9296ab0bfc11 269 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
Kojto 109:9296ab0bfc11 270 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
Kojto 109:9296ab0bfc11 271 /**
Kojto 109:9296ab0bfc11 272 * @}
Kojto 109:9296ab0bfc11 273 */
Kojto 109:9296ab0bfc11 274
Kojto 109:9296ab0bfc11 275
Kojto 109:9296ab0bfc11 276 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
Kojto 109:9296ab0bfc11 277 * @{
Kojto 109:9296ab0bfc11 278 */
Kojto 109:9296ab0bfc11 279
Kojto 109:9296ab0bfc11 280 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
Kojto 109:9296ab0bfc11 281 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
Kojto 109:9296ab0bfc11 282 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
Kojto 109:9296ab0bfc11 283
Kojto 109:9296ab0bfc11 284 /**
Kojto 109:9296ab0bfc11 285 * @}
Kojto 109:9296ab0bfc11 286 */
Kojto 109:9296ab0bfc11 287
Kojto 109:9296ab0bfc11 288 /** @defgroup DMA_flag_definitions DMA flag definitions
Kojto 109:9296ab0bfc11 289 * @{
Kojto 109:9296ab0bfc11 290 */
Kojto 109:9296ab0bfc11 291
Kojto 109:9296ab0bfc11 292 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
Kojto 109:9296ab0bfc11 293 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
Kojto 109:9296ab0bfc11 294 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
Kojto 109:9296ab0bfc11 295 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
Kojto 109:9296ab0bfc11 296 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
Kojto 109:9296ab0bfc11 297 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
Kojto 109:9296ab0bfc11 298 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
Kojto 109:9296ab0bfc11 299 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
Kojto 109:9296ab0bfc11 300 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
Kojto 109:9296ab0bfc11 301 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
Kojto 109:9296ab0bfc11 302 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
Kojto 109:9296ab0bfc11 303 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
Kojto 109:9296ab0bfc11 304 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
Kojto 109:9296ab0bfc11 305 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
Kojto 109:9296ab0bfc11 306 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
Kojto 109:9296ab0bfc11 307 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
Kojto 109:9296ab0bfc11 308 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
Kojto 109:9296ab0bfc11 309 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
Kojto 109:9296ab0bfc11 310 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
Kojto 109:9296ab0bfc11 311 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
Kojto 109:9296ab0bfc11 312 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
Kojto 109:9296ab0bfc11 313 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
Kojto 109:9296ab0bfc11 314 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
Kojto 109:9296ab0bfc11 315 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
Kojto 109:9296ab0bfc11 316 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
Kojto 109:9296ab0bfc11 317 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
Kojto 109:9296ab0bfc11 318 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
Kojto 109:9296ab0bfc11 319 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
Kojto 109:9296ab0bfc11 320
Kojto 109:9296ab0bfc11 321
Kojto 109:9296ab0bfc11 322 /**
Kojto 109:9296ab0bfc11 323 * @}
Kojto 109:9296ab0bfc11 324 */
Kojto 109:9296ab0bfc11 325
Kojto 109:9296ab0bfc11 326 /**
Kojto 109:9296ab0bfc11 327 * @}
Kojto 109:9296ab0bfc11 328 */
Kojto 109:9296ab0bfc11 329
Kojto 109:9296ab0bfc11 330 /* Exported macros -----------------------------------------------------------*/
Kojto 109:9296ab0bfc11 331 /** @defgroup DMA_Exported_Macros DMA Exported Macros
Kojto 109:9296ab0bfc11 332 * @{
Kojto 109:9296ab0bfc11 333 */
Kojto 109:9296ab0bfc11 334
Kojto 109:9296ab0bfc11 335 /** @brief Reset DMA handle state
Kojto 109:9296ab0bfc11 336 * @param __HANDLE__: DMA handle.
Kojto 109:9296ab0bfc11 337 * @retval None
Kojto 109:9296ab0bfc11 338 */
Kojto 109:9296ab0bfc11 339 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
Kojto 109:9296ab0bfc11 340
Kojto 109:9296ab0bfc11 341 /**
Kojto 109:9296ab0bfc11 342 * @brief Enable the specified DMA Channel.
Kojto 109:9296ab0bfc11 343 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 344 * @retval None.
Kojto 109:9296ab0bfc11 345 */
Kojto 109:9296ab0bfc11 346 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
Kojto 109:9296ab0bfc11 347
Kojto 109:9296ab0bfc11 348 /**
Kojto 109:9296ab0bfc11 349 * @brief Disable the specified DMA Channel.
Kojto 109:9296ab0bfc11 350 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 351 * @retval None.
Kojto 109:9296ab0bfc11 352 */
Kojto 109:9296ab0bfc11 353 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
Kojto 109:9296ab0bfc11 354
Kojto 109:9296ab0bfc11 355
Kojto 109:9296ab0bfc11 356 /* Interrupt & Flag management */
Kojto 109:9296ab0bfc11 357
Kojto 109:9296ab0bfc11 358 /**
Kojto 109:9296ab0bfc11 359 * @brief Enables the specified DMA Channel interrupts.
Kojto 109:9296ab0bfc11 360 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 361 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 109:9296ab0bfc11 362 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 363 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 364 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 365 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 366 * @retval None
Kojto 109:9296ab0bfc11 367 */
Kojto 109:9296ab0bfc11 368 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
Kojto 109:9296ab0bfc11 369
Kojto 109:9296ab0bfc11 370 /**
Kojto 109:9296ab0bfc11 371 * @brief Disables the specified DMA Channel interrupts.
Kojto 109:9296ab0bfc11 372 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 373 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
Kojto 109:9296ab0bfc11 374 * This parameter can be any combination of the following values:
Kojto 109:9296ab0bfc11 375 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 376 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 377 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 378 * @retval None
Kojto 109:9296ab0bfc11 379 */
Kojto 109:9296ab0bfc11 380 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
Kojto 109:9296ab0bfc11 381
Kojto 109:9296ab0bfc11 382 /**
Kojto 109:9296ab0bfc11 383 * @brief Checks whether the specified DMA Channel interrupt has occurred or not.
Kojto 109:9296ab0bfc11 384 * @param __HANDLE__: DMA handle
Kojto 109:9296ab0bfc11 385 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
Kojto 109:9296ab0bfc11 386 * This parameter can be one of the following values:
Kojto 109:9296ab0bfc11 387 * @arg DMA_IT_TC: Transfer complete interrupt mask
Kojto 109:9296ab0bfc11 388 * @arg DMA_IT_HT: Half transfer complete interrupt mask
Kojto 109:9296ab0bfc11 389 * @arg DMA_IT_TE: Transfer error interrupt mask
Kojto 109:9296ab0bfc11 390 * @retval The state of DMA_IT (SET or RESET).
Kojto 109:9296ab0bfc11 391 */
Kojto 109:9296ab0bfc11 392 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
Kojto 109:9296ab0bfc11 393
Kojto 109:9296ab0bfc11 394 /**
Kojto 109:9296ab0bfc11 395 * @}
Kojto 109:9296ab0bfc11 396 */
Kojto 109:9296ab0bfc11 397
Kojto 109:9296ab0bfc11 398 /* Include DMA HAL Extended module */
Kojto 109:9296ab0bfc11 399 #include "stm32f3xx_hal_dma_ex.h"
Kojto 109:9296ab0bfc11 400
Kojto 109:9296ab0bfc11 401 /* Exported functions --------------------------------------------------------*/
Kojto 109:9296ab0bfc11 402 /** @addtogroup DMA_Exported_Functions DMA Exported Functions
Kojto 109:9296ab0bfc11 403 * @{
Kojto 109:9296ab0bfc11 404 */
Kojto 109:9296ab0bfc11 405
Kojto 109:9296ab0bfc11 406 /** @addtogroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 109:9296ab0bfc11 407 * @{
Kojto 109:9296ab0bfc11 408 */
Kojto 109:9296ab0bfc11 409 /* Initialization and de-initialization functions *****************************/
Kojto 109:9296ab0bfc11 410 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 411 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 412
Kojto 109:9296ab0bfc11 413 /**
Kojto 109:9296ab0bfc11 414 * @}
Kojto 109:9296ab0bfc11 415 */
Kojto 109:9296ab0bfc11 416
Kojto 109:9296ab0bfc11 417 /** @addtogroup DMA_Exported_Functions_Group2 Input and Output operation functions
Kojto 109:9296ab0bfc11 418 * @{
Kojto 109:9296ab0bfc11 419 */
Kojto 109:9296ab0bfc11 420 /* IO operation functions *****************************************************/
Kojto 109:9296ab0bfc11 421 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 109:9296ab0bfc11 422 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
Kojto 109:9296ab0bfc11 423 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 424 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
Kojto 109:9296ab0bfc11 425 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 426
Kojto 109:9296ab0bfc11 427 /**
Kojto 109:9296ab0bfc11 428 * @}
Kojto 109:9296ab0bfc11 429 */
Kojto 109:9296ab0bfc11 430
Kojto 109:9296ab0bfc11 431 /** @addtogroup DMA_Exported_Functions_Group3 Peripheral State functions
Kojto 109:9296ab0bfc11 432 * @{
Kojto 109:9296ab0bfc11 433 */
Kojto 109:9296ab0bfc11 434 /* Peripheral State and Error functions ***************************************/
Kojto 109:9296ab0bfc11 435 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 436 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
Kojto 109:9296ab0bfc11 437
Kojto 109:9296ab0bfc11 438 /**
Kojto 109:9296ab0bfc11 439 * @}
Kojto 109:9296ab0bfc11 440 */
Kojto 109:9296ab0bfc11 441
Kojto 109:9296ab0bfc11 442 /**
Kojto 109:9296ab0bfc11 443 * @}
Kojto 109:9296ab0bfc11 444 */
Kojto 109:9296ab0bfc11 445
Kojto 109:9296ab0bfc11 446 /**
Kojto 109:9296ab0bfc11 447 * @}
Kojto 109:9296ab0bfc11 448 */
Kojto 109:9296ab0bfc11 449
Kojto 109:9296ab0bfc11 450 /**
Kojto 109:9296ab0bfc11 451 * @}
Kojto 109:9296ab0bfc11 452 */
Kojto 109:9296ab0bfc11 453
Kojto 109:9296ab0bfc11 454 #ifdef __cplusplus
Kojto 109:9296ab0bfc11 455 }
Kojto 109:9296ab0bfc11 456 #endif
Kojto 109:9296ab0bfc11 457
Kojto 109:9296ab0bfc11 458 #endif /* __STM32F3xx_HAL_DMA_H */
Kojto 109:9296ab0bfc11 459
Kojto 109:9296ab0bfc11 460 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/