Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_spi.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_spi.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SPI HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SPI_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SPI_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #include "stm32f4xx_hal_def.h"
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 50 * @{
bogdanm 92:4fc01daae5a5 51 */
bogdanm 92:4fc01daae5a5 52
bogdanm 92:4fc01daae5a5 53 /** @addtogroup SPI
bogdanm 92:4fc01daae5a5 54 * @{
bogdanm 92:4fc01daae5a5 55 */
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 58 /** @defgroup SPI_Exported_Types SPI Exported Types
Kojto 99:dbbf35b96557 59 * @{
Kojto 99:dbbf35b96557 60 */
Kojto 99:dbbf35b96557 61
bogdanm 92:4fc01daae5a5 62 /**
bogdanm 92:4fc01daae5a5 63 * @brief SPI Configuration Structure definition
bogdanm 92:4fc01daae5a5 64 */
bogdanm 92:4fc01daae5a5 65 typedef struct
bogdanm 92:4fc01daae5a5 66 {
bogdanm 92:4fc01daae5a5 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
bogdanm 92:4fc01daae5a5 68 This parameter can be a value of @ref SPI_mode */
bogdanm 92:4fc01daae5a5 69
bogdanm 92:4fc01daae5a5 70 uint32_t Direction; /*!< Specifies the SPI Directional mode state.
bogdanm 92:4fc01daae5a5 71 This parameter can be a value of @ref SPI_Direction_mode */
bogdanm 92:4fc01daae5a5 72
bogdanm 92:4fc01daae5a5 73 uint32_t DataSize; /*!< Specifies the SPI data size.
bogdanm 92:4fc01daae5a5 74 This parameter can be a value of @ref SPI_data_size */
bogdanm 92:4fc01daae5a5 75
bogdanm 92:4fc01daae5a5 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
bogdanm 92:4fc01daae5a5 77 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 92:4fc01daae5a5 78
bogdanm 92:4fc01daae5a5 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
bogdanm 92:4fc01daae5a5 80 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 92:4fc01daae5a5 81
bogdanm 92:4fc01daae5a5 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 92:4fc01daae5a5 83 hardware (NSS pin) or by software using the SSI bit.
bogdanm 92:4fc01daae5a5 84 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 92:4fc01daae5a5 85
bogdanm 92:4fc01daae5a5 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 92:4fc01daae5a5 87 used to configure the transmit and receive SCK clock.
bogdanm 92:4fc01daae5a5 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
bogdanm 92:4fc01daae5a5 89 @note The communication clock is derived from the master
bogdanm 92:4fc01daae5a5 90 clock. The slave clock does not need to be set */
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 92:4fc01daae5a5 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm 92:4fc01daae5a5 94
bogdanm 92:4fc01daae5a5 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
bogdanm 92:4fc01daae5a5 96 This parameter can be a value of @ref SPI_TI_mode */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
bogdanm 92:4fc01daae5a5 99 This parameter can be a value of @ref SPI_CRC_Calculation */
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
bogdanm 92:4fc01daae5a5 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 }SPI_InitTypeDef;
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 /**
bogdanm 92:4fc01daae5a5 107 * @brief HAL SPI State structure definition
bogdanm 92:4fc01daae5a5 108 */
bogdanm 92:4fc01daae5a5 109 typedef enum
bogdanm 92:4fc01daae5a5 110 {
bogdanm 92:4fc01daae5a5 111 HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 112 HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
bogdanm 92:4fc01daae5a5 113 HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
bogdanm 92:4fc01daae5a5 114 HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 92:4fc01daae5a5 115 HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 92:4fc01daae5a5 116 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 92:4fc01daae5a5 117 HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
bogdanm 92:4fc01daae5a5 118
bogdanm 92:4fc01daae5a5 119 }HAL_SPI_StateTypeDef;
bogdanm 92:4fc01daae5a5 120
bogdanm 92:4fc01daae5a5 121 /**
bogdanm 92:4fc01daae5a5 122 * @brief SPI handle Structure definition
bogdanm 92:4fc01daae5a5 123 */
bogdanm 92:4fc01daae5a5 124 typedef struct __SPI_HandleTypeDef
bogdanm 92:4fc01daae5a5 125 {
bogdanm 92:4fc01daae5a5 126 SPI_TypeDef *Instance; /* SPI registers base address */
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 SPI_InitTypeDef Init; /* SPI communication parameters */
bogdanm 92:4fc01daae5a5 129
bogdanm 92:4fc01daae5a5 130 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
bogdanm 92:4fc01daae5a5 131
bogdanm 92:4fc01daae5a5 132 uint16_t TxXferSize; /* SPI Tx transfer size */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
bogdanm 92:4fc01daae5a5 135
bogdanm 92:4fc01daae5a5 136 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
bogdanm 92:4fc01daae5a5 137
bogdanm 92:4fc01daae5a5 138 uint16_t RxXferSize; /* SPI Rx transfer size */
bogdanm 92:4fc01daae5a5 139
bogdanm 92:4fc01daae5a5 140 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
bogdanm 92:4fc01daae5a5 141
bogdanm 92:4fc01daae5a5 142 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
bogdanm 92:4fc01daae5a5 143
bogdanm 92:4fc01daae5a5 144 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
bogdanm 92:4fc01daae5a5 145
bogdanm 92:4fc01daae5a5 146 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 HAL_LockTypeDef Lock; /* SPI locking object */
bogdanm 92:4fc01daae5a5 151
bogdanm 92:4fc01daae5a5 152 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
bogdanm 92:4fc01daae5a5 153
Kojto 99:dbbf35b96557 154 __IO uint32_t ErrorCode; /* SPI Error code */
bogdanm 92:4fc01daae5a5 155
bogdanm 92:4fc01daae5a5 156 }SPI_HandleTypeDef;
Kojto 99:dbbf35b96557 157 /**
Kojto 99:dbbf35b96557 158 * @}
Kojto 99:dbbf35b96557 159 */
bogdanm 92:4fc01daae5a5 160
bogdanm 92:4fc01daae5a5 161 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 162 /** @defgroup SPI_Exported_Constants SPI Exported Constants
bogdanm 92:4fc01daae5a5 163 * @{
bogdanm 92:4fc01daae5a5 164 */
bogdanm 92:4fc01daae5a5 165
Kojto 99:dbbf35b96557 166 /** @defgroup SPI_Error_Code SPI Error Code
Kojto 99:dbbf35b96557 167 * @brief SPI Error Code
Kojto 99:dbbf35b96557 168 * @{
Kojto 99:dbbf35b96557 169 */
Kojto 99:dbbf35b96557 170 #define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 99:dbbf35b96557 171 #define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /*!< MODF error */
Kojto 99:dbbf35b96557 172 #define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /*!< CRC error */
Kojto 99:dbbf35b96557 173 #define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
Kojto 99:dbbf35b96557 174 #define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
Kojto 99:dbbf35b96557 175 #define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
Kojto 106:ba1f97679dad 176 #define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Flag: RXNE,TXE, BSY */
Kojto 99:dbbf35b96557 177 /**
Kojto 99:dbbf35b96557 178 * @}
Kojto 99:dbbf35b96557 179 */
Kojto 99:dbbf35b96557 180
Kojto 99:dbbf35b96557 181 /** @defgroup SPI_mode SPI Mode
bogdanm 92:4fc01daae5a5 182 * @{
bogdanm 92:4fc01daae5a5 183 */
bogdanm 92:4fc01daae5a5 184 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 185 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
bogdanm 92:4fc01daae5a5 186 /**
bogdanm 92:4fc01daae5a5 187 * @}
bogdanm 92:4fc01daae5a5 188 */
bogdanm 92:4fc01daae5a5 189
Kojto 99:dbbf35b96557 190 /** @defgroup SPI_Direction_mode SPI Direction Mode
bogdanm 92:4fc01daae5a5 191 * @{
bogdanm 92:4fc01daae5a5 192 */
bogdanm 92:4fc01daae5a5 193 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 194 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
bogdanm 92:4fc01daae5a5 195 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
bogdanm 92:4fc01daae5a5 196 /**
bogdanm 92:4fc01daae5a5 197 * @}
bogdanm 92:4fc01daae5a5 198 */
bogdanm 92:4fc01daae5a5 199
Kojto 99:dbbf35b96557 200 /** @defgroup SPI_data_size SPI Data Size
bogdanm 92:4fc01daae5a5 201 * @{
bogdanm 92:4fc01daae5a5 202 */
bogdanm 92:4fc01daae5a5 203 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 204 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
bogdanm 92:4fc01daae5a5 205 /**
bogdanm 92:4fc01daae5a5 206 * @}
bogdanm 92:4fc01daae5a5 207 */
bogdanm 92:4fc01daae5a5 208
Kojto 99:dbbf35b96557 209 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
bogdanm 92:4fc01daae5a5 210 * @{
bogdanm 92:4fc01daae5a5 211 */
bogdanm 92:4fc01daae5a5 212 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 213 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
bogdanm 92:4fc01daae5a5 214 /**
bogdanm 92:4fc01daae5a5 215 * @}
bogdanm 92:4fc01daae5a5 216 */
bogdanm 92:4fc01daae5a5 217
Kojto 99:dbbf35b96557 218 /** @defgroup SPI_Clock_Phase SPI Clock Phase
bogdanm 92:4fc01daae5a5 219 * @{
bogdanm 92:4fc01daae5a5 220 */
bogdanm 92:4fc01daae5a5 221 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 222 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
bogdanm 92:4fc01daae5a5 223 /**
bogdanm 92:4fc01daae5a5 224 * @}
bogdanm 92:4fc01daae5a5 225 */
bogdanm 92:4fc01daae5a5 226
Kojto 99:dbbf35b96557 227 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
bogdanm 92:4fc01daae5a5 228 * @{
bogdanm 92:4fc01daae5a5 229 */
bogdanm 92:4fc01daae5a5 230 #define SPI_NSS_SOFT SPI_CR1_SSM
bogdanm 92:4fc01daae5a5 231 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 232 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
bogdanm 92:4fc01daae5a5 233 /**
bogdanm 92:4fc01daae5a5 234 * @}
bogdanm 92:4fc01daae5a5 235 */
bogdanm 92:4fc01daae5a5 236
Kojto 99:dbbf35b96557 237 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
bogdanm 92:4fc01daae5a5 238 * @{
bogdanm 92:4fc01daae5a5 239 */
bogdanm 92:4fc01daae5a5 240 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 241 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
bogdanm 92:4fc01daae5a5 242 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
bogdanm 92:4fc01daae5a5 243 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
bogdanm 92:4fc01daae5a5 244 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
bogdanm 92:4fc01daae5a5 245 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
bogdanm 92:4fc01daae5a5 246 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
bogdanm 92:4fc01daae5a5 247 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
bogdanm 92:4fc01daae5a5 248 /**
bogdanm 92:4fc01daae5a5 249 * @}
bogdanm 92:4fc01daae5a5 250 */
bogdanm 92:4fc01daae5a5 251
Kojto 99:dbbf35b96557 252 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transsmission
bogdanm 92:4fc01daae5a5 253 * @{
bogdanm 92:4fc01daae5a5 254 */
bogdanm 92:4fc01daae5a5 255 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
bogdanm 92:4fc01daae5a5 256 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
bogdanm 92:4fc01daae5a5 257 /**
bogdanm 92:4fc01daae5a5 258 * @}
bogdanm 92:4fc01daae5a5 259 */
bogdanm 92:4fc01daae5a5 260
Kojto 99:dbbf35b96557 261 /** @defgroup SPI_TI_mode SPI TI Mode
bogdanm 92:4fc01daae5a5 262 * @{
bogdanm 92:4fc01daae5a5 263 */
Kojto 99:dbbf35b96557 264 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 265 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
bogdanm 92:4fc01daae5a5 266 /**
bogdanm 92:4fc01daae5a5 267 * @}
bogdanm 92:4fc01daae5a5 268 */
bogdanm 92:4fc01daae5a5 269
Kojto 99:dbbf35b96557 270 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
bogdanm 92:4fc01daae5a5 271 * @{
bogdanm 92:4fc01daae5a5 272 */
Kojto 99:dbbf35b96557 273 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 274 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
bogdanm 92:4fc01daae5a5 275 /**
bogdanm 92:4fc01daae5a5 276 * @}
bogdanm 92:4fc01daae5a5 277 */
bogdanm 92:4fc01daae5a5 278
Kojto 99:dbbf35b96557 279 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
bogdanm 92:4fc01daae5a5 280 * @{
bogdanm 92:4fc01daae5a5 281 */
bogdanm 92:4fc01daae5a5 282 #define SPI_IT_TXE SPI_CR2_TXEIE
bogdanm 92:4fc01daae5a5 283 #define SPI_IT_RXNE SPI_CR2_RXNEIE
bogdanm 92:4fc01daae5a5 284 #define SPI_IT_ERR SPI_CR2_ERRIE
bogdanm 92:4fc01daae5a5 285 /**
bogdanm 92:4fc01daae5a5 286 * @}
bogdanm 92:4fc01daae5a5 287 */
bogdanm 92:4fc01daae5a5 288
Kojto 99:dbbf35b96557 289 /** @defgroup SPI_Flags_definition SPI Flags Definition
bogdanm 92:4fc01daae5a5 290 * @{
bogdanm 92:4fc01daae5a5 291 */
bogdanm 92:4fc01daae5a5 292 #define SPI_FLAG_RXNE SPI_SR_RXNE
bogdanm 92:4fc01daae5a5 293 #define SPI_FLAG_TXE SPI_SR_TXE
bogdanm 92:4fc01daae5a5 294 #define SPI_FLAG_CRCERR SPI_SR_CRCERR
bogdanm 92:4fc01daae5a5 295 #define SPI_FLAG_MODF SPI_SR_MODF
bogdanm 92:4fc01daae5a5 296 #define SPI_FLAG_OVR SPI_SR_OVR
bogdanm 92:4fc01daae5a5 297 #define SPI_FLAG_BSY SPI_SR_BSY
bogdanm 92:4fc01daae5a5 298 #define SPI_FLAG_FRE SPI_SR_FRE
bogdanm 92:4fc01daae5a5 299 /**
bogdanm 92:4fc01daae5a5 300 * @}
bogdanm 92:4fc01daae5a5 301 */
bogdanm 92:4fc01daae5a5 302
bogdanm 92:4fc01daae5a5 303 /**
bogdanm 92:4fc01daae5a5 304 * @}
bogdanm 92:4fc01daae5a5 305 */
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 308 /** @defgroup SPI_Exported_Macros SPI Exported Macros
Kojto 99:dbbf35b96557 309 * @{
Kojto 99:dbbf35b96557 310 */
bogdanm 92:4fc01daae5a5 311 /** @brief Reset SPI handle state
bogdanm 92:4fc01daae5a5 312 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 313 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 314 * @retval None
bogdanm 92:4fc01daae5a5 315 */
bogdanm 92:4fc01daae5a5 316 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
bogdanm 92:4fc01daae5a5 317
bogdanm 92:4fc01daae5a5 318 /** @brief Enable or disable the specified SPI interrupts.
bogdanm 92:4fc01daae5a5 319 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 320 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 321 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 92:4fc01daae5a5 322 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 323 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 324 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 325 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 326 * @retval None
bogdanm 92:4fc01daae5a5 327 */
bogdanm 92:4fc01daae5a5 328 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 92:4fc01daae5a5 329 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /** @brief Check if the specified SPI interrupt source is enabled or disabled.
bogdanm 92:4fc01daae5a5 332 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 333 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 334 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
bogdanm 92:4fc01daae5a5 335 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 336 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 92:4fc01daae5a5 337 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 92:4fc01daae5a5 338 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 92:4fc01daae5a5 339 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 340 */
bogdanm 92:4fc01daae5a5 341 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 92:4fc01daae5a5 342
bogdanm 92:4fc01daae5a5 343 /** @brief Check whether the specified SPI flag is set or not.
bogdanm 92:4fc01daae5a5 344 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 345 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 346 * @param __FLAG__: specifies the flag to check.
bogdanm 92:4fc01daae5a5 347 * This parameter can be one of the following values:
bogdanm 92:4fc01daae5a5 348 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
bogdanm 92:4fc01daae5a5 349 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
bogdanm 92:4fc01daae5a5 350 * @arg SPI_FLAG_CRCERR: CRC error flag
bogdanm 92:4fc01daae5a5 351 * @arg SPI_FLAG_MODF: Mode fault flag
bogdanm 92:4fc01daae5a5 352 * @arg SPI_FLAG_OVR: Overrun flag
bogdanm 92:4fc01daae5a5 353 * @arg SPI_FLAG_BSY: Busy flag
bogdanm 92:4fc01daae5a5 354 * @arg SPI_FLAG_FRE: Frame format error flag
bogdanm 92:4fc01daae5a5 355 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 92:4fc01daae5a5 356 */
bogdanm 92:4fc01daae5a5 357 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 92:4fc01daae5a5 358
bogdanm 92:4fc01daae5a5 359 /** @brief Clear the SPI CRCERR pending flag.
bogdanm 92:4fc01daae5a5 360 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 361 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 362 * @retval None
bogdanm 92:4fc01daae5a5 363 */
bogdanm 92:4fc01daae5a5 364 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
bogdanm 92:4fc01daae5a5 365
bogdanm 92:4fc01daae5a5 366 /** @brief Clear the SPI MODF pending flag.
bogdanm 92:4fc01daae5a5 367 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 368 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 369 * @retval None
bogdanm 92:4fc01daae5a5 370 */
Kojto 99:dbbf35b96557 371 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 372 do{ \
Kojto 99:dbbf35b96557 373 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 374 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 375 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
Kojto 99:dbbf35b96557 376 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 377 } while(0)
bogdanm 92:4fc01daae5a5 378
bogdanm 92:4fc01daae5a5 379 /** @brief Clear the SPI OVR pending flag.
bogdanm 92:4fc01daae5a5 380 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 381 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 382 * @retval None
bogdanm 92:4fc01daae5a5 383 */
Kojto 99:dbbf35b96557 384 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 385 do{ \
Kojto 99:dbbf35b96557 386 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 387 tmpreg = (__HANDLE__)->Instance->DR; \
Kojto 99:dbbf35b96557 388 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 389 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 390 } while(0)
bogdanm 92:4fc01daae5a5 391
bogdanm 92:4fc01daae5a5 392 /** @brief Clear the SPI FRE pending flag.
bogdanm 92:4fc01daae5a5 393 * @param __HANDLE__: specifies the SPI handle.
bogdanm 92:4fc01daae5a5 394 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 92:4fc01daae5a5 395 * @retval None
Kojto 99:dbbf35b96557 396 */
Kojto 99:dbbf35b96557 397 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
Kojto 99:dbbf35b96557 398 do{ \
Kojto 99:dbbf35b96557 399 __IO uint32_t tmpreg; \
Kojto 99:dbbf35b96557 400 tmpreg = (__HANDLE__)->Instance->SR; \
Kojto 99:dbbf35b96557 401 UNUSED(tmpreg); \
Kojto 99:dbbf35b96557 402 }while(0)
Kojto 99:dbbf35b96557 403
Kojto 99:dbbf35b96557 404 /** @brief Enable SPI
Kojto 99:dbbf35b96557 405 * @param __HANDLE__: specifies the SPI Handle.
Kojto 99:dbbf35b96557 406 * @retval None
bogdanm 92:4fc01daae5a5 407 */
bogdanm 92:4fc01daae5a5 408 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
bogdanm 92:4fc01daae5a5 409
Kojto 99:dbbf35b96557 410 /** @brief Disable SPI
Kojto 99:dbbf35b96557 411 * @param __HANDLE__: specifies the SPI Handle.
Kojto 99:dbbf35b96557 412 * @retval None
Kojto 99:dbbf35b96557 413 */
Kojto 99:dbbf35b96557 414 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
Kojto 99:dbbf35b96557 415 /**
Kojto 99:dbbf35b96557 416 * @}
Kojto 99:dbbf35b96557 417 */
Kojto 99:dbbf35b96557 418
Kojto 99:dbbf35b96557 419 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 420 /** @addtogroup SPI_Exported_Functions
Kojto 99:dbbf35b96557 421 * @{
Kojto 99:dbbf35b96557 422 */
bogdanm 92:4fc01daae5a5 423
Kojto 99:dbbf35b96557 424 /** @addtogroup SPI_Exported_Functions_Group1
Kojto 99:dbbf35b96557 425 * @{
Kojto 99:dbbf35b96557 426 */
bogdanm 92:4fc01daae5a5 427 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 428 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 429 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 430 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 431 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
Kojto 99:dbbf35b96557 432 /**
Kojto 99:dbbf35b96557 433 * @}
Kojto 99:dbbf35b96557 434 */
bogdanm 92:4fc01daae5a5 435
Kojto 99:dbbf35b96557 436 /** @addtogroup SPI_Exported_Functions_Group2
Kojto 99:dbbf35b96557 437 * @{
Kojto 99:dbbf35b96557 438 */
bogdanm 92:4fc01daae5a5 439 /* I/O operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 440 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 441 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 442 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 92:4fc01daae5a5 443 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 444 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 445 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 446 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 447 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 448 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 92:4fc01daae5a5 449 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 450 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 451 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 452
bogdanm 92:4fc01daae5a5 453 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 454 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 455 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 456 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 457 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 458 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 459 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 460 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
Kojto 99:dbbf35b96557 461 /**
Kojto 99:dbbf35b96557 462 * @}
Kojto 99:dbbf35b96557 463 */
Kojto 99:dbbf35b96557 464
Kojto 99:dbbf35b96557 465 /** @addtogroup SPI_Exported_Functions_Group3
Kojto 99:dbbf35b96557 466 * @{
Kojto 99:dbbf35b96557 467 */
bogdanm 92:4fc01daae5a5 468 /* Peripheral State and Control functions **************************************/
bogdanm 92:4fc01daae5a5 469 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
Kojto 99:dbbf35b96557 470 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
bogdanm 92:4fc01daae5a5 471
bogdanm 92:4fc01daae5a5 472 /**
bogdanm 92:4fc01daae5a5 473 * @}
bogdanm 92:4fc01daae5a5 474 */
bogdanm 92:4fc01daae5a5 475
bogdanm 92:4fc01daae5a5 476 /**
bogdanm 92:4fc01daae5a5 477 * @}
bogdanm 92:4fc01daae5a5 478 */
bogdanm 92:4fc01daae5a5 479
Kojto 99:dbbf35b96557 480 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 481 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 482 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 483 /** @defgroup SPI_Private_Constants SPI Private Constants
Kojto 99:dbbf35b96557 484 * @{
Kojto 99:dbbf35b96557 485 */
Kojto 99:dbbf35b96557 486 /**
Kojto 99:dbbf35b96557 487 * @}
Kojto 99:dbbf35b96557 488 */
Kojto 99:dbbf35b96557 489
Kojto 99:dbbf35b96557 490 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 491 /** @defgroup SPI_Private_Macros SPI Private Macros
Kojto 99:dbbf35b96557 492 * @{
Kojto 99:dbbf35b96557 493 */
Kojto 99:dbbf35b96557 494
Kojto 99:dbbf35b96557 495 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
Kojto 99:dbbf35b96557 496 ((MODE) == SPI_MODE_MASTER))
Kojto 99:dbbf35b96557 497
Kojto 99:dbbf35b96557 498
Kojto 99:dbbf35b96557 499 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 99:dbbf35b96557 500 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
Kojto 99:dbbf35b96557 501 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 99:dbbf35b96557 502
Kojto 99:dbbf35b96557 503 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
Kojto 99:dbbf35b96557 504 ((MODE) == SPI_DIRECTION_1LINE))
Kojto 99:dbbf35b96557 505
Kojto 99:dbbf35b96557 506 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
Kojto 99:dbbf35b96557 507
Kojto 99:dbbf35b96557 508 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
Kojto 99:dbbf35b96557 509 ((DATASIZE) == SPI_DATASIZE_8BIT))
Kojto 99:dbbf35b96557 510
Kojto 99:dbbf35b96557 511 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
Kojto 99:dbbf35b96557 512 ((CPOL) == SPI_POLARITY_HIGH))
Kojto 99:dbbf35b96557 513
Kojto 99:dbbf35b96557 514 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
Kojto 99:dbbf35b96557 515 ((CPHA) == SPI_PHASE_2EDGE))
Kojto 99:dbbf35b96557 516
Kojto 99:dbbf35b96557 517 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
Kojto 99:dbbf35b96557 518 ((NSS) == SPI_NSS_HARD_INPUT) || \
Kojto 99:dbbf35b96557 519 ((NSS) == SPI_NSS_HARD_OUTPUT))
Kojto 99:dbbf35b96557 520
Kojto 99:dbbf35b96557 521 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
Kojto 99:dbbf35b96557 522 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
Kojto 99:dbbf35b96557 523 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
Kojto 99:dbbf35b96557 524 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
Kojto 99:dbbf35b96557 525 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
Kojto 99:dbbf35b96557 526 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
Kojto 99:dbbf35b96557 527 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
Kojto 99:dbbf35b96557 528 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
Kojto 99:dbbf35b96557 529
Kojto 99:dbbf35b96557 530 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
Kojto 99:dbbf35b96557 531 ((BIT) == SPI_FIRSTBIT_LSB))
Kojto 99:dbbf35b96557 532
Kojto 99:dbbf35b96557 533 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
Kojto 99:dbbf35b96557 534 ((MODE) == SPI_TIMODE_ENABLE))
Kojto 99:dbbf35b96557 535
Kojto 99:dbbf35b96557 536 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
Kojto 99:dbbf35b96557 537 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
Kojto 99:dbbf35b96557 538
Kojto 99:dbbf35b96557 539 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
Kojto 99:dbbf35b96557 540
Kojto 99:dbbf35b96557 541 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
Kojto 99:dbbf35b96557 542
Kojto 99:dbbf35b96557 543 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
Kojto 99:dbbf35b96557 544
Kojto 99:dbbf35b96557 545 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
Kojto 99:dbbf35b96557 546 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
Kojto 99:dbbf35b96557 547 /**
Kojto 99:dbbf35b96557 548 * @}
Kojto 99:dbbf35b96557 549 */
Kojto 99:dbbf35b96557 550
Kojto 99:dbbf35b96557 551 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 552 /** @defgroup SPI_Private_Functions SPI Private Functions
Kojto 99:dbbf35b96557 553 * @{
Kojto 99:dbbf35b96557 554 */
Kojto 99:dbbf35b96557 555
Kojto 99:dbbf35b96557 556 /**
Kojto 99:dbbf35b96557 557 * @}
Kojto 99:dbbf35b96557 558 */
Kojto 99:dbbf35b96557 559
Kojto 99:dbbf35b96557 560 /**
Kojto 99:dbbf35b96557 561 * @}
Kojto 99:dbbf35b96557 562 */
Kojto 99:dbbf35b96557 563
Kojto 99:dbbf35b96557 564 /**
Kojto 99:dbbf35b96557 565 * @}
Kojto 99:dbbf35b96557 566 */
Kojto 99:dbbf35b96557 567
Kojto 99:dbbf35b96557 568
bogdanm 92:4fc01daae5a5 569 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 570 }
bogdanm 92:4fc01daae5a5 571 #endif
bogdanm 92:4fc01daae5a5 572
bogdanm 92:4fc01daae5a5 573 #endif /* __STM32F4xx_HAL_SPI_H */
bogdanm 92:4fc01daae5a5 574
bogdanm 92:4fc01daae5a5 575 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/