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TARGET_ARCH_MAX/stm32f4xx_hal_qspi.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

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Kojto 99:dbbf35b96557 1 /**
Kojto 99:dbbf35b96557 2 ******************************************************************************
Kojto 99:dbbf35b96557 3 * @file stm32f4xx_hal_qspi.h
Kojto 99:dbbf35b96557 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
Kojto 99:dbbf35b96557 7 * @brief Header file of QSPI HAL module.
Kojto 99:dbbf35b96557 8 ******************************************************************************
Kojto 99:dbbf35b96557 9 * @attention
Kojto 99:dbbf35b96557 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto 99:dbbf35b96557 12 *
Kojto 99:dbbf35b96557 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 99:dbbf35b96557 14 * are permitted provided that the following conditions are met:
Kojto 99:dbbf35b96557 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 99:dbbf35b96557 16 * this list of conditions and the following disclaimer.
Kojto 99:dbbf35b96557 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 99:dbbf35b96557 18 * this list of conditions and the following disclaimer in the documentation
Kojto 99:dbbf35b96557 19 * and/or other materials provided with the distribution.
Kojto 99:dbbf35b96557 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 99:dbbf35b96557 21 * may be used to endorse or promote products derived from this software
Kojto 99:dbbf35b96557 22 * without specific prior written permission.
Kojto 99:dbbf35b96557 23 *
Kojto 99:dbbf35b96557 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 99:dbbf35b96557 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 99:dbbf35b96557 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 99:dbbf35b96557 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 99:dbbf35b96557 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 99:dbbf35b96557 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 99:dbbf35b96557 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 99:dbbf35b96557 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 99:dbbf35b96557 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 99:dbbf35b96557 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 99:dbbf35b96557 34 *
Kojto 99:dbbf35b96557 35 ******************************************************************************
Kojto 99:dbbf35b96557 36 */
Kojto 99:dbbf35b96557 37
Kojto 99:dbbf35b96557 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 99:dbbf35b96557 39 #ifndef __STM32F4xx_HAL_QSPI_H
Kojto 99:dbbf35b96557 40 #define __STM32F4xx_HAL_QSPI_H
Kojto 99:dbbf35b96557 41
Kojto 99:dbbf35b96557 42 #ifdef __cplusplus
Kojto 99:dbbf35b96557 43 extern "C" {
Kojto 99:dbbf35b96557 44 #endif
Kojto 99:dbbf35b96557 45
Kojto 110:165afa46840b 46 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 99:dbbf35b96557 47 /* Includes ------------------------------------------------------------------*/
Kojto 99:dbbf35b96557 48 #include "stm32f4xx_hal_def.h"
Kojto 99:dbbf35b96557 49
Kojto 99:dbbf35b96557 50 /** @addtogroup STM32F4xx_HAL_Driver
Kojto 99:dbbf35b96557 51 * @{
Kojto 99:dbbf35b96557 52 */
Kojto 99:dbbf35b96557 53
Kojto 99:dbbf35b96557 54 /** @addtogroup QSPI
Kojto 99:dbbf35b96557 55 * @{
Kojto 99:dbbf35b96557 56 */
Kojto 99:dbbf35b96557 57
Kojto 99:dbbf35b96557 58 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 59 /** @defgroup QSPI_Exported_Types QSPI Exported Types
Kojto 99:dbbf35b96557 60 * @{
Kojto 99:dbbf35b96557 61 */
Kojto 99:dbbf35b96557 62
Kojto 99:dbbf35b96557 63 /**
Kojto 99:dbbf35b96557 64 * @brief QSPI Init structure definition
Kojto 99:dbbf35b96557 65 */
Kojto 99:dbbf35b96557 66
Kojto 99:dbbf35b96557 67 typedef struct
Kojto 99:dbbf35b96557 68 {
Kojto 99:dbbf35b96557 69 uint32_t ClockPrescaler; /* Specifies the prescaler factor for generating clock based on the AHB clock.
Kojto 99:dbbf35b96557 70 This parameter can be a number between 0 and 255 */
Kojto 99:dbbf35b96557 71
Kojto 99:dbbf35b96557 72 uint32_t FifoThreshold; /* Specifies the threshold number of bytes in the FIFO (used only in indirect mode)
Kojto 99:dbbf35b96557 73 This parameter can be a value between 1 and 32 */
Kojto 99:dbbf35b96557 74
Kojto 99:dbbf35b96557 75 uint32_t SampleShifting; /* Specifies the Sample Shift. The data is sampled 1/2 clock cycle delay later to
Kojto 99:dbbf35b96557 76 take in account external signal delays. (It should be QSPI_SAMPLE_SHIFTING_NONE in DDR mode)
Kojto 99:dbbf35b96557 77 This parameter can be a value of @ref QSPI_SampleShifting */
Kojto 99:dbbf35b96557 78
Kojto 99:dbbf35b96557 79 uint32_t FlashSize; /* Specifies the Flash Size. FlashSize+1 is effectively the number of address bits
Kojto 99:dbbf35b96557 80 required to address the flash memory. The flash capacity can be up to 4GB
Kojto 99:dbbf35b96557 81 (addressed using 32 bits) in indirect mode, but the addressable space in
Kojto 99:dbbf35b96557 82 memory-mapped mode is limited to 256MB
Kojto 99:dbbf35b96557 83 This parameter can be a number between 0 and 31 */
Kojto 99:dbbf35b96557 84
Kojto 99:dbbf35b96557 85 uint32_t ChipSelectHighTime; /* Specifies the Chip Select High Time. ChipSelectHighTime+1 defines the minimum number
Kojto 99:dbbf35b96557 86 of clock cycles which the chip select must remain high between commands.
Kojto 99:dbbf35b96557 87 This parameter can be a value of @ref QSPI_ChipSelectHighTime */
Kojto 99:dbbf35b96557 88
Kojto 99:dbbf35b96557 89 uint32_t ClockMode; /* Specifies the Clock Mode. It indicates the level that clock takes between commands.
Kojto 99:dbbf35b96557 90 This parameter can be a value of @ref QSPI_ClockMode */
Kojto 99:dbbf35b96557 91
Kojto 99:dbbf35b96557 92 uint32_t FlashID; /* Specifies the Flash which will be used,
Kojto 99:dbbf35b96557 93 This parameter can be a value of @ref QSPI_Flash_Select */
Kojto 99:dbbf35b96557 94
Kojto 99:dbbf35b96557 95 uint32_t DualFlash; /* Specifies the Dual Flash Mode State
Kojto 99:dbbf35b96557 96 This parameter can be a value of @ref QSPI_DualFlash_Mode */
Kojto 99:dbbf35b96557 97 }QSPI_InitTypeDef;
Kojto 99:dbbf35b96557 98
Kojto 99:dbbf35b96557 99 /**
Kojto 99:dbbf35b96557 100 * @brief HAL QSPI State structures definition
Kojto 99:dbbf35b96557 101 */
Kojto 99:dbbf35b96557 102 typedef enum
Kojto 99:dbbf35b96557 103 {
Kojto 99:dbbf35b96557 104 HAL_QSPI_STATE_RESET = 0x00, /*!< Peripheral not initialized */
Kojto 99:dbbf35b96557 105 HAL_QSPI_STATE_READY = 0x01, /*!< Peripheral initialized and ready for use */
Kojto 99:dbbf35b96557 106 HAL_QSPI_STATE_BUSY = 0x02, /*!< Peripheral in indirect mode and busy */
Kojto 99:dbbf35b96557 107 HAL_QSPI_STATE_BUSY_INDIRECT_TX = 0x12, /*!< Peripheral in indirect mode with transmission ongoing */
Kojto 99:dbbf35b96557 108 HAL_QSPI_STATE_BUSY_INDIRECT_RX = 0x22, /*!< Peripheral in indirect mode with reception ongoing */
Kojto 99:dbbf35b96557 109 HAL_QSPI_STATE_BUSY_AUTO_POLLING = 0x42, /*!< Peripheral in auto polling mode ongoing */
Kojto 99:dbbf35b96557 110 HAL_QSPI_STATE_BUSY_MEM_MAPPED = 0x82, /*!< Peripheral in memory mapped mode ongoing */
Kojto 99:dbbf35b96557 111 HAL_QSPI_STATE_ERROR = 0x04 /*!< Peripheral in error */
Kojto 99:dbbf35b96557 112 }HAL_QSPI_StateTypeDef;
Kojto 99:dbbf35b96557 113
Kojto 99:dbbf35b96557 114 /**
Kojto 99:dbbf35b96557 115 * @brief QSPI Handle Structure definition
Kojto 99:dbbf35b96557 116 */
Kojto 99:dbbf35b96557 117 typedef struct
Kojto 99:dbbf35b96557 118 {
Kojto 99:dbbf35b96557 119 QUADSPI_TypeDef *Instance; /* QSPI registers base address */
Kojto 99:dbbf35b96557 120 QSPI_InitTypeDef Init; /* QSPI communication parameters */
Kojto 99:dbbf35b96557 121 uint8_t *pTxBuffPtr; /* Pointer to QSPI Tx transfer Buffer */
Kojto 99:dbbf35b96557 122 __IO uint16_t TxXferSize; /* QSPI Tx Transfer size */
Kojto 99:dbbf35b96557 123 __IO uint16_t TxXferCount; /* QSPI Tx Transfer Counter */
Kojto 99:dbbf35b96557 124 uint8_t *pRxBuffPtr; /* Pointer to QSPI Rx transfer Buffer */
Kojto 99:dbbf35b96557 125 __IO uint16_t RxXferSize; /* QSPI Rx Transfer size */
Kojto 99:dbbf35b96557 126 __IO uint16_t RxXferCount; /* QSPI Rx Transfer Counter */
Kojto 99:dbbf35b96557 127 DMA_HandleTypeDef *hdma; /* QSPI Rx/Tx DMA Handle parameters */
Kojto 99:dbbf35b96557 128 __IO HAL_LockTypeDef Lock; /* Locking object */
Kojto 99:dbbf35b96557 129 __IO HAL_QSPI_StateTypeDef State; /* QSPI communication state */
Kojto 99:dbbf35b96557 130 __IO uint32_t ErrorCode; /* QSPI Error code */
Kojto 99:dbbf35b96557 131 uint32_t Timeout; /* Timeout for the QSPI memory access */
Kojto 99:dbbf35b96557 132 }QSPI_HandleTypeDef;
Kojto 99:dbbf35b96557 133
Kojto 99:dbbf35b96557 134 /**
Kojto 99:dbbf35b96557 135 * @brief QSPI Command structure definition
Kojto 99:dbbf35b96557 136 */
Kojto 99:dbbf35b96557 137 typedef struct
Kojto 99:dbbf35b96557 138 {
Kojto 99:dbbf35b96557 139 uint32_t Instruction; /* Specifies the Instruction to be sent
Kojto 99:dbbf35b96557 140 This parameter can be a value (8-bit) between 0x00 and 0xFF */
Kojto 99:dbbf35b96557 141 uint32_t Address; /* Specifies the Address to be sent (Size from 1 to 4 bytes according AddressSize)
Kojto 99:dbbf35b96557 142 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 99:dbbf35b96557 143 uint32_t AlternateBytes; /* Specifies the Alternate Bytes to be sent (Size from 1 to 4 bytes according AlternateBytesSize)
Kojto 99:dbbf35b96557 144 This parameter can be a value (32-bits) between 0x0 and 0xFFFFFFFF */
Kojto 99:dbbf35b96557 145 uint32_t AddressSize; /* Specifies the Address Size
Kojto 99:dbbf35b96557 146 This parameter can be a value of @ref QSPI_AddressSize */
Kojto 99:dbbf35b96557 147 uint32_t AlternateBytesSize; /* Specifies the Alternate Bytes Size
Kojto 99:dbbf35b96557 148 This parameter can be a value of @ref QSPI_AlternateBytesSize */
Kojto 99:dbbf35b96557 149 uint32_t DummyCycles; /* Specifies the Number of Dummy Cycles.
Kojto 99:dbbf35b96557 150 This parameter can be a number between 0 and 31 */
Kojto 99:dbbf35b96557 151 uint32_t InstructionMode; /* Specifies the Instruction Mode
Kojto 99:dbbf35b96557 152 This parameter can be a value of @ref QSPI_InstructionMode */
Kojto 99:dbbf35b96557 153 uint32_t AddressMode; /* Specifies the Address Mode
Kojto 99:dbbf35b96557 154 This parameter can be a value of @ref QSPI_AddressMode */
Kojto 99:dbbf35b96557 155 uint32_t AlternateByteMode; /* Specifies the Alternate Bytes Mode
Kojto 99:dbbf35b96557 156 This parameter can be a value of @ref QSPI_AlternateBytesMode */
Kojto 99:dbbf35b96557 157 uint32_t DataMode; /* Specifies the Data Mode (used for dummy cycles and data phases)
Kojto 99:dbbf35b96557 158 This parameter can be a value of @ref QSPI_DataMode */
Kojto 99:dbbf35b96557 159 uint32_t NbData; /* Specifies the number of data to transfer.
Kojto 99:dbbf35b96557 160 This parameter can be any value between 0 and 0xFFFFFFFF (0 means undefined length
Kojto 99:dbbf35b96557 161 until end of memory)*/
Kojto 99:dbbf35b96557 162 uint32_t DdrMode; /* Specifies the double data rate mode for address, alternate byte and data phase
Kojto 99:dbbf35b96557 163 This parameter can be a value of @ref QSPI_DdrMode */
Kojto 99:dbbf35b96557 164 uint32_t DdrHoldHalfCycle; /* Specifies the DDR hold half cycle. It delays the data output by one half of
Kojto 99:dbbf35b96557 165 system clock in DDR mode.
Kojto 99:dbbf35b96557 166 This parameter can be a value of @ref QSPI_DdrHoldHalfCycle */
Kojto 99:dbbf35b96557 167 uint32_t SIOOMode; /* Specifies the send instruction only once mode
Kojto 99:dbbf35b96557 168 This parameter can be a value of @ref QSPI_SIOOMode */
Kojto 99:dbbf35b96557 169 }QSPI_CommandTypeDef;
Kojto 99:dbbf35b96557 170
Kojto 99:dbbf35b96557 171 /**
Kojto 99:dbbf35b96557 172 * @brief QSPI Auto Polling mode configuration structure definition
Kojto 99:dbbf35b96557 173 */
Kojto 99:dbbf35b96557 174 typedef struct
Kojto 99:dbbf35b96557 175 {
Kojto 99:dbbf35b96557 176 uint32_t Match; /* Specifies the value to be compared with the masked status register to get a match.
Kojto 99:dbbf35b96557 177 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 99:dbbf35b96557 178 uint32_t Mask; /* Specifies the mask to be applied to the status bytes received.
Kojto 99:dbbf35b96557 179 This parameter can be any value between 0 and 0xFFFFFFFF */
Kojto 99:dbbf35b96557 180 uint32_t Interval; /* Specifies the number of clock cycles between two read during automatic polling phases.
Kojto 99:dbbf35b96557 181 This parameter can be any value between 0 and 0xFFFF */
Kojto 99:dbbf35b96557 182 uint32_t StatusBytesSize; /* Specifies the size of the status bytes received.
Kojto 99:dbbf35b96557 183 This parameter can be any value between 1 and 4 */
Kojto 99:dbbf35b96557 184 uint32_t MatchMode; /* Specifies the method used for determining a match.
Kojto 99:dbbf35b96557 185 This parameter can be a value of @ref QSPI_MatchMode */
Kojto 99:dbbf35b96557 186 uint32_t AutomaticStop; /* Specifies if automatic polling is stopped after a match.
Kojto 99:dbbf35b96557 187 This parameter can be a value of @ref QSPI_AutomaticStop */
Kojto 99:dbbf35b96557 188 }QSPI_AutoPollingTypeDef;
Kojto 99:dbbf35b96557 189
Kojto 99:dbbf35b96557 190 /**
Kojto 99:dbbf35b96557 191 * @brief QSPI Memory Mapped mode configuration structure definition
Kojto 99:dbbf35b96557 192 */
Kojto 99:dbbf35b96557 193 typedef struct
Kojto 99:dbbf35b96557 194 {
Kojto 99:dbbf35b96557 195 uint32_t TimeOutPeriod; /* Specifies the number of clock to wait when the FIFO is full before to release the chip select.
Kojto 99:dbbf35b96557 196 This parameter can be any value between 0 and 0xFFFF */
Kojto 99:dbbf35b96557 197 uint32_t TimeOutActivation; /* Specifies if the time out counter is enabled to release the chip select.
Kojto 99:dbbf35b96557 198 This parameter can be a value of @ref QSPI_TimeOutActivation */
Kojto 99:dbbf35b96557 199 }QSPI_MemoryMappedTypeDef;
Kojto 99:dbbf35b96557 200 /**
Kojto 99:dbbf35b96557 201 * @}
Kojto 99:dbbf35b96557 202 */
Kojto 99:dbbf35b96557 203
Kojto 99:dbbf35b96557 204 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 205 /** @defgroup QSPI_Exported_Constants QSPI Exported Constants
Kojto 99:dbbf35b96557 206 * @{
Kojto 99:dbbf35b96557 207 */
Kojto 99:dbbf35b96557 208 /** @defgroup QSPI_ErrorCode QSPI Error Code
Kojto 99:dbbf35b96557 209 * @{
Kojto 99:dbbf35b96557 210 */
Kojto 99:dbbf35b96557 211 #define HAL_QSPI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
Kojto 99:dbbf35b96557 212 #define HAL_QSPI_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */
Kojto 99:dbbf35b96557 213 #define HAL_QSPI_ERROR_TRANSFER ((uint32_t)0x00000002) /*!< Transfer error */
Kojto 99:dbbf35b96557 214 #define HAL_QSPI_ERROR_DMA ((uint32_t)0x00000004) /*!< DMA transfer error */
Kojto 99:dbbf35b96557 215 /**
Kojto 99:dbbf35b96557 216 * @}
Kojto 99:dbbf35b96557 217 */
Kojto 99:dbbf35b96557 218
Kojto 99:dbbf35b96557 219 /** @defgroup QSPI_SampleShifting QSPI Sample Shifting
Kojto 99:dbbf35b96557 220 * @{
Kojto 99:dbbf35b96557 221 */
Kojto 99:dbbf35b96557 222 #define QSPI_SAMPLE_SHIFTING_NONE ((uint32_t)0x00000000) /*!<No clock cycle shift to sample data*/
Kojto 99:dbbf35b96557 223 #define QSPI_SAMPLE_SHIFTING_HALFCYCLE ((uint32_t)QUADSPI_CR_SSHIFT) /*!<1/2 clock cycle shift to sample data*/
Kojto 99:dbbf35b96557 224 /**
Kojto 99:dbbf35b96557 225 * @}
Kojto 99:dbbf35b96557 226 */
Kojto 99:dbbf35b96557 227
Kojto 99:dbbf35b96557 228 /** @defgroup QSPI_ChipSelectHighTime QSPI Chip Select High Time
Kojto 99:dbbf35b96557 229 * @{
Kojto 99:dbbf35b96557 230 */
Kojto 99:dbbf35b96557 231 #define QSPI_CS_HIGH_TIME_1_CYCLE ((uint32_t)0x00000000) /*!<nCS stay high for at least 1 clock cycle between commands*/
Kojto 99:dbbf35b96557 232 #define QSPI_CS_HIGH_TIME_2_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 2 clock cycles between commands*/
Kojto 99:dbbf35b96557 233 #define QSPI_CS_HIGH_TIME_3_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 3 clock cycles between commands*/
Kojto 99:dbbf35b96557 234 #define QSPI_CS_HIGH_TIME_4_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_0 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 4 clock cycles between commands*/
Kojto 99:dbbf35b96557 235 #define QSPI_CS_HIGH_TIME_5_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2) /*!<nCS stay high for at least 5 clock cycles between commands*/
Kojto 99:dbbf35b96557 236 #define QSPI_CS_HIGH_TIME_6_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_0) /*!<nCS stay high for at least 6 clock cycles between commands*/
Kojto 99:dbbf35b96557 237 #define QSPI_CS_HIGH_TIME_7_CYCLE ((uint32_t)QUADSPI_DCR_CSHT_2 | QUADSPI_DCR_CSHT_1) /*!<nCS stay high for at least 7 clock cycles between commands*/
Kojto 99:dbbf35b96557 238 #define QSPI_CS_HIGH_TIME_8_CYCLE ((uint32_t)QUADSPI_DCR_CSHT) /*!<nCS stay high for at least 8 clock cycles between commands*/
Kojto 99:dbbf35b96557 239 /**
Kojto 99:dbbf35b96557 240 * @}
Kojto 99:dbbf35b96557 241 */
Kojto 99:dbbf35b96557 242
Kojto 99:dbbf35b96557 243 /** @defgroup QSPI_ClockMode QSPI Clock Mode
Kojto 99:dbbf35b96557 244 * @{
Kojto 99:dbbf35b96557 245 */
Kojto 99:dbbf35b96557 246 #define QSPI_CLOCK_MODE_0 ((uint32_t)0x00000000) /*!<Clk stays low while nCS is released*/
Kojto 99:dbbf35b96557 247 #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) /*!<Clk goes high while nCS is released*/
Kojto 99:dbbf35b96557 248 /**
Kojto 99:dbbf35b96557 249 * @}
Kojto 99:dbbf35b96557 250 */
Kojto 99:dbbf35b96557 251
Kojto 99:dbbf35b96557 252 /** @defgroup QSPI_Flash_Select QSPI Flash Select
Kojto 99:dbbf35b96557 253 * @{
Kojto 99:dbbf35b96557 254 */
Kojto 99:dbbf35b96557 255 #define QSPI_FLASH_ID_1 ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 256 #define QSPI_FLASH_ID_2 ((uint32_t)QUADSPI_CR_FSEL)
Kojto 99:dbbf35b96557 257 /**
Kojto 99:dbbf35b96557 258 * @}
Kojto 99:dbbf35b96557 259 */
Kojto 99:dbbf35b96557 260
Kojto 99:dbbf35b96557 261 /** @defgroup QSPI_DualFlash_Mode QSPI Dual Flash Mode
Kojto 99:dbbf35b96557 262 * @{
Kojto 99:dbbf35b96557 263 */
Kojto 99:dbbf35b96557 264 #define QSPI_DUALFLASH_ENABLE ((uint32_t)QUADSPI_CR_DFM)
Kojto 99:dbbf35b96557 265 #define QSPI_DUALFLASH_DISABLE ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 266 /**
Kojto 99:dbbf35b96557 267 * @}
Kojto 99:dbbf35b96557 268 */
Kojto 99:dbbf35b96557 269
Kojto 99:dbbf35b96557 270 /** @defgroup QSPI_AddressSize QSPI Address Size
Kojto 99:dbbf35b96557 271 * @{
Kojto 99:dbbf35b96557 272 */
Kojto 99:dbbf35b96557 273 #define QSPI_ADDRESS_8_BITS ((uint32_t)0x00000000) /*!<8-bit address*/
Kojto 99:dbbf35b96557 274 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
Kojto 99:dbbf35b96557 275 #define QSPI_ADDRESS_24_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_1) /*!<24-bit address*/
Kojto 99:dbbf35b96557 276 #define QSPI_ADDRESS_32_BITS ((uint32_t)QUADSPI_CCR_ADSIZE) /*!<32-bit address*/
Kojto 99:dbbf35b96557 277 /**
Kojto 99:dbbf35b96557 278 * @}
Kojto 99:dbbf35b96557 279 */
Kojto 99:dbbf35b96557 280
Kojto 99:dbbf35b96557 281 /** @defgroup QSPI_AlternateBytesSize QSPI Alternate Bytes Size
Kojto 99:dbbf35b96557 282 * @{
Kojto 99:dbbf35b96557 283 */
Kojto 99:dbbf35b96557 284 #define QSPI_ALTERNATE_BYTES_8_BITS ((uint32_t)0x00000000) /*!<8-bit alternate bytes*/
Kojto 99:dbbf35b96557 285 #define QSPI_ALTERNATE_BYTES_16_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_0) /*!<16-bit alternate bytes*/
Kojto 99:dbbf35b96557 286 #define QSPI_ALTERNATE_BYTES_24_BITS ((uint32_t)QUADSPI_CCR_ABSIZE_1) /*!<24-bit alternate bytes*/
Kojto 99:dbbf35b96557 287 #define QSPI_ALTERNATE_BYTES_32_BITS ((uint32_t)QUADSPI_CCR_ABSIZE) /*!<32-bit alternate bytes*/
Kojto 99:dbbf35b96557 288 /**
Kojto 99:dbbf35b96557 289 * @}
Kojto 99:dbbf35b96557 290 */
Kojto 99:dbbf35b96557 291
Kojto 99:dbbf35b96557 292 /** @defgroup QSPI_InstructionMode QSPI Instruction Mode
Kojto 99:dbbf35b96557 293 * @{
Kojto 99:dbbf35b96557 294 */
Kojto 99:dbbf35b96557 295 #define QSPI_INSTRUCTION_NONE ((uint32_t)0x00000000) /*!<No instruction*/
Kojto 99:dbbf35b96557 296 #define QSPI_INSTRUCTION_1_LINE ((uint32_t)QUADSPI_CCR_IMODE_0) /*!<Instruction on a single line*/
Kojto 99:dbbf35b96557 297 #define QSPI_INSTRUCTION_2_LINES ((uint32_t)QUADSPI_CCR_IMODE_1) /*!<Instruction on two lines*/
Kojto 99:dbbf35b96557 298 #define QSPI_INSTRUCTION_4_LINES ((uint32_t)QUADSPI_CCR_IMODE) /*!<Instruction on four lines*/
Kojto 99:dbbf35b96557 299 /**
Kojto 99:dbbf35b96557 300 * @}
Kojto 99:dbbf35b96557 301 */
Kojto 99:dbbf35b96557 302
Kojto 99:dbbf35b96557 303 /** @defgroup QSPI_AddressMode QSPI Address Mode
Kojto 99:dbbf35b96557 304 * @{
Kojto 99:dbbf35b96557 305 */
Kojto 99:dbbf35b96557 306 #define QSPI_ADDRESS_NONE ((uint32_t)0x00000000) /*!<No address*/
Kojto 99:dbbf35b96557 307 #define QSPI_ADDRESS_1_LINE ((uint32_t)QUADSPI_CCR_ADMODE_0) /*!<Address on a single line*/
Kojto 99:dbbf35b96557 308 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
Kojto 99:dbbf35b96557 309 #define QSPI_ADDRESS_4_LINES ((uint32_t)QUADSPI_CCR_ADMODE) /*!<Address on four lines*/
Kojto 99:dbbf35b96557 310 /**
Kojto 99:dbbf35b96557 311 * @}
Kojto 99:dbbf35b96557 312 */
Kojto 99:dbbf35b96557 313
Kojto 99:dbbf35b96557 314 /** @defgroup QSPI_AlternateBytesMode QSPI Alternate Bytes Mode
Kojto 99:dbbf35b96557 315 * @{
Kojto 99:dbbf35b96557 316 */
Kojto 99:dbbf35b96557 317 #define QSPI_ALTERNATE_BYTES_NONE ((uint32_t)0x00000000) /*!<No alternate bytes*/
Kojto 99:dbbf35b96557 318 #define QSPI_ALTERNATE_BYTES_1_LINE ((uint32_t)QUADSPI_CCR_ABMODE_0) /*!<Alternate bytes on a single line*/
Kojto 99:dbbf35b96557 319 #define QSPI_ALTERNATE_BYTES_2_LINES ((uint32_t)QUADSPI_CCR_ABMODE_1) /*!<Alternate bytes on two lines*/
Kojto 99:dbbf35b96557 320 #define QSPI_ALTERNATE_BYTES_4_LINES ((uint32_t)QUADSPI_CCR_ABMODE) /*!<Alternate bytes on four lines*/
Kojto 99:dbbf35b96557 321 /**
Kojto 99:dbbf35b96557 322 * @}
Kojto 99:dbbf35b96557 323 */
Kojto 99:dbbf35b96557 324
Kojto 99:dbbf35b96557 325 /** @defgroup QSPI_DataMode QSPI Data Mode
Kojto 99:dbbf35b96557 326 * @{
Kojto 99:dbbf35b96557 327 */
Kojto 99:dbbf35b96557 328 #define QSPI_DATA_NONE ((uint32_t)0X00000000) /*!<No data*/
Kojto 99:dbbf35b96557 329 #define QSPI_DATA_1_LINE ((uint32_t)QUADSPI_CCR_DMODE_0) /*!<Data on a single line*/
Kojto 99:dbbf35b96557 330 #define QSPI_DATA_2_LINES ((uint32_t)QUADSPI_CCR_DMODE_1) /*!<Data on two lines*/
Kojto 99:dbbf35b96557 331 #define QSPI_DATA_4_LINES ((uint32_t)QUADSPI_CCR_DMODE) /*!<Data on four lines*/
Kojto 99:dbbf35b96557 332 /**
Kojto 99:dbbf35b96557 333 * @}
Kojto 99:dbbf35b96557 334 */
Kojto 99:dbbf35b96557 335
Kojto 99:dbbf35b96557 336 /** @defgroup QSPI_DdrMode QSPI Ddr Mode
Kojto 99:dbbf35b96557 337 * @{
Kojto 99:dbbf35b96557 338 */
Kojto 99:dbbf35b96557 339 #define QSPI_DDR_MODE_DISABLE ((uint32_t)0x00000000) /*!<Double data rate mode disabled*/
Kojto 99:dbbf35b96557 340 #define QSPI_DDR_MODE_ENABLE ((uint32_t)QUADSPI_CCR_DDRM) /*!<Double data rate mode enabled*/
Kojto 99:dbbf35b96557 341 /**
Kojto 99:dbbf35b96557 342 * @}
Kojto 99:dbbf35b96557 343 */
Kojto 99:dbbf35b96557 344
Kojto 99:dbbf35b96557 345 /** @defgroup QSPI_DdrHoldHalfCycle QSPI Ddr HoldHalfCycle
Kojto 99:dbbf35b96557 346 * @{
Kojto 99:dbbf35b96557 347 */
Kojto 99:dbbf35b96557 348 #define QSPI_DDR_HHC_ANALOG_DELAY ((uint32_t)0x00000000) /*!<Delay the data output using analog delay in DDR mode*/
Kojto 99:dbbf35b96557 349 #define QSPI_DDR_HHC_HALF_CLK_DELAY ((uint32_t)QUADSPI_CCR_DHHC) /*!<Delay the data output by 1/2 clock cycle in DDR mode*/
Kojto 99:dbbf35b96557 350 /**
Kojto 99:dbbf35b96557 351 * @}
Kojto 99:dbbf35b96557 352 */
Kojto 99:dbbf35b96557 353
Kojto 99:dbbf35b96557 354 /** @defgroup QSPI_SIOOMode QSPI SIOO Mode
Kojto 99:dbbf35b96557 355 * @{
Kojto 99:dbbf35b96557 356 */
Kojto 99:dbbf35b96557 357 #define QSPI_SIOO_INST_EVERY_CMD ((uint32_t)0x00000000) /*!<Send instruction on every transaction*/
Kojto 99:dbbf35b96557 358 #define QSPI_SIOO_INST_ONLY_FIRST_CMD ((uint32_t)QUADSPI_CCR_SIOO) /*!<Send instruction only for the first command*/
Kojto 99:dbbf35b96557 359 /**
Kojto 99:dbbf35b96557 360 * @}
Kojto 99:dbbf35b96557 361 */
Kojto 99:dbbf35b96557 362
Kojto 99:dbbf35b96557 363 /** @defgroup QSPI_MatchMode QSPI Match Mode
Kojto 99:dbbf35b96557 364 * @{
Kojto 99:dbbf35b96557 365 */
Kojto 99:dbbf35b96557 366 #define QSPI_MATCH_MODE_AND ((uint32_t)0x00000000) /*!<AND match mode between unmasked bits*/
Kojto 99:dbbf35b96557 367 #define QSPI_MATCH_MODE_OR ((uint32_t)QUADSPI_CR_PMM) /*!<OR match mode between unmasked bits*/
Kojto 99:dbbf35b96557 368 /**
Kojto 99:dbbf35b96557 369 * @}
Kojto 99:dbbf35b96557 370 */
Kojto 99:dbbf35b96557 371
Kojto 99:dbbf35b96557 372 /** @defgroup QSPI_AutomaticStop QSPI Automatic Stop
Kojto 99:dbbf35b96557 373 * @{
Kojto 99:dbbf35b96557 374 */
Kojto 99:dbbf35b96557 375 #define QSPI_AUTOMATIC_STOP_DISABLE ((uint32_t)0x00000000) /*!<AutoPolling stops only with abort or QSPI disabling*/
Kojto 99:dbbf35b96557 376 #define QSPI_AUTOMATIC_STOP_ENABLE ((uint32_t)QUADSPI_CR_APMS) /*!<AutoPolling stops as soon as there is a match*/
Kojto 99:dbbf35b96557 377 /**
Kojto 99:dbbf35b96557 378 * @}
Kojto 99:dbbf35b96557 379 */
Kojto 99:dbbf35b96557 380
Kojto 99:dbbf35b96557 381 /** @defgroup QSPI_TimeOutActivation QSPI TimeOut Activation
Kojto 99:dbbf35b96557 382 * @{
Kojto 99:dbbf35b96557 383 */
Kojto 99:dbbf35b96557 384 #define QSPI_TIMEOUT_COUNTER_DISABLE ((uint32_t)0x00000000) /*!<Timeout counter disabled, nCS remains active*/
Kojto 99:dbbf35b96557 385 #define QSPI_TIMEOUT_COUNTER_ENABLE ((uint32_t)QUADSPI_CR_TCEN) /*!<Timeout counter enabled, nCS released when timeout expires*/
Kojto 99:dbbf35b96557 386 /**
Kojto 99:dbbf35b96557 387 * @}
Kojto 99:dbbf35b96557 388 */
Kojto 99:dbbf35b96557 389
Kojto 99:dbbf35b96557 390 /** @defgroup QSPI_Flags QSPI Flags
Kojto 99:dbbf35b96557 391 * @{
Kojto 99:dbbf35b96557 392 */
Kojto 99:dbbf35b96557 393 #define QSPI_FLAG_BUSY QUADSPI_SR_BUSY /*!<Busy flag: operation is ongoing*/
Kojto 99:dbbf35b96557 394 #define QSPI_FLAG_TO QUADSPI_SR_TOF /*!<Timeout flag: timeout occurs in memory-mapped mode*/
Kojto 99:dbbf35b96557 395 #define QSPI_FLAG_SM QUADSPI_SR_SMF /*!<Status match flag: received data matches in autopolling mode*/
Kojto 99:dbbf35b96557 396 #define QSPI_FLAG_FT QUADSPI_SR_FTF /*!<Fifo threshold flag: Fifo threshold reached or data left after read from memory is complete*/
Kojto 99:dbbf35b96557 397 #define QSPI_FLAG_TC QUADSPI_SR_TCF /*!<Transfer complete flag: programmed number of data have been transferred or the transfer has been aborted*/
Kojto 99:dbbf35b96557 398 #define QSPI_FLAG_TE QUADSPI_SR_TEF /*!<Transfer error flag: invalid address is being accessed*/
Kojto 99:dbbf35b96557 399 /**
Kojto 99:dbbf35b96557 400 * @}
Kojto 99:dbbf35b96557 401 */
Kojto 99:dbbf35b96557 402
Kojto 99:dbbf35b96557 403 /** @defgroup QSPI_Interrupts QSPI Interrupts
Kojto 99:dbbf35b96557 404 * @{
Kojto 99:dbbf35b96557 405 */
Kojto 99:dbbf35b96557 406 #define QSPI_IT_TO QUADSPI_CR_TOIE /*!<Interrupt on the timeout flag*/
Kojto 99:dbbf35b96557 407 #define QSPI_IT_SM QUADSPI_CR_SMIE /*!<Interrupt on the status match flag*/
Kojto 99:dbbf35b96557 408 #define QSPI_IT_FT QUADSPI_CR_FTIE /*!<Interrupt on the fifo threshold flag*/
Kojto 99:dbbf35b96557 409 #define QSPI_IT_TC QUADSPI_CR_TCIE /*!<Interrupt on the transfer complete flag*/
Kojto 99:dbbf35b96557 410 #define QSPI_IT_TE QUADSPI_CR_TEIE /*!<Interrupt on the transfer error flag*/
Kojto 99:dbbf35b96557 411 /**
Kojto 99:dbbf35b96557 412 * @}
Kojto 99:dbbf35b96557 413 */
Kojto 99:dbbf35b96557 414
Kojto 99:dbbf35b96557 415 /** @defgroup QSPI_Timeout_definition QSPI Timeout definition
Kojto 99:dbbf35b96557 416 * @{
Kojto 99:dbbf35b96557 417 */
Kojto 99:dbbf35b96557 418 #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE ((uint32_t)5000)/* 5 s */
Kojto 99:dbbf35b96557 419 /**
Kojto 99:dbbf35b96557 420 * @}
Kojto 99:dbbf35b96557 421 */
Kojto 99:dbbf35b96557 422
Kojto 99:dbbf35b96557 423 /**
Kojto 99:dbbf35b96557 424 * @}
Kojto 99:dbbf35b96557 425 */
Kojto 99:dbbf35b96557 426
Kojto 99:dbbf35b96557 427 /* Exported macros -----------------------------------------------------------*/
Kojto 99:dbbf35b96557 428 /** @defgroup QSPI_Exported_Macros QSPI Exported Macros
Kojto 99:dbbf35b96557 429 * @{
Kojto 99:dbbf35b96557 430 */
Kojto 99:dbbf35b96557 431
Kojto 99:dbbf35b96557 432 /** @brief Reset QSPI handle state
Kojto 99:dbbf35b96557 433 * @param __HANDLE__: QSPI handle.
Kojto 99:dbbf35b96557 434 * @retval None
Kojto 99:dbbf35b96557 435 */
Kojto 99:dbbf35b96557 436 #define __HAL_QSPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_QSPI_STATE_RESET)
Kojto 99:dbbf35b96557 437
Kojto 99:dbbf35b96557 438 /** @brief Enable QSPI
Kojto 99:dbbf35b96557 439 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 440 * @retval None
Kojto 99:dbbf35b96557 441 */
Kojto 99:dbbf35b96557 442 #define __HAL_QSPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 99:dbbf35b96557 443
Kojto 99:dbbf35b96557 444 /** @brief Disable QSPI
Kojto 99:dbbf35b96557 445 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 446 * @retval None
Kojto 99:dbbf35b96557 447 */
Kojto 99:dbbf35b96557 448 #define __HAL_QSPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, QUADSPI_CR_EN)
Kojto 99:dbbf35b96557 449
Kojto 99:dbbf35b96557 450 /** @brief Enables the specified QSPI interrupt.
Kojto 99:dbbf35b96557 451 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 452 * @param __INTERRUPT__: specifies the QSPI interrupt source to enable.
Kojto 99:dbbf35b96557 453 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 454 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 99:dbbf35b96557 455 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 99:dbbf35b96557 456 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 99:dbbf35b96557 457 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 99:dbbf35b96557 458 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 99:dbbf35b96557 459 * @retval None
Kojto 99:dbbf35b96557 460 */
Kojto 99:dbbf35b96557 461 #define __HAL_QSPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 99:dbbf35b96557 462
Kojto 99:dbbf35b96557 463
Kojto 99:dbbf35b96557 464 /** @brief Disables the specified QSPI interrupt.
Kojto 99:dbbf35b96557 465 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 466 * @param __INTERRUPT__: specifies the QSPI interrupt source to disable.
Kojto 99:dbbf35b96557 467 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 468 * @arg QSPI_IT_TO: QSPI Timeout interrupt
Kojto 99:dbbf35b96557 469 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 99:dbbf35b96557 470 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 99:dbbf35b96557 471 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 99:dbbf35b96557 472 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 99:dbbf35b96557 473 * @retval None
Kojto 99:dbbf35b96557 474 */
Kojto 99:dbbf35b96557 475 #define __HAL_QSPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__))
Kojto 99:dbbf35b96557 476
Kojto 99:dbbf35b96557 477 /** @brief Checks whether the specified QSPI interrupt source is enabled.
Kojto 99:dbbf35b96557 478 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 479 * @param __INTERRUPT__: specifies the QSPI interrupt source to check.
Kojto 99:dbbf35b96557 480 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 481 * @arg QSPI_IT_TO: QSPI Time out interrupt
Kojto 99:dbbf35b96557 482 * @arg QSPI_IT_SM: QSPI Status match interrupt
Kojto 99:dbbf35b96557 483 * @arg QSPI_IT_FT: QSPI FIFO threshold interrupt
Kojto 99:dbbf35b96557 484 * @arg QSPI_IT_TC: QSPI Transfer complete interrupt
Kojto 99:dbbf35b96557 485 * @arg QSPI_IT_TE: QSPI Transfer error interrupt
Kojto 99:dbbf35b96557 486 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
Kojto 99:dbbf35b96557 487 */
Kojto 99:dbbf35b96557 488 #define __HAL_QSPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (READ_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) == (__INTERRUPT__))
Kojto 99:dbbf35b96557 489
Kojto 99:dbbf35b96557 490 /**
Kojto 99:dbbf35b96557 491 * @brief Get the selected QSPI's flag status.
Kojto 99:dbbf35b96557 492 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 493 * @param __FLAG__: specifies the QSPI flag to check.
Kojto 99:dbbf35b96557 494 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 495 * @arg QSPI_FLAG_BUSY: QSPI Busy flag
Kojto 99:dbbf35b96557 496 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 99:dbbf35b96557 497 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 99:dbbf35b96557 498 * @arg QSPI_FLAG_FT: QSPI FIFO threshold flag
Kojto 99:dbbf35b96557 499 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 99:dbbf35b96557 500 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 99:dbbf35b96557 501 * @retval None
Kojto 99:dbbf35b96557 502 */
Kojto 99:dbbf35b96557 503 #define __HAL_QSPI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->SR, (__FLAG__)) != 0)
Kojto 99:dbbf35b96557 504
Kojto 99:dbbf35b96557 505 /** @brief Clears the specified QSPI's flag status.
Kojto 99:dbbf35b96557 506 * @param __HANDLE__: specifies the QSPI Handle.
Kojto 99:dbbf35b96557 507 * @param __FLAG__: specifies the QSPI clear register flag that needs to be set
Kojto 99:dbbf35b96557 508 * This parameter can be one of the following values:
Kojto 99:dbbf35b96557 509 * @arg QSPI_FLAG_TO: QSPI Time out flag
Kojto 99:dbbf35b96557 510 * @arg QSPI_FLAG_SM: QSPI Status match flag
Kojto 99:dbbf35b96557 511 * @arg QSPI_FLAG_TC: QSPI Transfer complete flag
Kojto 99:dbbf35b96557 512 * @arg QSPI_FLAG_TE: QSPI Transfer error flag
Kojto 99:dbbf35b96557 513 * @retval None
Kojto 99:dbbf35b96557 514 */
Kojto 99:dbbf35b96557 515 #define __HAL_QSPI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->FCR, (__FLAG__))
Kojto 99:dbbf35b96557 516 /**
Kojto 99:dbbf35b96557 517 * @}
Kojto 99:dbbf35b96557 518 */
Kojto 99:dbbf35b96557 519
Kojto 99:dbbf35b96557 520 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 521 /** @addtogroup QSPI_Exported_Functions
Kojto 99:dbbf35b96557 522 * @{
Kojto 99:dbbf35b96557 523 */
Kojto 99:dbbf35b96557 524
Kojto 99:dbbf35b96557 525 /** @addtogroup QSPI_Exported_Functions_Group1
Kojto 99:dbbf35b96557 526 * @{
Kojto 99:dbbf35b96557 527 */
Kojto 99:dbbf35b96557 528 /* Initialization/de-initialization functions ********************************/
Kojto 99:dbbf35b96557 529 HAL_StatusTypeDef HAL_QSPI_Init (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 530 HAL_StatusTypeDef HAL_QSPI_DeInit (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 531 void HAL_QSPI_MspInit (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 532 void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 533 /**
Kojto 99:dbbf35b96557 534 * @}
Kojto 99:dbbf35b96557 535 */
Kojto 99:dbbf35b96557 536
Kojto 99:dbbf35b96557 537 /** @addtogroup QSPI_Exported_Functions_Group2
Kojto 99:dbbf35b96557 538 * @{
Kojto 99:dbbf35b96557 539 */
Kojto 99:dbbf35b96557 540 /* IO operation functions *****************************************************/
Kojto 99:dbbf35b96557 541 /* QSPI IRQ handler method */
Kojto 99:dbbf35b96557 542 void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 543
Kojto 99:dbbf35b96557 544 /* QSPI indirect mode */
Kojto 99:dbbf35b96557 545 HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout);
Kojto 99:dbbf35b96557 546 HAL_StatusTypeDef HAL_QSPI_Transmit (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 99:dbbf35b96557 547 HAL_StatusTypeDef HAL_QSPI_Receive (QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout);
Kojto 99:dbbf35b96557 548 HAL_StatusTypeDef HAL_QSPI_Command_IT (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd);
Kojto 99:dbbf35b96557 549 HAL_StatusTypeDef HAL_QSPI_Transmit_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 99:dbbf35b96557 550 HAL_StatusTypeDef HAL_QSPI_Receive_IT (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 99:dbbf35b96557 551 HAL_StatusTypeDef HAL_QSPI_Transmit_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 99:dbbf35b96557 552 HAL_StatusTypeDef HAL_QSPI_Receive_DMA (QSPI_HandleTypeDef *hqspi, uint8_t *pData);
Kojto 99:dbbf35b96557 553
Kojto 99:dbbf35b96557 554 /* QSPI status flag polling mode */
Kojto 99:dbbf35b96557 555 HAL_StatusTypeDef HAL_QSPI_AutoPolling (QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout);
Kojto 99:dbbf35b96557 556 HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg);
Kojto 99:dbbf35b96557 557
Kojto 99:dbbf35b96557 558 /* QSPI memory-mapped mode */
Kojto 99:dbbf35b96557 559 HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg);
Kojto 99:dbbf35b96557 560 /**
Kojto 99:dbbf35b96557 561 * @}
Kojto 99:dbbf35b96557 562 */
Kojto 99:dbbf35b96557 563
Kojto 99:dbbf35b96557 564 /** @addtogroup QSPI_Exported_Functions_Group3
Kojto 99:dbbf35b96557 565 * @{
Kojto 99:dbbf35b96557 566 */
Kojto 99:dbbf35b96557 567 /* Callback functions in non-blocking modes ***********************************/
Kojto 99:dbbf35b96557 568 void HAL_QSPI_ErrorCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 569 void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 570
Kojto 99:dbbf35b96557 571 /* QSPI indirect mode */
Kojto 99:dbbf35b96557 572 void HAL_QSPI_CmdCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 573 void HAL_QSPI_RxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 574 void HAL_QSPI_TxCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 575 void HAL_QSPI_RxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 576 void HAL_QSPI_TxHalfCpltCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 577
Kojto 99:dbbf35b96557 578 /* QSPI status flag polling mode */
Kojto 99:dbbf35b96557 579 void HAL_QSPI_StatusMatchCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 580
Kojto 99:dbbf35b96557 581 /* QSPI memory-mapped mode */
Kojto 99:dbbf35b96557 582 void HAL_QSPI_TimeOutCallback (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 583 /**
Kojto 99:dbbf35b96557 584 * @}
Kojto 99:dbbf35b96557 585 */
Kojto 99:dbbf35b96557 586
Kojto 99:dbbf35b96557 587 /** @addtogroup QSPI_Exported_Functions_Group4
Kojto 99:dbbf35b96557 588 * @{
Kojto 99:dbbf35b96557 589 */
Kojto 99:dbbf35b96557 590 /* Peripheral Control and State functions ************************************/
Kojto 99:dbbf35b96557 591 HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 592 uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 593 HAL_StatusTypeDef HAL_QSPI_Abort (QSPI_HandleTypeDef *hqspi);
Kojto 99:dbbf35b96557 594 void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout);
Kojto 99:dbbf35b96557 595 /**
Kojto 99:dbbf35b96557 596 * @}
Kojto 99:dbbf35b96557 597 */
Kojto 99:dbbf35b96557 598
Kojto 99:dbbf35b96557 599 /**
Kojto 99:dbbf35b96557 600 * @}
Kojto 99:dbbf35b96557 601 */
Kojto 99:dbbf35b96557 602
Kojto 99:dbbf35b96557 603 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 604 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 605 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 606 /** @defgroup QSPI_Private_Constants QSPI Private Constants
Kojto 99:dbbf35b96557 607 * @{
Kojto 99:dbbf35b96557 608 */
Kojto 99:dbbf35b96557 609
Kojto 99:dbbf35b96557 610 /**
Kojto 99:dbbf35b96557 611 * @}
Kojto 99:dbbf35b96557 612 */
Kojto 99:dbbf35b96557 613
Kojto 99:dbbf35b96557 614 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 615 /** @defgroup QSPI_Private_Macros QSPI Private Macros
Kojto 99:dbbf35b96557 616 * @{
Kojto 99:dbbf35b96557 617 */
Kojto 99:dbbf35b96557 618 /** @defgroup QSPI_ClockPrescaler QSPI Clock Prescaler
Kojto 99:dbbf35b96557 619 * @{
Kojto 99:dbbf35b96557 620 */
Kojto 99:dbbf35b96557 621 #define IS_QSPI_CLOCK_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFF)
Kojto 99:dbbf35b96557 622 /**
Kojto 99:dbbf35b96557 623 * @}
Kojto 99:dbbf35b96557 624 */
Kojto 99:dbbf35b96557 625
Kojto 99:dbbf35b96557 626 /** @defgroup QSPI_FifoThreshold QSPI Fifo Threshold
Kojto 99:dbbf35b96557 627 * @{
Kojto 99:dbbf35b96557 628 */
Kojto 99:dbbf35b96557 629 #define IS_QSPI_FIFO_THRESHOLD(THR) (((THR) > 0) && ((THR) <= 32))
Kojto 99:dbbf35b96557 630 /**
Kojto 99:dbbf35b96557 631 * @}
Kojto 99:dbbf35b96557 632 */
Kojto 99:dbbf35b96557 633
Kojto 99:dbbf35b96557 634 #define IS_QSPI_SSHIFT(SSHIFT) (((SSHIFT) == QSPI_SAMPLE_SHIFTING_NONE) || \
Kojto 99:dbbf35b96557 635 ((SSHIFT) == QSPI_SAMPLE_SHIFTING_HALFCYCLE))
Kojto 99:dbbf35b96557 636
Kojto 99:dbbf35b96557 637 /** @defgroup QSPI_FlashSize QSPI Flash Size
Kojto 99:dbbf35b96557 638 * @{
Kojto 99:dbbf35b96557 639 */
Kojto 99:dbbf35b96557 640 #define IS_QSPI_FLASH_SIZE(FSIZE) (((FSIZE) <= 31))
Kojto 99:dbbf35b96557 641 /**
Kojto 99:dbbf35b96557 642 * @}
Kojto 99:dbbf35b96557 643 */
Kojto 99:dbbf35b96557 644
Kojto 99:dbbf35b96557 645 #define IS_QSPI_CS_HIGH_TIME(CSHTIME) (((CSHTIME) == QSPI_CS_HIGH_TIME_1_CYCLE) || \
Kojto 99:dbbf35b96557 646 ((CSHTIME) == QSPI_CS_HIGH_TIME_2_CYCLE) || \
Kojto 99:dbbf35b96557 647 ((CSHTIME) == QSPI_CS_HIGH_TIME_3_CYCLE) || \
Kojto 99:dbbf35b96557 648 ((CSHTIME) == QSPI_CS_HIGH_TIME_4_CYCLE) || \
Kojto 99:dbbf35b96557 649 ((CSHTIME) == QSPI_CS_HIGH_TIME_5_CYCLE) || \
Kojto 99:dbbf35b96557 650 ((CSHTIME) == QSPI_CS_HIGH_TIME_6_CYCLE) || \
Kojto 99:dbbf35b96557 651 ((CSHTIME) == QSPI_CS_HIGH_TIME_7_CYCLE) || \
Kojto 99:dbbf35b96557 652 ((CSHTIME) == QSPI_CS_HIGH_TIME_8_CYCLE))
Kojto 99:dbbf35b96557 653
Kojto 99:dbbf35b96557 654 #define IS_QSPI_CLOCK_MODE(CLKMODE) (((CLKMODE) == QSPI_CLOCK_MODE_0) || \
Kojto 99:dbbf35b96557 655 ((CLKMODE) == QSPI_CLOCK_MODE_3))
Kojto 99:dbbf35b96557 656
Kojto 99:dbbf35b96557 657 #define IS_QSPI_FLASH_ID(FLA) (((FLA) == QSPI_FLASH_ID_1) || \
Kojto 99:dbbf35b96557 658 ((FLA) == QSPI_FLASH_ID_2))
Kojto 99:dbbf35b96557 659
Kojto 99:dbbf35b96557 660 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \
Kojto 99:dbbf35b96557 661 ((MODE) == QSPI_DUALFLASH_DISABLE))
Kojto 99:dbbf35b96557 662
Kojto 99:dbbf35b96557 663
Kojto 99:dbbf35b96557 664 /** @defgroup QSPI_Instruction QSPI Instruction
Kojto 99:dbbf35b96557 665 * @{
Kojto 99:dbbf35b96557 666 */
Kojto 99:dbbf35b96557 667 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF)
Kojto 99:dbbf35b96557 668 /**
Kojto 99:dbbf35b96557 669 * @}
Kojto 99:dbbf35b96557 670 */
Kojto 99:dbbf35b96557 671
Kojto 99:dbbf35b96557 672 #define IS_QSPI_ADDRESS_SIZE(ADDR_SIZE) (((ADDR_SIZE) == QSPI_ADDRESS_8_BITS) || \
Kojto 99:dbbf35b96557 673 ((ADDR_SIZE) == QSPI_ADDRESS_16_BITS) || \
Kojto 99:dbbf35b96557 674 ((ADDR_SIZE) == QSPI_ADDRESS_24_BITS) || \
Kojto 99:dbbf35b96557 675 ((ADDR_SIZE) == QSPI_ADDRESS_32_BITS))
Kojto 99:dbbf35b96557 676
Kojto 99:dbbf35b96557 677 #define IS_QSPI_ALTERNATE_BYTES_SIZE(SIZE) (((SIZE) == QSPI_ALTERNATE_BYTES_8_BITS) || \
Kojto 99:dbbf35b96557 678 ((SIZE) == QSPI_ALTERNATE_BYTES_16_BITS) || \
Kojto 99:dbbf35b96557 679 ((SIZE) == QSPI_ALTERNATE_BYTES_24_BITS) || \
Kojto 99:dbbf35b96557 680 ((SIZE) == QSPI_ALTERNATE_BYTES_32_BITS))
Kojto 99:dbbf35b96557 681
Kojto 99:dbbf35b96557 682
Kojto 99:dbbf35b96557 683 /** @defgroup QSPI_DummyCycles QSPI Dummy Cycles
Kojto 99:dbbf35b96557 684 * @{
Kojto 99:dbbf35b96557 685 */
Kojto 99:dbbf35b96557 686 #define IS_QSPI_DUMMY_CYCLES(DCY) ((DCY) <= 31)
Kojto 99:dbbf35b96557 687 /**
Kojto 99:dbbf35b96557 688 * @}
Kojto 99:dbbf35b96557 689 */
Kojto 99:dbbf35b96557 690
Kojto 99:dbbf35b96557 691 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \
Kojto 99:dbbf35b96557 692 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
Kojto 99:dbbf35b96557 693 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
Kojto 99:dbbf35b96557 694 ((MODE) == QSPI_INSTRUCTION_4_LINES))
Kojto 99:dbbf35b96557 695
Kojto 99:dbbf35b96557 696 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \
Kojto 99:dbbf35b96557 697 ((MODE) == QSPI_ADDRESS_1_LINE) || \
Kojto 99:dbbf35b96557 698 ((MODE) == QSPI_ADDRESS_2_LINES) || \
Kojto 99:dbbf35b96557 699 ((MODE) == QSPI_ADDRESS_4_LINES))
Kojto 99:dbbf35b96557 700
Kojto 99:dbbf35b96557 701 #define IS_QSPI_ALTERNATE_BYTES_MODE(MODE) (((MODE) == QSPI_ALTERNATE_BYTES_NONE) || \
Kojto 99:dbbf35b96557 702 ((MODE) == QSPI_ALTERNATE_BYTES_1_LINE) || \
Kojto 99:dbbf35b96557 703 ((MODE) == QSPI_ALTERNATE_BYTES_2_LINES) || \
Kojto 99:dbbf35b96557 704 ((MODE) == QSPI_ALTERNATE_BYTES_4_LINES))
Kojto 99:dbbf35b96557 705
Kojto 99:dbbf35b96557 706 #define IS_QSPI_DATA_MODE(MODE) (((MODE) == QSPI_DATA_NONE) || \
Kojto 99:dbbf35b96557 707 ((MODE) == QSPI_DATA_1_LINE) || \
Kojto 99:dbbf35b96557 708 ((MODE) == QSPI_DATA_2_LINES) || \
Kojto 99:dbbf35b96557 709 ((MODE) == QSPI_DATA_4_LINES))
Kojto 99:dbbf35b96557 710
Kojto 99:dbbf35b96557 711 #define IS_QSPI_DDR_MODE(DDR_MODE) (((DDR_MODE) == QSPI_DDR_MODE_DISABLE) || \
Kojto 99:dbbf35b96557 712 ((DDR_MODE) == QSPI_DDR_MODE_ENABLE))
Kojto 99:dbbf35b96557 713
Kojto 99:dbbf35b96557 714 #define IS_QSPI_DDR_HHC(DDR_HHC) (((DDR_HHC) == QSPI_DDR_HHC_ANALOG_DELAY) || \
Kojto 99:dbbf35b96557 715 ((DDR_HHC) == QSPI_DDR_HHC_HALF_CLK_DELAY))
Kojto 99:dbbf35b96557 716
Kojto 99:dbbf35b96557 717 #define IS_QSPI_SIOO_MODE(SIOO_MODE) (((SIOO_MODE) == QSPI_SIOO_INST_EVERY_CMD) || \
Kojto 99:dbbf35b96557 718 ((SIOO_MODE) == QSPI_SIOO_INST_ONLY_FIRST_CMD))
Kojto 99:dbbf35b96557 719
Kojto 99:dbbf35b96557 720 /** @defgroup QSPI_Interval QSPI Interval
Kojto 99:dbbf35b96557 721 * @{
Kojto 99:dbbf35b96557 722 */
Kojto 99:dbbf35b96557 723 #define IS_QSPI_INTERVAL(INTERVAL) ((INTERVAL) <= QUADSPI_PIR_INTERVAL)
Kojto 99:dbbf35b96557 724 /**
Kojto 99:dbbf35b96557 725 * @}
Kojto 99:dbbf35b96557 726 */
Kojto 99:dbbf35b96557 727
Kojto 99:dbbf35b96557 728 /** @defgroup QSPI_StatusBytesSize QSPI Status Bytes Size
Kojto 99:dbbf35b96557 729 * @{
Kojto 99:dbbf35b96557 730 */
Kojto 99:dbbf35b96557 731 #define IS_QSPI_STATUS_BYTES_SIZE(SIZE) (((SIZE) >= 1) && ((SIZE) <= 4))
Kojto 99:dbbf35b96557 732 /**
Kojto 99:dbbf35b96557 733 * @}
Kojto 99:dbbf35b96557 734 */
Kojto 99:dbbf35b96557 735 #define IS_QSPI_MATCH_MODE(MODE) (((MODE) == QSPI_MATCH_MODE_AND) || \
Kojto 99:dbbf35b96557 736 ((MODE) == QSPI_MATCH_MODE_OR))
Kojto 99:dbbf35b96557 737
Kojto 99:dbbf35b96557 738 #define IS_QSPI_AUTOMATIC_STOP(APMS) (((APMS) == QSPI_AUTOMATIC_STOP_DISABLE) || \
Kojto 99:dbbf35b96557 739 ((APMS) == QSPI_AUTOMATIC_STOP_ENABLE))
Kojto 99:dbbf35b96557 740
Kojto 99:dbbf35b96557 741 #define IS_QSPI_TIMEOUT_ACTIVATION(TCEN) (((TCEN) == QSPI_TIMEOUT_COUNTER_DISABLE) || \
Kojto 99:dbbf35b96557 742 ((TCEN) == QSPI_TIMEOUT_COUNTER_ENABLE))
Kojto 99:dbbf35b96557 743
Kojto 99:dbbf35b96557 744 /** @defgroup QSPI_TimeOutPeriod QSPI TimeOut Period
Kojto 99:dbbf35b96557 745 * @{
Kojto 99:dbbf35b96557 746 */
Kojto 99:dbbf35b96557 747 #define IS_QSPI_TIMEOUT_PERIOD(PERIOD) ((PERIOD) <= 0xFFFF)
Kojto 99:dbbf35b96557 748 /**
Kojto 99:dbbf35b96557 749 * @}
Kojto 99:dbbf35b96557 750 */
Kojto 99:dbbf35b96557 751
Kojto 99:dbbf35b96557 752 #define IS_QSPI_GET_FLAG(FLAG) (((FLAG) == QSPI_FLAG_BUSY) || \
Kojto 99:dbbf35b96557 753 ((FLAG) == QSPI_FLAG_TO) || \
Kojto 99:dbbf35b96557 754 ((FLAG) == QSPI_FLAG_SM) || \
Kojto 99:dbbf35b96557 755 ((FLAG) == QSPI_FLAG_FT) || \
Kojto 99:dbbf35b96557 756 ((FLAG) == QSPI_FLAG_TC) || \
Kojto 99:dbbf35b96557 757 ((FLAG) == QSPI_FLAG_TE))
Kojto 99:dbbf35b96557 758
Kojto 99:dbbf35b96557 759 #define IS_QSPI_IT(IT) ((((IT) & (uint32_t)0xFFE0FFFF) == 0x00000000) && ((IT) != 0x00000000))
Kojto 99:dbbf35b96557 760 /**
Kojto 99:dbbf35b96557 761 * @}
Kojto 99:dbbf35b96557 762 */
Kojto 99:dbbf35b96557 763
Kojto 99:dbbf35b96557 764 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 765 /** @defgroup QSPI_Private_Functions QSPI Private Functions
Kojto 99:dbbf35b96557 766 * @{
Kojto 99:dbbf35b96557 767 */
Kojto 99:dbbf35b96557 768
Kojto 99:dbbf35b96557 769 /**
Kojto 99:dbbf35b96557 770 * @}
Kojto 99:dbbf35b96557 771 */
Kojto 99:dbbf35b96557 772
Kojto 99:dbbf35b96557 773 /**
Kojto 99:dbbf35b96557 774 * @}
Kojto 99:dbbf35b96557 775 */
Kojto 99:dbbf35b96557 776
Kojto 99:dbbf35b96557 777 /**
Kojto 99:dbbf35b96557 778 * @}
Kojto 99:dbbf35b96557 779 */
Kojto 110:165afa46840b 780 #endif /* STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 99:dbbf35b96557 781
Kojto 99:dbbf35b96557 782 #ifdef __cplusplus
Kojto 99:dbbf35b96557 783 }
Kojto 99:dbbf35b96557 784 #endif
Kojto 99:dbbf35b96557 785
Kojto 99:dbbf35b96557 786 #endif /* __STM32F4xx_HAL_QSPI_H */
Kojto 99:dbbf35b96557 787
Kojto 99:dbbf35b96557 788 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/