Elijah Orr / mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents:   1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

Fork of mbed by mbed official

TARGET_ARCH_MAX/stm32f4xx_hal_tim_ex.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:
bogdanm
Date:
Fri Sep 12 16:41:52 2014 +0100
Revision:
89:552587b429a1
Child:
92:4fc01daae5a5
Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_tim_ex.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 89:552587b429a1 5 * @version V1.1.0RC2
bogdanm 89:552587b429a1 6 * @date 14-May-2014
bogdanm 89:552587b429a1 7 * @brief Header file of TIM HAL Extension module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_TIM_EX_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup TIMEx
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 /**
bogdanm 89:552587b429a1 60 * @brief TIM Hall sensor Configuration Structure definition
bogdanm 89:552587b429a1 61 */
bogdanm 89:552587b429a1 62
bogdanm 89:552587b429a1 63 typedef struct
bogdanm 89:552587b429a1 64 {
bogdanm 89:552587b429a1 65
bogdanm 89:552587b429a1 66 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
bogdanm 89:552587b429a1 67 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
bogdanm 89:552587b429a1 68
bogdanm 89:552587b429a1 69 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
bogdanm 89:552587b429a1 70 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
bogdanm 89:552587b429a1 71
bogdanm 89:552587b429a1 72 uint32_t IC1Filter; /*!< Specifies the input capture filter.
bogdanm 89:552587b429a1 73 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
bogdanm 89:552587b429a1 74 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
bogdanm 89:552587b429a1 75 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
bogdanm 89:552587b429a1 76 } TIM_HallSensor_InitTypeDef;
bogdanm 89:552587b429a1 77
bogdanm 89:552587b429a1 78 /**
bogdanm 89:552587b429a1 79 * @brief TIM Master configuration Structure definition
bogdanm 89:552587b429a1 80 */
bogdanm 89:552587b429a1 81 typedef struct {
bogdanm 89:552587b429a1 82 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
bogdanm 89:552587b429a1 83 This parameter can be a value of @ref TIMEx_Master_Mode_Selection */
bogdanm 89:552587b429a1 84 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
bogdanm 89:552587b429a1 85 This parameter can be a value of @ref TIMEx_Master_Slave_Mode */
bogdanm 89:552587b429a1 86 }TIM_MasterConfigTypeDef;
bogdanm 89:552587b429a1 87
bogdanm 89:552587b429a1 88 /**
bogdanm 89:552587b429a1 89 * @brief TIM Break and Dead time configuration Structure definition
bogdanm 89:552587b429a1 90 */
bogdanm 89:552587b429a1 91 typedef struct
bogdanm 89:552587b429a1 92 {
bogdanm 89:552587b429a1 93 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
bogdanm 89:552587b429a1 94 This parameter can be a value of @ref TIMEx_OSSR_Off_State_Selection_for_Run_mode_state */
bogdanm 89:552587b429a1 95 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
bogdanm 89:552587b429a1 96 This parameter can be a value of @ref TIMEx_OSSI_Off_State_Selection_for_Idle_mode_state */
bogdanm 89:552587b429a1 97 uint32_t LockLevel; /*!< TIM Lock level.
bogdanm 89:552587b429a1 98 This parameter can be a value of @ref TIMEx_Lock_level */
bogdanm 89:552587b429a1 99 uint32_t DeadTime; /*!< TIM dead Time.
bogdanm 89:552587b429a1 100 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
bogdanm 89:552587b429a1 101 uint32_t BreakState; /*!< TIM Break State.
bogdanm 89:552587b429a1 102 This parameter can be a value of @ref TIMEx_Break_Input_enable_disable */
bogdanm 89:552587b429a1 103 uint32_t BreakPolarity; /*!< TIM Break input polarity.
bogdanm 89:552587b429a1 104 This parameter can be a value of @ref TIMEx_Break_Polarity */
bogdanm 89:552587b429a1 105 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
bogdanm 89:552587b429a1 106 This parameter can be a value of @ref TIMEx_AOE_Bit_Set_Reset */
bogdanm 89:552587b429a1 107 }TIM_BreakDeadTimeConfigTypeDef;
bogdanm 89:552587b429a1 108
bogdanm 89:552587b429a1 109 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 110 /** @defgroup TIMEx_Exported_Constants
bogdanm 89:552587b429a1 111 * @{
bogdanm 89:552587b429a1 112 */
bogdanm 89:552587b429a1 113 /** @defgroup TIMEx_OSSR_Off_State_Selection_for_Run_mode_state
bogdanm 89:552587b429a1 114 * @{
bogdanm 89:552587b429a1 115 */
bogdanm 89:552587b429a1 116 #define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
bogdanm 89:552587b429a1 117 #define TIM_OSSR_DISABLE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 118
bogdanm 89:552587b429a1 119 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) || \
bogdanm 89:552587b429a1 120 ((STATE) == TIM_OSSR_DISABLE))
bogdanm 89:552587b429a1 121 /**
bogdanm 89:552587b429a1 122 * @}
bogdanm 89:552587b429a1 123 */
bogdanm 89:552587b429a1 124
bogdanm 89:552587b429a1 125 /** @defgroup TIMEx_OSSI_Off_State_Selection_for_Idle_mode_state
bogdanm 89:552587b429a1 126 * @{
bogdanm 89:552587b429a1 127 */
bogdanm 89:552587b429a1 128 #define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
bogdanm 89:552587b429a1 129 #define TIM_OSSI_DISABLE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 130
bogdanm 89:552587b429a1 131 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) || \
bogdanm 89:552587b429a1 132 ((STATE) == TIM_OSSI_DISABLE))
bogdanm 89:552587b429a1 133 /**
bogdanm 89:552587b429a1 134 * @}
bogdanm 89:552587b429a1 135 */
bogdanm 89:552587b429a1 136 /** @defgroup TIMEx_Lock_level
bogdanm 89:552587b429a1 137 * @{
bogdanm 89:552587b429a1 138 */
bogdanm 89:552587b429a1 139 #define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
bogdanm 89:552587b429a1 140 #define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
bogdanm 89:552587b429a1 141 #define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
bogdanm 89:552587b429a1 142 #define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
bogdanm 89:552587b429a1 143
bogdanm 89:552587b429a1 144 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) || \
bogdanm 89:552587b429a1 145 ((LEVEL) == TIM_LOCKLEVEL_1) || \
bogdanm 89:552587b429a1 146 ((LEVEL) == TIM_LOCKLEVEL_2) || \
bogdanm 89:552587b429a1 147 ((LEVEL) == TIM_LOCKLEVEL_3))
bogdanm 89:552587b429a1 148 /**
bogdanm 89:552587b429a1 149 * @}
bogdanm 89:552587b429a1 150 */
bogdanm 89:552587b429a1 151 /** @defgroup TIMEx_Break_Input_enable_disable
bogdanm 89:552587b429a1 152 * @{
bogdanm 89:552587b429a1 153 */
bogdanm 89:552587b429a1 154 #define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
bogdanm 89:552587b429a1 155 #define TIM_BREAK_DISABLE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 156
bogdanm 89:552587b429a1 157 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) || \
bogdanm 89:552587b429a1 158 ((STATE) == TIM_BREAK_DISABLE))
bogdanm 89:552587b429a1 159 /**
bogdanm 89:552587b429a1 160 * @}
bogdanm 89:552587b429a1 161 */
bogdanm 89:552587b429a1 162 /** @defgroup TIMEx_Break_Polarity
bogdanm 89:552587b429a1 163 * @{
bogdanm 89:552587b429a1 164 */
bogdanm 89:552587b429a1 165 #define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
bogdanm 89:552587b429a1 166 #define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
bogdanm 89:552587b429a1 167
bogdanm 89:552587b429a1 168 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) || \
bogdanm 89:552587b429a1 169 ((POLARITY) == TIM_BREAKPOLARITY_HIGH))
bogdanm 89:552587b429a1 170 /**
bogdanm 89:552587b429a1 171 * @}
bogdanm 89:552587b429a1 172 */
bogdanm 89:552587b429a1 173 /** @defgroup TIMEx_AOE_Bit_Set_Reset
bogdanm 89:552587b429a1 174 * @{
bogdanm 89:552587b429a1 175 */
bogdanm 89:552587b429a1 176 #define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
bogdanm 89:552587b429a1 177 #define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 178
bogdanm 89:552587b429a1 179 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) || \
bogdanm 89:552587b429a1 180 ((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
bogdanm 89:552587b429a1 181 /**
bogdanm 89:552587b429a1 182 * @}
bogdanm 89:552587b429a1 183 */
bogdanm 89:552587b429a1 184
bogdanm 89:552587b429a1 185 /** @defgroup TIMEx_Master_Mode_Selection
bogdanm 89:552587b429a1 186 * @{
bogdanm 89:552587b429a1 187 */
bogdanm 89:552587b429a1 188 #define TIM_TRGO_RESET ((uint32_t)0x0000)
bogdanm 89:552587b429a1 189 #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
bogdanm 89:552587b429a1 190 #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
bogdanm 89:552587b429a1 191 #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
bogdanm 89:552587b429a1 192 #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
bogdanm 89:552587b429a1 193 #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
bogdanm 89:552587b429a1 194 #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
bogdanm 89:552587b429a1 195 #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
bogdanm 89:552587b429a1 196
bogdanm 89:552587b429a1 197 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) || \
bogdanm 89:552587b429a1 198 ((SOURCE) == TIM_TRGO_ENABLE) || \
bogdanm 89:552587b429a1 199 ((SOURCE) == TIM_TRGO_UPDATE) || \
bogdanm 89:552587b429a1 200 ((SOURCE) == TIM_TRGO_OC1) || \
bogdanm 89:552587b429a1 201 ((SOURCE) == TIM_TRGO_OC1REF) || \
bogdanm 89:552587b429a1 202 ((SOURCE) == TIM_TRGO_OC2REF) || \
bogdanm 89:552587b429a1 203 ((SOURCE) == TIM_TRGO_OC3REF) || \
bogdanm 89:552587b429a1 204 ((SOURCE) == TIM_TRGO_OC4REF))
bogdanm 89:552587b429a1 205
bogdanm 89:552587b429a1 206
bogdanm 89:552587b429a1 207 /**
bogdanm 89:552587b429a1 208 * @}
bogdanm 89:552587b429a1 209 */
bogdanm 89:552587b429a1 210
bogdanm 89:552587b429a1 211 /** @defgroup TIMEx_Master_Slave_Mode
bogdanm 89:552587b429a1 212 * @{
bogdanm 89:552587b429a1 213 */
bogdanm 89:552587b429a1 214
bogdanm 89:552587b429a1 215 #define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
bogdanm 89:552587b429a1 216 #define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 217 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) || \
bogdanm 89:552587b429a1 218 ((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
bogdanm 89:552587b429a1 219 /**
bogdanm 89:552587b429a1 220 * @}
bogdanm 89:552587b429a1 221 */
bogdanm 89:552587b429a1 222
bogdanm 89:552587b429a1 223 /** @defgroup TIMEx_Commutation_Mode
bogdanm 89:552587b429a1 224 * @{
bogdanm 89:552587b429a1 225 */
bogdanm 89:552587b429a1 226 #define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
bogdanm 89:552587b429a1 227 #define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
bogdanm 89:552587b429a1 228 /**
bogdanm 89:552587b429a1 229 * @}
bogdanm 89:552587b429a1 230 */
bogdanm 89:552587b429a1 231
bogdanm 89:552587b429a1 232 /** @defgroup TIMEx_Remap
bogdanm 89:552587b429a1 233 * @{
bogdanm 89:552587b429a1 234 */
bogdanm 89:552587b429a1 235
bogdanm 89:552587b429a1 236 #define TIM_TIM2_TIM8_TRGO (0x00000000)
bogdanm 89:552587b429a1 237 #define TIM_TIM2_ETH_PTP (0x00000400)
bogdanm 89:552587b429a1 238 #define TIM_TIM2_USBFS_SOF (0x00000800)
bogdanm 89:552587b429a1 239 #define TIM_TIM2_USBHS_SOF (0x00000C00)
bogdanm 89:552587b429a1 240 #define TIM_TIM5_GPIO (0x00000000)
bogdanm 89:552587b429a1 241 #define TIM_TIM5_LSI (0x00000040)
bogdanm 89:552587b429a1 242 #define TIM_TIM5_LSE (0x00000080)
bogdanm 89:552587b429a1 243 #define TIM_TIM5_RTC (0x000000C0)
bogdanm 89:552587b429a1 244 #define TIM_TIM11_GPIO (0x00000000)
bogdanm 89:552587b429a1 245 #define TIM_TIM11_HSE (0x00000002)
bogdanm 89:552587b429a1 246
bogdanm 89:552587b429a1 247 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
bogdanm 89:552587b429a1 248 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
bogdanm 89:552587b429a1 249 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
bogdanm 89:552587b429a1 250 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
bogdanm 89:552587b429a1 251 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
bogdanm 89:552587b429a1 252 ((TIM_REMAP) == TIM_TIM5_LSI)||\
bogdanm 89:552587b429a1 253 ((TIM_REMAP) == TIM_TIM5_LSE)||\
bogdanm 89:552587b429a1 254 ((TIM_REMAP) == TIM_TIM5_RTC)||\
bogdanm 89:552587b429a1 255 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
bogdanm 89:552587b429a1 256 ((TIM_REMAP) == TIM_TIM11_HSE))
bogdanm 89:552587b429a1 257
bogdanm 89:552587b429a1 258 /**
bogdanm 89:552587b429a1 259 * @}
bogdanm 89:552587b429a1 260 */
bogdanm 89:552587b429a1 261
bogdanm 89:552587b429a1 262 /**
bogdanm 89:552587b429a1 263 * @}
bogdanm 89:552587b429a1 264 */
bogdanm 89:552587b429a1 265
bogdanm 89:552587b429a1 266 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 267
bogdanm 89:552587b429a1 268 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 269
bogdanm 89:552587b429a1 270 /* Timer Hall Sensor functions **********************************************/
bogdanm 89:552587b429a1 271 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
bogdanm 89:552587b429a1 272 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 273
bogdanm 89:552587b429a1 274 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 275 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 276
bogdanm 89:552587b429a1 277 /* Blocking mode: Polling */
bogdanm 89:552587b429a1 278 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 279 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 280 /* Non-Blocking mode: Interrupt */
bogdanm 89:552587b429a1 281 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 282 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 283 /* Non-Blocking mode: DMA */
bogdanm 89:552587b429a1 284 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
bogdanm 89:552587b429a1 285 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 286
bogdanm 89:552587b429a1 287 /* Timer Complementary Output Compare functions *****************************/
bogdanm 89:552587b429a1 288 /* Blocking mode: Polling */
bogdanm 89:552587b429a1 289 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 290 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 291
bogdanm 89:552587b429a1 292 /* Non-Blocking mode: Interrupt */
bogdanm 89:552587b429a1 293 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 294 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 295
bogdanm 89:552587b429a1 296 /* Non-Blocking mode: DMA */
bogdanm 89:552587b429a1 297 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 89:552587b429a1 298 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 299
bogdanm 89:552587b429a1 300 /* Timer Complementary PWM functions ****************************************/
bogdanm 89:552587b429a1 301 /* Blocking mode: Polling */
bogdanm 89:552587b429a1 302 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 303 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 304
bogdanm 89:552587b429a1 305 /* Non-Blocking mode: Interrupt */
bogdanm 89:552587b429a1 306 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 307 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 308 /* Non-Blocking mode: DMA */
bogdanm 89:552587b429a1 309 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
bogdanm 89:552587b429a1 310 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
bogdanm 89:552587b429a1 311
bogdanm 89:552587b429a1 312 /* Timer Complementary One Pulse functions **********************************/
bogdanm 89:552587b429a1 313 /* Blocking mode: Polling */
bogdanm 89:552587b429a1 314 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
bogdanm 89:552587b429a1 315 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
bogdanm 89:552587b429a1 316
bogdanm 89:552587b429a1 317 /* Non-Blocking mode: Interrupt */
bogdanm 89:552587b429a1 318 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
bogdanm 89:552587b429a1 319 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
bogdanm 89:552587b429a1 320
bogdanm 89:552587b429a1 321 /* Extnsion Control functions ************************************************/
bogdanm 89:552587b429a1 322 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 89:552587b429a1 323 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 89:552587b429a1 324 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
bogdanm 89:552587b429a1 325 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
bogdanm 89:552587b429a1 326 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
bogdanm 89:552587b429a1 327 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
bogdanm 89:552587b429a1 328
bogdanm 89:552587b429a1 329 /* Extension Callback *********************************************************/
bogdanm 89:552587b429a1 330 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 331 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 332 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
bogdanm 89:552587b429a1 333
bogdanm 89:552587b429a1 334 /* Extension Peripheral State functions **************************************/
bogdanm 89:552587b429a1 335 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
bogdanm 89:552587b429a1 336
bogdanm 89:552587b429a1 337 /**
bogdanm 89:552587b429a1 338 * @}
bogdanm 89:552587b429a1 339 */
bogdanm 89:552587b429a1 340
bogdanm 89:552587b429a1 341 /**
bogdanm 89:552587b429a1 342 * @}
bogdanm 89:552587b429a1 343 */
bogdanm 89:552587b429a1 344
bogdanm 89:552587b429a1 345 #ifdef __cplusplus
bogdanm 89:552587b429a1 346 }
bogdanm 89:552587b429a1 347 #endif
bogdanm 89:552587b429a1 348
bogdanm 89:552587b429a1 349 #endif /* __STM32F4xx_HAL_TIM_EX_H */
bogdanm 89:552587b429a1 350
bogdanm 89:552587b429a1 351 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/