mbed-renbed - Fork of the official mbed C/C SDK provides the …

Users » elijahorr » Code » mbed-renbed

Fork of the official mbed C/C SDK provides the software platform and libraries to build your applications for RenBED.

Dependents: 1-RenBuggyTimed RenBED_RGB RenBED_RGB_PWM RenBED_RGB

TARGET_ELMO_F411RE/stm32f4xx_hal_eth.h@108:34e6b704fe68, 2015-10-02 (annotated)

Committer:: Kojto
Date:: Fri Oct 02 07:35:07 2015 +0200
Revision:: 108:34e6b704fe68
Child:: 110:165afa46840b

Release 108  of the mbed library



Changes:

- new platforms - ELMO_F411RE, WIZNET_7500P, ARM_MPS2_BEID

- EFM32 - bugfixes in rtc, serial

- Cortex A cmsis - update files

- STML4 - RAM fixes

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	108:34e6b704fe68	1	/**
Kojto	108:34e6b704fe68	2	******************************************************************************
Kojto	108:34e6b704fe68	3	* @file stm32f4xx_hal_eth.h
Kojto	108:34e6b704fe68	4	* @author MCD Application Team
Kojto	108:34e6b704fe68	5	* @version V1.3.2
Kojto	108:34e6b704fe68	6	* @date 26-June-2015
Kojto	108:34e6b704fe68	7	* @brief Header file of ETH HAL module.
Kojto	108:34e6b704fe68	8	******************************************************************************
Kojto	108:34e6b704fe68	9	* @attention
Kojto	108:34e6b704fe68	10	*
Kojto	108:34e6b704fe68	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
Kojto	108:34e6b704fe68	12	*
Kojto	108:34e6b704fe68	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	108:34e6b704fe68	14	* are permitted provided that the following conditions are met:
Kojto	108:34e6b704fe68	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	108:34e6b704fe68	16	* this list of conditions and the following disclaimer.
Kojto	108:34e6b704fe68	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	108:34e6b704fe68	18	* this list of conditions and the following disclaimer in the documentation
Kojto	108:34e6b704fe68	19	* and/or other materials provided with the distribution.
Kojto	108:34e6b704fe68	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	108:34e6b704fe68	21	* may be used to endorse or promote products derived from this software
Kojto	108:34e6b704fe68	22	* without specific prior written permission.
Kojto	108:34e6b704fe68	23	*
Kojto	108:34e6b704fe68	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	108:34e6b704fe68	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	108:34e6b704fe68	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	108:34e6b704fe68	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	108:34e6b704fe68	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	108:34e6b704fe68	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	108:34e6b704fe68	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	108:34e6b704fe68	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	108:34e6b704fe68	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	108:34e6b704fe68	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	108:34e6b704fe68	34	*
Kojto	108:34e6b704fe68	35	******************************************************************************
Kojto	108:34e6b704fe68	36	*/
Kojto	108:34e6b704fe68	37
Kojto	108:34e6b704fe68	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	108:34e6b704fe68	39	#ifndef __STM32F4xx_HAL_ETH_H
Kojto	108:34e6b704fe68	40	#define __STM32F4xx_HAL_ETH_H
Kojto	108:34e6b704fe68	41
Kojto	108:34e6b704fe68	42	#ifdef __cplusplus
Kojto	108:34e6b704fe68	43	extern "C" {
Kojto	108:34e6b704fe68	44	#endif
Kojto	108:34e6b704fe68	45
Kojto	108:34e6b704fe68	46	#if defined(STM32F407xx) \|\| defined(STM32F417xx) \|\| defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx)
Kojto	108:34e6b704fe68	47	/* Includes ------------------------------------------------------------------*/
Kojto	108:34e6b704fe68	48	#include "stm32f4xx_hal_def.h"
Kojto	108:34e6b704fe68	49
Kojto	108:34e6b704fe68	50	/** @addtogroup STM32F4xx_HAL_Driver
Kojto	108:34e6b704fe68	51	* @{
Kojto	108:34e6b704fe68	52	*/
Kojto	108:34e6b704fe68	53
Kojto	108:34e6b704fe68	54	/** @addtogroup ETH
Kojto	108:34e6b704fe68	55	* @{
Kojto	108:34e6b704fe68	56	*/
Kojto	108:34e6b704fe68	57
Kojto	108:34e6b704fe68	58	/** @addtogroup ETH_Private_Macros
Kojto	108:34e6b704fe68	59	* @{
Kojto	108:34e6b704fe68	60	*/
Kojto	108:34e6b704fe68	61	#define IS_ETH_PHY_ADDRESS(ADDRESS) ((ADDRESS) <= 0x20)
Kojto	108:34e6b704fe68	62	#define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) \|\| \
Kojto	108:34e6b704fe68	63	((CMD) == ETH_AUTONEGOTIATION_DISABLE))
Kojto	108:34e6b704fe68	64	#define IS_ETH_SPEED(SPEED) (((SPEED) == ETH_SPEED_10M) \|\| \
Kojto	108:34e6b704fe68	65	((SPEED) == ETH_SPEED_100M))
Kojto	108:34e6b704fe68	66	#define IS_ETH_DUPLEX_MODE(MODE) (((MODE) == ETH_MODE_FULLDUPLEX) \|\| \
Kojto	108:34e6b704fe68	67	((MODE) == ETH_MODE_HALFDUPLEX))
Kojto	108:34e6b704fe68	68	#define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) \|\| \
Kojto	108:34e6b704fe68	69	((MODE) == ETH_RXINTERRUPT_MODE))
Kojto	108:34e6b704fe68	70	#define IS_ETH_CHECKSUM_MODE(MODE) (((MODE) == ETH_CHECKSUM_BY_HARDWARE) \|\| \
Kojto	108:34e6b704fe68	71	((MODE) == ETH_CHECKSUM_BY_SOFTWARE))
Kojto	108:34e6b704fe68	72	#define IS_ETH_MEDIA_INTERFACE(MODE) (((MODE) == ETH_MEDIA_INTERFACE_MII) \|\| \
Kojto	108:34e6b704fe68	73	((MODE) == ETH_MEDIA_INTERFACE_RMII))
Kojto	108:34e6b704fe68	74	#define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) \|\| \
Kojto	108:34e6b704fe68	75	((CMD) == ETH_WATCHDOG_DISABLE))
Kojto	108:34e6b704fe68	76	#define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) \|\| \
Kojto	108:34e6b704fe68	77	((CMD) == ETH_JABBER_DISABLE))
Kojto	108:34e6b704fe68	78	#define IS_ETH_INTER_FRAME_GAP(GAP) (((GAP) == ETH_INTERFRAMEGAP_96BIT) \|\| \
Kojto	108:34e6b704fe68	79	((GAP) == ETH_INTERFRAMEGAP_88BIT) \|\| \
Kojto	108:34e6b704fe68	80	((GAP) == ETH_INTERFRAMEGAP_80BIT) \|\| \
Kojto	108:34e6b704fe68	81	((GAP) == ETH_INTERFRAMEGAP_72BIT) \|\| \
Kojto	108:34e6b704fe68	82	((GAP) == ETH_INTERFRAMEGAP_64BIT) \|\| \
Kojto	108:34e6b704fe68	83	((GAP) == ETH_INTERFRAMEGAP_56BIT) \|\| \
Kojto	108:34e6b704fe68	84	((GAP) == ETH_INTERFRAMEGAP_48BIT) \|\| \
Kojto	108:34e6b704fe68	85	((GAP) == ETH_INTERFRAMEGAP_40BIT))
Kojto	108:34e6b704fe68	86	#define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	87	((CMD) == ETH_CARRIERSENCE_DISABLE))
Kojto	108:34e6b704fe68	88	#define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) \|\| \
Kojto	108:34e6b704fe68	89	((CMD) == ETH_RECEIVEOWN_DISABLE))
Kojto	108:34e6b704fe68	90	#define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	91	((CMD) == ETH_LOOPBACKMODE_DISABLE))
Kojto	108:34e6b704fe68	92	#define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) \|\| \
Kojto	108:34e6b704fe68	93	((CMD) == ETH_CHECKSUMOFFLAOD_DISABLE))
Kojto	108:34e6b704fe68	94	#define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) \|\| \
Kojto	108:34e6b704fe68	95	((CMD) == ETH_RETRYTRANSMISSION_DISABLE))
Kojto	108:34e6b704fe68	96	#define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) \|\| \
Kojto	108:34e6b704fe68	97	((CMD) == ETH_AUTOMATICPADCRCSTRIP_DISABLE))
Kojto	108:34e6b704fe68	98	#define IS_ETH_BACKOFF_LIMIT(LIMIT) (((LIMIT) == ETH_BACKOFFLIMIT_10) \|\| \
Kojto	108:34e6b704fe68	99	((LIMIT) == ETH_BACKOFFLIMIT_8) \|\| \
Kojto	108:34e6b704fe68	100	((LIMIT) == ETH_BACKOFFLIMIT_4) \|\| \
Kojto	108:34e6b704fe68	101	((LIMIT) == ETH_BACKOFFLIMIT_1))
Kojto	108:34e6b704fe68	102	#define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) \|\| \
Kojto	108:34e6b704fe68	103	((CMD) == ETH_DEFFERRALCHECK_DISABLE))
Kojto	108:34e6b704fe68	104	#define IS_ETH_RECEIVE_ALL(CMD) (((CMD) == ETH_RECEIVEALL_ENABLE) \|\| \
Kojto	108:34e6b704fe68	105	((CMD) == ETH_RECEIVEAll_DISABLE))
Kojto	108:34e6b704fe68	106	#define IS_ETH_SOURCE_ADDR_FILTER(CMD) (((CMD) == ETH_SOURCEADDRFILTER_NORMAL_ENABLE) \|\| \
Kojto	108:34e6b704fe68	107	((CMD) == ETH_SOURCEADDRFILTER_INVERSE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	108	((CMD) == ETH_SOURCEADDRFILTER_DISABLE))
Kojto	108:34e6b704fe68	109	#define IS_ETH_CONTROL_FRAMES(PASS) (((PASS) == ETH_PASSCONTROLFRAMES_BLOCKALL) \|\| \
Kojto	108:34e6b704fe68	110	((PASS) == ETH_PASSCONTROLFRAMES_FORWARDALL) \|\| \
Kojto	108:34e6b704fe68	111	((PASS) == ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER))
Kojto	108:34e6b704fe68	112	#define IS_ETH_BROADCAST_FRAMES_RECEPTION(CMD) (((CMD) == ETH_BROADCASTFRAMESRECEPTION_ENABLE) \|\| \
Kojto	108:34e6b704fe68	113	((CMD) == ETH_BROADCASTFRAMESRECEPTION_DISABLE))
Kojto	108:34e6b704fe68	114	#define IS_ETH_DESTINATION_ADDR_FILTER(FILTER) (((FILTER) == ETH_DESTINATIONADDRFILTER_NORMAL) \|\| \
Kojto	108:34e6b704fe68	115	((FILTER) == ETH_DESTINATIONADDRFILTER_INVERSE))
Kojto	108:34e6b704fe68	116	#define IS_ETH_PROMISCUOUS_MODE(CMD) (((CMD) == ETH_PROMISCUOUS_MODE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	117	((CMD) == ETH_PROMISCUOUS_MODE_DISABLE))
Kojto	108:34e6b704fe68	118	#define IS_ETH_MULTICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE) \|\| \
Kojto	108:34e6b704fe68	119	((FILTER) == ETH_MULTICASTFRAMESFILTER_HASHTABLE) \|\| \
Kojto	108:34e6b704fe68	120	((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECT) \|\| \
Kojto	108:34e6b704fe68	121	((FILTER) == ETH_MULTICASTFRAMESFILTER_NONE))
Kojto	108:34e6b704fe68	122	#define IS_ETH_UNICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE) \|\| \
Kojto	108:34e6b704fe68	123	((FILTER) == ETH_UNICASTFRAMESFILTER_HASHTABLE) \|\| \
Kojto	108:34e6b704fe68	124	((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECT))
Kojto	108:34e6b704fe68	125	#define IS_ETH_PAUSE_TIME(TIME) ((TIME) <= 0xFFFF)
Kojto	108:34e6b704fe68	126	#define IS_ETH_ZEROQUANTA_PAUSE(CMD) (((CMD) == ETH_ZEROQUANTAPAUSE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	127	((CMD) == ETH_ZEROQUANTAPAUSE_DISABLE))
Kojto	108:34e6b704fe68	128	#define IS_ETH_PAUSE_LOW_THRESHOLD(THRESHOLD) (((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS4) \|\| \
Kojto	108:34e6b704fe68	129	((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS28) \|\| \
Kojto	108:34e6b704fe68	130	((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS144) \|\| \
Kojto	108:34e6b704fe68	131	((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS256))
Kojto	108:34e6b704fe68	132	#define IS_ETH_UNICAST_PAUSE_FRAME_DETECT(CMD) (((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_ENABLE) \|\| \
Kojto	108:34e6b704fe68	133	((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_DISABLE))
Kojto	108:34e6b704fe68	134	#define IS_ETH_RECEIVE_FLOWCONTROL(CMD) (((CMD) == ETH_RECEIVEFLOWCONTROL_ENABLE) \|\| \
Kojto	108:34e6b704fe68	135	((CMD) == ETH_RECEIVEFLOWCONTROL_DISABLE))
Kojto	108:34e6b704fe68	136	#define IS_ETH_TRANSMIT_FLOWCONTROL(CMD) (((CMD) == ETH_TRANSMITFLOWCONTROL_ENABLE) \|\| \
Kojto	108:34e6b704fe68	137	((CMD) == ETH_TRANSMITFLOWCONTROL_DISABLE))
Kojto	108:34e6b704fe68	138	#define IS_ETH_VLAN_TAG_COMPARISON(COMPARISON) (((COMPARISON) == ETH_VLANTAGCOMPARISON_12BIT) \|\| \
Kojto	108:34e6b704fe68	139	((COMPARISON) == ETH_VLANTAGCOMPARISON_16BIT))
Kojto	108:34e6b704fe68	140	#define IS_ETH_VLAN_TAG_IDENTIFIER(IDENTIFIER) ((IDENTIFIER) <= 0xFFFF)
Kojto	108:34e6b704fe68	141	#define IS_ETH_MAC_ADDRESS0123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS0) \|\| \
Kojto	108:34e6b704fe68	142	((ADDRESS) == ETH_MAC_ADDRESS1) \|\| \
Kojto	108:34e6b704fe68	143	((ADDRESS) == ETH_MAC_ADDRESS2) \|\| \
Kojto	108:34e6b704fe68	144	((ADDRESS) == ETH_MAC_ADDRESS3))
Kojto	108:34e6b704fe68	145	#define IS_ETH_MAC_ADDRESS123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS1) \|\| \
Kojto	108:34e6b704fe68	146	((ADDRESS) == ETH_MAC_ADDRESS2) \|\| \
Kojto	108:34e6b704fe68	147	((ADDRESS) == ETH_MAC_ADDRESS3))
Kojto	108:34e6b704fe68	148	#define IS_ETH_MAC_ADDRESS_FILTER(FILTER) (((FILTER) == ETH_MAC_ADDRESSFILTER_SA) \|\| \
Kojto	108:34e6b704fe68	149	((FILTER) == ETH_MAC_ADDRESSFILTER_DA))
Kojto	108:34e6b704fe68	150	#define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_ADDRESSMASK_BYTE6) \|\| \
Kojto	108:34e6b704fe68	151	((MASK) == ETH_MAC_ADDRESSMASK_BYTE5) \|\| \
Kojto	108:34e6b704fe68	152	((MASK) == ETH_MAC_ADDRESSMASK_BYTE4) \|\| \
Kojto	108:34e6b704fe68	153	((MASK) == ETH_MAC_ADDRESSMASK_BYTE3) \|\| \
Kojto	108:34e6b704fe68	154	((MASK) == ETH_MAC_ADDRESSMASK_BYTE2) \|\| \
Kojto	108:34e6b704fe68	155	((MASK) == ETH_MAC_ADDRESSMASK_BYTE1))
Kojto	108:34e6b704fe68	156	#define IS_ETH_DROP_TCPIP_CHECKSUM_FRAME(CMD) (((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE) \|\| \
Kojto	108:34e6b704fe68	157	((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE))
Kojto	108:34e6b704fe68	158	#define IS_ETH_RECEIVE_STORE_FORWARD(CMD) (((CMD) == ETH_RECEIVESTOREFORWARD_ENABLE) \|\| \
Kojto	108:34e6b704fe68	159	((CMD) == ETH_RECEIVESTOREFORWARD_DISABLE))
Kojto	108:34e6b704fe68	160	#define IS_ETH_FLUSH_RECEIVE_FRAME(CMD) (((CMD) == ETH_FLUSHRECEIVEDFRAME_ENABLE) \|\| \
Kojto	108:34e6b704fe68	161	((CMD) == ETH_FLUSHRECEIVEDFRAME_DISABLE))
Kojto	108:34e6b704fe68	162	#define IS_ETH_TRANSMIT_STORE_FORWARD(CMD) (((CMD) == ETH_TRANSMITSTOREFORWARD_ENABLE) \|\| \
Kojto	108:34e6b704fe68	163	((CMD) == ETH_TRANSMITSTOREFORWARD_DISABLE))
Kojto	108:34e6b704fe68	164	#define IS_ETH_TRANSMIT_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_64BYTES) \|\| \
Kojto	108:34e6b704fe68	165	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_128BYTES) \|\| \
Kojto	108:34e6b704fe68	166	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_192BYTES) \|\| \
Kojto	108:34e6b704fe68	167	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_256BYTES) \|\| \
Kojto	108:34e6b704fe68	168	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_40BYTES) \|\| \
Kojto	108:34e6b704fe68	169	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_32BYTES) \|\| \
Kojto	108:34e6b704fe68	170	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_24BYTES) \|\| \
Kojto	108:34e6b704fe68	171	((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_16BYTES))
Kojto	108:34e6b704fe68	172	#define IS_ETH_FORWARD_ERROR_FRAMES(CMD) (((CMD) == ETH_FORWARDERRORFRAMES_ENABLE) \|\| \
Kojto	108:34e6b704fe68	173	((CMD) == ETH_FORWARDERRORFRAMES_DISABLE))
Kojto	108:34e6b704fe68	174	#define IS_ETH_FORWARD_UNDERSIZED_GOOD_FRAMES(CMD) (((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE) \|\| \
Kojto	108:34e6b704fe68	175	((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE))
Kojto	108:34e6b704fe68	176	#define IS_ETH_RECEIVE_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES) \|\| \
Kojto	108:34e6b704fe68	177	((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES) \|\| \
Kojto	108:34e6b704fe68	178	((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES) \|\| \
Kojto	108:34e6b704fe68	179	((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES))
Kojto	108:34e6b704fe68	180	#define IS_ETH_SECOND_FRAME_OPERATE(CMD) (((CMD) == ETH_SECONDFRAMEOPERARTE_ENABLE) \|\| \
Kojto	108:34e6b704fe68	181	((CMD) == ETH_SECONDFRAMEOPERARTE_DISABLE))
Kojto	108:34e6b704fe68	182	#define IS_ETH_ADDRESS_ALIGNED_BEATS(CMD) (((CMD) == ETH_ADDRESSALIGNEDBEATS_ENABLE) \|\| \
Kojto	108:34e6b704fe68	183	((CMD) == ETH_ADDRESSALIGNEDBEATS_DISABLE))
Kojto	108:34e6b704fe68	184	#define IS_ETH_FIXED_BURST(CMD) (((CMD) == ETH_FIXEDBURST_ENABLE) \|\| \
Kojto	108:34e6b704fe68	185	((CMD) == ETH_FIXEDBURST_DISABLE))
Kojto	108:34e6b704fe68	186	#define IS_ETH_RXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_RXDMABURSTLENGTH_1BEAT) \|\| \
Kojto	108:34e6b704fe68	187	((LENGTH) == ETH_RXDMABURSTLENGTH_2BEAT) \|\| \
Kojto	108:34e6b704fe68	188	((LENGTH) == ETH_RXDMABURSTLENGTH_4BEAT) \|\| \
Kojto	108:34e6b704fe68	189	((LENGTH) == ETH_RXDMABURSTLENGTH_8BEAT) \|\| \
Kojto	108:34e6b704fe68	190	((LENGTH) == ETH_RXDMABURSTLENGTH_16BEAT) \|\| \
Kojto	108:34e6b704fe68	191	((LENGTH) == ETH_RXDMABURSTLENGTH_32BEAT) \|\| \
Kojto	108:34e6b704fe68	192	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_4BEAT) \|\| \
Kojto	108:34e6b704fe68	193	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_8BEAT) \|\| \
Kojto	108:34e6b704fe68	194	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_16BEAT) \|\| \
Kojto	108:34e6b704fe68	195	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_32BEAT) \|\| \
Kojto	108:34e6b704fe68	196	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_64BEAT) \|\| \
Kojto	108:34e6b704fe68	197	((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_128BEAT))
Kojto	108:34e6b704fe68	198	#define IS_ETH_TXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_TXDMABURSTLENGTH_1BEAT) \|\| \
Kojto	108:34e6b704fe68	199	((LENGTH) == ETH_TXDMABURSTLENGTH_2BEAT) \|\| \
Kojto	108:34e6b704fe68	200	((LENGTH) == ETH_TXDMABURSTLENGTH_4BEAT) \|\| \
Kojto	108:34e6b704fe68	201	((LENGTH) == ETH_TXDMABURSTLENGTH_8BEAT) \|\| \
Kojto	108:34e6b704fe68	202	((LENGTH) == ETH_TXDMABURSTLENGTH_16BEAT) \|\| \
Kojto	108:34e6b704fe68	203	((LENGTH) == ETH_TXDMABURSTLENGTH_32BEAT) \|\| \
Kojto	108:34e6b704fe68	204	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_4BEAT) \|\| \
Kojto	108:34e6b704fe68	205	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_8BEAT) \|\| \
Kojto	108:34e6b704fe68	206	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_16BEAT) \|\| \
Kojto	108:34e6b704fe68	207	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_32BEAT) \|\| \
Kojto	108:34e6b704fe68	208	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_64BEAT) \|\| \
Kojto	108:34e6b704fe68	209	((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_128BEAT))
Kojto	108:34e6b704fe68	210	#define IS_ETH_DMA_DESC_SKIP_LENGTH(LENGTH) ((LENGTH) <= 0x1F)
Kojto	108:34e6b704fe68	211	#define IS_ETH_DMA_ARBITRATION_ROUNDROBIN_RXTX(RATIO) (((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1) \|\| \
Kojto	108:34e6b704fe68	212	((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1) \|\| \
Kojto	108:34e6b704fe68	213	((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1) \|\| \
Kojto	108:34e6b704fe68	214	((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1) \|\| \
Kojto	108:34e6b704fe68	215	((RATIO) == ETH_DMAARBITRATION_RXPRIORTX))
Kojto	108:34e6b704fe68	216	#define IS_ETH_DMATXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMATXDESC_OWN) \|\| \
Kojto	108:34e6b704fe68	217	((FLAG) == ETH_DMATXDESC_IC) \|\| \
Kojto	108:34e6b704fe68	218	((FLAG) == ETH_DMATXDESC_LS) \|\| \
Kojto	108:34e6b704fe68	219	((FLAG) == ETH_DMATXDESC_FS) \|\| \
Kojto	108:34e6b704fe68	220	((FLAG) == ETH_DMATXDESC_DC) \|\| \
Kojto	108:34e6b704fe68	221	((FLAG) == ETH_DMATXDESC_DP) \|\| \
Kojto	108:34e6b704fe68	222	((FLAG) == ETH_DMATXDESC_TTSE) \|\| \
Kojto	108:34e6b704fe68	223	((FLAG) == ETH_DMATXDESC_TER) \|\| \
Kojto	108:34e6b704fe68	224	((FLAG) == ETH_DMATXDESC_TCH) \|\| \
Kojto	108:34e6b704fe68	225	((FLAG) == ETH_DMATXDESC_TTSS) \|\| \
Kojto	108:34e6b704fe68	226	((FLAG) == ETH_DMATXDESC_IHE) \|\| \
Kojto	108:34e6b704fe68	227	((FLAG) == ETH_DMATXDESC_ES) \|\| \
Kojto	108:34e6b704fe68	228	((FLAG) == ETH_DMATXDESC_JT) \|\| \
Kojto	108:34e6b704fe68	229	((FLAG) == ETH_DMATXDESC_FF) \|\| \
Kojto	108:34e6b704fe68	230	((FLAG) == ETH_DMATXDESC_PCE) \|\| \
Kojto	108:34e6b704fe68	231	((FLAG) == ETH_DMATXDESC_LCA) \|\| \
Kojto	108:34e6b704fe68	232	((FLAG) == ETH_DMATXDESC_NC) \|\| \
Kojto	108:34e6b704fe68	233	((FLAG) == ETH_DMATXDESC_LCO) \|\| \
Kojto	108:34e6b704fe68	234	((FLAG) == ETH_DMATXDESC_EC) \|\| \
Kojto	108:34e6b704fe68	235	((FLAG) == ETH_DMATXDESC_VF) \|\| \
Kojto	108:34e6b704fe68	236	((FLAG) == ETH_DMATXDESC_CC) \|\| \
Kojto	108:34e6b704fe68	237	((FLAG) == ETH_DMATXDESC_ED) \|\| \
Kojto	108:34e6b704fe68	238	((FLAG) == ETH_DMATXDESC_UF) \|\| \
Kojto	108:34e6b704fe68	239	((FLAG) == ETH_DMATXDESC_DB))
Kojto	108:34e6b704fe68	240	#define IS_ETH_DMA_TXDESC_SEGMENT(SEGMENT) (((SEGMENT) == ETH_DMATXDESC_LASTSEGMENTS) \|\| \
Kojto	108:34e6b704fe68	241	((SEGMENT) == ETH_DMATXDESC_FIRSTSEGMENT))
Kojto	108:34e6b704fe68	242	#define IS_ETH_DMA_TXDESC_CHECKSUM(CHECKSUM) (((CHECKSUM) == ETH_DMATXDESC_CHECKSUMBYPASS) \|\| \
Kojto	108:34e6b704fe68	243	((CHECKSUM) == ETH_DMATXDESC_CHECKSUMIPV4HEADER) \|\| \
Kojto	108:34e6b704fe68	244	((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT) \|\| \
Kojto	108:34e6b704fe68	245	((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL))
Kojto	108:34e6b704fe68	246	#define IS_ETH_DMATXDESC_BUFFER_SIZE(SIZE) ((SIZE) <= 0x1FFF)
Kojto	108:34e6b704fe68	247	#define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) \|\| \
Kojto	108:34e6b704fe68	248	((FLAG) == ETH_DMARXDESC_AFM) \|\| \
Kojto	108:34e6b704fe68	249	((FLAG) == ETH_DMARXDESC_ES) \|\| \
Kojto	108:34e6b704fe68	250	((FLAG) == ETH_DMARXDESC_DE) \|\| \
Kojto	108:34e6b704fe68	251	((FLAG) == ETH_DMARXDESC_SAF) \|\| \
Kojto	108:34e6b704fe68	252	((FLAG) == ETH_DMARXDESC_LE) \|\| \
Kojto	108:34e6b704fe68	253	((FLAG) == ETH_DMARXDESC_OE) \|\| \
Kojto	108:34e6b704fe68	254	((FLAG) == ETH_DMARXDESC_VLAN) \|\| \
Kojto	108:34e6b704fe68	255	((FLAG) == ETH_DMARXDESC_FS) \|\| \
Kojto	108:34e6b704fe68	256	((FLAG) == ETH_DMARXDESC_LS) \|\| \
Kojto	108:34e6b704fe68	257	((FLAG) == ETH_DMARXDESC_IPV4HCE) \|\| \
Kojto	108:34e6b704fe68	258	((FLAG) == ETH_DMARXDESC_LC) \|\| \
Kojto	108:34e6b704fe68	259	((FLAG) == ETH_DMARXDESC_FT) \|\| \
Kojto	108:34e6b704fe68	260	((FLAG) == ETH_DMARXDESC_RWT) \|\| \
Kojto	108:34e6b704fe68	261	((FLAG) == ETH_DMARXDESC_RE) \|\| \
Kojto	108:34e6b704fe68	262	((FLAG) == ETH_DMARXDESC_DBE) \|\| \
Kojto	108:34e6b704fe68	263	((FLAG) == ETH_DMARXDESC_CE) \|\| \
Kojto	108:34e6b704fe68	264	((FLAG) == ETH_DMARXDESC_MAMPCE))
Kojto	108:34e6b704fe68	265	#define IS_ETH_DMA_RXDESC_BUFFER(BUFFER) (((BUFFER) == ETH_DMARXDESC_BUFFER1) \|\| \
Kojto	108:34e6b704fe68	266	((BUFFER) == ETH_DMARXDESC_BUFFER2))
Kojto	108:34e6b704fe68	267	#define IS_ETH_PMT_GET_FLAG(FLAG) (((FLAG) == ETH_PMT_FLAG_WUFR) \|\| \
Kojto	108:34e6b704fe68	268	((FLAG) == ETH_PMT_FLAG_MPR))
Kojto	108:34e6b704fe68	269	#define IS_ETH_DMA_FLAG(FLAG) ((((FLAG) & (uint32_t)0xC7FE1800) == 0x00) && ((FLAG) != 0x00))
Kojto	108:34e6b704fe68	270	#define IS_ETH_DMA_GET_FLAG(FLAG) (((FLAG) == ETH_DMA_FLAG_TST) \|\| ((FLAG) == ETH_DMA_FLAG_PMT) \|\| \
Kojto	108:34e6b704fe68	271	((FLAG) == ETH_DMA_FLAG_MMC) \|\| ((FLAG) == ETH_DMA_FLAG_DATATRANSFERERROR) \|\| \
Kojto	108:34e6b704fe68	272	((FLAG) == ETH_DMA_FLAG_READWRITEERROR) \|\| ((FLAG) == ETH_DMA_FLAG_ACCESSERROR) \|\| \
Kojto	108:34e6b704fe68	273	((FLAG) == ETH_DMA_FLAG_NIS) \|\| ((FLAG) == ETH_DMA_FLAG_AIS) \|\| \
Kojto	108:34e6b704fe68	274	((FLAG) == ETH_DMA_FLAG_ER) \|\| ((FLAG) == ETH_DMA_FLAG_FBE) \|\| \
Kojto	108:34e6b704fe68	275	((FLAG) == ETH_DMA_FLAG_ET) \|\| ((FLAG) == ETH_DMA_FLAG_RWT) \|\| \
Kojto	108:34e6b704fe68	276	((FLAG) == ETH_DMA_FLAG_RPS) \|\| ((FLAG) == ETH_DMA_FLAG_RBU) \|\| \
Kojto	108:34e6b704fe68	277	((FLAG) == ETH_DMA_FLAG_R) \|\| ((FLAG) == ETH_DMA_FLAG_TU) \|\| \
Kojto	108:34e6b704fe68	278	((FLAG) == ETH_DMA_FLAG_RO) \|\| ((FLAG) == ETH_DMA_FLAG_TJT) \|\| \
Kojto	108:34e6b704fe68	279	((FLAG) == ETH_DMA_FLAG_TBU) \|\| ((FLAG) == ETH_DMA_FLAG_TPS) \|\| \
Kojto	108:34e6b704fe68	280	((FLAG) == ETH_DMA_FLAG_T))
Kojto	108:34e6b704fe68	281	#define IS_ETH_MAC_IT(IT) ((((IT) & (uint32_t)0xFFFFFDF1) == 0x00) && ((IT) != 0x00))
Kojto	108:34e6b704fe68	282	#define IS_ETH_MAC_GET_IT(IT) (((IT) == ETH_MAC_IT_TST) \|\| ((IT) == ETH_MAC_IT_MMCT) \|\| \
Kojto	108:34e6b704fe68	283	((IT) == ETH_MAC_IT_MMCR) \|\| ((IT) == ETH_MAC_IT_MMC) \|\| \
Kojto	108:34e6b704fe68	284	((IT) == ETH_MAC_IT_PMT))
Kojto	108:34e6b704fe68	285	#define IS_ETH_MAC_GET_FLAG(FLAG) (((FLAG) == ETH_MAC_FLAG_TST) \|\| ((FLAG) == ETH_MAC_FLAG_MMCT) \|\| \
Kojto	108:34e6b704fe68	286	((FLAG) == ETH_MAC_FLAG_MMCR) \|\| ((FLAG) == ETH_MAC_FLAG_MMC) \|\| \
Kojto	108:34e6b704fe68	287	((FLAG) == ETH_MAC_FLAG_PMT))
Kojto	108:34e6b704fe68	288	#define IS_ETH_DMA_IT(IT) ((((IT) & (uint32_t)0xC7FE1800) == 0x00) && ((IT) != 0x00))
Kojto	108:34e6b704fe68	289	#define IS_ETH_DMA_GET_IT(IT) (((IT) == ETH_DMA_IT_TST) \|\| ((IT) == ETH_DMA_IT_PMT) \|\| \
Kojto	108:34e6b704fe68	290	((IT) == ETH_DMA_IT_MMC) \|\| ((IT) == ETH_DMA_IT_NIS) \|\| \
Kojto	108:34e6b704fe68	291	((IT) == ETH_DMA_IT_AIS) \|\| ((IT) == ETH_DMA_IT_ER) \|\| \
Kojto	108:34e6b704fe68	292	((IT) == ETH_DMA_IT_FBE) \|\| ((IT) == ETH_DMA_IT_ET) \|\| \
Kojto	108:34e6b704fe68	293	((IT) == ETH_DMA_IT_RWT) \|\| ((IT) == ETH_DMA_IT_RPS) \|\| \
Kojto	108:34e6b704fe68	294	((IT) == ETH_DMA_IT_RBU) \|\| ((IT) == ETH_DMA_IT_R) \|\| \
Kojto	108:34e6b704fe68	295	((IT) == ETH_DMA_IT_TU) \|\| ((IT) == ETH_DMA_IT_RO) \|\| \
Kojto	108:34e6b704fe68	296	((IT) == ETH_DMA_IT_TJT) \|\| ((IT) == ETH_DMA_IT_TBU) \|\| \
Kojto	108:34e6b704fe68	297	((IT) == ETH_DMA_IT_TPS) \|\| ((IT) == ETH_DMA_IT_T))
Kojto	108:34e6b704fe68	298	#define IS_ETH_DMA_GET_OVERFLOW(OVERFLOW) (((OVERFLOW) == ETH_DMA_OVERFLOW_RXFIFOCOUNTER) \|\| \
Kojto	108:34e6b704fe68	299	((OVERFLOW) == ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER))
Kojto	108:34e6b704fe68	300	#define IS_ETH_MMC_IT(IT) (((((IT) & (uint32_t)0xFFDF3FFF) == 0x00) \|\| (((IT) & (uint32_t)0xEFFDFF9F) == 0x00)) && \
Kojto	108:34e6b704fe68	301	((IT) != 0x00))
Kojto	108:34e6b704fe68	302	#define IS_ETH_MMC_GET_IT(IT) (((IT) == ETH_MMC_IT_TGF) \|\| ((IT) == ETH_MMC_IT_TGFMSC) \|\| \
Kojto	108:34e6b704fe68	303	((IT) == ETH_MMC_IT_TGFSC) \|\| ((IT) == ETH_MMC_IT_RGUF) \|\| \
Kojto	108:34e6b704fe68	304	((IT) == ETH_MMC_IT_RFAE) \|\| ((IT) == ETH_MMC_IT_RFCE))
Kojto	108:34e6b704fe68	305	#define IS_ETH_ENHANCED_DESCRIPTOR_FORMAT(CMD) (((CMD) == ETH_DMAENHANCEDDESCRIPTOR_ENABLE) \|\| \
Kojto	108:34e6b704fe68	306	((CMD) == ETH_DMAENHANCEDDESCRIPTOR_DISABLE))
Kojto	108:34e6b704fe68	307
Kojto	108:34e6b704fe68	308
Kojto	108:34e6b704fe68	309	/**
Kojto	108:34e6b704fe68	310	* @}
Kojto	108:34e6b704fe68	311	*/
Kojto	108:34e6b704fe68	312
Kojto	108:34e6b704fe68	313	/** @addtogroup ETH_Private_Defines
Kojto	108:34e6b704fe68	314	* @{
Kojto	108:34e6b704fe68	315	*/
Kojto	108:34e6b704fe68	316	/* Delay to wait when writing to some Ethernet registers */
Kojto	108:34e6b704fe68	317	#define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001)
Kojto	108:34e6b704fe68	318
Kojto	108:34e6b704fe68	319	/* ETHERNET Errors */
Kojto	108:34e6b704fe68	320	#define ETH_SUCCESS ((uint32_t)0)
Kojto	108:34e6b704fe68	321	#define ETH_ERROR ((uint32_t)1)
Kojto	108:34e6b704fe68	322
Kojto	108:34e6b704fe68	323	/* ETHERNET DMA Tx descriptors Collision Count Shift */
Kojto	108:34e6b704fe68	324	#define ETH_DMATXDESC_COLLISION_COUNTSHIFT ((uint32_t)3)
Kojto	108:34e6b704fe68	325
Kojto	108:34e6b704fe68	326	/* ETHERNET DMA Tx descriptors Buffer2 Size Shift */
Kojto	108:34e6b704fe68	327	#define ETH_DMATXDESC_BUFFER2_SIZESHIFT ((uint32_t)16)
Kojto	108:34e6b704fe68	328
Kojto	108:34e6b704fe68	329	/* ETHERNET DMA Rx descriptors Frame Length Shift */
Kojto	108:34e6b704fe68	330	#define ETH_DMARXDESC_FRAME_LENGTHSHIFT ((uint32_t)16)
Kojto	108:34e6b704fe68	331
Kojto	108:34e6b704fe68	332	/* ETHERNET DMA Rx descriptors Buffer2 Size Shift */
Kojto	108:34e6b704fe68	333	#define ETH_DMARXDESC_BUFFER2_SIZESHIFT ((uint32_t)16)
Kojto	108:34e6b704fe68	334
Kojto	108:34e6b704fe68	335	/* ETHERNET DMA Rx descriptors Frame length Shift */
Kojto	108:34e6b704fe68	336	#define ETH_DMARXDESC_FRAMELENGTHSHIFT ((uint32_t)16)
Kojto	108:34e6b704fe68	337
Kojto	108:34e6b704fe68	338	/* ETHERNET MAC address offsets */
Kojto	108:34e6b704fe68	339	#define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + (uint32_t)0x40) /* ETHERNET MAC address high offset */
Kojto	108:34e6b704fe68	340	#define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + (uint32_t)0x44) /* ETHERNET MAC address low offset */
Kojto	108:34e6b704fe68	341
Kojto	108:34e6b704fe68	342	/* ETHERNET MACMIIAR register Mask */
Kojto	108:34e6b704fe68	343	#define ETH_MACMIIAR_CR_MASK ((uint32_t)0xFFFFFFE3)
Kojto	108:34e6b704fe68	344
Kojto	108:34e6b704fe68	345	/* ETHERNET MACCR register Mask */
Kojto	108:34e6b704fe68	346	#define ETH_MACCR_CLEAR_MASK ((uint32_t)0xFF20810F)
Kojto	108:34e6b704fe68	347
Kojto	108:34e6b704fe68	348	/* ETHERNET MACFCR register Mask */
Kojto	108:34e6b704fe68	349	#define ETH_MACFCR_CLEAR_MASK ((uint32_t)0x0000FF41)
Kojto	108:34e6b704fe68	350
Kojto	108:34e6b704fe68	351	/* ETHERNET DMAOMR register Mask */
Kojto	108:34e6b704fe68	352	#define ETH_DMAOMR_CLEAR_MASK ((uint32_t)0xF8DE3F23)
Kojto	108:34e6b704fe68	353
Kojto	108:34e6b704fe68	354	/* ETHERNET Remote Wake-up frame register length */
Kojto	108:34e6b704fe68	355	#define ETH_WAKEUP_REGISTER_LENGTH 8
Kojto	108:34e6b704fe68	356
Kojto	108:34e6b704fe68	357	/* ETHERNET Missed frames counter Shift */
Kojto	108:34e6b704fe68	358	#define ETH_DMA_RX_OVERFLOW_MISSEDFRAMES_COUNTERSHIFT 17
Kojto	108:34e6b704fe68	359	/**
Kojto	108:34e6b704fe68	360	* @}
Kojto	108:34e6b704fe68	361	*/
Kojto	108:34e6b704fe68	362
Kojto	108:34e6b704fe68	363	/* Exported types ------------------------------------------------------------*/
Kojto	108:34e6b704fe68	364	/** @defgroup ETH_Exported_Types ETH Exported Types
Kojto	108:34e6b704fe68	365	* @{
Kojto	108:34e6b704fe68	366	*/
Kojto	108:34e6b704fe68	367
Kojto	108:34e6b704fe68	368	/**
Kojto	108:34e6b704fe68	369	* @brief HAL State structures definition
Kojto	108:34e6b704fe68	370	*/
Kojto	108:34e6b704fe68	371	typedef enum
Kojto	108:34e6b704fe68	372	{
Kojto	108:34e6b704fe68	373	HAL_ETH_STATE_RESET = 0x00, /!< Peripheral not yet Initialized or disabled /
Kojto	108:34e6b704fe68	374	HAL_ETH_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
Kojto	108:34e6b704fe68	375	HAL_ETH_STATE_BUSY = 0x02, /!< an internal process is ongoing /
Kojto	108:34e6b704fe68	376	HAL_ETH_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
Kojto	108:34e6b704fe68	377	HAL_ETH_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
Kojto	108:34e6b704fe68	378	HAL_ETH_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
Kojto	108:34e6b704fe68	379	HAL_ETH_STATE_BUSY_WR = 0x42, /!< Write process is ongoing /
Kojto	108:34e6b704fe68	380	HAL_ETH_STATE_BUSY_RD = 0x82, /!< Read process is ongoing /
Kojto	108:34e6b704fe68	381	HAL_ETH_STATE_TIMEOUT = 0x03, /!< Timeout state /
Kojto	108:34e6b704fe68	382	HAL_ETH_STATE_ERROR = 0x04 /!< Reception process is ongoing /
Kojto	108:34e6b704fe68	383	}HAL_ETH_StateTypeDef;
Kojto	108:34e6b704fe68	384
Kojto	108:34e6b704fe68	385	/**
Kojto	108:34e6b704fe68	386	* @brief ETH Init Structure definition
Kojto	108:34e6b704fe68	387	*/
Kojto	108:34e6b704fe68	388
Kojto	108:34e6b704fe68	389	typedef struct
Kojto	108:34e6b704fe68	390	{
Kojto	108:34e6b704fe68	391	uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
Kojto	108:34e6b704fe68	392	The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
Kojto	108:34e6b704fe68	393	and the mode (half/full-duplex).
Kojto	108:34e6b704fe68	394	This parameter can be a value of @ref ETH_AutoNegotiation */
Kojto	108:34e6b704fe68	395
Kojto	108:34e6b704fe68	396	uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
Kojto	108:34e6b704fe68	397	This parameter can be a value of @ref ETH_Speed */
Kojto	108:34e6b704fe68	398
Kojto	108:34e6b704fe68	399	uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
Kojto	108:34e6b704fe68	400	This parameter can be a value of @ref ETH_Duplex_Mode */
Kojto	108:34e6b704fe68	401
Kojto	108:34e6b704fe68	402	uint16_t PhyAddress; /*!< Ethernet PHY address.
Kojto	108:34e6b704fe68	403	This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
Kojto	108:34e6b704fe68	404
Kojto	108:34e6b704fe68	405	uint8_t MACAddr; /!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
Kojto	108:34e6b704fe68	406
Kojto	108:34e6b704fe68	407	uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
Kojto	108:34e6b704fe68	408	This parameter can be a value of @ref ETH_Rx_Mode */
Kojto	108:34e6b704fe68	409
Kojto	108:34e6b704fe68	410	uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
Kojto	108:34e6b704fe68	411	This parameter can be a value of @ref ETH_Checksum_Mode */
Kojto	108:34e6b704fe68	412
Kojto	108:34e6b704fe68	413	uint32_t MediaInterface ; /*!< Selects the media-independent interface or the reduced media-independent interface.
Kojto	108:34e6b704fe68	414	This parameter can be a value of @ref ETH_Media_Interface */
Kojto	108:34e6b704fe68	415
Kojto	108:34e6b704fe68	416	} ETH_InitTypeDef;
Kojto	108:34e6b704fe68	417
Kojto	108:34e6b704fe68	418
Kojto	108:34e6b704fe68	419	/**
Kojto	108:34e6b704fe68	420	* @brief ETH MAC Configuration Structure definition
Kojto	108:34e6b704fe68	421	*/
Kojto	108:34e6b704fe68	422
Kojto	108:34e6b704fe68	423	typedef struct
Kojto	108:34e6b704fe68	424	{
Kojto	108:34e6b704fe68	425	uint32_t Watchdog; /*!< Selects or not the Watchdog timer
Kojto	108:34e6b704fe68	426	When enabled, the MAC allows no more then 2048 bytes to be received.
Kojto	108:34e6b704fe68	427	When disabled, the MAC can receive up to 16384 bytes.
Kojto	108:34e6b704fe68	428	This parameter can be a value of @ref ETH_Watchdog */
Kojto	108:34e6b704fe68	429
Kojto	108:34e6b704fe68	430	uint32_t Jabber; /*!< Selects or not Jabber timer
Kojto	108:34e6b704fe68	431	When enabled, the MAC allows no more then 2048 bytes to be sent.
Kojto	108:34e6b704fe68	432	When disabled, the MAC can send up to 16384 bytes.
Kojto	108:34e6b704fe68	433	This parameter can be a value of @ref ETH_Jabber */
Kojto	108:34e6b704fe68	434
Kojto	108:34e6b704fe68	435	uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
Kojto	108:34e6b704fe68	436	This parameter can be a value of @ref ETH_Inter_Frame_Gap */
Kojto	108:34e6b704fe68	437
Kojto	108:34e6b704fe68	438	uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
Kojto	108:34e6b704fe68	439	This parameter can be a value of @ref ETH_Carrier_Sense */
Kojto	108:34e6b704fe68	440
Kojto	108:34e6b704fe68	441	uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
Kojto	108:34e6b704fe68	442	ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
Kojto	108:34e6b704fe68	443	in Half-Duplex mode.
Kojto	108:34e6b704fe68	444	This parameter can be a value of @ref ETH_Receive_Own */
Kojto	108:34e6b704fe68	445
Kojto	108:34e6b704fe68	446	uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
Kojto	108:34e6b704fe68	447	This parameter can be a value of @ref ETH_Loop_Back_Mode */
Kojto	108:34e6b704fe68	448
Kojto	108:34e6b704fe68	449	uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
Kojto	108:34e6b704fe68	450	This parameter can be a value of @ref ETH_Checksum_Offload */
Kojto	108:34e6b704fe68	451
Kojto	108:34e6b704fe68	452	uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
Kojto	108:34e6b704fe68	453	when a collision occurs (Half-Duplex mode).
Kojto	108:34e6b704fe68	454	This parameter can be a value of @ref ETH_Retry_Transmission */
Kojto	108:34e6b704fe68	455
Kojto	108:34e6b704fe68	456	uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
Kojto	108:34e6b704fe68	457	This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
Kojto	108:34e6b704fe68	458
Kojto	108:34e6b704fe68	459	uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
Kojto	108:34e6b704fe68	460	This parameter can be a value of @ref ETH_Back_Off_Limit */
Kojto	108:34e6b704fe68	461
Kojto	108:34e6b704fe68	462	uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
Kojto	108:34e6b704fe68	463	This parameter can be a value of @ref ETH_Deferral_Check */
Kojto	108:34e6b704fe68	464
Kojto	108:34e6b704fe68	465	uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
Kojto	108:34e6b704fe68	466	This parameter can be a value of @ref ETH_Receive_All */
Kojto	108:34e6b704fe68	467
Kojto	108:34e6b704fe68	468	uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
Kojto	108:34e6b704fe68	469	This parameter can be a value of @ref ETH_Source_Addr_Filter */
Kojto	108:34e6b704fe68	470
Kojto	108:34e6b704fe68	471	uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
Kojto	108:34e6b704fe68	472	This parameter can be a value of @ref ETH_Pass_Control_Frames */
Kojto	108:34e6b704fe68	473
Kojto	108:34e6b704fe68	474	uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
Kojto	108:34e6b704fe68	475	This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
Kojto	108:34e6b704fe68	476
Kojto	108:34e6b704fe68	477	uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
Kojto	108:34e6b704fe68	478	This parameter can be a value of @ref ETH_Destination_Addr_Filter */
Kojto	108:34e6b704fe68	479
Kojto	108:34e6b704fe68	480	uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
Kojto	108:34e6b704fe68	481	This parameter can be a value of @ref ETH_Promiscuous_Mode */
Kojto	108:34e6b704fe68	482
Kojto	108:34e6b704fe68	483	uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
Kojto	108:34e6b704fe68	484	This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
Kojto	108:34e6b704fe68	485
Kojto	108:34e6b704fe68	486	uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
Kojto	108:34e6b704fe68	487	This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
Kojto	108:34e6b704fe68	488
Kojto	108:34e6b704fe68	489	uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
Kojto	108:34e6b704fe68	490	This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
Kojto	108:34e6b704fe68	491
Kojto	108:34e6b704fe68	492	uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
Kojto	108:34e6b704fe68	493	This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
Kojto	108:34e6b704fe68	494
Kojto	108:34e6b704fe68	495	uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
Kojto	108:34e6b704fe68	496	This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
Kojto	108:34e6b704fe68	497
Kojto	108:34e6b704fe68	498	uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
Kojto	108:34e6b704fe68	499	This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
Kojto	108:34e6b704fe68	500
Kojto	108:34e6b704fe68	501	uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
Kojto	108:34e6b704fe68	502	automatic retransmission of PAUSE Frame.
Kojto	108:34e6b704fe68	503	This parameter can be a value of @ref ETH_Pause_Low_Threshold */
Kojto	108:34e6b704fe68	504
Kojto	108:34e6b704fe68	505	uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
Kojto	108:34e6b704fe68	506	unicast address and unique multicast address).
Kojto	108:34e6b704fe68	507	This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
Kojto	108:34e6b704fe68	508
Kojto	108:34e6b704fe68	509	uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
Kojto	108:34e6b704fe68	510	disable its transmitter for a specified time (Pause Time)
Kojto	108:34e6b704fe68	511	This parameter can be a value of @ref ETH_Receive_Flow_Control */
Kojto	108:34e6b704fe68	512
Kojto	108:34e6b704fe68	513	uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
Kojto	108:34e6b704fe68	514	or the MAC back-pressure operation (Half-Duplex mode)
Kojto	108:34e6b704fe68	515	This parameter can be a value of @ref ETH_Transmit_Flow_Control */
Kojto	108:34e6b704fe68	516
Kojto	108:34e6b704fe68	517	uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
Kojto	108:34e6b704fe68	518	comparison and filtering.
Kojto	108:34e6b704fe68	519	This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
Kojto	108:34e6b704fe68	520
Kojto	108:34e6b704fe68	521	uint32_t VLANTagIdentifier; /!< Holds the VLAN tag identifier for receive frames /
Kojto	108:34e6b704fe68	522
Kojto	108:34e6b704fe68	523	} ETH_MACInitTypeDef;
Kojto	108:34e6b704fe68	524
Kojto	108:34e6b704fe68	525
Kojto	108:34e6b704fe68	526	/**
Kojto	108:34e6b704fe68	527	* @brief ETH DMA Configuration Structure definition
Kojto	108:34e6b704fe68	528	*/
Kojto	108:34e6b704fe68	529
Kojto	108:34e6b704fe68	530	typedef struct
Kojto	108:34e6b704fe68	531	{
Kojto	108:34e6b704fe68	532	uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
Kojto	108:34e6b704fe68	533	This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
Kojto	108:34e6b704fe68	534
Kojto	108:34e6b704fe68	535	uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
Kojto	108:34e6b704fe68	536	This parameter can be a value of @ref ETH_Receive_Store_Forward */
Kojto	108:34e6b704fe68	537
Kojto	108:34e6b704fe68	538	uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
Kojto	108:34e6b704fe68	539	This parameter can be a value of @ref ETH_Flush_Received_Frame */
Kojto	108:34e6b704fe68	540
Kojto	108:34e6b704fe68	541	uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
Kojto	108:34e6b704fe68	542	This parameter can be a value of @ref ETH_Transmit_Store_Forward */
Kojto	108:34e6b704fe68	543
Kojto	108:34e6b704fe68	544	uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
Kojto	108:34e6b704fe68	545	This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
Kojto	108:34e6b704fe68	546
Kojto	108:34e6b704fe68	547	uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
Kojto	108:34e6b704fe68	548	This parameter can be a value of @ref ETH_Forward_Error_Frames */
Kojto	108:34e6b704fe68	549
Kojto	108:34e6b704fe68	550	uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
Kojto	108:34e6b704fe68	551	and length less than 64 bytes) including pad-bytes and CRC)
Kojto	108:34e6b704fe68	552	This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
Kojto	108:34e6b704fe68	553
Kojto	108:34e6b704fe68	554	uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
Kojto	108:34e6b704fe68	555	This parameter can be a value of @ref ETH_Receive_Threshold_Control */
Kojto	108:34e6b704fe68	556
Kojto	108:34e6b704fe68	557	uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
Kojto	108:34e6b704fe68	558	frame of Transmit data even before obtaining the status for the first frame.
Kojto	108:34e6b704fe68	559	This parameter can be a value of @ref ETH_Second_Frame_Operate */
Kojto	108:34e6b704fe68	560
Kojto	108:34e6b704fe68	561	uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
Kojto	108:34e6b704fe68	562	This parameter can be a value of @ref ETH_Address_Aligned_Beats */
Kojto	108:34e6b704fe68	563
Kojto	108:34e6b704fe68	564	uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
Kojto	108:34e6b704fe68	565	This parameter can be a value of @ref ETH_Fixed_Burst */
Kojto	108:34e6b704fe68	566
Kojto	108:34e6b704fe68	567	uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
Kojto	108:34e6b704fe68	568	This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
Kojto	108:34e6b704fe68	569
Kojto	108:34e6b704fe68	570	uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
Kojto	108:34e6b704fe68	571	This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
Kojto	108:34e6b704fe68	572
Kojto	108:34e6b704fe68	573	uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
Kojto	108:34e6b704fe68	574	This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
Kojto	108:34e6b704fe68	575
Kojto	108:34e6b704fe68	576	uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
Kojto	108:34e6b704fe68	577	This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
Kojto	108:34e6b704fe68	578
Kojto	108:34e6b704fe68	579	uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
Kojto	108:34e6b704fe68	580	This parameter can be a value of @ref ETH_DMA_Arbitration */
Kojto	108:34e6b704fe68	581	} ETH_DMAInitTypeDef;
Kojto	108:34e6b704fe68	582
Kojto	108:34e6b704fe68	583
Kojto	108:34e6b704fe68	584	/**
Kojto	108:34e6b704fe68	585	* @brief ETH DMA Descriptors data structure definition
Kojto	108:34e6b704fe68	586	*/
Kojto	108:34e6b704fe68	587
Kojto	108:34e6b704fe68	588	typedef struct
Kojto	108:34e6b704fe68	589	{
Kojto	108:34e6b704fe68	590	__IO uint32_t Status; /!< Status /
Kojto	108:34e6b704fe68	591
Kojto	108:34e6b704fe68	592	uint32_t ControlBufferSize; /!< Control and Buffer1, Buffer2 lengths /
Kojto	108:34e6b704fe68	593
Kojto	108:34e6b704fe68	594	uint32_t Buffer1Addr; /!< Buffer1 address pointer /
Kojto	108:34e6b704fe68	595
Kojto	108:34e6b704fe68	596	uint32_t Buffer2NextDescAddr; /!< Buffer2 or next descriptor address pointer /
Kojto	108:34e6b704fe68	597
Kojto	108:34e6b704fe68	598	/!< Enhanced ETHERNET DMA PTP Descriptors /
Kojto	108:34e6b704fe68	599	uint32_t ExtendedStatus; /!< Extended status for PTP receive descriptor /
Kojto	108:34e6b704fe68	600
Kojto	108:34e6b704fe68	601	uint32_t Reserved1; /!< Reserved /
Kojto	108:34e6b704fe68	602
Kojto	108:34e6b704fe68	603	uint32_t TimeStampLow; /!< Time Stamp Low value for transmit and receive /
Kojto	108:34e6b704fe68	604
Kojto	108:34e6b704fe68	605	uint32_t TimeStampHigh; /!< Time Stamp High value for transmit and receive /
Kojto	108:34e6b704fe68	606
Kojto	108:34e6b704fe68	607	} ETH_DMADescTypeDef;
Kojto	108:34e6b704fe68	608
Kojto	108:34e6b704fe68	609
Kojto	108:34e6b704fe68	610	/**
Kojto	108:34e6b704fe68	611	* @brief Received Frame Informations structure definition
Kojto	108:34e6b704fe68	612	*/
Kojto	108:34e6b704fe68	613	typedef struct
Kojto	108:34e6b704fe68	614	{
Kojto	108:34e6b704fe68	615	ETH_DMADescTypeDef FSRxDesc; /!< First Segment Rx Desc */
Kojto	108:34e6b704fe68	616
Kojto	108:34e6b704fe68	617	ETH_DMADescTypeDef LSRxDesc; /!< Last Segment Rx Desc */
Kojto	108:34e6b704fe68	618
Kojto	108:34e6b704fe68	619	uint32_t SegCount; /!< Segment count /
Kojto	108:34e6b704fe68	620
Kojto	108:34e6b704fe68	621	uint32_t length; /!< Frame length /
Kojto	108:34e6b704fe68	622
Kojto	108:34e6b704fe68	623	uint32_t buffer; /!< Frame buffer /
Kojto	108:34e6b704fe68	624
Kojto	108:34e6b704fe68	625	} ETH_DMARxFrameInfos;
Kojto	108:34e6b704fe68	626
Kojto	108:34e6b704fe68	627
Kojto	108:34e6b704fe68	628	/**
Kojto	108:34e6b704fe68	629	* @brief ETH Handle Structure definition
Kojto	108:34e6b704fe68	630	*/
Kojto	108:34e6b704fe68	631
Kojto	108:34e6b704fe68	632	typedef struct
Kojto	108:34e6b704fe68	633	{
Kojto	108:34e6b704fe68	634	ETH_TypeDef Instance; /!< Register base address */
Kojto	108:34e6b704fe68	635
Kojto	108:34e6b704fe68	636	ETH_InitTypeDef Init; /!< Ethernet Init Configuration /
Kojto	108:34e6b704fe68	637
Kojto	108:34e6b704fe68	638	uint32_t LinkStatus; /!< Ethernet link status /
Kojto	108:34e6b704fe68	639
Kojto	108:34e6b704fe68	640	ETH_DMADescTypeDef RxDesc; /!< Rx descriptor to Get */
Kojto	108:34e6b704fe68	641
Kojto	108:34e6b704fe68	642	ETH_DMADescTypeDef TxDesc; /!< Tx descriptor to Set */
Kojto	108:34e6b704fe68	643
Kojto	108:34e6b704fe68	644	ETH_DMARxFrameInfos RxFrameInfos; /!< last Rx frame infos /
Kojto	108:34e6b704fe68	645
Kojto	108:34e6b704fe68	646	__IO HAL_ETH_StateTypeDef State; /!< ETH communication state /
Kojto	108:34e6b704fe68	647
Kojto	108:34e6b704fe68	648	HAL_LockTypeDef Lock; /!< ETH Lock /
Kojto	108:34e6b704fe68	649
Kojto	108:34e6b704fe68	650	} ETH_HandleTypeDef;
Kojto	108:34e6b704fe68	651
Kojto	108:34e6b704fe68	652	/**
Kojto	108:34e6b704fe68	653	* @}
Kojto	108:34e6b704fe68	654	*/
Kojto	108:34e6b704fe68	655
Kojto	108:34e6b704fe68	656	/* Exported constants --------------------------------------------------------*/
Kojto	108:34e6b704fe68	657	/** @defgroup ETH_Exported_Constants ETH Exported Constants
Kojto	108:34e6b704fe68	658	* @{
Kojto	108:34e6b704fe68	659	*/
Kojto	108:34e6b704fe68	660
Kojto	108:34e6b704fe68	661	/** @defgroup ETH_Buffers_setting ETH Buffers setting
Kojto	108:34e6b704fe68	662	* @{
Kojto	108:34e6b704fe68	663	*/
Kojto	108:34e6b704fe68	664	#define ETH_MAX_PACKET_SIZE ((uint32_t)1524) /!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC /
Kojto	108:34e6b704fe68	665	#define ETH_HEADER ((uint32_t)14) /!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type /
Kojto	108:34e6b704fe68	666	#define ETH_CRC ((uint32_t)4) /!< Ethernet CRC /
Kojto	108:34e6b704fe68	667	#define ETH_EXTRA ((uint32_t)2) /!< Extra bytes in some cases /
Kojto	108:34e6b704fe68	668	#define ETH_VLAN_TAG ((uint32_t)4) /!< optional 802.1q VLAN Tag /
Kojto	108:34e6b704fe68	669	#define ETH_MIN_ETH_PAYLOAD ((uint32_t)46) /!< Minimum Ethernet payload size /
Kojto	108:34e6b704fe68	670	#define ETH_MAX_ETH_PAYLOAD ((uint32_t)1500) /!< Maximum Ethernet payload size /
Kojto	108:34e6b704fe68	671	#define ETH_JUMBO_FRAME_PAYLOAD ((uint32_t)9000) /!< Jumbo frame payload size /
Kojto	108:34e6b704fe68	672
Kojto	108:34e6b704fe68	673	/* Ethernet driver receive buffers are organized in a chained linked-list, when
Kojto	108:34e6b704fe68	674	an ethernet packet is received, the Rx-DMA will transfer the packet from RxFIFO
Kojto	108:34e6b704fe68	675	to the driver receive buffers memory.
Kojto	108:34e6b704fe68	676
Kojto	108:34e6b704fe68	677	Depending on the size of the received ethernet packet and the size of
Kojto	108:34e6b704fe68	678	each ethernet driver receive buffer, the received packet can take one or more
Kojto	108:34e6b704fe68	679	ethernet driver receive buffer.
Kojto	108:34e6b704fe68	680
Kojto	108:34e6b704fe68	681	In below are defined the size of one ethernet driver receive buffer ETH_RX_BUF_SIZE
Kojto	108:34e6b704fe68	682	and the total count of the driver receive buffers ETH_RXBUFNB.
Kojto	108:34e6b704fe68	683
Kojto	108:34e6b704fe68	684	The configured value for ETH_RX_BUF_SIZE and ETH_RXBUFNB are only provided as
Kojto	108:34e6b704fe68	685	example, they can be reconfigured in the application layer to fit the application
Kojto	108:34e6b704fe68	686	needs */
Kojto	108:34e6b704fe68	687
Kojto	108:34e6b704fe68	688	/* Here we configure each Ethernet driver receive buffer to fit the Max size Ethernet
Kojto	108:34e6b704fe68	689	packet */
Kojto	108:34e6b704fe68	690	#ifndef ETH_RX_BUF_SIZE
Kojto	108:34e6b704fe68	691	#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
Kojto	108:34e6b704fe68	692	#endif
Kojto	108:34e6b704fe68	693
Kojto	108:34e6b704fe68	694	/* 5 Ethernet driver receive buffers are used (in a chained linked list)*/
Kojto	108:34e6b704fe68	695	#ifndef ETH_RXBUFNB
Kojto	108:34e6b704fe68	696	#define ETH_RXBUFNB ((uint32_t)5 /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
Kojto	108:34e6b704fe68	697	#endif
Kojto	108:34e6b704fe68	698
Kojto	108:34e6b704fe68	699
Kojto	108:34e6b704fe68	700	/* Ethernet driver transmit buffers are organized in a chained linked-list, when
Kojto	108:34e6b704fe68	701	an ethernet packet is transmitted, Tx-DMA will transfer the packet from the
Kojto	108:34e6b704fe68	702	driver transmit buffers memory to the TxFIFO.
Kojto	108:34e6b704fe68	703
Kojto	108:34e6b704fe68	704	Depending on the size of the Ethernet packet to be transmitted and the size of
Kojto	108:34e6b704fe68	705	each ethernet driver transmit buffer, the packet to be transmitted can take
Kojto	108:34e6b704fe68	706	one or more ethernet driver transmit buffer.
Kojto	108:34e6b704fe68	707
Kojto	108:34e6b704fe68	708	In below are defined the size of one ethernet driver transmit buffer ETH_TX_BUF_SIZE
Kojto	108:34e6b704fe68	709	and the total count of the driver transmit buffers ETH_TXBUFNB.
Kojto	108:34e6b704fe68	710
Kojto	108:34e6b704fe68	711	The configured value for ETH_TX_BUF_SIZE and ETH_TXBUFNB are only provided as
Kojto	108:34e6b704fe68	712	example, they can be reconfigured in the application layer to fit the application
Kojto	108:34e6b704fe68	713	needs */
Kojto	108:34e6b704fe68	714
Kojto	108:34e6b704fe68	715	/* Here we configure each Ethernet driver transmit buffer to fit the Max size Ethernet
Kojto	108:34e6b704fe68	716	packet */
Kojto	108:34e6b704fe68	717	#ifndef ETH_TX_BUF_SIZE
Kojto	108:34e6b704fe68	718	#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
Kojto	108:34e6b704fe68	719	#endif
Kojto	108:34e6b704fe68	720
Kojto	108:34e6b704fe68	721	/* 5 ethernet driver transmit buffers are used (in a chained linked list)*/
Kojto	108:34e6b704fe68	722	#ifndef ETH_TXBUFNB
Kojto	108:34e6b704fe68	723	#define ETH_TXBUFNB ((uint32_t)5 /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
Kojto	108:34e6b704fe68	724	#endif
Kojto	108:34e6b704fe68	725
Kojto	108:34e6b704fe68	726	/**
Kojto	108:34e6b704fe68	727	* @}
Kojto	108:34e6b704fe68	728	*/
Kojto	108:34e6b704fe68	729
Kojto	108:34e6b704fe68	730	/** @defgroup ETH_DMA_TX_Descriptor ETH DMA TX Descriptor
Kojto	108:34e6b704fe68	731	* @{
Kojto	108:34e6b704fe68	732	*/
Kojto	108:34e6b704fe68	733
Kojto	108:34e6b704fe68	734	/*
Kojto	108:34e6b704fe68	735	DMA Tx Descriptor
Kojto	108:34e6b704fe68	736	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	737	TDES0 \| OWN(31) \| CTRL[30:26] \| Reserved[25:24] \| CTRL[23:20] \| Reserved[19:17] \| Status[16:0] \|
Kojto	108:34e6b704fe68	738	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	739	TDES1 \| Reserved[31:29] \| Buffer2 ByteCount[28:16] \| Reserved[15:13] \| Buffer1 ByteCount[12:0] \|
Kojto	108:34e6b704fe68	740	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	741	TDES2 \| Buffer1 Address [31:0] \|
Kojto	108:34e6b704fe68	742	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	743	TDES3 \| Buffer2 Address [31:0] / Next Descriptor Address [31:0] \|
Kojto	108:34e6b704fe68	744	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	745	*/
Kojto	108:34e6b704fe68	746
Kojto	108:34e6b704fe68	747	/**
Kojto	108:34e6b704fe68	748	* @brief Bit definition of TDES0 register: DMA Tx descriptor status register
Kojto	108:34e6b704fe68	749	*/
Kojto	108:34e6b704fe68	750	#define ETH_DMATXDESC_OWN ((uint32_t)0x80000000) /!< OWN bit: descriptor is owned by DMA engine /
Kojto	108:34e6b704fe68	751	#define ETH_DMATXDESC_IC ((uint32_t)0x40000000) /!< Interrupt on Completion /
Kojto	108:34e6b704fe68	752	#define ETH_DMATXDESC_LS ((uint32_t)0x20000000) /!< Last Segment /
Kojto	108:34e6b704fe68	753	#define ETH_DMATXDESC_FS ((uint32_t)0x10000000) /!< First Segment /
Kojto	108:34e6b704fe68	754	#define ETH_DMATXDESC_DC ((uint32_t)0x08000000) /!< Disable CRC /
Kojto	108:34e6b704fe68	755	#define ETH_DMATXDESC_DP ((uint32_t)0x04000000) /!< Disable Padding /
Kojto	108:34e6b704fe68	756	#define ETH_DMATXDESC_TTSE ((uint32_t)0x02000000) /!< Transmit Time Stamp Enable /
Kojto	108:34e6b704fe68	757	#define ETH_DMATXDESC_CIC ((uint32_t)0x00C00000) /!< Checksum Insertion Control: 4 cases /
Kojto	108:34e6b704fe68	758	#define ETH_DMATXDESC_CIC_BYPASS ((uint32_t)0x00000000) /!< Do Nothing: Checksum Engine is bypassed /
Kojto	108:34e6b704fe68	759	#define ETH_DMATXDESC_CIC_IPV4HEADER ((uint32_t)0x00400000) /!< IPV4 header Checksum Insertion /
Kojto	108:34e6b704fe68	760	#define ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT ((uint32_t)0x00800000) /!< TCP/UDP/ICMP Checksum Insertion calculated over segment only /
Kojto	108:34e6b704fe68	761	#define ETH_DMATXDESC_CIC_TCPUDPICMP_FULL ((uint32_t)0x00C00000) /!< TCP/UDP/ICMP Checksum Insertion fully calculated /
Kojto	108:34e6b704fe68	762	#define ETH_DMATXDESC_TER ((uint32_t)0x00200000) /!< Transmit End of Ring /
Kojto	108:34e6b704fe68	763	#define ETH_DMATXDESC_TCH ((uint32_t)0x00100000) /!< Second Address Chained /
Kojto	108:34e6b704fe68	764	#define ETH_DMATXDESC_TTSS ((uint32_t)0x00020000) /!< Tx Time Stamp Status /
Kojto	108:34e6b704fe68	765	#define ETH_DMATXDESC_IHE ((uint32_t)0x00010000) /!< IP Header Error /
Kojto	108:34e6b704fe68	766	#define ETH_DMATXDESC_ES ((uint32_t)0x00008000) /!< Error summary: OR of the following bits: UE \|\| ED \|\| EC \|\| LCO \|\| NC \|\| LCA \|\| FF \|\| JT /
Kojto	108:34e6b704fe68	767	#define ETH_DMATXDESC_JT ((uint32_t)0x00004000) /!< Jabber Timeout /
Kojto	108:34e6b704fe68	768	#define ETH_DMATXDESC_FF ((uint32_t)0x00002000) /!< Frame Flushed: DMA/MTL flushed the frame due to SW flush /
Kojto	108:34e6b704fe68	769	#define ETH_DMATXDESC_PCE ((uint32_t)0x00001000) /!< Payload Checksum Error /
Kojto	108:34e6b704fe68	770	#define ETH_DMATXDESC_LCA ((uint32_t)0x00000800) /!< Loss of Carrier: carrier lost during transmission /
Kojto	108:34e6b704fe68	771	#define ETH_DMATXDESC_NC ((uint32_t)0x00000400) /!< No Carrier: no carrier signal from the transceiver /
Kojto	108:34e6b704fe68	772	#define ETH_DMATXDESC_LCO ((uint32_t)0x00000200) /!< Late Collision: transmission aborted due to collision /
Kojto	108:34e6b704fe68	773	#define ETH_DMATXDESC_EC ((uint32_t)0x00000100) /!< Excessive Collision: transmission aborted after 16 collisions /
Kojto	108:34e6b704fe68	774	#define ETH_DMATXDESC_VF ((uint32_t)0x00000080) /!< VLAN Frame /
Kojto	108:34e6b704fe68	775	#define ETH_DMATXDESC_CC ((uint32_t)0x00000078) /!< Collision Count /
Kojto	108:34e6b704fe68	776	#define ETH_DMATXDESC_ED ((uint32_t)0x00000004) /!< Excessive Deferral /
Kojto	108:34e6b704fe68	777	#define ETH_DMATXDESC_UF ((uint32_t)0x00000002) /!< Underflow Error: late data arrival from the memory /
Kojto	108:34e6b704fe68	778	#define ETH_DMATXDESC_DB ((uint32_t)0x00000001) /!< Deferred Bit /
Kojto	108:34e6b704fe68	779
Kojto	108:34e6b704fe68	780	/**
Kojto	108:34e6b704fe68	781	* @brief Bit definition of TDES1 register
Kojto	108:34e6b704fe68	782	*/
Kojto	108:34e6b704fe68	783	#define ETH_DMATXDESC_TBS2 ((uint32_t)0x1FFF0000) /!< Transmit Buffer2 Size /
Kojto	108:34e6b704fe68	784	#define ETH_DMATXDESC_TBS1 ((uint32_t)0x00001FFF) /!< Transmit Buffer1 Size /
Kojto	108:34e6b704fe68	785
Kojto	108:34e6b704fe68	786	/**
Kojto	108:34e6b704fe68	787	* @brief Bit definition of TDES2 register
Kojto	108:34e6b704fe68	788	*/
Kojto	108:34e6b704fe68	789	#define ETH_DMATXDESC_B1AP ((uint32_t)0xFFFFFFFF) /!< Buffer1 Address Pointer /
Kojto	108:34e6b704fe68	790
Kojto	108:34e6b704fe68	791	/**
Kojto	108:34e6b704fe68	792	* @brief Bit definition of TDES3 register
Kojto	108:34e6b704fe68	793	*/
Kojto	108:34e6b704fe68	794	#define ETH_DMATXDESC_B2AP ((uint32_t)0xFFFFFFFF) /!< Buffer2 Address Pointer /
Kojto	108:34e6b704fe68	795
Kojto	108:34e6b704fe68	796	/*---------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	797	TDES6 \| Transmit Time Stamp Low [31:0] \|
Kojto	108:34e6b704fe68	798	-----------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	799	TDES7 \| Transmit Time Stamp High [31:0] \|
Kojto	108:34e6b704fe68	800	----------------------------------------------------------------------------------------------*/
Kojto	108:34e6b704fe68	801
Kojto	108:34e6b704fe68	802	/* Bit definition of TDES6 register */
Kojto	108:34e6b704fe68	803	#define ETH_DMAPTPTXDESC_TTSL ((uint32_t)0xFFFFFFFF) /* Transmit Time Stamp Low */
Kojto	108:34e6b704fe68	804
Kojto	108:34e6b704fe68	805	/* Bit definition of TDES7 register */
Kojto	108:34e6b704fe68	806	#define ETH_DMAPTPTXDESC_TTSH ((uint32_t)0xFFFFFFFF) /* Transmit Time Stamp High */
Kojto	108:34e6b704fe68	807
Kojto	108:34e6b704fe68	808	/**
Kojto	108:34e6b704fe68	809	* @}
Kojto	108:34e6b704fe68	810	*/
Kojto	108:34e6b704fe68	811	/** @defgroup ETH_DMA_RX_Descriptor ETH DMA RX Descriptor
Kojto	108:34e6b704fe68	812	* @{
Kojto	108:34e6b704fe68	813	*/
Kojto	108:34e6b704fe68	814
Kojto	108:34e6b704fe68	815	/*
Kojto	108:34e6b704fe68	816	DMA Rx Descriptor
Kojto	108:34e6b704fe68	817	--------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	818	RDES0 \| OWN(31) \| Status [30:0] \|
Kojto	108:34e6b704fe68	819	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	820	RDES1 \| CTRL(31) \| Reserved[30:29] \| Buffer2 ByteCount[28:16] \| CTRL[15:14] \| Reserved(13) \| Buffer1 ByteCount[12:0] \|
Kojto	108:34e6b704fe68	821	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	822	RDES2 \| Buffer1 Address [31:0] \|
Kojto	108:34e6b704fe68	823	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	824	RDES3 \| Buffer2 Address [31:0] / Next Descriptor Address [31:0] \|
Kojto	108:34e6b704fe68	825	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	826	*/
Kojto	108:34e6b704fe68	827
Kojto	108:34e6b704fe68	828	/**
Kojto	108:34e6b704fe68	829	* @brief Bit definition of RDES0 register: DMA Rx descriptor status register
Kojto	108:34e6b704fe68	830	*/
Kojto	108:34e6b704fe68	831	#define ETH_DMARXDESC_OWN ((uint32_t)0x80000000) /!< OWN bit: descriptor is owned by DMA engine /
Kojto	108:34e6b704fe68	832	#define ETH_DMARXDESC_AFM ((uint32_t)0x40000000) /!< DA Filter Fail for the rx frame /
Kojto	108:34e6b704fe68	833	#define ETH_DMARXDESC_FL ((uint32_t)0x3FFF0000) /!< Receive descriptor frame length /
Kojto	108:34e6b704fe68	834	#define ETH_DMARXDESC_ES ((uint32_t)0x00008000) /!< Error summary: OR of the following bits: DE \|\| OE \|\| IPC \|\| LC \|\| RWT \|\| RE \|\| CE /
Kojto	108:34e6b704fe68	835	#define ETH_DMARXDESC_DE ((uint32_t)0x00004000) /!< Descriptor error: no more descriptors for receive frame /
Kojto	108:34e6b704fe68	836	#define ETH_DMARXDESC_SAF ((uint32_t)0x00002000) /!< SA Filter Fail for the received frame /
Kojto	108:34e6b704fe68	837	#define ETH_DMARXDESC_LE ((uint32_t)0x00001000) /!< Frame size not matching with length field /
Kojto	108:34e6b704fe68	838	#define ETH_DMARXDESC_OE ((uint32_t)0x00000800) /!< Overflow Error: Frame was damaged due to buffer overflow /
Kojto	108:34e6b704fe68	839	#define ETH_DMARXDESC_VLAN ((uint32_t)0x00000400) /!< VLAN Tag: received frame is a VLAN frame /
Kojto	108:34e6b704fe68	840	#define ETH_DMARXDESC_FS ((uint32_t)0x00000200) /!< First descriptor of the frame /
Kojto	108:34e6b704fe68	841	#define ETH_DMARXDESC_LS ((uint32_t)0x00000100) /!< Last descriptor of the frame /
Kojto	108:34e6b704fe68	842	#define ETH_DMARXDESC_IPV4HCE ((uint32_t)0x00000080) /!< IPC Checksum Error: Rx Ipv4 header checksum error /
Kojto	108:34e6b704fe68	843	#define ETH_DMARXDESC_LC ((uint32_t)0x00000040) /!< Late collision occurred during reception /
Kojto	108:34e6b704fe68	844	#define ETH_DMARXDESC_FT ((uint32_t)0x00000020) /!< Frame type - Ethernet, otherwise 802.3 /
Kojto	108:34e6b704fe68	845	#define ETH_DMARXDESC_RWT ((uint32_t)0x00000010) /!< Receive Watchdog Timeout: watchdog timer expired during reception /
Kojto	108:34e6b704fe68	846	#define ETH_DMARXDESC_RE ((uint32_t)0x00000008) /!< Receive error: error reported by MII interface /
Kojto	108:34e6b704fe68	847	#define ETH_DMARXDESC_DBE ((uint32_t)0x00000004) /!< Dribble bit error: frame contains non int multiple of 8 bits /
Kojto	108:34e6b704fe68	848	#define ETH_DMARXDESC_CE ((uint32_t)0x00000002) /!< CRC error /
Kojto	108:34e6b704fe68	849	#define ETH_DMARXDESC_MAMPCE ((uint32_t)0x00000001) /!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error /
Kojto	108:34e6b704fe68	850
Kojto	108:34e6b704fe68	851	/**
Kojto	108:34e6b704fe68	852	* @brief Bit definition of RDES1 register
Kojto	108:34e6b704fe68	853	*/
Kojto	108:34e6b704fe68	854	#define ETH_DMARXDESC_DIC ((uint32_t)0x80000000) /!< Disable Interrupt on Completion /
Kojto	108:34e6b704fe68	855	#define ETH_DMARXDESC_RBS2 ((uint32_t)0x1FFF0000) /!< Receive Buffer2 Size /
Kojto	108:34e6b704fe68	856	#define ETH_DMARXDESC_RER ((uint32_t)0x00008000) /!< Receive End of Ring /
Kojto	108:34e6b704fe68	857	#define ETH_DMARXDESC_RCH ((uint32_t)0x00004000) /!< Second Address Chained /
Kojto	108:34e6b704fe68	858	#define ETH_DMARXDESC_RBS1 ((uint32_t)0x00001FFF) /!< Receive Buffer1 Size /
Kojto	108:34e6b704fe68	859
Kojto	108:34e6b704fe68	860	/**
Kojto	108:34e6b704fe68	861	* @brief Bit definition of RDES2 register
Kojto	108:34e6b704fe68	862	*/
Kojto	108:34e6b704fe68	863	#define ETH_DMARXDESC_B1AP ((uint32_t)0xFFFFFFFF) /!< Buffer1 Address Pointer /
Kojto	108:34e6b704fe68	864
Kojto	108:34e6b704fe68	865	/**
Kojto	108:34e6b704fe68	866	* @brief Bit definition of RDES3 register
Kojto	108:34e6b704fe68	867	*/
Kojto	108:34e6b704fe68	868	#define ETH_DMARXDESC_B2AP ((uint32_t)0xFFFFFFFF) /!< Buffer2 Address Pointer /
Kojto	108:34e6b704fe68	869
Kojto	108:34e6b704fe68	870	/*---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	871	RDES4 \| Reserved[31:15] \| Extended Status [14:0] \|
Kojto	108:34e6b704fe68	872	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	873	RDES5 \| Reserved[31:0] \|
Kojto	108:34e6b704fe68	874	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	875	RDES6 \| Receive Time Stamp Low [31:0] \|
Kojto	108:34e6b704fe68	876	---------------------------------------------------------------------------------------------------------------------
Kojto	108:34e6b704fe68	877	RDES7 \| Receive Time Stamp High [31:0] \|
Kojto	108:34e6b704fe68	878	--------------------------------------------------------------------------------------------------------------------*/
Kojto	108:34e6b704fe68	879
Kojto	108:34e6b704fe68	880	/* Bit definition of RDES4 register */
Kojto	108:34e6b704fe68	881	#define ETH_DMAPTPRXDESC_PTPV ((uint32_t)0x00002000) /* PTP Version */
Kojto	108:34e6b704fe68	882	#define ETH_DMAPTPRXDESC_PTPFT ((uint32_t)0x00001000) /* PTP Frame Type */
Kojto	108:34e6b704fe68	883	#define ETH_DMAPTPRXDESC_PTPMT ((uint32_t)0x00000F00) /* PTP Message Type */
Kojto	108:34e6b704fe68	884	#define ETH_DMAPTPRXDESC_PTPMT_SYNC ((uint32_t)0x00000100) /* SYNC message (all clock types) */
Kojto	108:34e6b704fe68	885	#define ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP ((uint32_t)0x00000200) /* FollowUp message (all clock types) */
Kojto	108:34e6b704fe68	886	#define ETH_DMAPTPRXDESC_PTPMT_DELAYREQ ((uint32_t)0x00000300) /* DelayReq message (all clock types) */
Kojto	108:34e6b704fe68	887	#define ETH_DMAPTPRXDESC_PTPMT_DELAYRESP ((uint32_t)0x00000400) /* DelayResp message (all clock types) */
Kojto	108:34e6b704fe68	888	#define ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE ((uint32_t)0x00000500) /* PdelayReq message (peer-to-peer transparent clock) or Announce message (Ordinary or Boundary clock) */
Kojto	108:34e6b704fe68	889	#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG ((uint32_t)0x00000600) /* PdelayResp message (peer-to-peer transparent clock) or Management message (Ordinary or Boundary clock) */
Kojto	108:34e6b704fe68	890	#define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL ((uint32_t)0x00000700) /* PdelayRespFollowUp message (peer-to-peer transparent clock) or Signaling message (Ordinary or Boundary clock) */
Kojto	108:34e6b704fe68	891	#define ETH_DMAPTPRXDESC_IPV6PR ((uint32_t)0x00000080) /* IPv6 Packet Received */
Kojto	108:34e6b704fe68	892	#define ETH_DMAPTPRXDESC_IPV4PR ((uint32_t)0x00000040) /* IPv4 Packet Received */
Kojto	108:34e6b704fe68	893	#define ETH_DMAPTPRXDESC_IPCB ((uint32_t)0x00000020) /* IP Checksum Bypassed */
Kojto	108:34e6b704fe68	894	#define ETH_DMAPTPRXDESC_IPPE ((uint32_t)0x00000010) /* IP Payload Error */
Kojto	108:34e6b704fe68	895	#define ETH_DMAPTPRXDESC_IPHE ((uint32_t)0x00000008) /* IP Header Error */
Kojto	108:34e6b704fe68	896	#define ETH_DMAPTPRXDESC_IPPT ((uint32_t)0x00000007) /* IP Payload Type */
Kojto	108:34e6b704fe68	897	#define ETH_DMAPTPRXDESC_IPPT_UDP ((uint32_t)0x00000001) /* UDP payload encapsulated in the IP datagram */
Kojto	108:34e6b704fe68	898	#define ETH_DMAPTPRXDESC_IPPT_TCP ((uint32_t)0x00000002) /* TCP payload encapsulated in the IP datagram */
Kojto	108:34e6b704fe68	899	#define ETH_DMAPTPRXDESC_IPPT_ICMP ((uint32_t)0x00000003) /* ICMP payload encapsulated in the IP datagram */
Kojto	108:34e6b704fe68	900
Kojto	108:34e6b704fe68	901	/* Bit definition of RDES6 register */
Kojto	108:34e6b704fe68	902	#define ETH_DMAPTPRXDESC_RTSL ((uint32_t)0xFFFFFFFF) /* Receive Time Stamp Low */
Kojto	108:34e6b704fe68	903
Kojto	108:34e6b704fe68	904	/* Bit definition of RDES7 register */
Kojto	108:34e6b704fe68	905	#define ETH_DMAPTPRXDESC_RTSH ((uint32_t)0xFFFFFFFF) /* Receive Time Stamp High */
Kojto	108:34e6b704fe68	906	/**
Kojto	108:34e6b704fe68	907	* @}
Kojto	108:34e6b704fe68	908	*/
Kojto	108:34e6b704fe68	909	/** @defgroup ETH_AutoNegotiation ETH AutoNegotiation
Kojto	108:34e6b704fe68	910	* @{
Kojto	108:34e6b704fe68	911	*/
Kojto	108:34e6b704fe68	912	#define ETH_AUTONEGOTIATION_ENABLE ((uint32_t)0x00000001)
Kojto	108:34e6b704fe68	913	#define ETH_AUTONEGOTIATION_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	914
Kojto	108:34e6b704fe68	915	/**
Kojto	108:34e6b704fe68	916	* @}
Kojto	108:34e6b704fe68	917	*/
Kojto	108:34e6b704fe68	918	/** @defgroup ETH_Speed ETH Speed
Kojto	108:34e6b704fe68	919	* @{
Kojto	108:34e6b704fe68	920	*/
Kojto	108:34e6b704fe68	921	#define ETH_SPEED_10M ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	922	#define ETH_SPEED_100M ((uint32_t)0x00004000)
Kojto	108:34e6b704fe68	923
Kojto	108:34e6b704fe68	924	/**
Kojto	108:34e6b704fe68	925	* @}
Kojto	108:34e6b704fe68	926	*/
Kojto	108:34e6b704fe68	927	/** @defgroup ETH_Duplex_Mode ETH Duplex Mode
Kojto	108:34e6b704fe68	928	* @{
Kojto	108:34e6b704fe68	929	*/
Kojto	108:34e6b704fe68	930	#define ETH_MODE_FULLDUPLEX ((uint32_t)0x00000800)
Kojto	108:34e6b704fe68	931	#define ETH_MODE_HALFDUPLEX ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	932	/**
Kojto	108:34e6b704fe68	933	* @}
Kojto	108:34e6b704fe68	934	*/
Kojto	108:34e6b704fe68	935	/** @defgroup ETH_Rx_Mode ETH Rx Mode
Kojto	108:34e6b704fe68	936	* @{
Kojto	108:34e6b704fe68	937	*/
Kojto	108:34e6b704fe68	938	#define ETH_RXPOLLING_MODE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	939	#define ETH_RXINTERRUPT_MODE ((uint32_t)0x00000001)
Kojto	108:34e6b704fe68	940	/**
Kojto	108:34e6b704fe68	941	* @}
Kojto	108:34e6b704fe68	942	*/
Kojto	108:34e6b704fe68	943
Kojto	108:34e6b704fe68	944	/** @defgroup ETH_Checksum_Mode ETH Checksum Mode
Kojto	108:34e6b704fe68	945	* @{
Kojto	108:34e6b704fe68	946	*/
Kojto	108:34e6b704fe68	947	#define ETH_CHECKSUM_BY_HARDWARE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	948	#define ETH_CHECKSUM_BY_SOFTWARE ((uint32_t)0x00000001)
Kojto	108:34e6b704fe68	949	/**
Kojto	108:34e6b704fe68	950	* @}
Kojto	108:34e6b704fe68	951	*/
Kojto	108:34e6b704fe68	952
Kojto	108:34e6b704fe68	953	/** @defgroup ETH_Media_Interface ETH Media Interface
Kojto	108:34e6b704fe68	954	* @{
Kojto	108:34e6b704fe68	955	*/
Kojto	108:34e6b704fe68	956	#define ETH_MEDIA_INTERFACE_MII ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	957	#define ETH_MEDIA_INTERFACE_RMII ((uint32_t)SYSCFG_PMC_MII_RMII_SEL)
Kojto	108:34e6b704fe68	958	/**
Kojto	108:34e6b704fe68	959	* @}
Kojto	108:34e6b704fe68	960	*/
Kojto	108:34e6b704fe68	961
Kojto	108:34e6b704fe68	962	/** @defgroup ETH_Watchdog ETH Watchdog
Kojto	108:34e6b704fe68	963	* @{
Kojto	108:34e6b704fe68	964	*/
Kojto	108:34e6b704fe68	965	#define ETH_WATCHDOG_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	966	#define ETH_WATCHDOG_DISABLE ((uint32_t)0x00800000)
Kojto	108:34e6b704fe68	967	/**
Kojto	108:34e6b704fe68	968	* @}
Kojto	108:34e6b704fe68	969	*/
Kojto	108:34e6b704fe68	970
Kojto	108:34e6b704fe68	971	/** @defgroup ETH_Jabber ETH Jabber
Kojto	108:34e6b704fe68	972	* @{
Kojto	108:34e6b704fe68	973	*/
Kojto	108:34e6b704fe68	974	#define ETH_JABBER_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	975	#define ETH_JABBER_DISABLE ((uint32_t)0x00400000)
Kojto	108:34e6b704fe68	976	/**
Kojto	108:34e6b704fe68	977	* @}
Kojto	108:34e6b704fe68	978	*/
Kojto	108:34e6b704fe68	979
Kojto	108:34e6b704fe68	980	/** @defgroup ETH_Inter_Frame_Gap ETH Inter Frame Gap
Kojto	108:34e6b704fe68	981	* @{
Kojto	108:34e6b704fe68	982	*/
Kojto	108:34e6b704fe68	983	#define ETH_INTERFRAMEGAP_96BIT ((uint32_t)0x00000000) /!< minimum IFG between frames during transmission is 96Bit /
Kojto	108:34e6b704fe68	984	#define ETH_INTERFRAMEGAP_88BIT ((uint32_t)0x00020000) /!< minimum IFG between frames during transmission is 88Bit /
Kojto	108:34e6b704fe68	985	#define ETH_INTERFRAMEGAP_80BIT ((uint32_t)0x00040000) /!< minimum IFG between frames during transmission is 80Bit /
Kojto	108:34e6b704fe68	986	#define ETH_INTERFRAMEGAP_72BIT ((uint32_t)0x00060000) /!< minimum IFG between frames during transmission is 72Bit /
Kojto	108:34e6b704fe68	987	#define ETH_INTERFRAMEGAP_64BIT ((uint32_t)0x00080000) /!< minimum IFG between frames during transmission is 64Bit /
Kojto	108:34e6b704fe68	988	#define ETH_INTERFRAMEGAP_56BIT ((uint32_t)0x000A0000) /!< minimum IFG between frames during transmission is 56Bit /
Kojto	108:34e6b704fe68	989	#define ETH_INTERFRAMEGAP_48BIT ((uint32_t)0x000C0000) /!< minimum IFG between frames during transmission is 48Bit /
Kojto	108:34e6b704fe68	990	#define ETH_INTERFRAMEGAP_40BIT ((uint32_t)0x000E0000) /!< minimum IFG between frames during transmission is 40Bit /
Kojto	108:34e6b704fe68	991	/**
Kojto	108:34e6b704fe68	992	* @}
Kojto	108:34e6b704fe68	993	*/
Kojto	108:34e6b704fe68	994
Kojto	108:34e6b704fe68	995	/** @defgroup ETH_Carrier_Sense ETH Carrier Sense
Kojto	108:34e6b704fe68	996	* @{
Kojto	108:34e6b704fe68	997	*/
Kojto	108:34e6b704fe68	998	#define ETH_CARRIERSENCE_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	999	#define ETH_CARRIERSENCE_DISABLE ((uint32_t)0x00010000)
Kojto	108:34e6b704fe68	1000	/**
Kojto	108:34e6b704fe68	1001	* @}
Kojto	108:34e6b704fe68	1002	*/
Kojto	108:34e6b704fe68	1003
Kojto	108:34e6b704fe68	1004	/** @defgroup ETH_Receive_Own ETH Receive Own
Kojto	108:34e6b704fe68	1005	* @{
Kojto	108:34e6b704fe68	1006	*/
Kojto	108:34e6b704fe68	1007	#define ETH_RECEIVEOWN_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1008	#define ETH_RECEIVEOWN_DISABLE ((uint32_t)0x00002000)
Kojto	108:34e6b704fe68	1009	/**
Kojto	108:34e6b704fe68	1010	* @}
Kojto	108:34e6b704fe68	1011	*/
Kojto	108:34e6b704fe68	1012
Kojto	108:34e6b704fe68	1013	/** @defgroup ETH_Loop_Back_Mode ETH Loop Back Mode
Kojto	108:34e6b704fe68	1014	* @{
Kojto	108:34e6b704fe68	1015	*/
Kojto	108:34e6b704fe68	1016	#define ETH_LOOPBACKMODE_ENABLE ((uint32_t)0x00001000)
Kojto	108:34e6b704fe68	1017	#define ETH_LOOPBACKMODE_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1018	/**
Kojto	108:34e6b704fe68	1019	* @}
Kojto	108:34e6b704fe68	1020	*/
Kojto	108:34e6b704fe68	1021
Kojto	108:34e6b704fe68	1022	/** @defgroup ETH_Checksum_Offload ETH Checksum Offload
Kojto	108:34e6b704fe68	1023	* @{
Kojto	108:34e6b704fe68	1024	*/
Kojto	108:34e6b704fe68	1025	#define ETH_CHECKSUMOFFLAOD_ENABLE ((uint32_t)0x00000400)
Kojto	108:34e6b704fe68	1026	#define ETH_CHECKSUMOFFLAOD_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1027	/**
Kojto	108:34e6b704fe68	1028	* @}
Kojto	108:34e6b704fe68	1029	*/
Kojto	108:34e6b704fe68	1030
Kojto	108:34e6b704fe68	1031	/** @defgroup ETH_Retry_Transmission ETH Retry Transmission
Kojto	108:34e6b704fe68	1032	* @{
Kojto	108:34e6b704fe68	1033	*/
Kojto	108:34e6b704fe68	1034	#define ETH_RETRYTRANSMISSION_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1035	#define ETH_RETRYTRANSMISSION_DISABLE ((uint32_t)0x00000200)
Kojto	108:34e6b704fe68	1036	/**
Kojto	108:34e6b704fe68	1037	* @}
Kojto	108:34e6b704fe68	1038	*/
Kojto	108:34e6b704fe68	1039
Kojto	108:34e6b704fe68	1040	/** @defgroup ETH_Automatic_Pad_CRC_Strip ETH Automatic Pad CRC Strip
Kojto	108:34e6b704fe68	1041	* @{
Kojto	108:34e6b704fe68	1042	*/
Kojto	108:34e6b704fe68	1043	#define ETH_AUTOMATICPADCRCSTRIP_ENABLE ((uint32_t)0x00000080)
Kojto	108:34e6b704fe68	1044	#define ETH_AUTOMATICPADCRCSTRIP_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1045	/**
Kojto	108:34e6b704fe68	1046	* @}
Kojto	108:34e6b704fe68	1047	*/
Kojto	108:34e6b704fe68	1048
Kojto	108:34e6b704fe68	1049	/** @defgroup ETH_Back_Off_Limit ETH Back Off Limit
Kojto	108:34e6b704fe68	1050	* @{
Kojto	108:34e6b704fe68	1051	*/
Kojto	108:34e6b704fe68	1052	#define ETH_BACKOFFLIMIT_10 ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1053	#define ETH_BACKOFFLIMIT_8 ((uint32_t)0x00000020)
Kojto	108:34e6b704fe68	1054	#define ETH_BACKOFFLIMIT_4 ((uint32_t)0x00000040)
Kojto	108:34e6b704fe68	1055	#define ETH_BACKOFFLIMIT_1 ((uint32_t)0x00000060)
Kojto	108:34e6b704fe68	1056	/**
Kojto	108:34e6b704fe68	1057	* @}
Kojto	108:34e6b704fe68	1058	*/
Kojto	108:34e6b704fe68	1059
Kojto	108:34e6b704fe68	1060	/** @defgroup ETH_Deferral_Check ETH Deferral Check
Kojto	108:34e6b704fe68	1061	* @{
Kojto	108:34e6b704fe68	1062	*/
Kojto	108:34e6b704fe68	1063	#define ETH_DEFFERRALCHECK_ENABLE ((uint32_t)0x00000010)
Kojto	108:34e6b704fe68	1064	#define ETH_DEFFERRALCHECK_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1065	/**
Kojto	108:34e6b704fe68	1066	* @}
Kojto	108:34e6b704fe68	1067	*/
Kojto	108:34e6b704fe68	1068
Kojto	108:34e6b704fe68	1069	/** @defgroup ETH_Receive_All ETH Receive All
Kojto	108:34e6b704fe68	1070	* @{
Kojto	108:34e6b704fe68	1071	*/
Kojto	108:34e6b704fe68	1072	#define ETH_RECEIVEALL_ENABLE ((uint32_t)0x80000000)
Kojto	108:34e6b704fe68	1073	#define ETH_RECEIVEAll_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1074	/**
Kojto	108:34e6b704fe68	1075	* @}
Kojto	108:34e6b704fe68	1076	*/
Kojto	108:34e6b704fe68	1077
Kojto	108:34e6b704fe68	1078	/** @defgroup ETH_Source_Addr_Filter ETH Source Addr Filter
Kojto	108:34e6b704fe68	1079	* @{
Kojto	108:34e6b704fe68	1080	*/
Kojto	108:34e6b704fe68	1081	#define ETH_SOURCEADDRFILTER_NORMAL_ENABLE ((uint32_t)0x00000200)
Kojto	108:34e6b704fe68	1082	#define ETH_SOURCEADDRFILTER_INVERSE_ENABLE ((uint32_t)0x00000300)
Kojto	108:34e6b704fe68	1083	#define ETH_SOURCEADDRFILTER_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1084	/**
Kojto	108:34e6b704fe68	1085	* @}
Kojto	108:34e6b704fe68	1086	*/
Kojto	108:34e6b704fe68	1087
Kojto	108:34e6b704fe68	1088	/** @defgroup ETH_Pass_Control_Frames ETH Pass Control Frames
Kojto	108:34e6b704fe68	1089	* @{
Kojto	108:34e6b704fe68	1090	*/
Kojto	108:34e6b704fe68	1091	#define ETH_PASSCONTROLFRAMES_BLOCKALL ((uint32_t)0x00000040) /!< MAC filters all control frames from reaching the application /
Kojto	108:34e6b704fe68	1092	#define ETH_PASSCONTROLFRAMES_FORWARDALL ((uint32_t)0x00000080) /!< MAC forwards all control frames to application even if they fail the Address Filter /
Kojto	108:34e6b704fe68	1093	#define ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER ((uint32_t)0x000000C0) /!< MAC forwards control frames that pass the Address Filter. /
Kojto	108:34e6b704fe68	1094	/**
Kojto	108:34e6b704fe68	1095	* @}
Kojto	108:34e6b704fe68	1096	*/
Kojto	108:34e6b704fe68	1097
Kojto	108:34e6b704fe68	1098	/** @defgroup ETH_Broadcast_Frames_Reception ETH Broadcast Frames Reception
Kojto	108:34e6b704fe68	1099	* @{
Kojto	108:34e6b704fe68	1100	*/
Kojto	108:34e6b704fe68	1101	#define ETH_BROADCASTFRAMESRECEPTION_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1102	#define ETH_BROADCASTFRAMESRECEPTION_DISABLE ((uint32_t)0x00000020)
Kojto	108:34e6b704fe68	1103	/**
Kojto	108:34e6b704fe68	1104	* @}
Kojto	108:34e6b704fe68	1105	*/
Kojto	108:34e6b704fe68	1106
Kojto	108:34e6b704fe68	1107	/** @defgroup ETH_Destination_Addr_Filter ETH Destination Addr Filter
Kojto	108:34e6b704fe68	1108	* @{
Kojto	108:34e6b704fe68	1109	*/
Kojto	108:34e6b704fe68	1110	#define ETH_DESTINATIONADDRFILTER_NORMAL ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1111	#define ETH_DESTINATIONADDRFILTER_INVERSE ((uint32_t)0x00000008)
Kojto	108:34e6b704fe68	1112	/**
Kojto	108:34e6b704fe68	1113	* @}
Kojto	108:34e6b704fe68	1114	*/
Kojto	108:34e6b704fe68	1115
Kojto	108:34e6b704fe68	1116	/** @defgroup ETH_Promiscuous_Mode ETH Promiscuous Mode
Kojto	108:34e6b704fe68	1117	* @{
Kojto	108:34e6b704fe68	1118	*/
Kojto	108:34e6b704fe68	1119	#define ETH_PROMISCUOUS_MODE_ENABLE ((uint32_t)0x00000001)
Kojto	108:34e6b704fe68	1120	#define ETH_PROMISCUOUS_MODE_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1121	/**
Kojto	108:34e6b704fe68	1122	* @}
Kojto	108:34e6b704fe68	1123	*/
Kojto	108:34e6b704fe68	1124
Kojto	108:34e6b704fe68	1125	/** @defgroup ETH_Multicast_Frames_Filter ETH Multicast Frames Filter
Kojto	108:34e6b704fe68	1126	* @{
Kojto	108:34e6b704fe68	1127	*/
Kojto	108:34e6b704fe68	1128	#define ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE ((uint32_t)0x00000404)
Kojto	108:34e6b704fe68	1129	#define ETH_MULTICASTFRAMESFILTER_HASHTABLE ((uint32_t)0x00000004)
Kojto	108:34e6b704fe68	1130	#define ETH_MULTICASTFRAMESFILTER_PERFECT ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1131	#define ETH_MULTICASTFRAMESFILTER_NONE ((uint32_t)0x00000010)
Kojto	108:34e6b704fe68	1132	/**
Kojto	108:34e6b704fe68	1133	* @}
Kojto	108:34e6b704fe68	1134	*/
Kojto	108:34e6b704fe68	1135
Kojto	108:34e6b704fe68	1136	/** @defgroup ETH_Unicast_Frames_Filter ETH Unicast Frames Filter
Kojto	108:34e6b704fe68	1137	* @{
Kojto	108:34e6b704fe68	1138	*/
Kojto	108:34e6b704fe68	1139	#define ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE ((uint32_t)0x00000402)
Kojto	108:34e6b704fe68	1140	#define ETH_UNICASTFRAMESFILTER_HASHTABLE ((uint32_t)0x00000002)
Kojto	108:34e6b704fe68	1141	#define ETH_UNICASTFRAMESFILTER_PERFECT ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1142	/**
Kojto	108:34e6b704fe68	1143	* @}
Kojto	108:34e6b704fe68	1144	*/
Kojto	108:34e6b704fe68	1145
Kojto	108:34e6b704fe68	1146	/** @defgroup ETH_Zero_Quanta_Pause ETH Zero Quanta Pause
Kojto	108:34e6b704fe68	1147	* @{
Kojto	108:34e6b704fe68	1148	*/
Kojto	108:34e6b704fe68	1149	#define ETH_ZEROQUANTAPAUSE_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1150	#define ETH_ZEROQUANTAPAUSE_DISABLE ((uint32_t)0x00000080)
Kojto	108:34e6b704fe68	1151	/**
Kojto	108:34e6b704fe68	1152	* @}
Kojto	108:34e6b704fe68	1153	*/
Kojto	108:34e6b704fe68	1154
Kojto	108:34e6b704fe68	1155	/** @defgroup ETH_Pause_Low_Threshold ETH Pause Low Threshold
Kojto	108:34e6b704fe68	1156	* @{
Kojto	108:34e6b704fe68	1157	*/
Kojto	108:34e6b704fe68	1158	#define ETH_PAUSELOWTHRESHOLD_MINUS4 ((uint32_t)0x00000000) /!< Pause time minus 4 slot times /
Kojto	108:34e6b704fe68	1159	#define ETH_PAUSELOWTHRESHOLD_MINUS28 ((uint32_t)0x00000010) /!< Pause time minus 28 slot times /
Kojto	108:34e6b704fe68	1160	#define ETH_PAUSELOWTHRESHOLD_MINUS144 ((uint32_t)0x00000020) /!< Pause time minus 144 slot times /
Kojto	108:34e6b704fe68	1161	#define ETH_PAUSELOWTHRESHOLD_MINUS256 ((uint32_t)0x00000030) /!< Pause time minus 256 slot times /
Kojto	108:34e6b704fe68	1162	/**
Kojto	108:34e6b704fe68	1163	* @}
Kojto	108:34e6b704fe68	1164	*/
Kojto	108:34e6b704fe68	1165
Kojto	108:34e6b704fe68	1166	/** @defgroup ETH_Unicast_Pause_Frame_Detect ETH Unicast Pause Frame Detect
Kojto	108:34e6b704fe68	1167	* @{
Kojto	108:34e6b704fe68	1168	*/
Kojto	108:34e6b704fe68	1169	#define ETH_UNICASTPAUSEFRAMEDETECT_ENABLE ((uint32_t)0x00000008)
Kojto	108:34e6b704fe68	1170	#define ETH_UNICASTPAUSEFRAMEDETECT_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1171	/**
Kojto	108:34e6b704fe68	1172	* @}
Kojto	108:34e6b704fe68	1173	*/
Kojto	108:34e6b704fe68	1174
Kojto	108:34e6b704fe68	1175	/** @defgroup ETH_Receive_Flow_Control ETH Receive Flow Control
Kojto	108:34e6b704fe68	1176	* @{
Kojto	108:34e6b704fe68	1177	*/
Kojto	108:34e6b704fe68	1178	#define ETH_RECEIVEFLOWCONTROL_ENABLE ((uint32_t)0x00000004)
Kojto	108:34e6b704fe68	1179	#define ETH_RECEIVEFLOWCONTROL_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1180	/**
Kojto	108:34e6b704fe68	1181	* @}
Kojto	108:34e6b704fe68	1182	*/
Kojto	108:34e6b704fe68	1183
Kojto	108:34e6b704fe68	1184	/** @defgroup ETH_Transmit_Flow_Control ETH Transmit Flow Control
Kojto	108:34e6b704fe68	1185	* @{
Kojto	108:34e6b704fe68	1186	*/
Kojto	108:34e6b704fe68	1187	#define ETH_TRANSMITFLOWCONTROL_ENABLE ((uint32_t)0x00000002)
Kojto	108:34e6b704fe68	1188	#define ETH_TRANSMITFLOWCONTROL_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1189	/**
Kojto	108:34e6b704fe68	1190	* @}
Kojto	108:34e6b704fe68	1191	*/
Kojto	108:34e6b704fe68	1192
Kojto	108:34e6b704fe68	1193	/** @defgroup ETH_VLAN_Tag_Comparison ETH VLAN Tag Comparison
Kojto	108:34e6b704fe68	1194	* @{
Kojto	108:34e6b704fe68	1195	*/
Kojto	108:34e6b704fe68	1196	#define ETH_VLANTAGCOMPARISON_12BIT ((uint32_t)0x00010000)
Kojto	108:34e6b704fe68	1197	#define ETH_VLANTAGCOMPARISON_16BIT ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1198	/**
Kojto	108:34e6b704fe68	1199	* @}
Kojto	108:34e6b704fe68	1200	*/
Kojto	108:34e6b704fe68	1201
Kojto	108:34e6b704fe68	1202	/** @defgroup ETH_MAC_addresses ETH MAC addresses
Kojto	108:34e6b704fe68	1203	* @{
Kojto	108:34e6b704fe68	1204	*/
Kojto	108:34e6b704fe68	1205	#define ETH_MAC_ADDRESS0 ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1206	#define ETH_MAC_ADDRESS1 ((uint32_t)0x00000008)
Kojto	108:34e6b704fe68	1207	#define ETH_MAC_ADDRESS2 ((uint32_t)0x00000010)
Kojto	108:34e6b704fe68	1208	#define ETH_MAC_ADDRESS3 ((uint32_t)0x00000018)
Kojto	108:34e6b704fe68	1209	/**
Kojto	108:34e6b704fe68	1210	* @}
Kojto	108:34e6b704fe68	1211	*/
Kojto	108:34e6b704fe68	1212
Kojto	108:34e6b704fe68	1213	/** @defgroup ETH_MAC_addresses_filter_SA_DA ETH MAC addresses filter SA DA
Kojto	108:34e6b704fe68	1214	* @{
Kojto	108:34e6b704fe68	1215	*/
Kojto	108:34e6b704fe68	1216	#define ETH_MAC_ADDRESSFILTER_SA ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1217	#define ETH_MAC_ADDRESSFILTER_DA ((uint32_t)0x00000008)
Kojto	108:34e6b704fe68	1218	/**
Kojto	108:34e6b704fe68	1219	* @}
Kojto	108:34e6b704fe68	1220	*/
Kojto	108:34e6b704fe68	1221
Kojto	108:34e6b704fe68	1222	/** @defgroup ETH_MAC_addresses_filter_Mask_bytes ETH MAC addresses filter Mask bytes
Kojto	108:34e6b704fe68	1223	* @{
Kojto	108:34e6b704fe68	1224	*/
Kojto	108:34e6b704fe68	1225	#define ETH_MAC_ADDRESSMASK_BYTE6 ((uint32_t)0x20000000) /!< Mask MAC Address high reg bits [15:8] /
Kojto	108:34e6b704fe68	1226	#define ETH_MAC_ADDRESSMASK_BYTE5 ((uint32_t)0x10000000) /!< Mask MAC Address high reg bits [7:0] /
Kojto	108:34e6b704fe68	1227	#define ETH_MAC_ADDRESSMASK_BYTE4 ((uint32_t)0x08000000) /!< Mask MAC Address low reg bits [31:24] /
Kojto	108:34e6b704fe68	1228	#define ETH_MAC_ADDRESSMASK_BYTE3 ((uint32_t)0x04000000) /!< Mask MAC Address low reg bits [23:16] /
Kojto	108:34e6b704fe68	1229	#define ETH_MAC_ADDRESSMASK_BYTE2 ((uint32_t)0x02000000) /!< Mask MAC Address low reg bits [15:8] /
Kojto	108:34e6b704fe68	1230	#define ETH_MAC_ADDRESSMASK_BYTE1 ((uint32_t)0x01000000) /!< Mask MAC Address low reg bits [70] /
Kojto	108:34e6b704fe68	1231	/**
Kojto	108:34e6b704fe68	1232	* @}
Kojto	108:34e6b704fe68	1233	*/
Kojto	108:34e6b704fe68	1234
Kojto	108:34e6b704fe68	1235	/** @defgroup ETH_MAC_Debug_flags ETH MAC Debug flags
Kojto	108:34e6b704fe68	1236	* @{
Kojto	108:34e6b704fe68	1237	*/
Kojto	108:34e6b704fe68	1238	#define ETH_MAC_TXFIFO_FULL ((uint32_t)0x02000000) /* Tx FIFO full */
Kojto	108:34e6b704fe68	1239	#define ETH_MAC_TXFIFONOT_EMPTY ((uint32_t)0x01000000) /* Tx FIFO not empty */
Kojto	108:34e6b704fe68	1240	#define ETH_MAC_TXFIFO_WRITE_ACTIVE ((uint32_t)0x00400000) /* Tx FIFO write active */
Kojto	108:34e6b704fe68	1241	#define ETH_MAC_TXFIFO_IDLE ((uint32_t)0x00000000) /* Tx FIFO read status: Idle */
Kojto	108:34e6b704fe68	1242	#define ETH_MAC_TXFIFO_READ ((uint32_t)0x00100000) /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
Kojto	108:34e6b704fe68	1243	#define ETH_MAC_TXFIFO_WAITING ((uint32_t)0x00200000) /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
Kojto	108:34e6b704fe68	1244	#define ETH_MAC_TXFIFO_WRITING ((uint32_t)0x00300000) /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
Kojto	108:34e6b704fe68	1245	#define ETH_MAC_TRANSMISSION_PAUSE ((uint32_t)0x00080000) /* MAC transmitter in pause */
Kojto	108:34e6b704fe68	1246	#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE ((uint32_t)0x00000000) /* MAC transmit frame controller: Idle */
Kojto	108:34e6b704fe68	1247	#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING ((uint32_t)0x00020000) /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
Kojto	108:34e6b704fe68	1248	#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF ((uint32_t)0x00040000) /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
Kojto	108:34e6b704fe68	1249	#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING ((uint32_t)0x00060000) /* MAC transmit frame controller: Transferring input frame for transmission */
Kojto	108:34e6b704fe68	1250	#define ETH_MAC_MII_TRANSMIT_ACTIVE ((uint32_t)0x00010000) /* MAC MII transmit engine active */
Kojto	108:34e6b704fe68	1251	#define ETH_MAC_RXFIFO_EMPTY ((uint32_t)0x00000000) /* Rx FIFO fill level: empty */
Kojto	108:34e6b704fe68	1252	#define ETH_MAC_RXFIFO_BELOW_THRESHOLD ((uint32_t)0x00000100) /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
Kojto	108:34e6b704fe68	1253	#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD ((uint32_t)0x00000200) /* Rx FIFO fill level: fill-level above flow-control activate threshold */
Kojto	108:34e6b704fe68	1254	#define ETH_MAC_RXFIFO_FULL ((uint32_t)0x00000300) /* Rx FIFO fill level: full */
Kojto	108:34e6b704fe68	1255	#define ETH_MAC_READCONTROLLER_IDLE ((uint32_t)0x00000000) /* Rx FIFO read controller IDLE state */
Kojto	108:34e6b704fe68	1256	#define ETH_MAC_READCONTROLLER_READING_DATA ((uint32_t)0x00000020) /* Rx FIFO read controller Reading frame data */
Kojto	108:34e6b704fe68	1257	#define ETH_MAC_READCONTROLLER_READING_STATUS ((uint32_t)0x00000040) /* Rx FIFO read controller Reading frame status (or time-stamp) */
Kojto	108:34e6b704fe68	1258	#define ETH_MAC_READCONTROLLER_FLUSHING ((uint32_t)0x00000060) /* Rx FIFO read controller Flushing the frame data and status */
Kojto	108:34e6b704fe68	1259	#define ETH_MAC_RXFIFO_WRITE_ACTIVE ((uint32_t)0x00000010) /* Rx FIFO write controller active */
Kojto	108:34e6b704fe68	1260	#define ETH_MAC_SMALL_FIFO_NOTACTIVE ((uint32_t)0x00000000) /* MAC small FIFO read / write controllers not active */
Kojto	108:34e6b704fe68	1261	#define ETH_MAC_SMALL_FIFO_READ_ACTIVE ((uint32_t)0x00000002) /* MAC small FIFO read controller active */
Kojto	108:34e6b704fe68	1262	#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE ((uint32_t)0x00000004) /* MAC small FIFO write controller active */
Kojto	108:34e6b704fe68	1263	#define ETH_MAC_SMALL_FIFO_RW_ACTIVE ((uint32_t)0x00000006) /* MAC small FIFO read / write controllers active */
Kojto	108:34e6b704fe68	1264	#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE ((uint32_t)0x00000001) /* MAC MII receive protocol engine active */
Kojto	108:34e6b704fe68	1265	/**
Kojto	108:34e6b704fe68	1266	* @}
Kojto	108:34e6b704fe68	1267	*/
Kojto	108:34e6b704fe68	1268
Kojto	108:34e6b704fe68	1269	/** @defgroup ETH_Drop_TCP_IP_Checksum_Error_Frame ETH Drop TCP IP Checksum Error Frame
Kojto	108:34e6b704fe68	1270	* @{
Kojto	108:34e6b704fe68	1271	*/
Kojto	108:34e6b704fe68	1272	#define ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1273	#define ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE ((uint32_t)0x04000000)
Kojto	108:34e6b704fe68	1274	/**
Kojto	108:34e6b704fe68	1275	* @}
Kojto	108:34e6b704fe68	1276	*/
Kojto	108:34e6b704fe68	1277
Kojto	108:34e6b704fe68	1278	/** @defgroup ETH_Receive_Store_Forward ETH Receive Store Forward
Kojto	108:34e6b704fe68	1279	* @{
Kojto	108:34e6b704fe68	1280	*/
Kojto	108:34e6b704fe68	1281	#define ETH_RECEIVESTOREFORWARD_ENABLE ((uint32_t)0x02000000)
Kojto	108:34e6b704fe68	1282	#define ETH_RECEIVESTOREFORWARD_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1283	/**
Kojto	108:34e6b704fe68	1284	* @}
Kojto	108:34e6b704fe68	1285	*/
Kojto	108:34e6b704fe68	1286
Kojto	108:34e6b704fe68	1287	/** @defgroup ETH_Flush_Received_Frame ETH Flush Received Frame
Kojto	108:34e6b704fe68	1288	* @{
Kojto	108:34e6b704fe68	1289	*/
Kojto	108:34e6b704fe68	1290	#define ETH_FLUSHRECEIVEDFRAME_ENABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1291	#define ETH_FLUSHRECEIVEDFRAME_DISABLE ((uint32_t)0x01000000)
Kojto	108:34e6b704fe68	1292	/**
Kojto	108:34e6b704fe68	1293	* @}
Kojto	108:34e6b704fe68	1294	*/
Kojto	108:34e6b704fe68	1295
Kojto	108:34e6b704fe68	1296	/** @defgroup ETH_Transmit_Store_Forward ETH Transmit Store Forward
Kojto	108:34e6b704fe68	1297	* @{
Kojto	108:34e6b704fe68	1298	*/
Kojto	108:34e6b704fe68	1299	#define ETH_TRANSMITSTOREFORWARD_ENABLE ((uint32_t)0x00200000)
Kojto	108:34e6b704fe68	1300	#define ETH_TRANSMITSTOREFORWARD_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1301	/**
Kojto	108:34e6b704fe68	1302	* @}
Kojto	108:34e6b704fe68	1303	*/
Kojto	108:34e6b704fe68	1304
Kojto	108:34e6b704fe68	1305	/** @defgroup ETH_Transmit_Threshold_Control ETH Transmit Threshold Control
Kojto	108:34e6b704fe68	1306	* @{
Kojto	108:34e6b704fe68	1307	*/
Kojto	108:34e6b704fe68	1308	#define ETH_TRANSMITTHRESHOLDCONTROL_64BYTES ((uint32_t)0x00000000) /!< threshold level of the MTL Transmit FIFO is 64 Bytes /
Kojto	108:34e6b704fe68	1309	#define ETH_TRANSMITTHRESHOLDCONTROL_128BYTES ((uint32_t)0x00004000) /!< threshold level of the MTL Transmit FIFO is 128 Bytes /
Kojto	108:34e6b704fe68	1310	#define ETH_TRANSMITTHRESHOLDCONTROL_192BYTES ((uint32_t)0x00008000) /!< threshold level of the MTL Transmit FIFO is 192 Bytes /
Kojto	108:34e6b704fe68	1311	#define ETH_TRANSMITTHRESHOLDCONTROL_256BYTES ((uint32_t)0x0000C000) /!< threshold level of the MTL Transmit FIFO is 256 Bytes /
Kojto	108:34e6b704fe68	1312	#define ETH_TRANSMITTHRESHOLDCONTROL_40BYTES ((uint32_t)0x00010000) /!< threshold level of the MTL Transmit FIFO is 40 Bytes /
Kojto	108:34e6b704fe68	1313	#define ETH_TRANSMITTHRESHOLDCONTROL_32BYTES ((uint32_t)0x00014000) /!< threshold level of the MTL Transmit FIFO is 32 Bytes /
Kojto	108:34e6b704fe68	1314	#define ETH_TRANSMITTHRESHOLDCONTROL_24BYTES ((uint32_t)0x00018000) /!< threshold level of the MTL Transmit FIFO is 24 Bytes /
Kojto	108:34e6b704fe68	1315	#define ETH_TRANSMITTHRESHOLDCONTROL_16BYTES ((uint32_t)0x0001C000) /!< threshold level of the MTL Transmit FIFO is 16 Bytes /
Kojto	108:34e6b704fe68	1316	/**
Kojto	108:34e6b704fe68	1317	* @}
Kojto	108:34e6b704fe68	1318	*/
Kojto	108:34e6b704fe68	1319
Kojto	108:34e6b704fe68	1320	/** @defgroup ETH_Forward_Error_Frames ETH Forward Error Frames
Kojto	108:34e6b704fe68	1321	* @{
Kojto	108:34e6b704fe68	1322	*/
Kojto	108:34e6b704fe68	1323	#define ETH_FORWARDERRORFRAMES_ENABLE ((uint32_t)0x00000080)
Kojto	108:34e6b704fe68	1324	#define ETH_FORWARDERRORFRAMES_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1325	/**
Kojto	108:34e6b704fe68	1326	* @}
Kojto	108:34e6b704fe68	1327	*/
Kojto	108:34e6b704fe68	1328
Kojto	108:34e6b704fe68	1329	/** @defgroup ETH_Forward_Undersized_Good_Frames ETH Forward Undersized Good Frames
Kojto	108:34e6b704fe68	1330	* @{
Kojto	108:34e6b704fe68	1331	*/
Kojto	108:34e6b704fe68	1332	#define ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE ((uint32_t)0x00000040)
Kojto	108:34e6b704fe68	1333	#define ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1334	/**
Kojto	108:34e6b704fe68	1335	* @}
Kojto	108:34e6b704fe68	1336	*/
Kojto	108:34e6b704fe68	1337
Kojto	108:34e6b704fe68	1338	/** @defgroup ETH_Receive_Threshold_Control ETH Receive Threshold Control
Kojto	108:34e6b704fe68	1339	* @{
Kojto	108:34e6b704fe68	1340	*/
Kojto	108:34e6b704fe68	1341	#define ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES ((uint32_t)0x00000000) /!< threshold level of the MTL Receive FIFO is 64 Bytes /
Kojto	108:34e6b704fe68	1342	#define ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES ((uint32_t)0x00000008) /!< threshold level of the MTL Receive FIFO is 32 Bytes /
Kojto	108:34e6b704fe68	1343	#define ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES ((uint32_t)0x00000010) /!< threshold level of the MTL Receive FIFO is 96 Bytes /
Kojto	108:34e6b704fe68	1344	#define ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES ((uint32_t)0x00000018) /!< threshold level of the MTL Receive FIFO is 128 Bytes /
Kojto	108:34e6b704fe68	1345	/**
Kojto	108:34e6b704fe68	1346	* @}
Kojto	108:34e6b704fe68	1347	*/
Kojto	108:34e6b704fe68	1348
Kojto	108:34e6b704fe68	1349	/** @defgroup ETH_Second_Frame_Operate ETH Second Frame Operate
Kojto	108:34e6b704fe68	1350	* @{
Kojto	108:34e6b704fe68	1351	*/
Kojto	108:34e6b704fe68	1352	#define ETH_SECONDFRAMEOPERARTE_ENABLE ((uint32_t)0x00000004)
Kojto	108:34e6b704fe68	1353	#define ETH_SECONDFRAMEOPERARTE_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1354	/**
Kojto	108:34e6b704fe68	1355	* @}
Kojto	108:34e6b704fe68	1356	*/
Kojto	108:34e6b704fe68	1357
Kojto	108:34e6b704fe68	1358	/** @defgroup ETH_Address_Aligned_Beats ETH Address Aligned Beats
Kojto	108:34e6b704fe68	1359	* @{
Kojto	108:34e6b704fe68	1360	*/
Kojto	108:34e6b704fe68	1361	#define ETH_ADDRESSALIGNEDBEATS_ENABLE ((uint32_t)0x02000000)
Kojto	108:34e6b704fe68	1362	#define ETH_ADDRESSALIGNEDBEATS_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1363	/**
Kojto	108:34e6b704fe68	1364	* @}
Kojto	108:34e6b704fe68	1365	*/
Kojto	108:34e6b704fe68	1366
Kojto	108:34e6b704fe68	1367	/** @defgroup ETH_Fixed_Burst ETH Fixed Burst
Kojto	108:34e6b704fe68	1368	* @{
Kojto	108:34e6b704fe68	1369	*/
Kojto	108:34e6b704fe68	1370	#define ETH_FIXEDBURST_ENABLE ((uint32_t)0x00010000)
Kojto	108:34e6b704fe68	1371	#define ETH_FIXEDBURST_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1372	/**
Kojto	108:34e6b704fe68	1373	* @}
Kojto	108:34e6b704fe68	1374	*/
Kojto	108:34e6b704fe68	1375
Kojto	108:34e6b704fe68	1376	/** @defgroup ETH_Rx_DMA_Burst_Length ETH Rx DMA Burst Length
Kojto	108:34e6b704fe68	1377	* @{
Kojto	108:34e6b704fe68	1378	*/
Kojto	108:34e6b704fe68	1379	#define ETH_RXDMABURSTLENGTH_1BEAT ((uint32_t)0x00020000) /!< maximum number of beats to be transferred in one RxDMA transaction is 1 /
Kojto	108:34e6b704fe68	1380	#define ETH_RXDMABURSTLENGTH_2BEAT ((uint32_t)0x00040000) /!< maximum number of beats to be transferred in one RxDMA transaction is 2 /
Kojto	108:34e6b704fe68	1381	#define ETH_RXDMABURSTLENGTH_4BEAT ((uint32_t)0x00080000) /!< maximum number of beats to be transferred in one RxDMA transaction is 4 /
Kojto	108:34e6b704fe68	1382	#define ETH_RXDMABURSTLENGTH_8BEAT ((uint32_t)0x00100000) /!< maximum number of beats to be transferred in one RxDMA transaction is 8 /
Kojto	108:34e6b704fe68	1383	#define ETH_RXDMABURSTLENGTH_16BEAT ((uint32_t)0x00200000) /!< maximum number of beats to be transferred in one RxDMA transaction is 16 /
Kojto	108:34e6b704fe68	1384	#define ETH_RXDMABURSTLENGTH_32BEAT ((uint32_t)0x00400000) /!< maximum number of beats to be transferred in one RxDMA transaction is 32 /
Kojto	108:34e6b704fe68	1385	#define ETH_RXDMABURSTLENGTH_4XPBL_4BEAT ((uint32_t)0x01020000) /!< maximum number of beats to be transferred in one RxDMA transaction is 4 /
Kojto	108:34e6b704fe68	1386	#define ETH_RXDMABURSTLENGTH_4XPBL_8BEAT ((uint32_t)0x01040000) /!< maximum number of beats to be transferred in one RxDMA transaction is 8 /
Kojto	108:34e6b704fe68	1387	#define ETH_RXDMABURSTLENGTH_4XPBL_16BEAT ((uint32_t)0x01080000) /!< maximum number of beats to be transferred in one RxDMA transaction is 16 /
Kojto	108:34e6b704fe68	1388	#define ETH_RXDMABURSTLENGTH_4XPBL_32BEAT ((uint32_t)0x01100000) /!< maximum number of beats to be transferred in one RxDMA transaction is 32 /
Kojto	108:34e6b704fe68	1389	#define ETH_RXDMABURSTLENGTH_4XPBL_64BEAT ((uint32_t)0x01200000) /!< maximum number of beats to be transferred in one RxDMA transaction is 64 /
Kojto	108:34e6b704fe68	1390	#define ETH_RXDMABURSTLENGTH_4XPBL_128BEAT ((uint32_t)0x01400000) /!< maximum number of beats to be transferred in one RxDMA transaction is 128 /
Kojto	108:34e6b704fe68	1391	/**
Kojto	108:34e6b704fe68	1392	* @}
Kojto	108:34e6b704fe68	1393	*/
Kojto	108:34e6b704fe68	1394
Kojto	108:34e6b704fe68	1395	/** @defgroup ETH_Tx_DMA_Burst_Length ETH Tx DMA Burst Length
Kojto	108:34e6b704fe68	1396	* @{
Kojto	108:34e6b704fe68	1397	*/
Kojto	108:34e6b704fe68	1398	#define ETH_TXDMABURSTLENGTH_1BEAT ((uint32_t)0x00000100) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 /
Kojto	108:34e6b704fe68	1399	#define ETH_TXDMABURSTLENGTH_2BEAT ((uint32_t)0x00000200) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 /
Kojto	108:34e6b704fe68	1400	#define ETH_TXDMABURSTLENGTH_4BEAT ((uint32_t)0x00000400) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 /
Kojto	108:34e6b704fe68	1401	#define ETH_TXDMABURSTLENGTH_8BEAT ((uint32_t)0x00000800) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 /
Kojto	108:34e6b704fe68	1402	#define ETH_TXDMABURSTLENGTH_16BEAT ((uint32_t)0x00001000) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 /
Kojto	108:34e6b704fe68	1403	#define ETH_TXDMABURSTLENGTH_32BEAT ((uint32_t)0x00002000) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 /
Kojto	108:34e6b704fe68	1404	#define ETH_TXDMABURSTLENGTH_4XPBL_4BEAT ((uint32_t)0x01000100) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 /
Kojto	108:34e6b704fe68	1405	#define ETH_TXDMABURSTLENGTH_4XPBL_8BEAT ((uint32_t)0x01000200) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 /
Kojto	108:34e6b704fe68	1406	#define ETH_TXDMABURSTLENGTH_4XPBL_16BEAT ((uint32_t)0x01000400) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 /
Kojto	108:34e6b704fe68	1407	#define ETH_TXDMABURSTLENGTH_4XPBL_32BEAT ((uint32_t)0x01000800) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 /
Kojto	108:34e6b704fe68	1408	#define ETH_TXDMABURSTLENGTH_4XPBL_64BEAT ((uint32_t)0x01001000) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 /
Kojto	108:34e6b704fe68	1409	#define ETH_TXDMABURSTLENGTH_4XPBL_128BEAT ((uint32_t)0x01002000) /!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 /
Kojto	108:34e6b704fe68	1410	/**
Kojto	108:34e6b704fe68	1411	* @}
Kojto	108:34e6b704fe68	1412	*/
Kojto	108:34e6b704fe68	1413
Kojto	108:34e6b704fe68	1414	/** @defgroup ETH_DMA_Enhanced_descriptor_format ETH DMA Enhanced descriptor format
Kojto	108:34e6b704fe68	1415	* @{
Kojto	108:34e6b704fe68	1416	*/
Kojto	108:34e6b704fe68	1417	#define ETH_DMAENHANCEDDESCRIPTOR_ENABLE ((uint32_t)0x00000080)
Kojto	108:34e6b704fe68	1418	#define ETH_DMAENHANCEDDESCRIPTOR_DISABLE ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1419	/**
Kojto	108:34e6b704fe68	1420	* @}
Kojto	108:34e6b704fe68	1421	*/
Kojto	108:34e6b704fe68	1422
Kojto	108:34e6b704fe68	1423	/** @defgroup ETH_DMA_Arbitration ETH DMA Arbitration
Kojto	108:34e6b704fe68	1424	* @{
Kojto	108:34e6b704fe68	1425	*/
Kojto	108:34e6b704fe68	1426	#define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1 ((uint32_t)0x00000000)
Kojto	108:34e6b704fe68	1427	#define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1 ((uint32_t)0x00004000)
Kojto	108:34e6b704fe68	1428	#define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1 ((uint32_t)0x00008000)
Kojto	108:34e6b704fe68	1429	#define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1 ((uint32_t)0x0000C000)
Kojto	108:34e6b704fe68	1430	#define ETH_DMAARBITRATION_RXPRIORTX ((uint32_t)0x00000002)
Kojto	108:34e6b704fe68	1431	/**
Kojto	108:34e6b704fe68	1432	* @}
Kojto	108:34e6b704fe68	1433	*/
Kojto	108:34e6b704fe68	1434
Kojto	108:34e6b704fe68	1435	/** @defgroup ETH_DMA_Tx_descriptor_segment ETH DMA Tx descriptor segment
Kojto	108:34e6b704fe68	1436	* @{
Kojto	108:34e6b704fe68	1437	*/
Kojto	108:34e6b704fe68	1438	#define ETH_DMATXDESC_LASTSEGMENTS ((uint32_t)0x40000000) /!< Last Segment /
Kojto	108:34e6b704fe68	1439	#define ETH_DMATXDESC_FIRSTSEGMENT ((uint32_t)0x20000000) /!< First Segment /
Kojto	108:34e6b704fe68	1440	/**
Kojto	108:34e6b704fe68	1441	* @}
Kojto	108:34e6b704fe68	1442	*/
Kojto	108:34e6b704fe68	1443
Kojto	108:34e6b704fe68	1444	/** @defgroup ETH_DMA_Tx_descriptor_Checksum_Insertion_Control ETH DMA Tx descriptor Checksum Insertion Control
Kojto	108:34e6b704fe68	1445	* @{
Kojto	108:34e6b704fe68	1446	*/
Kojto	108:34e6b704fe68	1447	#define ETH_DMATXDESC_CHECKSUMBYPASS ((uint32_t)0x00000000) /!< Checksum engine bypass /
Kojto	108:34e6b704fe68	1448	#define ETH_DMATXDESC_CHECKSUMIPV4HEADER ((uint32_t)0x00400000) /!< IPv4 header checksum insertion /
Kojto	108:34e6b704fe68	1449	#define ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT ((uint32_t)0x00800000) /!< TCP/UDP/ICMP checksum insertion. Pseudo header checksum is assumed to be present /
Kojto	108:34e6b704fe68	1450	#define ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL ((uint32_t)0x00C00000) /!< TCP/UDP/ICMP checksum fully in hardware including pseudo header /
Kojto	108:34e6b704fe68	1451	/**
Kojto	108:34e6b704fe68	1452	* @}
Kojto	108:34e6b704fe68	1453	*/
Kojto	108:34e6b704fe68	1454
Kojto	108:34e6b704fe68	1455	/** @defgroup ETH_DMA_Rx_descriptor_buffers ETH DMA Rx descriptor buffers
Kojto	108:34e6b704fe68	1456	* @{
Kojto	108:34e6b704fe68	1457	*/
Kojto	108:34e6b704fe68	1458	#define ETH_DMARXDESC_BUFFER1 ((uint32_t)0x00000000) /!< DMA Rx Desc Buffer1 /
Kojto	108:34e6b704fe68	1459	#define ETH_DMARXDESC_BUFFER2 ((uint32_t)0x00000001) /!< DMA Rx Desc Buffer2 /
Kojto	108:34e6b704fe68	1460	/**
Kojto	108:34e6b704fe68	1461	* @}
Kojto	108:34e6b704fe68	1462	*/
Kojto	108:34e6b704fe68	1463
Kojto	108:34e6b704fe68	1464	/** @defgroup ETH_PMT_Flags ETH PMT Flags
Kojto	108:34e6b704fe68	1465	* @{
Kojto	108:34e6b704fe68	1466	*/
Kojto	108:34e6b704fe68	1467	#define ETH_PMT_FLAG_WUFFRPR ((uint32_t)0x80000000) /!< Wake-Up Frame Filter Register Pointer Reset /
Kojto	108:34e6b704fe68	1468	#define ETH_PMT_FLAG_WUFR ((uint32_t)0x00000040) /!< Wake-Up Frame Received /
Kojto	108:34e6b704fe68	1469	#define ETH_PMT_FLAG_MPR ((uint32_t)0x00000020) /!< Magic Packet Received /
Kojto	108:34e6b704fe68	1470	/**
Kojto	108:34e6b704fe68	1471	* @}
Kojto	108:34e6b704fe68	1472	*/
Kojto	108:34e6b704fe68	1473
Kojto	108:34e6b704fe68	1474	/** @defgroup ETH_MMC_Tx_Interrupts ETH MMC Tx Interrupts
Kojto	108:34e6b704fe68	1475	* @{
Kojto	108:34e6b704fe68	1476	*/
Kojto	108:34e6b704fe68	1477	#define ETH_MMC_IT_TGF ((uint32_t)0x00200000) /!< When Tx good frame counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1478	#define ETH_MMC_IT_TGFMSC ((uint32_t)0x00008000) /!< When Tx good multi col counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1479	#define ETH_MMC_IT_TGFSC ((uint32_t)0x00004000) /!< When Tx good single col counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1480	/**
Kojto	108:34e6b704fe68	1481	* @}
Kojto	108:34e6b704fe68	1482	*/
Kojto	108:34e6b704fe68	1483
Kojto	108:34e6b704fe68	1484	/** @defgroup ETH_MMC_Rx_Interrupts ETH MMC Rx Interrupts
Kojto	108:34e6b704fe68	1485	* @{
Kojto	108:34e6b704fe68	1486	*/
Kojto	108:34e6b704fe68	1487	#define ETH_MMC_IT_RGUF ((uint32_t)0x10020000) /!< When Rx good unicast frames counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1488	#define ETH_MMC_IT_RFAE ((uint32_t)0x10000040) /!< When Rx alignment error counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1489	#define ETH_MMC_IT_RFCE ((uint32_t)0x10000020) /!< When Rx crc error counter reaches half the maximum value /
Kojto	108:34e6b704fe68	1490	/**
Kojto	108:34e6b704fe68	1491	* @}
Kojto	108:34e6b704fe68	1492	*/
Kojto	108:34e6b704fe68	1493
Kojto	108:34e6b704fe68	1494	/** @defgroup ETH_MAC_Flags ETH MAC Flags
Kojto	108:34e6b704fe68	1495	* @{
Kojto	108:34e6b704fe68	1496	*/
Kojto	108:34e6b704fe68	1497	#define ETH_MAC_FLAG_TST ((uint32_t)0x00000200) /!< Time stamp trigger flag (on MAC) /
Kojto	108:34e6b704fe68	1498	#define ETH_MAC_FLAG_MMCT ((uint32_t)0x00000040) /!< MMC transmit flag /
Kojto	108:34e6b704fe68	1499	#define ETH_MAC_FLAG_MMCR ((uint32_t)0x00000020) /!< MMC receive flag /
Kojto	108:34e6b704fe68	1500	#define ETH_MAC_FLAG_MMC ((uint32_t)0x00000010) /!< MMC flag (on MAC) /
Kojto	108:34e6b704fe68	1501	#define ETH_MAC_FLAG_PMT ((uint32_t)0x00000008) /!< PMT flag (on MAC) /
Kojto	108:34e6b704fe68	1502	/**
Kojto	108:34e6b704fe68	1503	* @}
Kojto	108:34e6b704fe68	1504	*/
Kojto	108:34e6b704fe68	1505
Kojto	108:34e6b704fe68	1506	/** @defgroup ETH_DMA_Flags ETH DMA Flags
Kojto	108:34e6b704fe68	1507	* @{
Kojto	108:34e6b704fe68	1508	*/
Kojto	108:34e6b704fe68	1509	#define ETH_DMA_FLAG_TST ((uint32_t)0x20000000) /!< Time-stamp trigger interrupt (on DMA) /
Kojto	108:34e6b704fe68	1510	#define ETH_DMA_FLAG_PMT ((uint32_t)0x10000000) /!< PMT interrupt (on DMA) /
Kojto	108:34e6b704fe68	1511	#define ETH_DMA_FLAG_MMC ((uint32_t)0x08000000) /!< MMC interrupt (on DMA) /
Kojto	108:34e6b704fe68	1512	#define ETH_DMA_FLAG_DATATRANSFERERROR ((uint32_t)0x00800000) /!< Error bits 0-Rx DMA, 1-Tx DMA /
Kojto	108:34e6b704fe68	1513	#define ETH_DMA_FLAG_READWRITEERROR ((uint32_t)0x01000000) /!< Error bits 0-write transfer, 1-read transfer /
Kojto	108:34e6b704fe68	1514	#define ETH_DMA_FLAG_ACCESSERROR ((uint32_t)0x02000000) /!< Error bits 0-data buffer, 1-desc. access /
Kojto	108:34e6b704fe68	1515	#define ETH_DMA_FLAG_NIS ((uint32_t)0x00010000) /!< Normal interrupt summary flag /
Kojto	108:34e6b704fe68	1516	#define ETH_DMA_FLAG_AIS ((uint32_t)0x00008000) /!< Abnormal interrupt summary flag /
Kojto	108:34e6b704fe68	1517	#define ETH_DMA_FLAG_ER ((uint32_t)0x00004000) /!< Early receive flag /
Kojto	108:34e6b704fe68	1518	#define ETH_DMA_FLAG_FBE ((uint32_t)0x00002000) /!< Fatal bus error flag /
Kojto	108:34e6b704fe68	1519	#define ETH_DMA_FLAG_ET ((uint32_t)0x00000400) /!< Early transmit flag /
Kojto	108:34e6b704fe68	1520	#define ETH_DMA_FLAG_RWT ((uint32_t)0x00000200) /!< Receive watchdog timeout flag /
Kojto	108:34e6b704fe68	1521	#define ETH_DMA_FLAG_RPS ((uint32_t)0x00000100) /!< Receive process stopped flag /
Kojto	108:34e6b704fe68	1522	#define ETH_DMA_FLAG_RBU ((uint32_t)0x00000080) /!< Receive buffer unavailable flag /
Kojto	108:34e6b704fe68	1523	#define ETH_DMA_FLAG_R ((uint32_t)0x00000040) /!< Receive flag /
Kojto	108:34e6b704fe68	1524	#define ETH_DMA_FLAG_TU ((uint32_t)0x00000020) /!< Underflow flag /
Kojto	108:34e6b704fe68	1525	#define ETH_DMA_FLAG_RO ((uint32_t)0x00000010) /!< Overflow flag /
Kojto	108:34e6b704fe68	1526	#define ETH_DMA_FLAG_TJT ((uint32_t)0x00000008) /!< Transmit jabber timeout flag /
Kojto	108:34e6b704fe68	1527	#define ETH_DMA_FLAG_TBU ((uint32_t)0x00000004) /!< Transmit buffer unavailable flag /
Kojto	108:34e6b704fe68	1528	#define ETH_DMA_FLAG_TPS ((uint32_t)0x00000002) /!< Transmit process stopped flag /
Kojto	108:34e6b704fe68	1529	#define ETH_DMA_FLAG_T ((uint32_t)0x00000001) /!< Transmit flag /
Kojto	108:34e6b704fe68	1530	/**
Kojto	108:34e6b704fe68	1531	* @}
Kojto	108:34e6b704fe68	1532	*/
Kojto	108:34e6b704fe68	1533
Kojto	108:34e6b704fe68	1534	/** @defgroup ETH_MAC_Interrupts ETH MAC Interrupts
Kojto	108:34e6b704fe68	1535	* @{
Kojto	108:34e6b704fe68	1536	*/
Kojto	108:34e6b704fe68	1537	#define ETH_MAC_IT_TST ((uint32_t)0x00000200) /!< Time stamp trigger interrupt (on MAC) /
Kojto	108:34e6b704fe68	1538	#define ETH_MAC_IT_MMCT ((uint32_t)0x00000040) /!< MMC transmit interrupt /
Kojto	108:34e6b704fe68	1539	#define ETH_MAC_IT_MMCR ((uint32_t)0x00000020) /!< MMC receive interrupt /
Kojto	108:34e6b704fe68	1540	#define ETH_MAC_IT_MMC ((uint32_t)0x00000010) /!< MMC interrupt (on MAC) /
Kojto	108:34e6b704fe68	1541	#define ETH_MAC_IT_PMT ((uint32_t)0x00000008) /!< PMT interrupt (on MAC) /
Kojto	108:34e6b704fe68	1542	/**
Kojto	108:34e6b704fe68	1543	* @}
Kojto	108:34e6b704fe68	1544	*/
Kojto	108:34e6b704fe68	1545
Kojto	108:34e6b704fe68	1546	/** @defgroup ETH_DMA_Interrupts ETH DMA Interrupts
Kojto	108:34e6b704fe68	1547	* @{
Kojto	108:34e6b704fe68	1548	*/
Kojto	108:34e6b704fe68	1549	#define ETH_DMA_IT_TST ((uint32_t)0x20000000) /!< Time-stamp trigger interrupt (on DMA) /
Kojto	108:34e6b704fe68	1550	#define ETH_DMA_IT_PMT ((uint32_t)0x10000000) /!< PMT interrupt (on DMA) /
Kojto	108:34e6b704fe68	1551	#define ETH_DMA_IT_MMC ((uint32_t)0x08000000) /!< MMC interrupt (on DMA) /
Kojto	108:34e6b704fe68	1552	#define ETH_DMA_IT_NIS ((uint32_t)0x00010000) /!< Normal interrupt summary /
Kojto	108:34e6b704fe68	1553	#define ETH_DMA_IT_AIS ((uint32_t)0x00008000) /!< Abnormal interrupt summary /
Kojto	108:34e6b704fe68	1554	#define ETH_DMA_IT_ER ((uint32_t)0x00004000) /!< Early receive interrupt /
Kojto	108:34e6b704fe68	1555	#define ETH_DMA_IT_FBE ((uint32_t)0x00002000) /!< Fatal bus error interrupt /
Kojto	108:34e6b704fe68	1556	#define ETH_DMA_IT_ET ((uint32_t)0x00000400) /!< Early transmit interrupt /
Kojto	108:34e6b704fe68	1557	#define ETH_DMA_IT_RWT ((uint32_t)0x00000200) /!< Receive watchdog timeout interrupt /
Kojto	108:34e6b704fe68	1558	#define ETH_DMA_IT_RPS ((uint32_t)0x00000100) /!< Receive process stopped interrupt /
Kojto	108:34e6b704fe68	1559	#define ETH_DMA_IT_RBU ((uint32_t)0x00000080) /!< Receive buffer unavailable interrupt /
Kojto	108:34e6b704fe68	1560	#define ETH_DMA_IT_R ((uint32_t)0x00000040) /!< Receive interrupt /
Kojto	108:34e6b704fe68	1561	#define ETH_DMA_IT_TU ((uint32_t)0x00000020) /!< Underflow interrupt /
Kojto	108:34e6b704fe68	1562	#define ETH_DMA_IT_RO ((uint32_t)0x00000010) /!< Overflow interrupt /
Kojto	108:34e6b704fe68	1563	#define ETH_DMA_IT_TJT ((uint32_t)0x00000008) /!< Transmit jabber timeout interrupt /
Kojto	108:34e6b704fe68	1564	#define ETH_DMA_IT_TBU ((uint32_t)0x00000004) /!< Transmit buffer unavailable interrupt /
Kojto	108:34e6b704fe68	1565	#define ETH_DMA_IT_TPS ((uint32_t)0x00000002) /!< Transmit process stopped interrupt /
Kojto	108:34e6b704fe68	1566	#define ETH_DMA_IT_T ((uint32_t)0x00000001) /!< Transmit interrupt /
Kojto	108:34e6b704fe68	1567	/**
Kojto	108:34e6b704fe68	1568	* @}
Kojto	108:34e6b704fe68	1569	*/
Kojto	108:34e6b704fe68	1570
Kojto	108:34e6b704fe68	1571	/** @defgroup ETH_DMA_transmit_process_state ETH DMA transmit process state
Kojto	108:34e6b704fe68	1572	* @{
Kojto	108:34e6b704fe68	1573	*/
Kojto	108:34e6b704fe68	1574	#define ETH_DMA_TRANSMITPROCESS_STOPPED ((uint32_t)0x00000000) /!< Stopped - Reset or Stop Tx Command issued /
Kojto	108:34e6b704fe68	1575	#define ETH_DMA_TRANSMITPROCESS_FETCHING ((uint32_t)0x00100000) /!< Running - fetching the Tx descriptor /
Kojto	108:34e6b704fe68	1576	#define ETH_DMA_TRANSMITPROCESS_WAITING ((uint32_t)0x00200000) /!< Running - waiting for status /
Kojto	108:34e6b704fe68	1577	#define ETH_DMA_TRANSMITPROCESS_READING ((uint32_t)0x00300000) /!< Running - reading the data from host memory /
Kojto	108:34e6b704fe68	1578	#define ETH_DMA_TRANSMITPROCESS_SUSPENDED ((uint32_t)0x00600000) /!< Suspended - Tx Descriptor unavailable /
Kojto	108:34e6b704fe68	1579	#define ETH_DMA_TRANSMITPROCESS_CLOSING ((uint32_t)0x00700000) /!< Running - closing Rx descriptor /
Kojto	108:34e6b704fe68	1580
Kojto	108:34e6b704fe68	1581	/**
Kojto	108:34e6b704fe68	1582	* @}
Kojto	108:34e6b704fe68	1583	*/
Kojto	108:34e6b704fe68	1584
Kojto	108:34e6b704fe68	1585
Kojto	108:34e6b704fe68	1586	/** @defgroup ETH_DMA_receive_process_state ETH DMA receive process state
Kojto	108:34e6b704fe68	1587	* @{
Kojto	108:34e6b704fe68	1588	*/
Kojto	108:34e6b704fe68	1589	#define ETH_DMA_RECEIVEPROCESS_STOPPED ((uint32_t)0x00000000) /!< Stopped - Reset or Stop Rx Command issued /
Kojto	108:34e6b704fe68	1590	#define ETH_DMA_RECEIVEPROCESS_FETCHING ((uint32_t)0x00020000) /!< Running - fetching the Rx descriptor /
Kojto	108:34e6b704fe68	1591	#define ETH_DMA_RECEIVEPROCESS_WAITING ((uint32_t)0x00060000) /!< Running - waiting for packet /
Kojto	108:34e6b704fe68	1592	#define ETH_DMA_RECEIVEPROCESS_SUSPENDED ((uint32_t)0x00080000) /!< Suspended - Rx Descriptor unavailable /
Kojto	108:34e6b704fe68	1593	#define ETH_DMA_RECEIVEPROCESS_CLOSING ((uint32_t)0x000A0000) /!< Running - closing descriptor /
Kojto	108:34e6b704fe68	1594	#define ETH_DMA_RECEIVEPROCESS_QUEUING ((uint32_t)0x000E0000) /!< Running - queuing the receive frame into host memory /
Kojto	108:34e6b704fe68	1595
Kojto	108:34e6b704fe68	1596	/**
Kojto	108:34e6b704fe68	1597	* @}
Kojto	108:34e6b704fe68	1598	*/
Kojto	108:34e6b704fe68	1599
Kojto	108:34e6b704fe68	1600	/** @defgroup ETH_DMA_overflow ETH DMA overflow
Kojto	108:34e6b704fe68	1601	* @{
Kojto	108:34e6b704fe68	1602	*/
Kojto	108:34e6b704fe68	1603	#define ETH_DMA_OVERFLOW_RXFIFOCOUNTER ((uint32_t)0x10000000) /!< Overflow bit for FIFO overflow counter /
Kojto	108:34e6b704fe68	1604	#define ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER ((uint32_t)0x00010000) /!< Overflow bit for missed frame counter /
Kojto	108:34e6b704fe68	1605	/**
Kojto	108:34e6b704fe68	1606	* @}
Kojto	108:34e6b704fe68	1607	*/
Kojto	108:34e6b704fe68	1608
Kojto	108:34e6b704fe68	1609	/** @defgroup ETH_EXTI_LINE_WAKEUP ETH EXTI LINE WAKEUP
Kojto	108:34e6b704fe68	1610	* @{
Kojto	108:34e6b704fe68	1611	*/
Kojto	108:34e6b704fe68	1612	#define ETH_EXTI_LINE_WAKEUP ((uint32_t)0x00080000) /!< External interrupt line 19 Connected to the ETH EXTI Line /
Kojto	108:34e6b704fe68	1613
Kojto	108:34e6b704fe68	1614	/**
Kojto	108:34e6b704fe68	1615	* @}
Kojto	108:34e6b704fe68	1616	*/
Kojto	108:34e6b704fe68	1617
Kojto	108:34e6b704fe68	1618	/**
Kojto	108:34e6b704fe68	1619	* @}
Kojto	108:34e6b704fe68	1620	*/
Kojto	108:34e6b704fe68	1621
Kojto	108:34e6b704fe68	1622	/* Exported macro ------------------------------------------------------------*/
Kojto	108:34e6b704fe68	1623	/** @defgroup ETH_Exported_Macros ETH Exported Macros
Kojto	108:34e6b704fe68	1624	* @brief macros to handle interrupts and specific clock configurations
Kojto	108:34e6b704fe68	1625	* @{
Kojto	108:34e6b704fe68	1626	*/
Kojto	108:34e6b704fe68	1627
Kojto	108:34e6b704fe68	1628	/** @brief Reset ETH handle state
Kojto	108:34e6b704fe68	1629	* @param __HANDLE__: specifies the ETH handle.
Kojto	108:34e6b704fe68	1630	* @retval None
Kojto	108:34e6b704fe68	1631	*/
Kojto	108:34e6b704fe68	1632	#define __HAL_ETH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ETH_STATE_RESET)
Kojto	108:34e6b704fe68	1633
Kojto	108:34e6b704fe68	1634	/**
Kojto	108:34e6b704fe68	1635	* @brief Checks whether the specified ETHERNET DMA Tx Desc flag is set or not.
Kojto	108:34e6b704fe68	1636	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1637	* @param __FLAG__: specifies the flag of TDES0 to check.
Kojto	108:34e6b704fe68	1638	* @retval the ETH_DMATxDescFlag (SET or RESET).
Kojto	108:34e6b704fe68	1639	*/
Kojto	108:34e6b704fe68	1640	#define __HAL_ETH_DMATXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->TxDesc->Status & (__FLAG__) == (__FLAG__))
Kojto	108:34e6b704fe68	1641
Kojto	108:34e6b704fe68	1642	/**
Kojto	108:34e6b704fe68	1643	* @brief Checks whether the specified ETHERNET DMA Rx Desc flag is set or not.
Kojto	108:34e6b704fe68	1644	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1645	* @param __FLAG__: specifies the flag of RDES0 to check.
Kojto	108:34e6b704fe68	1646	* @retval the ETH_DMATxDescFlag (SET or RESET).
Kojto	108:34e6b704fe68	1647	*/
Kojto	108:34e6b704fe68	1648	#define __HAL_ETH_DMARXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->RxDesc->Status & (__FLAG__) == (__FLAG__))
Kojto	108:34e6b704fe68	1649
Kojto	108:34e6b704fe68	1650	/**
Kojto	108:34e6b704fe68	1651	* @brief Enables the specified DMA Rx Desc receive interrupt.
Kojto	108:34e6b704fe68	1652	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1653	* @retval None
Kojto	108:34e6b704fe68	1654	*/
Kojto	108:34e6b704fe68	1655	#define __HAL_ETH_DMARXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize &=(~(uint32_t)ETH_DMARXDESC_DIC))
Kojto	108:34e6b704fe68	1656
Kojto	108:34e6b704fe68	1657	/**
Kojto	108:34e6b704fe68	1658	* @brief Disables the specified DMA Rx Desc receive interrupt.
Kojto	108:34e6b704fe68	1659	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1660	* @retval None
Kojto	108:34e6b704fe68	1661	*/
Kojto	108:34e6b704fe68	1662	#define __HAL_ETH_DMARXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize \|= ETH_DMARXDESC_DIC)
Kojto	108:34e6b704fe68	1663
Kojto	108:34e6b704fe68	1664	/**
Kojto	108:34e6b704fe68	1665	* @brief Set the specified DMA Rx Desc Own bit.
Kojto	108:34e6b704fe68	1666	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1667	* @retval None
Kojto	108:34e6b704fe68	1668	*/
Kojto	108:34e6b704fe68	1669	#define __HAL_ETH_DMARXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status \|= ETH_DMARXDESC_OWN)
Kojto	108:34e6b704fe68	1670
Kojto	108:34e6b704fe68	1671	/**
Kojto	108:34e6b704fe68	1672	* @brief Returns the specified ETHERNET DMA Tx Desc collision count.
Kojto	108:34e6b704fe68	1673	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1674	* @retval The Transmit descriptor collision counter value.
Kojto	108:34e6b704fe68	1675	*/
Kojto	108:34e6b704fe68	1676	#define __HAL_ETH_DMATXDESC_GET_COLLISION_COUNT(__HANDLE__) (((__HANDLE__)->TxDesc->Status & ETH_DMATXDESC_CC) >> ETH_DMATXDESC_COLLISION_COUNTSHIFT)
Kojto	108:34e6b704fe68	1677
Kojto	108:34e6b704fe68	1678	/**
Kojto	108:34e6b704fe68	1679	* @brief Set the specified DMA Tx Desc Own bit.
Kojto	108:34e6b704fe68	1680	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1681	* @retval None
Kojto	108:34e6b704fe68	1682	*/
Kojto	108:34e6b704fe68	1683	#define __HAL_ETH_DMATXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->TxDesc->Status \|= ETH_DMATXDESC_OWN)
Kojto	108:34e6b704fe68	1684
Kojto	108:34e6b704fe68	1685	/**
Kojto	108:34e6b704fe68	1686	* @brief Enables the specified DMA Tx Desc Transmit interrupt.
Kojto	108:34e6b704fe68	1687	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1688	* @retval None
Kojto	108:34e6b704fe68	1689	*/
Kojto	108:34e6b704fe68	1690	#define __HAL_ETH_DMATXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status \|= ETH_DMATXDESC_IC)
Kojto	108:34e6b704fe68	1691
Kojto	108:34e6b704fe68	1692	/**
Kojto	108:34e6b704fe68	1693	* @brief Disables the specified DMA Tx Desc Transmit interrupt.
Kojto	108:34e6b704fe68	1694	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1695	* @retval None
Kojto	108:34e6b704fe68	1696	*/
Kojto	108:34e6b704fe68	1697	#define __HAL_ETH_DMATXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_IC)
Kojto	108:34e6b704fe68	1698
Kojto	108:34e6b704fe68	1699	/**
Kojto	108:34e6b704fe68	1700	* @brief Selects the specified ETHERNET DMA Tx Desc Checksum Insertion.
Kojto	108:34e6b704fe68	1701	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1702	* @param __CHECKSUM__: specifies is the DMA Tx desc checksum insertion.
Kojto	108:34e6b704fe68	1703	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	1704	* @arg ETH_DMATXDESC_CHECKSUMBYPASS : Checksum bypass
Kojto	108:34e6b704fe68	1705	* @arg ETH_DMATXDESC_CHECKSUMIPV4HEADER : IPv4 header checksum
Kojto	108:34e6b704fe68	1706	* @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT : TCP/UDP/ICMP checksum. Pseudo header checksum is assumed to be present
Kojto	108:34e6b704fe68	1707	* @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL : TCP/UDP/ICMP checksum fully in hardware including pseudo header
Kojto	108:34e6b704fe68	1708	* @retval None
Kojto	108:34e6b704fe68	1709	*/
Kojto	108:34e6b704fe68	1710	#define __HAL_ETH_DMATXDESC_CHECKSUM_INSERTION(__HANDLE__, __CHECKSUM__) ((__HANDLE__)->TxDesc->Status \|= (__CHECKSUM__))
Kojto	108:34e6b704fe68	1711
Kojto	108:34e6b704fe68	1712	/**
Kojto	108:34e6b704fe68	1713	* @brief Enables the DMA Tx Desc CRC.
Kojto	108:34e6b704fe68	1714	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1715	* @retval None
Kojto	108:34e6b704fe68	1716	*/
Kojto	108:34e6b704fe68	1717	#define __HAL_ETH_DMATXDESC_CRC_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DC)
Kojto	108:34e6b704fe68	1718
Kojto	108:34e6b704fe68	1719	/**
Kojto	108:34e6b704fe68	1720	* @brief Disables the DMA Tx Desc CRC.
Kojto	108:34e6b704fe68	1721	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1722	* @retval None
Kojto	108:34e6b704fe68	1723	*/
Kojto	108:34e6b704fe68	1724	#define __HAL_ETH_DMATXDESC_CRC_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status \|= ETH_DMATXDESC_DC)
Kojto	108:34e6b704fe68	1725
Kojto	108:34e6b704fe68	1726	/**
Kojto	108:34e6b704fe68	1727	* @brief Enables the DMA Tx Desc padding for frame shorter than 64 bytes.
Kojto	108:34e6b704fe68	1728	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1729	* @retval None
Kojto	108:34e6b704fe68	1730	*/
Kojto	108:34e6b704fe68	1731	#define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DP)
Kojto	108:34e6b704fe68	1732
Kojto	108:34e6b704fe68	1733	/**
Kojto	108:34e6b704fe68	1734	* @brief Disables the DMA Tx Desc padding for frame shorter than 64 bytes.
Kojto	108:34e6b704fe68	1735	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1736	* @retval None
Kojto	108:34e6b704fe68	1737	*/
Kojto	108:34e6b704fe68	1738	#define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status \|= ETH_DMATXDESC_DP)
Kojto	108:34e6b704fe68	1739
Kojto	108:34e6b704fe68	1740	/**
Kojto	108:34e6b704fe68	1741	* @brief Enables the specified ETHERNET MAC interrupts.
Kojto	108:34e6b704fe68	1742	* @param __HANDLE__ : ETH Handle
Kojto	108:34e6b704fe68	1743	* @param __INTERRUPT__: specifies the ETHERNET MAC interrupt sources to be
Kojto	108:34e6b704fe68	1744	* enabled or disabled.
Kojto	108:34e6b704fe68	1745	* This parameter can be any combination of the following values:
Kojto	108:34e6b704fe68	1746	* @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
Kojto	108:34e6b704fe68	1747	* @arg ETH_MAC_IT_PMT : PMT interrupt
Kojto	108:34e6b704fe68	1748	* @retval None
Kojto	108:34e6b704fe68	1749	*/
Kojto	108:34e6b704fe68	1750	#define __HAL_ETH_MAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR \|= (__INTERRUPT__))
Kojto	108:34e6b704fe68	1751
Kojto	108:34e6b704fe68	1752	/**
Kojto	108:34e6b704fe68	1753	* @brief Disables the specified ETHERNET MAC interrupts.
Kojto	108:34e6b704fe68	1754	* @param __HANDLE__ : ETH Handle
Kojto	108:34e6b704fe68	1755	* @param __INTERRUPT__: specifies the ETHERNET MAC interrupt sources to be
Kojto	108:34e6b704fe68	1756	* enabled or disabled.
Kojto	108:34e6b704fe68	1757	* This parameter can be any combination of the following values:
Kojto	108:34e6b704fe68	1758	* @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
Kojto	108:34e6b704fe68	1759	* @arg ETH_MAC_IT_PMT : PMT interrupt
Kojto	108:34e6b704fe68	1760	* @retval None
Kojto	108:34e6b704fe68	1761	*/
Kojto	108:34e6b704fe68	1762	#define __HAL_ETH_MAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR &= ~(__INTERRUPT__))
Kojto	108:34e6b704fe68	1763
Kojto	108:34e6b704fe68	1764	/**
Kojto	108:34e6b704fe68	1765	* @brief Initiate a Pause Control Frame (Full-duplex only).
Kojto	108:34e6b704fe68	1766	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1767	* @retval None
Kojto	108:34e6b704fe68	1768	*/
Kojto	108:34e6b704fe68	1769	#define __HAL_ETH_INITIATE_PAUSE_CONTROL_FRAME(__HANDLE__) ((__HANDLE__)->Instance->MACFCR \|= ETH_MACFCR_FCBBPA)
Kojto	108:34e6b704fe68	1770
Kojto	108:34e6b704fe68	1771	/**
Kojto	108:34e6b704fe68	1772	* @brief Checks whether the ETHERNET flow control busy bit is set or not.
Kojto	108:34e6b704fe68	1773	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1774	* @retval The new state of flow control busy status bit (SET or RESET).
Kojto	108:34e6b704fe68	1775	*/
Kojto	108:34e6b704fe68	1776	#define __HAL_ETH_GET_FLOW_CONTROL_BUSY_STATUS(__HANDLE__) (((__HANDLE__)->Instance->MACFCR & ETH_MACFCR_FCBBPA) == ETH_MACFCR_FCBBPA)
Kojto	108:34e6b704fe68	1777
Kojto	108:34e6b704fe68	1778	/**
Kojto	108:34e6b704fe68	1779	* @brief Enables the MAC Back Pressure operation activation (Half-duplex only).
Kojto	108:34e6b704fe68	1780	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1781	* @retval None
Kojto	108:34e6b704fe68	1782	*/
Kojto	108:34e6b704fe68	1783	#define __HAL_ETH_BACK_PRESSURE_ACTIVATION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR \|= ETH_MACFCR_FCBBPA)
Kojto	108:34e6b704fe68	1784
Kojto	108:34e6b704fe68	1785	/**
Kojto	108:34e6b704fe68	1786	* @brief Disables the MAC BackPressure operation activation (Half-duplex only).
Kojto	108:34e6b704fe68	1787	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1788	* @retval None
Kojto	108:34e6b704fe68	1789	*/
Kojto	108:34e6b704fe68	1790	#define __HAL_ETH_BACK_PRESSURE_ACTIVATION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR &= ~ETH_MACFCR_FCBBPA)
Kojto	108:34e6b704fe68	1791
Kojto	108:34e6b704fe68	1792	/**
Kojto	108:34e6b704fe68	1793	* @brief Checks whether the specified ETHERNET MAC flag is set or not.
Kojto	108:34e6b704fe68	1794	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1795	* @param __FLAG__: specifies the flag to check.
Kojto	108:34e6b704fe68	1796	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	1797	* @arg ETH_MAC_FLAG_TST : Time stamp trigger flag
Kojto	108:34e6b704fe68	1798	* @arg ETH_MAC_FLAG_MMCT : MMC transmit flag
Kojto	108:34e6b704fe68	1799	* @arg ETH_MAC_FLAG_MMCR : MMC receive flag
Kojto	108:34e6b704fe68	1800	* @arg ETH_MAC_FLAG_MMC : MMC flag
Kojto	108:34e6b704fe68	1801	* @arg ETH_MAC_FLAG_PMT : PMT flag
Kojto	108:34e6b704fe68	1802	* @retval The state of ETHERNET MAC flag.
Kojto	108:34e6b704fe68	1803	*/
Kojto	108:34e6b704fe68	1804	#define __HAL_ETH_MAC_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACSR &( __FLAG__)) == ( __FLAG__))
Kojto	108:34e6b704fe68	1805
Kojto	108:34e6b704fe68	1806	/**
Kojto	108:34e6b704fe68	1807	* @brief Enables the specified ETHERNET DMA interrupts.
Kojto	108:34e6b704fe68	1808	* @param __HANDLE__ : ETH Handle
Kojto	108:34e6b704fe68	1809	* @param __INTERRUPT__: specifies the ETHERNET DMA interrupt sources to be
Kojto	108:34e6b704fe68	1810	* enabled @ref ETH_DMA_Interrupts
Kojto	108:34e6b704fe68	1811	* @retval None
Kojto	108:34e6b704fe68	1812	*/
Kojto	108:34e6b704fe68	1813	#define __HAL_ETH_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER \|= (__INTERRUPT__))
Kojto	108:34e6b704fe68	1814
Kojto	108:34e6b704fe68	1815	/**
Kojto	108:34e6b704fe68	1816	* @brief Disables the specified ETHERNET DMA interrupts.
Kojto	108:34e6b704fe68	1817	* @param __HANDLE__ : ETH Handle
Kojto	108:34e6b704fe68	1818	* @param __INTERRUPT__: specifies the ETHERNET DMA interrupt sources to be
Kojto	108:34e6b704fe68	1819	* disabled. @ref ETH_DMA_Interrupts
Kojto	108:34e6b704fe68	1820	* @retval None
Kojto	108:34e6b704fe68	1821	*/
Kojto	108:34e6b704fe68	1822	#define __HAL_ETH_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER &= ~(__INTERRUPT__))
Kojto	108:34e6b704fe68	1823
Kojto	108:34e6b704fe68	1824	/**
Kojto	108:34e6b704fe68	1825	* @brief Clears the ETHERNET DMA IT pending bit.
Kojto	108:34e6b704fe68	1826	* @param __HANDLE__ : ETH Handle
Kojto	108:34e6b704fe68	1827	* @param __INTERRUPT__: specifies the interrupt pending bit to clear. @ref ETH_DMA_Interrupts
Kojto	108:34e6b704fe68	1828	* @retval None
Kojto	108:34e6b704fe68	1829	*/
Kojto	108:34e6b704fe68	1830	#define __HAL_ETH_DMA_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMASR =(__INTERRUPT__))
Kojto	108:34e6b704fe68	1831
Kojto	108:34e6b704fe68	1832	/**
Kojto	108:34e6b704fe68	1833	* @brief Checks whether the specified ETHERNET DMA flag is set or not.
Kojto	108:34e6b704fe68	1834	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1835	* @param __FLAG__: specifies the flag to check. @ref ETH_DMA_Flags
Kojto	108:34e6b704fe68	1836	* @retval The new state of ETH_DMA_FLAG (SET or RESET).
Kojto	108:34e6b704fe68	1837	*/
Kojto	108:34e6b704fe68	1838	#define __HAL_ETH_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->DMASR &( __FLAG__)) == ( __FLAG__))
Kojto	108:34e6b704fe68	1839
Kojto	108:34e6b704fe68	1840	/**
Kojto	108:34e6b704fe68	1841	* @brief Checks whether the specified ETHERNET DMA flag is set or not.
Kojto	108:34e6b704fe68	1842	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1843	* @param __FLAG__: specifies the flag to clear. @ref ETH_DMA_Flags
Kojto	108:34e6b704fe68	1844	* @retval The new state of ETH_DMA_FLAG (SET or RESET).
Kojto	108:34e6b704fe68	1845	*/
Kojto	108:34e6b704fe68	1846	#define __HAL_ETH_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->DMASR = (__FLAG__))
Kojto	108:34e6b704fe68	1847
Kojto	108:34e6b704fe68	1848	/**
Kojto	108:34e6b704fe68	1849	* @brief Checks whether the specified ETHERNET DMA overflow flag is set or not.
Kojto	108:34e6b704fe68	1850	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1851	* @param __OVERFLOW__: specifies the DMA overflow flag to check.
Kojto	108:34e6b704fe68	1852	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	1853	* @arg ETH_DMA_OVERFLOW_RXFIFOCOUNTER : Overflow for FIFO Overflows Counter
Kojto	108:34e6b704fe68	1854	* @arg ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER : Overflow for Buffer Unavailable Missed Frame Counter
Kojto	108:34e6b704fe68	1855	* @retval The state of ETHERNET DMA overflow Flag (SET or RESET).
Kojto	108:34e6b704fe68	1856	*/
Kojto	108:34e6b704fe68	1857	#define __HAL_ETH_GET_DMA_OVERFLOW_STATUS(__HANDLE__, __OVERFLOW__) (((__HANDLE__)->Instance->DMAMFBOCR & (__OVERFLOW__)) == (__OVERFLOW__))
Kojto	108:34e6b704fe68	1858
Kojto	108:34e6b704fe68	1859	/**
Kojto	108:34e6b704fe68	1860	* @brief Set the DMA Receive status watchdog timer register value
Kojto	108:34e6b704fe68	1861	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1862	* @param __VALUE__: DMA Receive status watchdog timer register value
Kojto	108:34e6b704fe68	1863	* @retval None
Kojto	108:34e6b704fe68	1864	*/
Kojto	108:34e6b704fe68	1865	#define __HAL_ETH_SET_RECEIVE_WATCHDOG_TIMER(__HANDLE__, __VALUE__) ((__HANDLE__)->Instance->DMARSWTR = (__VALUE__))
Kojto	108:34e6b704fe68	1866
Kojto	108:34e6b704fe68	1867	/**
Kojto	108:34e6b704fe68	1868	* @brief Enables any unicast packet filtered by the MAC address
Kojto	108:34e6b704fe68	1869	* recognition to be a wake-up frame.
Kojto	108:34e6b704fe68	1870	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1871	* @retval None
Kojto	108:34e6b704fe68	1872	*/
Kojto	108:34e6b704fe68	1873	#define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR \|= ETH_MACPMTCSR_GU)
Kojto	108:34e6b704fe68	1874
Kojto	108:34e6b704fe68	1875	/**
Kojto	108:34e6b704fe68	1876	* @brief Disables any unicast packet filtered by the MAC address
Kojto	108:34e6b704fe68	1877	* recognition to be a wake-up frame.
Kojto	108:34e6b704fe68	1878	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1879	* @retval None
Kojto	108:34e6b704fe68	1880	*/
Kojto	108:34e6b704fe68	1881	#define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_GU)
Kojto	108:34e6b704fe68	1882
Kojto	108:34e6b704fe68	1883	/**
Kojto	108:34e6b704fe68	1884	* @brief Enables the MAC Wake-Up Frame Detection.
Kojto	108:34e6b704fe68	1885	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1886	* @retval None
Kojto	108:34e6b704fe68	1887	*/
Kojto	108:34e6b704fe68	1888	#define __HAL_ETH_WAKEUP_FRAME_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR \|= ETH_MACPMTCSR_WFE)
Kojto	108:34e6b704fe68	1889
Kojto	108:34e6b704fe68	1890	/**
Kojto	108:34e6b704fe68	1891	* @brief Disables the MAC Wake-Up Frame Detection.
Kojto	108:34e6b704fe68	1892	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1893	* @retval None
Kojto	108:34e6b704fe68	1894	*/
Kojto	108:34e6b704fe68	1895	#define __HAL_ETH_WAKEUP_FRAME_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
Kojto	108:34e6b704fe68	1896
Kojto	108:34e6b704fe68	1897	/**
Kojto	108:34e6b704fe68	1898	* @brief Enables the MAC Magic Packet Detection.
Kojto	108:34e6b704fe68	1899	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1900	* @retval None
Kojto	108:34e6b704fe68	1901	*/
Kojto	108:34e6b704fe68	1902	#define __HAL_ETH_MAGIC_PACKET_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR \|= ETH_MACPMTCSR_MPE)
Kojto	108:34e6b704fe68	1903
Kojto	108:34e6b704fe68	1904	/**
Kojto	108:34e6b704fe68	1905	* @brief Disables the MAC Magic Packet Detection.
Kojto	108:34e6b704fe68	1906	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1907	* @retval None
Kojto	108:34e6b704fe68	1908	*/
Kojto	108:34e6b704fe68	1909	#define __HAL_ETH_MAGIC_PACKET_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
Kojto	108:34e6b704fe68	1910
Kojto	108:34e6b704fe68	1911	/**
Kojto	108:34e6b704fe68	1912	* @brief Enables the MAC Power Down.
Kojto	108:34e6b704fe68	1913	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1914	* @retval None
Kojto	108:34e6b704fe68	1915	*/
Kojto	108:34e6b704fe68	1916	#define __HAL_ETH_POWER_DOWN_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR \|= ETH_MACPMTCSR_PD)
Kojto	108:34e6b704fe68	1917
Kojto	108:34e6b704fe68	1918	/**
Kojto	108:34e6b704fe68	1919	* @brief Disables the MAC Power Down.
Kojto	108:34e6b704fe68	1920	* @param __HANDLE__: ETH Handle
Kojto	108:34e6b704fe68	1921	* @retval None
Kojto	108:34e6b704fe68	1922	*/
Kojto	108:34e6b704fe68	1923	#define __HAL_ETH_POWER_DOWN_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_PD)
Kojto	108:34e6b704fe68	1924
Kojto	108:34e6b704fe68	1925	/**
Kojto	108:34e6b704fe68	1926	* @brief Checks whether the specified ETHERNET PMT flag is set or not.
Kojto	108:34e6b704fe68	1927	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1928	* @param __FLAG__: specifies the flag to check.
Kojto	108:34e6b704fe68	1929	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	1930	* @arg ETH_PMT_FLAG_WUFFRPR : Wake-Up Frame Filter Register Pointer Reset
Kojto	108:34e6b704fe68	1931	* @arg ETH_PMT_FLAG_WUFR : Wake-Up Frame Received
Kojto	108:34e6b704fe68	1932	* @arg ETH_PMT_FLAG_MPR : Magic Packet Received
Kojto	108:34e6b704fe68	1933	* @retval The new state of ETHERNET PMT Flag (SET or RESET).
Kojto	108:34e6b704fe68	1934	*/
Kojto	108:34e6b704fe68	1935	#define __HAL_ETH_GET_PMT_FLAG_STATUS(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACPMTCSR &( __FLAG__)) == ( __FLAG__))
Kojto	108:34e6b704fe68	1936
Kojto	108:34e6b704fe68	1937	/**
Kojto	108:34e6b704fe68	1938	* @brief Preset and Initialize the MMC counters to almost-full value: 0xFFFF_FFF0 (full - 16)
Kojto	108:34e6b704fe68	1939	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1940	* @retval None
Kojto	108:34e6b704fe68	1941	*/
Kojto	108:34e6b704fe68	1942	#define __HAL_ETH_MMC_COUNTER_FULL_PRESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR \|= (ETH_MMCCR_MCFHP \| ETH_MMCCR_MCP))
Kojto	108:34e6b704fe68	1943
Kojto	108:34e6b704fe68	1944	/**
Kojto	108:34e6b704fe68	1945	* @brief Preset and Initialize the MMC counters to almost-half value: 0x7FFF_FFF0 (half - 16)
Kojto	108:34e6b704fe68	1946	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1947	* @retval None
Kojto	108:34e6b704fe68	1948	*/
Kojto	108:34e6b704fe68	1949	#define __HAL_ETH_MMC_COUNTER_HALF_PRESET(__HANDLE__) do{(__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCFHP;\
Kojto	108:34e6b704fe68	1950	(__HANDLE__)->Instance->MMCCR \|= ETH_MMCCR_MCP;} while (0)
Kojto	108:34e6b704fe68	1951
Kojto	108:34e6b704fe68	1952	/**
Kojto	108:34e6b704fe68	1953	* @brief Enables the MMC Counter Freeze.
Kojto	108:34e6b704fe68	1954	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1955	* @retval None
Kojto	108:34e6b704fe68	1956	*/
Kojto	108:34e6b704fe68	1957	#define __HAL_ETH_MMC_COUNTER_FREEZE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR \|= ETH_MMCCR_MCF)
Kojto	108:34e6b704fe68	1958
Kojto	108:34e6b704fe68	1959	/**
Kojto	108:34e6b704fe68	1960	* @brief Disables the MMC Counter Freeze.
Kojto	108:34e6b704fe68	1961	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1962	* @retval None
Kojto	108:34e6b704fe68	1963	*/
Kojto	108:34e6b704fe68	1964	#define __HAL_ETH_MMC_COUNTER_FREEZE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCF)
Kojto	108:34e6b704fe68	1965
Kojto	108:34e6b704fe68	1966	/**
Kojto	108:34e6b704fe68	1967	* @brief Enables the MMC Reset On Read.
Kojto	108:34e6b704fe68	1968	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1969	* @retval None
Kojto	108:34e6b704fe68	1970	*/
Kojto	108:34e6b704fe68	1971	#define __HAL_ETH_ETH_MMC_RESET_ONREAD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR \|= ETH_MMCCR_ROR)
Kojto	108:34e6b704fe68	1972
Kojto	108:34e6b704fe68	1973	/**
Kojto	108:34e6b704fe68	1974	* @brief Disables the MMC Reset On Read.
Kojto	108:34e6b704fe68	1975	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1976	* @retval None
Kojto	108:34e6b704fe68	1977	*/
Kojto	108:34e6b704fe68	1978	#define __HAL_ETH_ETH_MMC_RESET_ONREAD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_ROR)
Kojto	108:34e6b704fe68	1979
Kojto	108:34e6b704fe68	1980	/**
Kojto	108:34e6b704fe68	1981	* @brief Enables the MMC Counter Stop Rollover.
Kojto	108:34e6b704fe68	1982	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1983	* @retval None
Kojto	108:34e6b704fe68	1984	*/
Kojto	108:34e6b704fe68	1985	#define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_CSR)
Kojto	108:34e6b704fe68	1986
Kojto	108:34e6b704fe68	1987	/**
Kojto	108:34e6b704fe68	1988	* @brief Disables the MMC Counter Stop Rollover.
Kojto	108:34e6b704fe68	1989	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1990	* @retval None
Kojto	108:34e6b704fe68	1991	*/
Kojto	108:34e6b704fe68	1992	#define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR \|= ETH_MMCCR_CSR)
Kojto	108:34e6b704fe68	1993
Kojto	108:34e6b704fe68	1994	/**
Kojto	108:34e6b704fe68	1995	* @brief Resets the MMC Counters.
Kojto	108:34e6b704fe68	1996	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	1997	* @retval None
Kojto	108:34e6b704fe68	1998	*/
Kojto	108:34e6b704fe68	1999	#define __HAL_ETH_MMC_COUNTERS_RESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR \|= ETH_MMCCR_CR)
Kojto	108:34e6b704fe68	2000
Kojto	108:34e6b704fe68	2001	/**
Kojto	108:34e6b704fe68	2002	* @brief Enables the specified ETHERNET MMC Rx interrupts.
Kojto	108:34e6b704fe68	2003	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	2004	* @param __INTERRUPT__: specifies the ETHERNET MMC interrupt sources to be enabled or disabled.
Kojto	108:34e6b704fe68	2005	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	2006	* @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
Kojto	108:34e6b704fe68	2007	* @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
Kojto	108:34e6b704fe68	2008	* @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value
Kojto	108:34e6b704fe68	2009	* @retval None
Kojto	108:34e6b704fe68	2010	*/
Kojto	108:34e6b704fe68	2011	#define __HAL_ETH_MMC_RX_IT_ENABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR &= ~((__INTERRUPT__) & 0xEFFFFFFF)
Kojto	108:34e6b704fe68	2012	/**
Kojto	108:34e6b704fe68	2013	* @brief Disables the specified ETHERNET MMC Rx interrupts.
Kojto	108:34e6b704fe68	2014	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	2015	* @param __INTERRUPT__: specifies the ETHERNET MMC interrupt sources to be enabled or disabled.
Kojto	108:34e6b704fe68	2016	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	2017	* @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
Kojto	108:34e6b704fe68	2018	* @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
Kojto	108:34e6b704fe68	2019	* @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value
Kojto	108:34e6b704fe68	2020	* @retval None
Kojto	108:34e6b704fe68	2021	*/
Kojto	108:34e6b704fe68	2022	#define __HAL_ETH_MMC_RX_IT_DISABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR \|= ((__INTERRUPT__) & 0xEFFFFFFF)
Kojto	108:34e6b704fe68	2023	/**
Kojto	108:34e6b704fe68	2024	* @brief Enables the specified ETHERNET MMC Tx interrupts.
Kojto	108:34e6b704fe68	2025	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	2026	* @param __INTERRUPT__: specifies the ETHERNET MMC interrupt sources to be enabled or disabled.
Kojto	108:34e6b704fe68	2027	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	2028	* @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
Kojto	108:34e6b704fe68	2029	* @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
Kojto	108:34e6b704fe68	2030	* @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value
Kojto	108:34e6b704fe68	2031	* @retval None
Kojto	108:34e6b704fe68	2032	*/
Kojto	108:34e6b704fe68	2033	#define __HAL_ETH_MMC_TX_IT_ENABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR &= ~ (__INTERRUPT__))
Kojto	108:34e6b704fe68	2034
Kojto	108:34e6b704fe68	2035	/**
Kojto	108:34e6b704fe68	2036	* @brief Disables the specified ETHERNET MMC Tx interrupts.
Kojto	108:34e6b704fe68	2037	* @param __HANDLE__: ETH Handle.
Kojto	108:34e6b704fe68	2038	* @param __INTERRUPT__: specifies the ETHERNET MMC interrupt sources to be enabled or disabled.
Kojto	108:34e6b704fe68	2039	* This parameter can be one of the following values:
Kojto	108:34e6b704fe68	2040	* @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
Kojto	108:34e6b704fe68	2041	* @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
Kojto	108:34e6b704fe68	2042	* @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value
Kojto	108:34e6b704fe68	2043	* @retval None
Kojto	108:34e6b704fe68	2044	*/
Kojto	108:34e6b704fe68	2045	#define __HAL_ETH_MMC_TX_IT_DISABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR \|= (__INTERRUPT__))
Kojto	108:34e6b704fe68	2046
Kojto	108:34e6b704fe68	2047	/**
Kojto	108:34e6b704fe68	2048	* @brief Enables the ETH External interrupt line.
Kojto	108:34e6b704fe68	2049	* @retval None
Kojto	108:34e6b704fe68	2050	*/
Kojto	108:34e6b704fe68	2051	#define __HAL_ETH_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR \|= (ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2052
Kojto	108:34e6b704fe68	2053	/**
Kojto	108:34e6b704fe68	2054	* @brief Disables the ETH External interrupt line.
Kojto	108:34e6b704fe68	2055	* @retval None
Kojto	108:34e6b704fe68	2056	*/
Kojto	108:34e6b704fe68	2057	#define __HAL_ETH_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2058
Kojto	108:34e6b704fe68	2059	/**
Kojto	108:34e6b704fe68	2060	* @brief Enable event on ETH External event line.
Kojto	108:34e6b704fe68	2061	* @retval None.
Kojto	108:34e6b704fe68	2062	*/
Kojto	108:34e6b704fe68	2063	#define __HAL_ETH_WAKEUP_EXTI_ENABLE_EVENT() EXTI->EMR \|= (ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2064
Kojto	108:34e6b704fe68	2065	/**
Kojto	108:34e6b704fe68	2066	* @brief Disable event on ETH External event line
Kojto	108:34e6b704fe68	2067	* @retval None.
Kojto	108:34e6b704fe68	2068	*/
Kojto	108:34e6b704fe68	2069	#define __HAL_ETH_WAKEUP_EXTI_DISABLE_EVENT() EXTI->EMR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2070
Kojto	108:34e6b704fe68	2071	/**
Kojto	108:34e6b704fe68	2072	* @brief Get flag of the ETH External interrupt line.
Kojto	108:34e6b704fe68	2073	* @retval None
Kojto	108:34e6b704fe68	2074	*/
Kojto	108:34e6b704fe68	2075	#define __HAL_ETH_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2076
Kojto	108:34e6b704fe68	2077	/**
Kojto	108:34e6b704fe68	2078	* @brief Clear flag of the ETH External interrupt line.
Kojto	108:34e6b704fe68	2079	* @retval None
Kojto	108:34e6b704fe68	2080	*/
Kojto	108:34e6b704fe68	2081	#define __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2082
Kojto	108:34e6b704fe68	2083	/**
Kojto	108:34e6b704fe68	2084	* @brief Enables rising edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2085	* @retval None
Kojto	108:34e6b704fe68	2086	*/
Kojto	108:34e6b704fe68	2087	#define __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER() EXTI->RTSR \|= ETH_EXTI_LINE_WAKEUP
Kojto	108:34e6b704fe68	2088
Kojto	108:34e6b704fe68	2089	/**
Kojto	108:34e6b704fe68	2090	* @brief Disables the rising edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2091	* @retval None
Kojto	108:34e6b704fe68	2092	*/
Kojto	108:34e6b704fe68	2093	#define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2094
Kojto	108:34e6b704fe68	2095	/**
Kojto	108:34e6b704fe68	2096	* @brief Enables falling edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2097	* @retval None
Kojto	108:34e6b704fe68	2098	*/
Kojto	108:34e6b704fe68	2099	#define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR \|= (ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2100
Kojto	108:34e6b704fe68	2101	/**
Kojto	108:34e6b704fe68	2102	* @brief Disables falling edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2103	* @retval None
Kojto	108:34e6b704fe68	2104	*/
Kojto	108:34e6b704fe68	2105	#define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2106
Kojto	108:34e6b704fe68	2107	/**
Kojto	108:34e6b704fe68	2108	* @brief Enables rising/falling edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2109	* @retval None
Kojto	108:34e6b704fe68	2110	*/
Kojto	108:34e6b704fe68	2111	#define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER() EXTI->RTSR \|= ETH_EXTI_LINE_WAKEUP;\
Kojto	108:34e6b704fe68	2112	EXTI->FTSR \|= ETH_EXTI_LINE_WAKEUP
Kojto	108:34e6b704fe68	2113
Kojto	108:34e6b704fe68	2114	/**
Kojto	108:34e6b704fe68	2115	* @brief Disables rising/falling edge trigger to the ETH External interrupt line.
Kojto	108:34e6b704fe68	2116	* @retval None
Kojto	108:34e6b704fe68	2117	*/
Kojto	108:34e6b704fe68	2118	#define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP);\
Kojto	108:34e6b704fe68	2119	EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto	108:34e6b704fe68	2120
Kojto	108:34e6b704fe68	2121	/**
Kojto	108:34e6b704fe68	2122	* @brief Generate a Software interrupt on selected EXTI line.
Kojto	108:34e6b704fe68	2123	* @retval None.
Kojto	108:34e6b704fe68	2124	*/
Kojto	108:34e6b704fe68	2125	#define __HAL_ETH_WAKEUP_EXTI_GENERATE_SWIT() EXTI->SWIER\|= ETH_EXTI_LINE_WAKEUP
Kojto	108:34e6b704fe68	2126
Kojto	108:34e6b704fe68	2127	/**
Kojto	108:34e6b704fe68	2128	* @}
Kojto	108:34e6b704fe68	2129	*/
Kojto	108:34e6b704fe68	2130	/* Exported functions --------------------------------------------------------*/
Kojto	108:34e6b704fe68	2131
Kojto	108:34e6b704fe68	2132	/** @addtogroup ETH_Exported_Functions
Kojto	108:34e6b704fe68	2133	* @{
Kojto	108:34e6b704fe68	2134	*/
Kojto	108:34e6b704fe68	2135
Kojto	108:34e6b704fe68	2136	/* Initialization and de-initialization functions ****************************/
Kojto	108:34e6b704fe68	2137
Kojto	108:34e6b704fe68	2138	/** @addtogroup ETH_Exported_Functions_Group1
Kojto	108:34e6b704fe68	2139	* @{
Kojto	108:34e6b704fe68	2140	*/
Kojto	108:34e6b704fe68	2141	HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2142	HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2143	void HAL_ETH_MspInit(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2144	void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2145	HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef heth, ETH_DMADescTypeDef DMATxDescTab, uint8_t* TxBuff, uint32_t TxBuffCount);
Kojto	108:34e6b704fe68	2146	HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef heth, ETH_DMADescTypeDef DMARxDescTab, uint8_t *RxBuff, uint32_t RxBuffCount);
Kojto	108:34e6b704fe68	2147
Kojto	108:34e6b704fe68	2148	/**
Kojto	108:34e6b704fe68	2149	* @}
Kojto	108:34e6b704fe68	2150	*/
Kojto	108:34e6b704fe68	2151	/* IO operation functions ****************************************************/
Kojto	108:34e6b704fe68	2152
Kojto	108:34e6b704fe68	2153	/** @addtogroup ETH_Exported_Functions_Group2
Kojto	108:34e6b704fe68	2154	* @{
Kojto	108:34e6b704fe68	2155	*/
Kojto	108:34e6b704fe68	2156	HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength);
Kojto	108:34e6b704fe68	2157	HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2158	/* Communication with PHY functions*/
Kojto	108:34e6b704fe68	2159	HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef heth, uint16_t PHYReg, uint32_t RegValue);
Kojto	108:34e6b704fe68	2160	HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue);
Kojto	108:34e6b704fe68	2161	/* Non-Blocking mode: Interrupt */
Kojto	108:34e6b704fe68	2162	HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2163	void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2164	/* Callback in non blocking modes (Interrupt) */
Kojto	108:34e6b704fe68	2165	void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2166	void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2167	void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2168	/**
Kojto	108:34e6b704fe68	2169	* @}
Kojto	108:34e6b704fe68	2170	*/
Kojto	108:34e6b704fe68	2171
Kojto	108:34e6b704fe68	2172	/* Peripheral Control functions **********************************************/
Kojto	108:34e6b704fe68	2173
Kojto	108:34e6b704fe68	2174	/** @addtogroup ETH_Exported_Functions_Group3
Kojto	108:34e6b704fe68	2175	* @{
Kojto	108:34e6b704fe68	2176	*/
Kojto	108:34e6b704fe68	2177
Kojto	108:34e6b704fe68	2178	HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2179	HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2180	HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef heth, ETH_MACInitTypeDef macconf);
Kojto	108:34e6b704fe68	2181	HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef heth, ETH_DMAInitTypeDef dmaconf);
Kojto	108:34e6b704fe68	2182	/**
Kojto	108:34e6b704fe68	2183	* @}
Kojto	108:34e6b704fe68	2184	*/
Kojto	108:34e6b704fe68	2185
Kojto	108:34e6b704fe68	2186	/* Peripheral State functions ************************************************/
Kojto	108:34e6b704fe68	2187
Kojto	108:34e6b704fe68	2188	/** @addtogroup ETH_Exported_Functions_Group4
Kojto	108:34e6b704fe68	2189	* @{
Kojto	108:34e6b704fe68	2190	*/
Kojto	108:34e6b704fe68	2191	HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth);
Kojto	108:34e6b704fe68	2192	/**
Kojto	108:34e6b704fe68	2193	* @}
Kojto	108:34e6b704fe68	2194	*/
Kojto	108:34e6b704fe68	2195
Kojto	108:34e6b704fe68	2196	/**
Kojto	108:34e6b704fe68	2197	* @}
Kojto	108:34e6b704fe68	2198	*/
Kojto	108:34e6b704fe68	2199
Kojto	108:34e6b704fe68	2200	/**
Kojto	108:34e6b704fe68	2201	* @}
Kojto	108:34e6b704fe68	2202	*/
Kojto	108:34e6b704fe68	2203
Kojto	108:34e6b704fe68	2204	/**
Kojto	108:34e6b704fe68	2205	* @}
Kojto	108:34e6b704fe68	2206	*/
Kojto	108:34e6b704fe68	2207
Kojto	108:34e6b704fe68	2208	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx */
Kojto	108:34e6b704fe68	2209
Kojto	108:34e6b704fe68	2210	#ifdef __cplusplus
Kojto	108:34e6b704fe68	2211	}
Kojto	108:34e6b704fe68	2212	#endif
Kojto	108:34e6b704fe68	2213
Kojto	108:34e6b704fe68	2214	#endif /* __STM32F4xx_HAL_ETH_H */
Kojto	108:34e6b704fe68	2215
Kojto	108:34e6b704fe68	2216
Kojto	108:34e6b704fe68	2217	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	04 Apr 2016
Imports:	4
Forks:	0
Commits:	122
Dependents:	4
Dependencies:	0
Followers:	1

The code in this repository is Apache licensed.

TARGET_ELMO_F411RE/stm32f4xx_hal_eth.h@108:34e6b704fe68, 2015-10-02 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning