Diff: main.cpp

Revision:

90:2ef53b1a22de

Parent:

89:9e00a3c0c7ad

Child:

91:f58472ac3fae

--- a/main.cpp	Tue Mar 28 21:55:40 2017 +0000
+++ b/main.cpp	Tue Apr 04 04:05:37 2017 +0000
@@ -31,6 +31,7 @@
 
 int loop_counter = 0;
 bool control_enabled = false;
+DigitalOut test(PC_5);
 
 void update_velocity() {
     read.last_p_mech = read.p_mech;
@@ -84,7 +85,7 @@
     control.d_integral += d_err * KI_D;
     control.q_integral += q_err * KI_Q;
     
-    constrain_norm(&control.d_integral, &control.q_integral, 1.0f, 1.0f, 1.0f);
+    constrain_norm(&control.d_integral, &control.q_integral, 0.5f, 1.0f, 1.0f);
     
     foc.vd = KP_D * d_err + control.d_integral;// - Lq * POLE_PAIRS * read.w * foc.q / BUS_VOLTAGE / 2.0f;
     foc.vq = KP_Q * q_err + control.q_integral;// + Ld * POLE_PAIRS * read.w * foc.d / BUS_VOLTAGE / 2.0f;
@@ -158,11 +159,17 @@
         
 
 extern "C" void TIM1_UP_TIM10_IRQHandler(void) {
+    test = 1;
     int start_state = io.throttle_in->state();
     if (TIM1->SR & TIM_SR_UIF ) {
         ADC1->CR2  |= 0x40000000; 
-        volatile int delay;
-        for (delay = 0; delay < 35; delay++);
+        //volatile int delay;
+        //for (delay = 0; delay < 35; delay++);
+        volatile int eoc1, eoc2;
+        while (!eoc1 && !eoc2) {
+            eoc1 = ADC1->SR & ADC_SR_EOC;
+            eoc2 = ADC2->SR & ADC_SR_EOC;
+        }
         read.adval1 = ADC1->DR;
         read.adval2 = ADC2->DR;
         commutate();
@@ -170,6 +177,7 @@
     TIM1->SR = 0x00;
     int end_state = io.throttle_in->state();
     if (start_state != end_state) io.throttle_in->block();
+    test = 0;
 }
 
 int main() {