N64_Output_XPAD - v1 Stable

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Justin S / Mbed 2 deprecated N64_Output_XPAD

v1 Stable

Dependencies: F401RE-USBHost USBHostXpad mbed

stm32f4xx_flash.c@13:d7c1aae2b48f, 2017-04-15 (annotated)

Committer:: Ownasaurus
Date:: Sat Apr 15 14:00:16 2017 +0000
Revision:: 13:d7c1aae2b48f
Parent:: 3:52b2a7514406

fixed sensitivity bug; changed default deadzone/sensitivity

Who changed what in which revision?

User	Revision	Line number	New contents of line
Ownasaurus	3:52b2a7514406	1	/**
Ownasaurus	3:52b2a7514406	2	******************************************************************************
Ownasaurus	3:52b2a7514406	3	* @file stm32f4xx_flash.c
Ownasaurus	3:52b2a7514406	4	* @author MCD Application Team
Ownasaurus	3:52b2a7514406	5	* @version V1.7.1
Ownasaurus	3:52b2a7514406	6	* @date 20-May-2016
Ownasaurus	3:52b2a7514406	7	* @brief This file provides firmware functions to manage the following
Ownasaurus	3:52b2a7514406	8	* functionalities of the FLASH peripheral:
Ownasaurus	3:52b2a7514406	9	* + FLASH Interface configuration
Ownasaurus	3:52b2a7514406	10	* + FLASH Memory Programming
Ownasaurus	3:52b2a7514406	11	* + Option Bytes Programming
Ownasaurus	3:52b2a7514406	12	* + Interrupts and flags management
Ownasaurus	3:52b2a7514406	13	*
Ownasaurus	3:52b2a7514406	14	@verbatim
Ownasaurus	3:52b2a7514406	15	===============================================================================
Ownasaurus	3:52b2a7514406	16	##### How to use this driver #####
Ownasaurus	3:52b2a7514406	17	===============================================================================
Ownasaurus	3:52b2a7514406	18	[..]
Ownasaurus	3:52b2a7514406	19	This driver provides functions to configure and program the FLASH memory
Ownasaurus	3:52b2a7514406	20	of all STM32F4xx devices. These functions are split in 4 groups:
Ownasaurus	3:52b2a7514406	21
Ownasaurus	3:52b2a7514406	22	(#) FLASH Interface configuration functions: this group includes the
Ownasaurus	3:52b2a7514406	23	management of the following features:
Ownasaurus	3:52b2a7514406	24	(++) Set the latency
Ownasaurus	3:52b2a7514406	25	(++) Enable/Disable the prefetch buffer
Ownasaurus	3:52b2a7514406	26	(++) Enable/Disable the Instruction cache and the Data cache
Ownasaurus	3:52b2a7514406	27	(++) Reset the Instruction cache and the Data cache
Ownasaurus	3:52b2a7514406	28
Ownasaurus	3:52b2a7514406	29	(#) FLASH Memory Programming functions: this group includes all needed
Ownasaurus	3:52b2a7514406	30	functions to erase and program the main memory:
Ownasaurus	3:52b2a7514406	31	(++) Lock and Unlock the FLASH interface
Ownasaurus	3:52b2a7514406	32	(++) Erase function: Erase sector, erase all sectors
Ownasaurus	3:52b2a7514406	33	(++) Program functions: byte, half word, word and double word
Ownasaurus	3:52b2a7514406	34
Ownasaurus	3:52b2a7514406	35	(#) Option Bytes Programming functions: this group includes all needed
Ownasaurus	3:52b2a7514406	36	functions to manage the Option Bytes:
Ownasaurus	3:52b2a7514406	37	(++) Set/Reset the write protection
Ownasaurus	3:52b2a7514406	38	(++) Set the Read protection Level
Ownasaurus	3:52b2a7514406	39	(++) Set the BOR level
Ownasaurus	3:52b2a7514406	40	(++) Program the user Option Bytes
Ownasaurus	3:52b2a7514406	41	(++) Launch the Option Bytes loader
Ownasaurus	3:52b2a7514406	42
Ownasaurus	3:52b2a7514406	43	(#) Interrupts and flags management functions: this group
Ownasaurus	3:52b2a7514406	44	includes all needed functions to:
Ownasaurus	3:52b2a7514406	45	(++) Enable/Disable the FLASH interrupt sources
Ownasaurus	3:52b2a7514406	46	(++) Get flags status
Ownasaurus	3:52b2a7514406	47	(++) Clear flags
Ownasaurus	3:52b2a7514406	48	(++) Get FLASH operation status
Ownasaurus	3:52b2a7514406	49	(++) Wait for last FLASH operation
Ownasaurus	3:52b2a7514406	50	@endverbatim
Ownasaurus	3:52b2a7514406	51	******************************************************************************
Ownasaurus	3:52b2a7514406	52	* @attention
Ownasaurus	3:52b2a7514406	53	*
Ownasaurus	3:52b2a7514406	54	* <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
Ownasaurus	3:52b2a7514406	55	*
Ownasaurus	3:52b2a7514406	56	* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
Ownasaurus	3:52b2a7514406	57	* You may not use this file except in compliance with the License.
Ownasaurus	3:52b2a7514406	58	* You may obtain a copy of the License at:
Ownasaurus	3:52b2a7514406	59	*
Ownasaurus	3:52b2a7514406	60	* http://www.st.com/software_license_agreement_liberty_v2
Ownasaurus	3:52b2a7514406	61	*
Ownasaurus	3:52b2a7514406	62	* Unless required by applicable law or agreed to in writing, software
Ownasaurus	3:52b2a7514406	63	* distributed under the License is distributed on an "AS IS" BASIS,
Ownasaurus	3:52b2a7514406	64	* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Ownasaurus	3:52b2a7514406	65	* See the License for the specific language governing permissions and
Ownasaurus	3:52b2a7514406	66	* limitations under the License.
Ownasaurus	3:52b2a7514406	67	*
Ownasaurus	3:52b2a7514406	68	******************************************************************************
Ownasaurus	3:52b2a7514406	69	*/
Ownasaurus	3:52b2a7514406	70
Ownasaurus	3:52b2a7514406	71	/* Includes ------------------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	72	#include "stm32f4xx_flash.h"
Ownasaurus	3:52b2a7514406	73
Ownasaurus	3:52b2a7514406	74	/** @addtogroup STM32F4xx_StdPeriph_Driver
Ownasaurus	3:52b2a7514406	75	* @{
Ownasaurus	3:52b2a7514406	76	*/
Ownasaurus	3:52b2a7514406	77
Ownasaurus	3:52b2a7514406	78	/** @defgroup FLASH
Ownasaurus	3:52b2a7514406	79	* @brief FLASH driver modules
Ownasaurus	3:52b2a7514406	80	* @{
Ownasaurus	3:52b2a7514406	81	*/
Ownasaurus	3:52b2a7514406	82
Ownasaurus	3:52b2a7514406	83	/* Private typedef -----------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	84	/* Private define ------------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	85	#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
Ownasaurus	3:52b2a7514406	86
Ownasaurus	3:52b2a7514406	87	/* Private macro -------------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	88	/* Private variables ---------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	89	/* Private function prototypes -----------------------------------------------*/
Ownasaurus	3:52b2a7514406	90	/* Private functions ---------------------------------------------------------*/
Ownasaurus	3:52b2a7514406	91
Ownasaurus	3:52b2a7514406	92	/** @defgroup FLASH_Private_Functions
Ownasaurus	3:52b2a7514406	93	* @{
Ownasaurus	3:52b2a7514406	94	*/
Ownasaurus	3:52b2a7514406	95
Ownasaurus	3:52b2a7514406	96	/** @defgroup FLASH_Group1 FLASH Interface configuration functions
Ownasaurus	3:52b2a7514406	97	* @brief FLASH Interface configuration functions
Ownasaurus	3:52b2a7514406	98	*
Ownasaurus	3:52b2a7514406	99
Ownasaurus	3:52b2a7514406	100	@verbatim
Ownasaurus	3:52b2a7514406	101	===============================================================================
Ownasaurus	3:52b2a7514406	102	##### FLASH Interface configuration functions #####
Ownasaurus	3:52b2a7514406	103	===============================================================================
Ownasaurus	3:52b2a7514406	104	[..]
Ownasaurus	3:52b2a7514406	105	This group includes the following functions:
Ownasaurus	3:52b2a7514406	106	(+) void FLASH_SetLatency(uint32_t FLASH_Latency)
Ownasaurus	3:52b2a7514406	107	To correctly read data from FLASH memory, the number of wait states (LATENCY)
Ownasaurus	3:52b2a7514406	108	must be correctly programmed according to the frequency of the CPU clock
Ownasaurus	3:52b2a7514406	109	(HCLK) and the supply voltage of the device.
Ownasaurus	3:52b2a7514406	110	[..]
Ownasaurus	3:52b2a7514406	111	For STM32F405xx/07xx and STM32F415xx/17xx devices
Ownasaurus	3:52b2a7514406	112	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	113	\| Latency \| HCLK clock frequency (MHz) \|
Ownasaurus	3:52b2a7514406	114	\| \|---------------------------------------------------------------------\|
Ownasaurus	3:52b2a7514406	115	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
Ownasaurus	3:52b2a7514406	116	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
Ownasaurus	3:52b2a7514406	117	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	118	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
Ownasaurus	3:52b2a7514406	119	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	120	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
Ownasaurus	3:52b2a7514406	121	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	122	\|2WS(3CPU cycle)\|60 < HCLK <= 90 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
Ownasaurus	3:52b2a7514406	123	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	124	\|3WS(4CPU cycle)\|90 < HCLK <= 120\|72 < HCLK <= 96 \|66 < HCLK <= 88 \|60 < HCLK <= 80 \|
Ownasaurus	3:52b2a7514406	125	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	126	\|4WS(5CPU cycle)\|120< HCLK <= 150\|96 < HCLK <= 120\|88 < HCLK <= 110 \|80 < HCLK <= 100 \|
Ownasaurus	3:52b2a7514406	127	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	128	\|5WS(6CPU cycle)\|150< HCLK <= 168\|120< HCLK <= 144\|110 < HCLK <= 132\|100 < HCLK <= 120\|
Ownasaurus	3:52b2a7514406	129	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	130	\|6WS(7CPU cycle)\| NA \|144< HCLK <= 168\|132 < HCLK <= 154\|120 < HCLK <= 140\|
Ownasaurus	3:52b2a7514406	131	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	132	\|7WS(8CPU cycle)\| NA \| NA \|154 < HCLK <= 168\|140 < HCLK <= 160\|
Ownasaurus	3:52b2a7514406	133	+---------------\|----------------\|----------------\|-----------------\|-----------------+
Ownasaurus	3:52b2a7514406	134
Ownasaurus	3:52b2a7514406	135	[..]
Ownasaurus	3:52b2a7514406	136	For STM32F42xxx/43xxx devices
Ownasaurus	3:52b2a7514406	137	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	138	\| Latency \| HCLK clock frequency (MHz) \|
Ownasaurus	3:52b2a7514406	139	\| \|---------------------------------------------------------------------\|
Ownasaurus	3:52b2a7514406	140	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
Ownasaurus	3:52b2a7514406	141	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
Ownasaurus	3:52b2a7514406	142	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	143	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
Ownasaurus	3:52b2a7514406	144	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	145	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
Ownasaurus	3:52b2a7514406	146	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	147	\|2WS(3CPU cycle)\|60 < HCLK <= 90 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
Ownasaurus	3:52b2a7514406	148	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	149	\|3WS(4CPU cycle)\|90 < HCLK <= 120\|72 < HCLK <= 96 \|66 < HCLK <= 88 \|60 < HCLK <= 80 \|
Ownasaurus	3:52b2a7514406	150	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	151	\|4WS(5CPU cycle)\|120< HCLK <= 150\|96 < HCLK <= 120\|88 < HCLK <= 110 \|80 < HCLK <= 100 \|
Ownasaurus	3:52b2a7514406	152	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	153	\|5WS(6CPU cycle)\|120< HCLK <= 180\|120< HCLK <= 144\|110 < HCLK <= 132\|100 < HCLK <= 120\|
Ownasaurus	3:52b2a7514406	154	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	155	\|6WS(7CPU cycle)\| NA \|144< HCLK <= 168\|132 < HCLK <= 154\|120 < HCLK <= 140\|
Ownasaurus	3:52b2a7514406	156	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	157	\|7WS(8CPU cycle)\| NA \|168< HCLK <= 180\|154 < HCLK <= 176\|140 < HCLK <= 160\|
Ownasaurus	3:52b2a7514406	158	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	159	\|8WS(9CPU cycle)\| NA \| NA \|176 < HCLK <= 180\|160 < HCLK <= 168\|
Ownasaurus	3:52b2a7514406	160	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	161
Ownasaurus	3:52b2a7514406	162	[..]
Ownasaurus	3:52b2a7514406	163	For STM32F401x devices
Ownasaurus	3:52b2a7514406	164	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	165	\| Latency \| HCLK clock frequency (MHz) \|
Ownasaurus	3:52b2a7514406	166	\| \|---------------------------------------------------------------------\|
Ownasaurus	3:52b2a7514406	167	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
Ownasaurus	3:52b2a7514406	168	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
Ownasaurus	3:52b2a7514406	169	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	170	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 22 \|0 < HCLK <= 20 \|
Ownasaurus	3:52b2a7514406	171	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	172	\|1WS(2CPU cycle)\|30 < HCLK <= 60 \|24 < HCLK <= 48 \|22 < HCLK <= 44 \|20 < HCLK <= 40 \|
Ownasaurus	3:52b2a7514406	173	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	174	\|2WS(3CPU cycle)\|60 < HCLK <= 84 \|48 < HCLK <= 72 \|44 < HCLK <= 66 \|40 < HCLK <= 60 \|
Ownasaurus	3:52b2a7514406	175	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	176	\|3WS(4CPU cycle)\| NA \|72 < HCLK <= 84 \|66 < HCLK <= 84 \|60 < HCLK <= 80 \|
Ownasaurus	3:52b2a7514406	177	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	178	\|4WS(5CPU cycle)\| NA \| NA \| NA \|80 < HCLK <= 84 \|
Ownasaurus	3:52b2a7514406	179	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	180
Ownasaurus	3:52b2a7514406	181	[..]
Ownasaurus	3:52b2a7514406	182	For STM32F410xx/STM32F411xE devices
Ownasaurus	3:52b2a7514406	183	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	184	\| Latency \| HCLK clock frequency (MHz) \|
Ownasaurus	3:52b2a7514406	185	\| \|---------------------------------------------------------------------\|
Ownasaurus	3:52b2a7514406	186	\| \| voltage range \| voltage range \| voltage range \| voltage range \|
Ownasaurus	3:52b2a7514406	187	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \|
Ownasaurus	3:52b2a7514406	188	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	189	\|0WS(1CPU cycle)\|0 < HCLK <= 30 \|0 < HCLK <= 24 \|0 < HCLK <= 18 \|0 < HCLK <= 16 \|
Ownasaurus	3:52b2a7514406	190	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	191	\|1WS(2CPU cycle)\|30 < HCLK <= 64 \|24 < HCLK <= 48 \|18 < HCLK <= 36 \|16 < HCLK <= 32 \|
Ownasaurus	3:52b2a7514406	192	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	193	\|2WS(3CPU cycle)\|64 < HCLK <= 90 \|48 < HCLK <= 72 \|36 < HCLK <= 54 \|32 < HCLK <= 48 \|
Ownasaurus	3:52b2a7514406	194	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	195	\|3WS(4CPU cycle)\|90 < HCLK <= 100\|72 < HCLK <= 96 \|54 < HCLK <= 72 \|48 < HCLK <= 64 \|
Ownasaurus	3:52b2a7514406	196	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	197	\|4WS(5CPU cycle)\| NA \|96 < HCLK <= 100\|72 < HCLK <= 90 \|64 < HCLK <= 80 \|
Ownasaurus	3:52b2a7514406	198	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	199	\|5WS(6CPU cycle)\| NA \| NA \|90 < HCLK <= 100 \|80 < HCLK <= 96 \|
Ownasaurus	3:52b2a7514406	200	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|
Ownasaurus	3:52b2a7514406	201	\|6WS(7CPU cycle)\| NA \| NA \| NA \|96 < HCLK <= 100 \|
Ownasaurus	3:52b2a7514406	202	+-------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	203
Ownasaurus	3:52b2a7514406	204	[..]
Ownasaurus	3:52b2a7514406	205	+-------------------------------------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	206	\| \| voltage range \| voltage range \| voltage range \| voltage range \| voltage range 2.7 V - 3.6 V \|
Ownasaurus	3:52b2a7514406	207	\| \| 2.7 V - 3.6 V \| 2.4 V - 2.7 V \| 2.1 V - 2.4 V \| 1.8 V - 2.1 V \| with External Vpp = 9V \|
Ownasaurus	3:52b2a7514406	208	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|-----------------------------\|
Ownasaurus	3:52b2a7514406	209	\|Max Parallelism\| x32 \| x16 \| x8 \| x64 \|
Ownasaurus	3:52b2a7514406	210	\|---------------\|----------------\|----------------\|-----------------\|-----------------\|-----------------------------\|
Ownasaurus	3:52b2a7514406	211	\|PSIZE[1:0] \| 10 \| 01 \| 00 \| 11 \|
Ownasaurus	3:52b2a7514406	212	+-------------------------------------------------------------------------------------------------------------------+
Ownasaurus	3:52b2a7514406	213
Ownasaurus	3:52b2a7514406	214	-@- On STM32F405xx/407xx and STM32F415xx/417xx devices:
Ownasaurus	3:52b2a7514406	215	(++) when VOS = '0' Scale 2 mode, the maximum value of fHCLK = 144MHz.
Ownasaurus	3:52b2a7514406	216	(++) when VOS = '1' Scale 1 mode, the maximum value of fHCLK = 168MHz.
Ownasaurus	3:52b2a7514406	217	[..]
Ownasaurus	3:52b2a7514406	218	On STM32F42xxx/43xxx devices:
Ownasaurus	3:52b2a7514406	219	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 120MHz.
Ownasaurus	3:52b2a7514406	220	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 144MHz if OverDrive OFF and 168MHz if OverDrive ON.
Ownasaurus	3:52b2a7514406	221	(++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 168MHz if OverDrive OFF and 180MHz if OverDrive ON.
Ownasaurus	3:52b2a7514406	222	[..]
Ownasaurus	3:52b2a7514406	223	On STM32F401x devices:
Ownasaurus	3:52b2a7514406	224	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 60MHz.
Ownasaurus	3:52b2a7514406	225	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
Ownasaurus	3:52b2a7514406	226	[..]
Ownasaurus	3:52b2a7514406	227	On STM32F410xx/STM32F411xE devices:
Ownasaurus	3:52b2a7514406	228	(++) when VOS[1:0] = '0x01' Scale 3 mode, the maximum value of fHCLK is 64MHz.
Ownasaurus	3:52b2a7514406	229	(++) when VOS[1:0] = '0x10' Scale 2 mode, the maximum value of fHCLK is 84MHz.
Ownasaurus	3:52b2a7514406	230	(++) when VOS[1:0] = '0x11' Scale 1 mode, the maximum value of fHCLK is 100MHz.
Ownasaurus	3:52b2a7514406	231
Ownasaurus	3:52b2a7514406	232	For more details please refer product DataSheet
Ownasaurus	3:52b2a7514406	233	You can use PWR_MainRegulatorModeConfig() function to control VOS bits.
Ownasaurus	3:52b2a7514406	234
Ownasaurus	3:52b2a7514406	235	(+) void FLASH_PrefetchBufferCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	236	(+) void FLASH_InstructionCacheCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	237	(+) void FLASH_DataCacheCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	238	(+) void FLASH_InstructionCacheReset(void)
Ownasaurus	3:52b2a7514406	239	(+) void FLASH_DataCacheReset(void)
Ownasaurus	3:52b2a7514406	240
Ownasaurus	3:52b2a7514406	241	[..]
Ownasaurus	3:52b2a7514406	242	The unlock sequence is not needed for these functions.
Ownasaurus	3:52b2a7514406	243
Ownasaurus	3:52b2a7514406	244	@endverbatim
Ownasaurus	3:52b2a7514406	245	* @{
Ownasaurus	3:52b2a7514406	246	*/
Ownasaurus	3:52b2a7514406	247
Ownasaurus	3:52b2a7514406	248	/**
Ownasaurus	3:52b2a7514406	249	* @brief Sets the code latency value.
Ownasaurus	3:52b2a7514406	250	* @param FLASH_Latency: specifies the FLASH Latency value.
Ownasaurus	3:52b2a7514406	251	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	252	* @arg FLASH_Latency_0: FLASH Zero Latency cycle
Ownasaurus	3:52b2a7514406	253	* @arg FLASH_Latency_1: FLASH One Latency cycle
Ownasaurus	3:52b2a7514406	254	* @arg FLASH_Latency_2: FLASH Two Latency cycles
Ownasaurus	3:52b2a7514406	255	* @arg FLASH_Latency_3: FLASH Three Latency cycles
Ownasaurus	3:52b2a7514406	256	* @arg FLASH_Latency_4: FLASH Four Latency cycles
Ownasaurus	3:52b2a7514406	257	* @arg FLASH_Latency_5: FLASH Five Latency cycles
Ownasaurus	3:52b2a7514406	258	* @arg FLASH_Latency_6: FLASH Six Latency cycles
Ownasaurus	3:52b2a7514406	259	* @arg FLASH_Latency_7: FLASH Seven Latency cycles
Ownasaurus	3:52b2a7514406	260	* @arg FLASH_Latency_8: FLASH Eight Latency cycles
Ownasaurus	3:52b2a7514406	261	* @arg FLASH_Latency_9: FLASH Nine Latency cycles
Ownasaurus	3:52b2a7514406	262	* @arg FLASH_Latency_10: FLASH Teen Latency cycles
Ownasaurus	3:52b2a7514406	263	* @arg FLASH_Latency_11: FLASH Eleven Latency cycles
Ownasaurus	3:52b2a7514406	264	* @arg FLASH_Latency_12: FLASH Twelve Latency cycles
Ownasaurus	3:52b2a7514406	265	* @arg FLASH_Latency_13: FLASH Thirteen Latency cycles
Ownasaurus	3:52b2a7514406	266	* @arg FLASH_Latency_14: FLASH Fourteen Latency cycles
Ownasaurus	3:52b2a7514406	267	* @arg FLASH_Latency_15: FLASH Fifteen Latency cycles
Ownasaurus	3:52b2a7514406	268	*
Ownasaurus	3:52b2a7514406	269	* @note For STM32F405xx/407xx, STM32F415xx/417xx, STM32F401xx/411xE and STM32F412xG devices
Ownasaurus	3:52b2a7514406	270	* this parameter can be a value between FLASH_Latency_0 and FLASH_Latency_7.
Ownasaurus	3:52b2a7514406	271	*
Ownasaurus	3:52b2a7514406	272	* @note For STM32F42xxx/43xxx devices this parameter can be a value between
Ownasaurus	3:52b2a7514406	273	* FLASH_Latency_0 and FLASH_Latency_15.
Ownasaurus	3:52b2a7514406	274	*
Ownasaurus	3:52b2a7514406	275	* @retval None
Ownasaurus	3:52b2a7514406	276	*/
Ownasaurus	3:52b2a7514406	277	void FLASH_SetLatency(uint32_t FLASH_Latency)
Ownasaurus	3:52b2a7514406	278	{
Ownasaurus	3:52b2a7514406	279	/* Check the parameters */
Ownasaurus	3:52b2a7514406	280	assert_param(IS_FLASH_LATENCY(FLASH_Latency));
Ownasaurus	3:52b2a7514406	281
Ownasaurus	3:52b2a7514406	282	/* Perform Byte access to FLASH_ACR[8:0] to set the Latency value */
Ownasaurus	3:52b2a7514406	283	(__IO uint8_t )ACR_BYTE0_ADDRESS = (uint8_t)FLASH_Latency;
Ownasaurus	3:52b2a7514406	284	}
Ownasaurus	3:52b2a7514406	285
Ownasaurus	3:52b2a7514406	286	/**
Ownasaurus	3:52b2a7514406	287	* @brief Enables or disables the Prefetch Buffer.
Ownasaurus	3:52b2a7514406	288	* @param NewState: new state of the Prefetch Buffer.
Ownasaurus	3:52b2a7514406	289	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	290	* @retval None
Ownasaurus	3:52b2a7514406	291	*/
Ownasaurus	3:52b2a7514406	292	void FLASH_PrefetchBufferCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	293	{
Ownasaurus	3:52b2a7514406	294	/* Check the parameters */
Ownasaurus	3:52b2a7514406	295	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	296
Ownasaurus	3:52b2a7514406	297	/* Enable or disable the Prefetch Buffer */
Ownasaurus	3:52b2a7514406	298	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	299	{
Ownasaurus	3:52b2a7514406	300	FLASH->ACR \|= FLASH_ACR_PRFTEN;
Ownasaurus	3:52b2a7514406	301	}
Ownasaurus	3:52b2a7514406	302	else
Ownasaurus	3:52b2a7514406	303	{
Ownasaurus	3:52b2a7514406	304	FLASH->ACR &= (~FLASH_ACR_PRFTEN);
Ownasaurus	3:52b2a7514406	305	}
Ownasaurus	3:52b2a7514406	306	}
Ownasaurus	3:52b2a7514406	307
Ownasaurus	3:52b2a7514406	308	/**
Ownasaurus	3:52b2a7514406	309	* @brief Enables or disables the Instruction Cache feature.
Ownasaurus	3:52b2a7514406	310	* @param NewState: new state of the Instruction Cache.
Ownasaurus	3:52b2a7514406	311	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	312	* @retval None
Ownasaurus	3:52b2a7514406	313	*/
Ownasaurus	3:52b2a7514406	314	void FLASH_InstructionCacheCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	315	{
Ownasaurus	3:52b2a7514406	316	/* Check the parameters */
Ownasaurus	3:52b2a7514406	317	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	318
Ownasaurus	3:52b2a7514406	319	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	320	{
Ownasaurus	3:52b2a7514406	321	FLASH->ACR \|= FLASH_ACR_ICEN;
Ownasaurus	3:52b2a7514406	322	}
Ownasaurus	3:52b2a7514406	323	else
Ownasaurus	3:52b2a7514406	324	{
Ownasaurus	3:52b2a7514406	325	FLASH->ACR &= (~FLASH_ACR_ICEN);
Ownasaurus	3:52b2a7514406	326	}
Ownasaurus	3:52b2a7514406	327	}
Ownasaurus	3:52b2a7514406	328
Ownasaurus	3:52b2a7514406	329	/**
Ownasaurus	3:52b2a7514406	330	* @brief Enables or disables the Data Cache feature.
Ownasaurus	3:52b2a7514406	331	* @param NewState: new state of the Data Cache.
Ownasaurus	3:52b2a7514406	332	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	333	* @retval None
Ownasaurus	3:52b2a7514406	334	*/
Ownasaurus	3:52b2a7514406	335	void FLASH_DataCacheCmd(FunctionalState NewState)
Ownasaurus	3:52b2a7514406	336	{
Ownasaurus	3:52b2a7514406	337	/* Check the parameters */
Ownasaurus	3:52b2a7514406	338	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	339
Ownasaurus	3:52b2a7514406	340	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	341	{
Ownasaurus	3:52b2a7514406	342	FLASH->ACR \|= FLASH_ACR_DCEN;
Ownasaurus	3:52b2a7514406	343	}
Ownasaurus	3:52b2a7514406	344	else
Ownasaurus	3:52b2a7514406	345	{
Ownasaurus	3:52b2a7514406	346	FLASH->ACR &= (~FLASH_ACR_DCEN);
Ownasaurus	3:52b2a7514406	347	}
Ownasaurus	3:52b2a7514406	348	}
Ownasaurus	3:52b2a7514406	349
Ownasaurus	3:52b2a7514406	350	/**
Ownasaurus	3:52b2a7514406	351	* @brief Resets the Instruction Cache.
Ownasaurus	3:52b2a7514406	352	* @note This function must be used only when the Instruction Cache is disabled.
Ownasaurus	3:52b2a7514406	353	* @param None
Ownasaurus	3:52b2a7514406	354	* @retval None
Ownasaurus	3:52b2a7514406	355	*/
Ownasaurus	3:52b2a7514406	356	void FLASH_InstructionCacheReset(void)
Ownasaurus	3:52b2a7514406	357	{
Ownasaurus	3:52b2a7514406	358	FLASH->ACR \|= FLASH_ACR_ICRST;
Ownasaurus	3:52b2a7514406	359	}
Ownasaurus	3:52b2a7514406	360
Ownasaurus	3:52b2a7514406	361	/**
Ownasaurus	3:52b2a7514406	362	* @brief Resets the Data Cache.
Ownasaurus	3:52b2a7514406	363	* @note This function must be used only when the Data Cache is disabled.
Ownasaurus	3:52b2a7514406	364	* @param None
Ownasaurus	3:52b2a7514406	365	* @retval None
Ownasaurus	3:52b2a7514406	366	*/
Ownasaurus	3:52b2a7514406	367	void FLASH_DataCacheReset(void)
Ownasaurus	3:52b2a7514406	368	{
Ownasaurus	3:52b2a7514406	369	FLASH->ACR \|= FLASH_ACR_DCRST;
Ownasaurus	3:52b2a7514406	370	}
Ownasaurus	3:52b2a7514406	371
Ownasaurus	3:52b2a7514406	372	/**
Ownasaurus	3:52b2a7514406	373	* @}
Ownasaurus	3:52b2a7514406	374	*/
Ownasaurus	3:52b2a7514406	375
Ownasaurus	3:52b2a7514406	376	/** @defgroup FLASH_Group2 FLASH Memory Programming functions
Ownasaurus	3:52b2a7514406	377	* @brief FLASH Memory Programming functions
Ownasaurus	3:52b2a7514406	378	*
Ownasaurus	3:52b2a7514406	379	@verbatim
Ownasaurus	3:52b2a7514406	380	===============================================================================
Ownasaurus	3:52b2a7514406	381	##### FLASH Memory Programming functions #####
Ownasaurus	3:52b2a7514406	382	===============================================================================
Ownasaurus	3:52b2a7514406	383	[..]
Ownasaurus	3:52b2a7514406	384	This group includes the following functions:
Ownasaurus	3:52b2a7514406	385	(+) void FLASH_Unlock(void)
Ownasaurus	3:52b2a7514406	386	(+) void FLASH_Lock(void)
Ownasaurus	3:52b2a7514406	387	(+) FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	388	(+) FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	389	(+) FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
Ownasaurus	3:52b2a7514406	390	(+) FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
Ownasaurus	3:52b2a7514406	391	(+) FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
Ownasaurus	3:52b2a7514406	392	(+) FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
Ownasaurus	3:52b2a7514406	393	The following functions can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	394	(+) FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	395	(+) FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	396	[..]
Ownasaurus	3:52b2a7514406	397	Any operation of erase or program should follow these steps:
Ownasaurus	3:52b2a7514406	398	(#) Call the FLASH_Unlock() function to enable the FLASH control register access
Ownasaurus	3:52b2a7514406	399
Ownasaurus	3:52b2a7514406	400	(#) Call the desired function to erase sector(s) or program data
Ownasaurus	3:52b2a7514406	401
Ownasaurus	3:52b2a7514406	402	(#) Call the FLASH_Lock() function to disable the FLASH control register access
Ownasaurus	3:52b2a7514406	403	(recommended to protect the FLASH memory against possible unwanted operation)
Ownasaurus	3:52b2a7514406	404
Ownasaurus	3:52b2a7514406	405	@endverbatim
Ownasaurus	3:52b2a7514406	406	* @{
Ownasaurus	3:52b2a7514406	407	*/
Ownasaurus	3:52b2a7514406	408
Ownasaurus	3:52b2a7514406	409	/**
Ownasaurus	3:52b2a7514406	410	* @brief Unlocks the FLASH control register access
Ownasaurus	3:52b2a7514406	411	* @param None
Ownasaurus	3:52b2a7514406	412	* @retval None
Ownasaurus	3:52b2a7514406	413	*/
Ownasaurus	3:52b2a7514406	414	void FLASH_Unlock(void)
Ownasaurus	3:52b2a7514406	415	{
Ownasaurus	3:52b2a7514406	416	if((FLASH->CR & FLASH_CR_LOCK) != RESET)
Ownasaurus	3:52b2a7514406	417	{
Ownasaurus	3:52b2a7514406	418	/* Authorize the FLASH Registers access */
Ownasaurus	3:52b2a7514406	419	FLASH->KEYR = FLASH_KEY1;
Ownasaurus	3:52b2a7514406	420	FLASH->KEYR = FLASH_KEY2;
Ownasaurus	3:52b2a7514406	421	}
Ownasaurus	3:52b2a7514406	422	}
Ownasaurus	3:52b2a7514406	423
Ownasaurus	3:52b2a7514406	424	/**
Ownasaurus	3:52b2a7514406	425	* @brief Locks the FLASH control register access
Ownasaurus	3:52b2a7514406	426	* @param None
Ownasaurus	3:52b2a7514406	427	* @retval None
Ownasaurus	3:52b2a7514406	428	*/
Ownasaurus	3:52b2a7514406	429	void FLASH_Lock(void)
Ownasaurus	3:52b2a7514406	430	{
Ownasaurus	3:52b2a7514406	431	/* Set the LOCK Bit to lock the FLASH Registers access */
Ownasaurus	3:52b2a7514406	432	FLASH->CR \|= FLASH_CR_LOCK;
Ownasaurus	3:52b2a7514406	433	}
Ownasaurus	3:52b2a7514406	434
Ownasaurus	3:52b2a7514406	435	/**
Ownasaurus	3:52b2a7514406	436	* @brief Erases a specified FLASH Sector.
Ownasaurus	3:52b2a7514406	437	*
Ownasaurus	3:52b2a7514406	438	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	439	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	440	*
Ownasaurus	3:52b2a7514406	441	* @param FLASH_Sector: The Sector number to be erased.
Ownasaurus	3:52b2a7514406	442	*
Ownasaurus	3:52b2a7514406	443	* @note For STM32F405xx/407xx and STM32F415xx/417xx devices this parameter can
Ownasaurus	3:52b2a7514406	444	* be a value between FLASH_Sector_0 and FLASH_Sector_11.
Ownasaurus	3:52b2a7514406	445	*
Ownasaurus	3:52b2a7514406	446	* For STM32F42xxx/43xxx devices this parameter can be a value between
Ownasaurus	3:52b2a7514406	447	* FLASH_Sector_0 and FLASH_Sector_23.
Ownasaurus	3:52b2a7514406	448	*
Ownasaurus	3:52b2a7514406	449	* For STM32F401xx devices this parameter can be a value between
Ownasaurus	3:52b2a7514406	450	* FLASH_Sector_0 and FLASH_Sector_5.
Ownasaurus	3:52b2a7514406	451	*
Ownasaurus	3:52b2a7514406	452	* For STM32F411xE and STM32F412xG devices this parameter can be a value between
Ownasaurus	3:52b2a7514406	453	* FLASH_Sector_0 and FLASH_Sector_7.
Ownasaurus	3:52b2a7514406	454	*
Ownasaurus	3:52b2a7514406	455	* For STM32F410xx devices this parameter can be a value between
Ownasaurus	3:52b2a7514406	456	* FLASH_Sector_0 and FLASH_Sector_4.
Ownasaurus	3:52b2a7514406	457	*
Ownasaurus	3:52b2a7514406	458	* @param VoltageRange: The device voltage range which defines the erase parallelism.
Ownasaurus	3:52b2a7514406	459	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	460	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
Ownasaurus	3:52b2a7514406	461	* the operation will be done by byte (8-bit)
Ownasaurus	3:52b2a7514406	462	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
Ownasaurus	3:52b2a7514406	463	* the operation will be done by half word (16-bit)
Ownasaurus	3:52b2a7514406	464	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
Ownasaurus	3:52b2a7514406	465	* the operation will be done by word (32-bit)
Ownasaurus	3:52b2a7514406	466	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
Ownasaurus	3:52b2a7514406	467	* the operation will be done by double word (64-bit)
Ownasaurus	3:52b2a7514406	468	*
Ownasaurus	3:52b2a7514406	469	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	470	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	471	*/
Ownasaurus	3:52b2a7514406	472	FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	473	{
Ownasaurus	3:52b2a7514406	474	uint32_t tmp_psize = 0x0;
Ownasaurus	3:52b2a7514406	475	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	476
Ownasaurus	3:52b2a7514406	477	/* Check the parameters */
Ownasaurus	3:52b2a7514406	478	assert_param(IS_FLASH_SECTOR(FLASH_Sector));
Ownasaurus	3:52b2a7514406	479	assert_param(IS_VOLTAGERANGE(VoltageRange));
Ownasaurus	3:52b2a7514406	480
Ownasaurus	3:52b2a7514406	481	if(VoltageRange == VoltageRange_1)
Ownasaurus	3:52b2a7514406	482	{
Ownasaurus	3:52b2a7514406	483	tmp_psize = FLASH_PSIZE_BYTE;
Ownasaurus	3:52b2a7514406	484	}
Ownasaurus	3:52b2a7514406	485	else if(VoltageRange == VoltageRange_2)
Ownasaurus	3:52b2a7514406	486	{
Ownasaurus	3:52b2a7514406	487	tmp_psize = FLASH_PSIZE_HALF_WORD;
Ownasaurus	3:52b2a7514406	488	}
Ownasaurus	3:52b2a7514406	489	else if(VoltageRange == VoltageRange_3)
Ownasaurus	3:52b2a7514406	490	{
Ownasaurus	3:52b2a7514406	491	tmp_psize = FLASH_PSIZE_WORD;
Ownasaurus	3:52b2a7514406	492	}
Ownasaurus	3:52b2a7514406	493	else
Ownasaurus	3:52b2a7514406	494	{
Ownasaurus	3:52b2a7514406	495	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
Ownasaurus	3:52b2a7514406	496	}
Ownasaurus	3:52b2a7514406	497	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	498	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	499
Ownasaurus	3:52b2a7514406	500	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	501	{
Ownasaurus	3:52b2a7514406	502	/* if the previous operation is completed, proceed to erase the sector */
Ownasaurus	3:52b2a7514406	503	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	504	FLASH->CR \|= tmp_psize;
Ownasaurus	3:52b2a7514406	505	FLASH->CR &= SECTOR_MASK;
Ownasaurus	3:52b2a7514406	506	FLASH->CR \|= FLASH_CR_SER \| FLASH_Sector;
Ownasaurus	3:52b2a7514406	507	FLASH->CR \|= FLASH_CR_STRT;
Ownasaurus	3:52b2a7514406	508
Ownasaurus	3:52b2a7514406	509	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	510	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	511
Ownasaurus	3:52b2a7514406	512	/* if the erase operation is completed, disable the SER Bit */
Ownasaurus	3:52b2a7514406	513	FLASH->CR &= (~FLASH_CR_SER);
Ownasaurus	3:52b2a7514406	514	FLASH->CR &= SECTOR_MASK;
Ownasaurus	3:52b2a7514406	515	}
Ownasaurus	3:52b2a7514406	516	/* Return the Erase Status */
Ownasaurus	3:52b2a7514406	517	return status;
Ownasaurus	3:52b2a7514406	518	}
Ownasaurus	3:52b2a7514406	519
Ownasaurus	3:52b2a7514406	520	/**
Ownasaurus	3:52b2a7514406	521	* @brief Erases all FLASH Sectors.
Ownasaurus	3:52b2a7514406	522	*
Ownasaurus	3:52b2a7514406	523	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	524	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	525	*
Ownasaurus	3:52b2a7514406	526	* @param VoltageRange: The device voltage range which defines the erase parallelism.
Ownasaurus	3:52b2a7514406	527	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	528	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
Ownasaurus	3:52b2a7514406	529	* the operation will be done by byte (8-bit)
Ownasaurus	3:52b2a7514406	530	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
Ownasaurus	3:52b2a7514406	531	* the operation will be done by half word (16-bit)
Ownasaurus	3:52b2a7514406	532	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
Ownasaurus	3:52b2a7514406	533	* the operation will be done by word (32-bit)
Ownasaurus	3:52b2a7514406	534	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
Ownasaurus	3:52b2a7514406	535	* the operation will be done by double word (64-bit)
Ownasaurus	3:52b2a7514406	536	*
Ownasaurus	3:52b2a7514406	537	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	538	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	539	*/
Ownasaurus	3:52b2a7514406	540	FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	541	{
Ownasaurus	3:52b2a7514406	542	uint32_t tmp_psize = 0x0;
Ownasaurus	3:52b2a7514406	543	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	544
Ownasaurus	3:52b2a7514406	545	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	546	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	547	assert_param(IS_VOLTAGERANGE(VoltageRange));
Ownasaurus	3:52b2a7514406	548
Ownasaurus	3:52b2a7514406	549	if(VoltageRange == VoltageRange_1)
Ownasaurus	3:52b2a7514406	550	{
Ownasaurus	3:52b2a7514406	551	tmp_psize = FLASH_PSIZE_BYTE;
Ownasaurus	3:52b2a7514406	552	}
Ownasaurus	3:52b2a7514406	553	else if(VoltageRange == VoltageRange_2)
Ownasaurus	3:52b2a7514406	554	{
Ownasaurus	3:52b2a7514406	555	tmp_psize = FLASH_PSIZE_HALF_WORD;
Ownasaurus	3:52b2a7514406	556	}
Ownasaurus	3:52b2a7514406	557	else if(VoltageRange == VoltageRange_3)
Ownasaurus	3:52b2a7514406	558	{
Ownasaurus	3:52b2a7514406	559	tmp_psize = FLASH_PSIZE_WORD;
Ownasaurus	3:52b2a7514406	560	}
Ownasaurus	3:52b2a7514406	561	else
Ownasaurus	3:52b2a7514406	562	{
Ownasaurus	3:52b2a7514406	563	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
Ownasaurus	3:52b2a7514406	564	}
Ownasaurus	3:52b2a7514406	565	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	566	{
Ownasaurus	3:52b2a7514406	567	/* if the previous operation is completed, proceed to erase all sectors */
Ownasaurus	3:52b2a7514406	568	#if defined(STM32F427_437xx) \|\| defined(STM32F429_439xx) \|\| defined(STM32F469_479xx)
Ownasaurus	3:52b2a7514406	569	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	570	FLASH->CR \|= tmp_psize;
Ownasaurus	3:52b2a7514406	571	FLASH->CR \|= (FLASH_CR_MER1 \| FLASH_CR_MER2);
Ownasaurus	3:52b2a7514406	572	FLASH->CR \|= FLASH_CR_STRT;
Ownasaurus	3:52b2a7514406	573
Ownasaurus	3:52b2a7514406	574	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	575	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	576
Ownasaurus	3:52b2a7514406	577	/* if the erase operation is completed, disable the MER Bit */
Ownasaurus	3:52b2a7514406	578	FLASH->CR &= ~(FLASH_CR_MER1 \| FLASH_CR_MER2);
Ownasaurus	3:52b2a7514406	579	#endif /* STM32F427_437xx \|\| STM32F429_439xx \|\| STM32F469_479xx */
Ownasaurus	3:52b2a7514406	580
Ownasaurus	3:52b2a7514406	581	#if defined(STM32F40_41xxx) \|\| defined(STM32F401xx) \|\| defined(STM32F410xx) \|\| defined(STM32F411xE) \|\| defined(STM32F412xG) \|\| defined(STM32F446xx)
Ownasaurus	3:52b2a7514406	582	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	583	FLASH->CR \|= tmp_psize;
Ownasaurus	3:52b2a7514406	584	FLASH->CR \|= FLASH_CR_MER;
Ownasaurus	3:52b2a7514406	585	FLASH->CR \|= FLASH_CR_STRT;
Ownasaurus	3:52b2a7514406	586
Ownasaurus	3:52b2a7514406	587	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	588	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	589
Ownasaurus	3:52b2a7514406	590	/* if the erase operation is completed, disable the MER Bit */
Ownasaurus	3:52b2a7514406	591	FLASH->CR &= (~FLASH_CR_MER);
Ownasaurus	3:52b2a7514406	592	#endif /* STM32F40_41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F412xG \|\| STM32F446xx */
Ownasaurus	3:52b2a7514406	593
Ownasaurus	3:52b2a7514406	594	}
Ownasaurus	3:52b2a7514406	595	/* Return the Erase Status */
Ownasaurus	3:52b2a7514406	596	return status;
Ownasaurus	3:52b2a7514406	597	}
Ownasaurus	3:52b2a7514406	598
Ownasaurus	3:52b2a7514406	599	/**
Ownasaurus	3:52b2a7514406	600	* @brief Erases all FLASH Sectors in Bank 1.
Ownasaurus	3:52b2a7514406	601	*
Ownasaurus	3:52b2a7514406	602	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	603	*
Ownasaurus	3:52b2a7514406	604	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	605	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	606	*
Ownasaurus	3:52b2a7514406	607	* @param VoltageRange: The device voltage range which defines the erase parallelism.
Ownasaurus	3:52b2a7514406	608	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	609	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
Ownasaurus	3:52b2a7514406	610	* the operation will be done by byte (8-bit)
Ownasaurus	3:52b2a7514406	611	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
Ownasaurus	3:52b2a7514406	612	* the operation will be done by half word (16-bit)
Ownasaurus	3:52b2a7514406	613	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
Ownasaurus	3:52b2a7514406	614	* the operation will be done by word (32-bit)
Ownasaurus	3:52b2a7514406	615	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
Ownasaurus	3:52b2a7514406	616	* the operation will be done by double word (64-bit)
Ownasaurus	3:52b2a7514406	617	*
Ownasaurus	3:52b2a7514406	618	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	619	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	620	*/
Ownasaurus	3:52b2a7514406	621	FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	622	{
Ownasaurus	3:52b2a7514406	623	uint32_t tmp_psize = 0x0;
Ownasaurus	3:52b2a7514406	624	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	625
Ownasaurus	3:52b2a7514406	626	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	627	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	628	assert_param(IS_VOLTAGERANGE(VoltageRange));
Ownasaurus	3:52b2a7514406	629
Ownasaurus	3:52b2a7514406	630	if(VoltageRange == VoltageRange_1)
Ownasaurus	3:52b2a7514406	631	{
Ownasaurus	3:52b2a7514406	632	tmp_psize = FLASH_PSIZE_BYTE;
Ownasaurus	3:52b2a7514406	633	}
Ownasaurus	3:52b2a7514406	634	else if(VoltageRange == VoltageRange_2)
Ownasaurus	3:52b2a7514406	635	{
Ownasaurus	3:52b2a7514406	636	tmp_psize = FLASH_PSIZE_HALF_WORD;
Ownasaurus	3:52b2a7514406	637	}
Ownasaurus	3:52b2a7514406	638	else if(VoltageRange == VoltageRange_3)
Ownasaurus	3:52b2a7514406	639	{
Ownasaurus	3:52b2a7514406	640	tmp_psize = FLASH_PSIZE_WORD;
Ownasaurus	3:52b2a7514406	641	}
Ownasaurus	3:52b2a7514406	642	else
Ownasaurus	3:52b2a7514406	643	{
Ownasaurus	3:52b2a7514406	644	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
Ownasaurus	3:52b2a7514406	645	}
Ownasaurus	3:52b2a7514406	646	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	647	{
Ownasaurus	3:52b2a7514406	648	/* if the previous operation is completed, proceed to erase all sectors */
Ownasaurus	3:52b2a7514406	649	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	650	FLASH->CR \|= tmp_psize;
Ownasaurus	3:52b2a7514406	651	FLASH->CR \|= FLASH_CR_MER1;
Ownasaurus	3:52b2a7514406	652	FLASH->CR \|= FLASH_CR_STRT;
Ownasaurus	3:52b2a7514406	653
Ownasaurus	3:52b2a7514406	654	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	655	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	656
Ownasaurus	3:52b2a7514406	657	/* if the erase operation is completed, disable the MER Bit */
Ownasaurus	3:52b2a7514406	658	FLASH->CR &= (~FLASH_CR_MER1);
Ownasaurus	3:52b2a7514406	659
Ownasaurus	3:52b2a7514406	660	}
Ownasaurus	3:52b2a7514406	661	/* Return the Erase Status */
Ownasaurus	3:52b2a7514406	662	return status;
Ownasaurus	3:52b2a7514406	663	}
Ownasaurus	3:52b2a7514406	664
Ownasaurus	3:52b2a7514406	665
Ownasaurus	3:52b2a7514406	666	/**
Ownasaurus	3:52b2a7514406	667	* @brief Erases all FLASH Sectors in Bank 2.
Ownasaurus	3:52b2a7514406	668	*
Ownasaurus	3:52b2a7514406	669	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	670	*
Ownasaurus	3:52b2a7514406	671	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	672	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	673	*
Ownasaurus	3:52b2a7514406	674	* @param VoltageRange: The device voltage range which defines the erase parallelism.
Ownasaurus	3:52b2a7514406	675	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	676	* @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
Ownasaurus	3:52b2a7514406	677	* the operation will be done by byte (8-bit)
Ownasaurus	3:52b2a7514406	678	* @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
Ownasaurus	3:52b2a7514406	679	* the operation will be done by half word (16-bit)
Ownasaurus	3:52b2a7514406	680	* @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
Ownasaurus	3:52b2a7514406	681	* the operation will be done by word (32-bit)
Ownasaurus	3:52b2a7514406	682	* @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
Ownasaurus	3:52b2a7514406	683	* the operation will be done by double word (64-bit)
Ownasaurus	3:52b2a7514406	684	*
Ownasaurus	3:52b2a7514406	685	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	686	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	687	*/
Ownasaurus	3:52b2a7514406	688	FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange)
Ownasaurus	3:52b2a7514406	689	{
Ownasaurus	3:52b2a7514406	690	uint32_t tmp_psize = 0x0;
Ownasaurus	3:52b2a7514406	691	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	692
Ownasaurus	3:52b2a7514406	693	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	694	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	695	assert_param(IS_VOLTAGERANGE(VoltageRange));
Ownasaurus	3:52b2a7514406	696
Ownasaurus	3:52b2a7514406	697	if(VoltageRange == VoltageRange_1)
Ownasaurus	3:52b2a7514406	698	{
Ownasaurus	3:52b2a7514406	699	tmp_psize = FLASH_PSIZE_BYTE;
Ownasaurus	3:52b2a7514406	700	}
Ownasaurus	3:52b2a7514406	701	else if(VoltageRange == VoltageRange_2)
Ownasaurus	3:52b2a7514406	702	{
Ownasaurus	3:52b2a7514406	703	tmp_psize = FLASH_PSIZE_HALF_WORD;
Ownasaurus	3:52b2a7514406	704	}
Ownasaurus	3:52b2a7514406	705	else if(VoltageRange == VoltageRange_3)
Ownasaurus	3:52b2a7514406	706	{
Ownasaurus	3:52b2a7514406	707	tmp_psize = FLASH_PSIZE_WORD;
Ownasaurus	3:52b2a7514406	708	}
Ownasaurus	3:52b2a7514406	709	else
Ownasaurus	3:52b2a7514406	710	{
Ownasaurus	3:52b2a7514406	711	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
Ownasaurus	3:52b2a7514406	712	}
Ownasaurus	3:52b2a7514406	713	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	714	{
Ownasaurus	3:52b2a7514406	715	/* if the previous operation is completed, proceed to erase all sectors */
Ownasaurus	3:52b2a7514406	716	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	717	FLASH->CR \|= tmp_psize;
Ownasaurus	3:52b2a7514406	718	FLASH->CR \|= FLASH_CR_MER2;
Ownasaurus	3:52b2a7514406	719	FLASH->CR \|= FLASH_CR_STRT;
Ownasaurus	3:52b2a7514406	720
Ownasaurus	3:52b2a7514406	721	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	722	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	723
Ownasaurus	3:52b2a7514406	724	/* if the erase operation is completed, disable the MER Bit */
Ownasaurus	3:52b2a7514406	725	FLASH->CR &= (~FLASH_CR_MER2);
Ownasaurus	3:52b2a7514406	726
Ownasaurus	3:52b2a7514406	727	}
Ownasaurus	3:52b2a7514406	728	/* Return the Erase Status */
Ownasaurus	3:52b2a7514406	729	return status;
Ownasaurus	3:52b2a7514406	730	}
Ownasaurus	3:52b2a7514406	731
Ownasaurus	3:52b2a7514406	732	/**
Ownasaurus	3:52b2a7514406	733	* @brief Programs a double word (64-bit) at a specified address.
Ownasaurus	3:52b2a7514406	734	* @note This function must be used when the device voltage range is from
Ownasaurus	3:52b2a7514406	735	* 2.7V to 3.6V and an External Vpp is present.
Ownasaurus	3:52b2a7514406	736	*
Ownasaurus	3:52b2a7514406	737	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	738	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	739	*
Ownasaurus	3:52b2a7514406	740	* @param Address: specifies the address to be programmed.
Ownasaurus	3:52b2a7514406	741	* @param Data: specifies the data to be programmed.
Ownasaurus	3:52b2a7514406	742	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	743	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	744	*/
Ownasaurus	3:52b2a7514406	745	FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
Ownasaurus	3:52b2a7514406	746	{
Ownasaurus	3:52b2a7514406	747	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	748
Ownasaurus	3:52b2a7514406	749	/* Check the parameters */
Ownasaurus	3:52b2a7514406	750	assert_param(IS_FLASH_ADDRESS(Address));
Ownasaurus	3:52b2a7514406	751
Ownasaurus	3:52b2a7514406	752	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	753	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	754
Ownasaurus	3:52b2a7514406	755	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	756	{
Ownasaurus	3:52b2a7514406	757	/* if the previous operation is completed, proceed to program the new data */
Ownasaurus	3:52b2a7514406	758	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	759	FLASH->CR \|= FLASH_PSIZE_DOUBLE_WORD;
Ownasaurus	3:52b2a7514406	760	FLASH->CR \|= FLASH_CR_PG;
Ownasaurus	3:52b2a7514406	761
Ownasaurus	3:52b2a7514406	762	(__IO uint64_t)Address = Data;
Ownasaurus	3:52b2a7514406	763
Ownasaurus	3:52b2a7514406	764	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	765	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	766
Ownasaurus	3:52b2a7514406	767	/* if the program operation is completed, disable the PG Bit */
Ownasaurus	3:52b2a7514406	768	FLASH->CR &= (~FLASH_CR_PG);
Ownasaurus	3:52b2a7514406	769	}
Ownasaurus	3:52b2a7514406	770	/* Return the Program Status */
Ownasaurus	3:52b2a7514406	771	return status;
Ownasaurus	3:52b2a7514406	772	}
Ownasaurus	3:52b2a7514406	773
Ownasaurus	3:52b2a7514406	774	/**
Ownasaurus	3:52b2a7514406	775	* @brief Programs a word (32-bit) at a specified address.
Ownasaurus	3:52b2a7514406	776	*
Ownasaurus	3:52b2a7514406	777	* @note This function must be used when the device voltage range is from 2.7V to 3.6V.
Ownasaurus	3:52b2a7514406	778	*
Ownasaurus	3:52b2a7514406	779	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	780	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	781	*
Ownasaurus	3:52b2a7514406	782	* @param Address: specifies the address to be programmed.
Ownasaurus	3:52b2a7514406	783	* This parameter can be any address in Program memory zone or in OTP zone.
Ownasaurus	3:52b2a7514406	784	* @param Data: specifies the data to be programmed.
Ownasaurus	3:52b2a7514406	785	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	786	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	787	*/
Ownasaurus	3:52b2a7514406	788	FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
Ownasaurus	3:52b2a7514406	789	{
Ownasaurus	3:52b2a7514406	790	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	791
Ownasaurus	3:52b2a7514406	792	/* Check the parameters */
Ownasaurus	3:52b2a7514406	793	assert_param(IS_FLASH_ADDRESS(Address));
Ownasaurus	3:52b2a7514406	794
Ownasaurus	3:52b2a7514406	795	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	796	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	797
Ownasaurus	3:52b2a7514406	798	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	799	{
Ownasaurus	3:52b2a7514406	800	/* if the previous operation is completed, proceed to program the new data */
Ownasaurus	3:52b2a7514406	801	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	802	FLASH->CR \|= FLASH_PSIZE_WORD;
Ownasaurus	3:52b2a7514406	803	FLASH->CR \|= FLASH_CR_PG;
Ownasaurus	3:52b2a7514406	804
Ownasaurus	3:52b2a7514406	805	(__IO uint32_t)Address = Data;
Ownasaurus	3:52b2a7514406	806
Ownasaurus	3:52b2a7514406	807	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	808	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	809
Ownasaurus	3:52b2a7514406	810	/* if the program operation is completed, disable the PG Bit */
Ownasaurus	3:52b2a7514406	811	FLASH->CR &= (~FLASH_CR_PG);
Ownasaurus	3:52b2a7514406	812	}
Ownasaurus	3:52b2a7514406	813	/* Return the Program Status */
Ownasaurus	3:52b2a7514406	814	return status;
Ownasaurus	3:52b2a7514406	815	}
Ownasaurus	3:52b2a7514406	816
Ownasaurus	3:52b2a7514406	817	/**
Ownasaurus	3:52b2a7514406	818	* @brief Programs a half word (16-bit) at a specified address.
Ownasaurus	3:52b2a7514406	819	* @note This function must be used when the device voltage range is from 2.1V to 3.6V.
Ownasaurus	3:52b2a7514406	820	*
Ownasaurus	3:52b2a7514406	821	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	822	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	823	*
Ownasaurus	3:52b2a7514406	824	* @param Address: specifies the address to be programmed.
Ownasaurus	3:52b2a7514406	825	* This parameter can be any address in Program memory zone or in OTP zone.
Ownasaurus	3:52b2a7514406	826	* @param Data: specifies the data to be programmed.
Ownasaurus	3:52b2a7514406	827	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	828	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	829	*/
Ownasaurus	3:52b2a7514406	830	FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
Ownasaurus	3:52b2a7514406	831	{
Ownasaurus	3:52b2a7514406	832	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	833
Ownasaurus	3:52b2a7514406	834	/* Check the parameters */
Ownasaurus	3:52b2a7514406	835	assert_param(IS_FLASH_ADDRESS(Address));
Ownasaurus	3:52b2a7514406	836
Ownasaurus	3:52b2a7514406	837	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	838	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	839
Ownasaurus	3:52b2a7514406	840	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	841	{
Ownasaurus	3:52b2a7514406	842	/* if the previous operation is completed, proceed to program the new data */
Ownasaurus	3:52b2a7514406	843	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	844	FLASH->CR \|= FLASH_PSIZE_HALF_WORD;
Ownasaurus	3:52b2a7514406	845	FLASH->CR \|= FLASH_CR_PG;
Ownasaurus	3:52b2a7514406	846
Ownasaurus	3:52b2a7514406	847	(__IO uint16_t)Address = Data;
Ownasaurus	3:52b2a7514406	848
Ownasaurus	3:52b2a7514406	849	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	850	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	851
Ownasaurus	3:52b2a7514406	852	/* if the program operation is completed, disable the PG Bit */
Ownasaurus	3:52b2a7514406	853	FLASH->CR &= (~FLASH_CR_PG);
Ownasaurus	3:52b2a7514406	854	}
Ownasaurus	3:52b2a7514406	855	/* Return the Program Status */
Ownasaurus	3:52b2a7514406	856	return status;
Ownasaurus	3:52b2a7514406	857	}
Ownasaurus	3:52b2a7514406	858
Ownasaurus	3:52b2a7514406	859	/**
Ownasaurus	3:52b2a7514406	860	* @brief Programs a byte (8-bit) at a specified address.
Ownasaurus	3:52b2a7514406	861	* @note This function can be used within all the device supply voltage ranges.
Ownasaurus	3:52b2a7514406	862	*
Ownasaurus	3:52b2a7514406	863	* @note If an erase and a program operations are requested simultaneously,
Ownasaurus	3:52b2a7514406	864	* the erase operation is performed before the program one.
Ownasaurus	3:52b2a7514406	865	*
Ownasaurus	3:52b2a7514406	866	* @param Address: specifies the address to be programmed.
Ownasaurus	3:52b2a7514406	867	* This parameter can be any address in Program memory zone or in OTP zone.
Ownasaurus	3:52b2a7514406	868	* @param Data: specifies the data to be programmed.
Ownasaurus	3:52b2a7514406	869	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	870	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	871	*/
Ownasaurus	3:52b2a7514406	872	FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
Ownasaurus	3:52b2a7514406	873	{
Ownasaurus	3:52b2a7514406	874	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	875
Ownasaurus	3:52b2a7514406	876	/* Check the parameters */
Ownasaurus	3:52b2a7514406	877	assert_param(IS_FLASH_ADDRESS(Address));
Ownasaurus	3:52b2a7514406	878
Ownasaurus	3:52b2a7514406	879	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	880	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	881
Ownasaurus	3:52b2a7514406	882	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	883	{
Ownasaurus	3:52b2a7514406	884	/* if the previous operation is completed, proceed to program the new data */
Ownasaurus	3:52b2a7514406	885	FLASH->CR &= CR_PSIZE_MASK;
Ownasaurus	3:52b2a7514406	886	FLASH->CR \|= FLASH_PSIZE_BYTE;
Ownasaurus	3:52b2a7514406	887	FLASH->CR \|= FLASH_CR_PG;
Ownasaurus	3:52b2a7514406	888
Ownasaurus	3:52b2a7514406	889	(__IO uint8_t)Address = Data;
Ownasaurus	3:52b2a7514406	890
Ownasaurus	3:52b2a7514406	891	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	892	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	893
Ownasaurus	3:52b2a7514406	894	/* if the program operation is completed, disable the PG Bit */
Ownasaurus	3:52b2a7514406	895	FLASH->CR &= (~FLASH_CR_PG);
Ownasaurus	3:52b2a7514406	896	}
Ownasaurus	3:52b2a7514406	897
Ownasaurus	3:52b2a7514406	898	/* Return the Program Status */
Ownasaurus	3:52b2a7514406	899	return status;
Ownasaurus	3:52b2a7514406	900	}
Ownasaurus	3:52b2a7514406	901
Ownasaurus	3:52b2a7514406	902	/**
Ownasaurus	3:52b2a7514406	903	* @}
Ownasaurus	3:52b2a7514406	904	*/
Ownasaurus	3:52b2a7514406	905
Ownasaurus	3:52b2a7514406	906	/** @defgroup FLASH_Group3 Option Bytes Programming functions
Ownasaurus	3:52b2a7514406	907	* @brief Option Bytes Programming functions
Ownasaurus	3:52b2a7514406	908	*
Ownasaurus	3:52b2a7514406	909	@verbatim
Ownasaurus	3:52b2a7514406	910	===============================================================================
Ownasaurus	3:52b2a7514406	911	##### Option Bytes Programming functions #####
Ownasaurus	3:52b2a7514406	912	===============================================================================
Ownasaurus	3:52b2a7514406	913	[..]
Ownasaurus	3:52b2a7514406	914	This group includes the following functions:
Ownasaurus	3:52b2a7514406	915	(+) void FLASH_OB_Unlock(void)
Ownasaurus	3:52b2a7514406	916	(+) void FLASH_OB_Lock(void)
Ownasaurus	3:52b2a7514406	917	(+) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	918	(+) void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	919	(+) void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PCROPSelect)
Ownasaurus	3:52b2a7514406	920	(+) void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	921	(+) void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	922	(+) void FLASH_OB_RDPConfig(uint8_t OB_RDP)
Ownasaurus	3:52b2a7514406	923	(+) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
Ownasaurus	3:52b2a7514406	924	(+) void FLASH_OB_BORConfig(uint8_t OB_BOR)
Ownasaurus	3:52b2a7514406	925	(+) FLASH_Status FLASH_ProgramOTP(uint32_t Address, uint32_t Data)
Ownasaurus	3:52b2a7514406	926	(+) FLASH_Status FLASH_OB_Launch(void)
Ownasaurus	3:52b2a7514406	927	(+) uint32_t FLASH_OB_GetUser(void)
Ownasaurus	3:52b2a7514406	928	(+) uint8_t FLASH_OB_GetWRP(void)
Ownasaurus	3:52b2a7514406	929	(+) uint8_t FLASH_OB_GetWRP1(void)
Ownasaurus	3:52b2a7514406	930	(+) uint8_t FLASH_OB_GetPCROP(void)
Ownasaurus	3:52b2a7514406	931	(+) uint8_t FLASH_OB_GetPCROP1(void)
Ownasaurus	3:52b2a7514406	932	(+) uint8_t FLASH_OB_GetRDP(void)
Ownasaurus	3:52b2a7514406	933	(+) uint8_t FLASH_OB_GetBOR(void)
Ownasaurus	3:52b2a7514406	934	[..]
Ownasaurus	3:52b2a7514406	935	The following function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	936	(+) void FLASH_OB_BootConfig(uint8_t OB_BOOT)
Ownasaurus	3:52b2a7514406	937	[..]
Ownasaurus	3:52b2a7514406	938	Any operation of erase or program should follow these steps:
Ownasaurus	3:52b2a7514406	939	(#) Call the FLASH_OB_Unlock() function to enable the FLASH option control
Ownasaurus	3:52b2a7514406	940	register access
Ownasaurus	3:52b2a7514406	941
Ownasaurus	3:52b2a7514406	942	(#) Call one or several functions to program the desired Option Bytes:
Ownasaurus	3:52b2a7514406	943	(++) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	944	=> to Enable/Disable the desired sector write protection
Ownasaurus	3:52b2a7514406	945	(++) void FLASH_OB_RDPConfig(uint8_t OB_RDP) => to set the desired read
Ownasaurus	3:52b2a7514406	946	Protection Level
Ownasaurus	3:52b2a7514406	947	(++) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
Ownasaurus	3:52b2a7514406	948	=> to configure the user Option Bytes.
Ownasaurus	3:52b2a7514406	949	(++) void FLASH_OB_BORConfig(uint8_t OB_BOR) => to set the BOR Level
Ownasaurus	3:52b2a7514406	950
Ownasaurus	3:52b2a7514406	951	(#) Once all needed Option Bytes to be programmed are correctly written,
Ownasaurus	3:52b2a7514406	952	call the FLASH_OB_Launch() function to launch the Option Bytes
Ownasaurus	3:52b2a7514406	953	programming process.
Ownasaurus	3:52b2a7514406	954
Ownasaurus	3:52b2a7514406	955	-@- When changing the IWDG mode from HW to SW or from SW to HW, a system
Ownasaurus	3:52b2a7514406	956	reset is needed to make the change effective.
Ownasaurus	3:52b2a7514406	957
Ownasaurus	3:52b2a7514406	958	(#) Call the FLASH_OB_Lock() function to disable the FLASH option control
Ownasaurus	3:52b2a7514406	959	register access (recommended to protect the Option Bytes against
Ownasaurus	3:52b2a7514406	960	possible unwanted operations)
Ownasaurus	3:52b2a7514406	961
Ownasaurus	3:52b2a7514406	962	@endverbatim
Ownasaurus	3:52b2a7514406	963	* @{
Ownasaurus	3:52b2a7514406	964	*/
Ownasaurus	3:52b2a7514406	965
Ownasaurus	3:52b2a7514406	966	/**
Ownasaurus	3:52b2a7514406	967	* @brief Unlocks the FLASH Option Control Registers access.
Ownasaurus	3:52b2a7514406	968	* @param None
Ownasaurus	3:52b2a7514406	969	* @retval None
Ownasaurus	3:52b2a7514406	970	*/
Ownasaurus	3:52b2a7514406	971	void FLASH_OB_Unlock(void)
Ownasaurus	3:52b2a7514406	972	{
Ownasaurus	3:52b2a7514406	973	if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
Ownasaurus	3:52b2a7514406	974	{
Ownasaurus	3:52b2a7514406	975	/* Authorizes the Option Byte register programming */
Ownasaurus	3:52b2a7514406	976	FLASH->OPTKEYR = FLASH_OPT_KEY1;
Ownasaurus	3:52b2a7514406	977	FLASH->OPTKEYR = FLASH_OPT_KEY2;
Ownasaurus	3:52b2a7514406	978	}
Ownasaurus	3:52b2a7514406	979	}
Ownasaurus	3:52b2a7514406	980
Ownasaurus	3:52b2a7514406	981	/**
Ownasaurus	3:52b2a7514406	982	* @brief Locks the FLASH Option Control Registers access.
Ownasaurus	3:52b2a7514406	983	* @param None
Ownasaurus	3:52b2a7514406	984	* @retval None
Ownasaurus	3:52b2a7514406	985	*/
Ownasaurus	3:52b2a7514406	986	void FLASH_OB_Lock(void)
Ownasaurus	3:52b2a7514406	987	{
Ownasaurus	3:52b2a7514406	988	/* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
Ownasaurus	3:52b2a7514406	989	FLASH->OPTCR \|= FLASH_OPTCR_OPTLOCK;
Ownasaurus	3:52b2a7514406	990	}
Ownasaurus	3:52b2a7514406	991
Ownasaurus	3:52b2a7514406	992	/**
Ownasaurus	3:52b2a7514406	993	* @brief Enables or disables the write protection of the desired sectors, for the first
Ownasaurus	3:52b2a7514406	994	* 1 Mb of the Flash
Ownasaurus	3:52b2a7514406	995	*
Ownasaurus	3:52b2a7514406	996	* @note When the memory read protection level is selected (RDP level = 1),
Ownasaurus	3:52b2a7514406	997	* it is not possible to program or erase the flash sector i if CortexM4
Ownasaurus	3:52b2a7514406	998	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
Ownasaurus	3:52b2a7514406	999	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
Ownasaurus	3:52b2a7514406	1000	*
Ownasaurus	3:52b2a7514406	1001	* @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
Ownasaurus	3:52b2a7514406	1002	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1003	* @arg OB_WRP: A value between OB_WRP_Sector0 and OB_WRP_Sector11
Ownasaurus	3:52b2a7514406	1004	* @arg OB_WRP_Sector_All
Ownasaurus	3:52b2a7514406	1005	* @param Newstate: new state of the Write Protection.
Ownasaurus	3:52b2a7514406	1006	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	1007	* @retval None
Ownasaurus	3:52b2a7514406	1008	*/
Ownasaurus	3:52b2a7514406	1009	void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	1010	{
Ownasaurus	3:52b2a7514406	1011	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1012
Ownasaurus	3:52b2a7514406	1013	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1014	assert_param(IS_OB_WRP(OB_WRP));
Ownasaurus	3:52b2a7514406	1015	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	1016
Ownasaurus	3:52b2a7514406	1017	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1018
Ownasaurus	3:52b2a7514406	1019	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1020	{
Ownasaurus	3:52b2a7514406	1021	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	1022	{
Ownasaurus	3:52b2a7514406	1023	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~OB_WRP);
Ownasaurus	3:52b2a7514406	1024	}
Ownasaurus	3:52b2a7514406	1025	else
Ownasaurus	3:52b2a7514406	1026	{
Ownasaurus	3:52b2a7514406	1027	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)OB_WRP;
Ownasaurus	3:52b2a7514406	1028	}
Ownasaurus	3:52b2a7514406	1029	}
Ownasaurus	3:52b2a7514406	1030	}
Ownasaurus	3:52b2a7514406	1031
Ownasaurus	3:52b2a7514406	1032	/**
Ownasaurus	3:52b2a7514406	1033	* @brief Enables or disables the write protection of the desired sectors, for the second
Ownasaurus	3:52b2a7514406	1034	* 1 Mb of the Flash
Ownasaurus	3:52b2a7514406	1035	*
Ownasaurus	3:52b2a7514406	1036	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	1037	*
Ownasaurus	3:52b2a7514406	1038	* @note When the memory read out protection is selected (RDP level = 1),
Ownasaurus	3:52b2a7514406	1039	* it is not possible to program or erase the flash sector i if CortexM4
Ownasaurus	3:52b2a7514406	1040	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
Ownasaurus	3:52b2a7514406	1041	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
Ownasaurus	3:52b2a7514406	1042	*
Ownasaurus	3:52b2a7514406	1043	* @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
Ownasaurus	3:52b2a7514406	1044	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1045	* @arg OB_WRP: A value between OB_WRP_Sector12 and OB_WRP_Sector23
Ownasaurus	3:52b2a7514406	1046	* @arg OB_WRP_Sector_All
Ownasaurus	3:52b2a7514406	1047	* @param Newstate: new state of the Write Protection.
Ownasaurus	3:52b2a7514406	1048	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	1049	* @retval None
Ownasaurus	3:52b2a7514406	1050	*/
Ownasaurus	3:52b2a7514406	1051	void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	1052	{
Ownasaurus	3:52b2a7514406	1053	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1054
Ownasaurus	3:52b2a7514406	1055	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1056	assert_param(IS_OB_WRP(OB_WRP));
Ownasaurus	3:52b2a7514406	1057	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	1058
Ownasaurus	3:52b2a7514406	1059	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1060
Ownasaurus	3:52b2a7514406	1061	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1062	{
Ownasaurus	3:52b2a7514406	1063	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	1064	{
Ownasaurus	3:52b2a7514406	1065	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~OB_WRP);
Ownasaurus	3:52b2a7514406	1066	}
Ownasaurus	3:52b2a7514406	1067	else
Ownasaurus	3:52b2a7514406	1068	{
Ownasaurus	3:52b2a7514406	1069	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)OB_WRP;
Ownasaurus	3:52b2a7514406	1070	}
Ownasaurus	3:52b2a7514406	1071	}
Ownasaurus	3:52b2a7514406	1072	}
Ownasaurus	3:52b2a7514406	1073
Ownasaurus	3:52b2a7514406	1074	/**
Ownasaurus	3:52b2a7514406	1075	* @brief Select the Protection Mode (SPRMOD).
Ownasaurus	3:52b2a7514406	1076	*
Ownasaurus	3:52b2a7514406	1077	* @note This function can be used only for STM32F42xxx/43xxx and STM32F401xx/411xE devices.
Ownasaurus	3:52b2a7514406	1078	*
Ownasaurus	3:52b2a7514406	1079	* @note After PCROP activation, Option Byte modification is not possible.
Ownasaurus	3:52b2a7514406	1080	* Exception made for the global Read Out Protection modification level (level1 to level0)
Ownasaurus	3:52b2a7514406	1081	* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
Ownasaurus	3:52b2a7514406	1082	*
Ownasaurus	3:52b2a7514406	1083	* @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
Ownasaurus	3:52b2a7514406	1084	*
Ownasaurus	3:52b2a7514406	1085	* @note Some Precautions should be taken when activating the PCROP feature :
Ownasaurus	3:52b2a7514406	1086	* The active value of nWRPi bits is inverted when PCROP mode is active, this means if SPRMOD = 1
Ownasaurus	3:52b2a7514406	1087	* and WRPi = 1 (default value), then the user sector i is read/write protected.
Ownasaurus	3:52b2a7514406	1088	* In order to avoid activation of PCROP Mode for undesired sectors, please follow the
Ownasaurus	3:52b2a7514406	1089	* below safety sequence :
Ownasaurus	3:52b2a7514406	1090	* - Disable PCROP for all Sectors using FLASH_OB_PCROPConfig(OB_PCROP_Sector_All, DISABLE) function
Ownasaurus	3:52b2a7514406	1091	* for Bank1 or FLASH_OB_PCROP1Config(OB_PCROP_Sector_All, DISABLE) function for Bank2
Ownasaurus	3:52b2a7514406	1092	* - Enable PCROP for the desired Sector i using FLASH_OB_PCROPConfig(Sector i, ENABLE) function
Ownasaurus	3:52b2a7514406	1093	* - Activate the PCROP Mode FLASH_OB_PCROPSelectionConfig() function.
Ownasaurus	3:52b2a7514406	1094	*
Ownasaurus	3:52b2a7514406	1095	* @param OB_PCROP: Select the Protection Mode of nWPRi bits
Ownasaurus	3:52b2a7514406	1096	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1097	* @arg OB_PcROP_Disable: nWRPi control the write protection of respective user sectors.
Ownasaurus	3:52b2a7514406	1098	* @arg OB_PcROP_Enable: nWRPi control the read&write protection (PCROP) of respective user sectors.
Ownasaurus	3:52b2a7514406	1099	* @retval None
Ownasaurus	3:52b2a7514406	1100	*/
Ownasaurus	3:52b2a7514406	1101	void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP)
Ownasaurus	3:52b2a7514406	1102	{
Ownasaurus	3:52b2a7514406	1103	uint8_t optiontmp = 0xFF;
Ownasaurus	3:52b2a7514406	1104
Ownasaurus	3:52b2a7514406	1105	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1106	assert_param(IS_OB_PCROP_SELECT(OB_PcROP));
Ownasaurus	3:52b2a7514406	1107
Ownasaurus	3:52b2a7514406	1108	/* Mask SPRMOD bit */
Ownasaurus	3:52b2a7514406	1109	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
Ownasaurus	3:52b2a7514406	1110	/* Update Option Byte */
Ownasaurus	3:52b2a7514406	1111	(__IO uint8_t )OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PcROP \| optiontmp);
Ownasaurus	3:52b2a7514406	1112
Ownasaurus	3:52b2a7514406	1113	}
Ownasaurus	3:52b2a7514406	1114
Ownasaurus	3:52b2a7514406	1115	/**
Ownasaurus	3:52b2a7514406	1116	* @brief Enables or disables the read/write protection (PCROP) of the desired
Ownasaurus	3:52b2a7514406	1117	* sectors, for the first 1 MB of the Flash.
Ownasaurus	3:52b2a7514406	1118	*
Ownasaurus	3:52b2a7514406	1119	* @note This function can be used only for STM32F42xxx/43xxx , STM32F401xx/411xE
Ownasaurus	3:52b2a7514406	1120	* and STM32F412xG devices.
Ownasaurus	3:52b2a7514406	1121	*
Ownasaurus	3:52b2a7514406	1122	* @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
Ownasaurus	3:52b2a7514406	1123	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1124	* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector11 for
Ownasaurus	3:52b2a7514406	1125	* STM32F42xxx/43xxx devices and between OB_PCROP_Sector0 and
Ownasaurus	3:52b2a7514406	1126	* OB_PCROP_Sector5 for STM32F401xx/411xE devices.
Ownasaurus	3:52b2a7514406	1127	* @arg OB_PCROP_Sector_All
Ownasaurus	3:52b2a7514406	1128	* @param Newstate: new state of the Write Protection.
Ownasaurus	3:52b2a7514406	1129	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	1130	* @retval None
Ownasaurus	3:52b2a7514406	1131	*/
Ownasaurus	3:52b2a7514406	1132	void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	1133	{
Ownasaurus	3:52b2a7514406	1134	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1135
Ownasaurus	3:52b2a7514406	1136	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1137	assert_param(IS_OB_PCROP(OB_PCROP));
Ownasaurus	3:52b2a7514406	1138	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	1139
Ownasaurus	3:52b2a7514406	1140	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1141
Ownasaurus	3:52b2a7514406	1142	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1143	{
Ownasaurus	3:52b2a7514406	1144	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	1145	{
Ownasaurus	3:52b2a7514406	1146	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)OB_PCROP;
Ownasaurus	3:52b2a7514406	1147	}
Ownasaurus	3:52b2a7514406	1148	else
Ownasaurus	3:52b2a7514406	1149	{
Ownasaurus	3:52b2a7514406	1150	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~OB_PCROP);
Ownasaurus	3:52b2a7514406	1151	}
Ownasaurus	3:52b2a7514406	1152	}
Ownasaurus	3:52b2a7514406	1153	}
Ownasaurus	3:52b2a7514406	1154
Ownasaurus	3:52b2a7514406	1155	/**
Ownasaurus	3:52b2a7514406	1156	* @brief Enables or disables the read/write protection (PCROP) of the desired
Ownasaurus	3:52b2a7514406	1157	* sectors
Ownasaurus	3:52b2a7514406	1158	*
Ownasaurus	3:52b2a7514406	1159	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	1160	*
Ownasaurus	3:52b2a7514406	1161	* @param OB_PCROP: specifies the sector(s) to be read/write protected or unprotected.
Ownasaurus	3:52b2a7514406	1162	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1163	* @arg OB_PCROP: A value between OB_PCROP_Sector12 and OB_PCROP_Sector23
Ownasaurus	3:52b2a7514406	1164	* @arg OB_PCROP_Sector_All
Ownasaurus	3:52b2a7514406	1165	* @param Newstate: new state of the Write Protection.
Ownasaurus	3:52b2a7514406	1166	* This parameter can be: ENABLE or DISABLE.
Ownasaurus	3:52b2a7514406	1167	* @retval None
Ownasaurus	3:52b2a7514406	1168	*/
Ownasaurus	3:52b2a7514406	1169	void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	1170	{
Ownasaurus	3:52b2a7514406	1171	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1172
Ownasaurus	3:52b2a7514406	1173	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1174	assert_param(IS_OB_PCROP(OB_PCROP));
Ownasaurus	3:52b2a7514406	1175	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	1176
Ownasaurus	3:52b2a7514406	1177	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1178
Ownasaurus	3:52b2a7514406	1179	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1180	{
Ownasaurus	3:52b2a7514406	1181	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	1182	{
Ownasaurus	3:52b2a7514406	1183	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)OB_PCROP;
Ownasaurus	3:52b2a7514406	1184	}
Ownasaurus	3:52b2a7514406	1185	else
Ownasaurus	3:52b2a7514406	1186	{
Ownasaurus	3:52b2a7514406	1187	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~OB_PCROP);
Ownasaurus	3:52b2a7514406	1188	}
Ownasaurus	3:52b2a7514406	1189	}
Ownasaurus	3:52b2a7514406	1190	}
Ownasaurus	3:52b2a7514406	1191
Ownasaurus	3:52b2a7514406	1192
Ownasaurus	3:52b2a7514406	1193	/**
Ownasaurus	3:52b2a7514406	1194	* @brief Sets the read protection level.
Ownasaurus	3:52b2a7514406	1195	* @param OB_RDP: specifies the read protection level.
Ownasaurus	3:52b2a7514406	1196	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1197	* @arg OB_RDP_Level_0: No protection
Ownasaurus	3:52b2a7514406	1198	* @arg OB_RDP_Level_1: Read protection of the memory
Ownasaurus	3:52b2a7514406	1199	* @arg OB_RDP_Level_2: Full chip protection
Ownasaurus	3:52b2a7514406	1200	*
Ownasaurus	3:52b2a7514406	1201	* /!\ Warning /!\ When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
Ownasaurus	3:52b2a7514406	1202	*
Ownasaurus	3:52b2a7514406	1203	* @retval None
Ownasaurus	3:52b2a7514406	1204	*/
Ownasaurus	3:52b2a7514406	1205	void FLASH_OB_RDPConfig(uint8_t OB_RDP)
Ownasaurus	3:52b2a7514406	1206	{
Ownasaurus	3:52b2a7514406	1207	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1208
Ownasaurus	3:52b2a7514406	1209	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1210	assert_param(IS_OB_RDP(OB_RDP));
Ownasaurus	3:52b2a7514406	1211
Ownasaurus	3:52b2a7514406	1212	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1213
Ownasaurus	3:52b2a7514406	1214	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1215	{
Ownasaurus	3:52b2a7514406	1216	(__IO uint8_t)OPTCR_BYTE1_ADDRESS = OB_RDP;
Ownasaurus	3:52b2a7514406	1217
Ownasaurus	3:52b2a7514406	1218	}
Ownasaurus	3:52b2a7514406	1219	}
Ownasaurus	3:52b2a7514406	1220
Ownasaurus	3:52b2a7514406	1221	/**
Ownasaurus	3:52b2a7514406	1222	* @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
Ownasaurus	3:52b2a7514406	1223	* @param OB_IWDG: Selects the IWDG mode
Ownasaurus	3:52b2a7514406	1224	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1225	* @arg OB_IWDG_SW: Software IWDG selected
Ownasaurus	3:52b2a7514406	1226	* @arg OB_IWDG_HW: Hardware IWDG selected
Ownasaurus	3:52b2a7514406	1227	* @param OB_STOP: Reset event when entering STOP mode.
Ownasaurus	3:52b2a7514406	1228	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1229	* @arg OB_STOP_NoRST: No reset generated when entering in STOP
Ownasaurus	3:52b2a7514406	1230	* @arg OB_STOP_RST: Reset generated when entering in STOP
Ownasaurus	3:52b2a7514406	1231	* @param OB_STDBY: Reset event when entering Standby mode.
Ownasaurus	3:52b2a7514406	1232	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1233	* @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
Ownasaurus	3:52b2a7514406	1234	* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
Ownasaurus	3:52b2a7514406	1235	* @retval None
Ownasaurus	3:52b2a7514406	1236	*/
Ownasaurus	3:52b2a7514406	1237	void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
Ownasaurus	3:52b2a7514406	1238	{
Ownasaurus	3:52b2a7514406	1239	uint8_t optiontmp = 0xFF;
Ownasaurus	3:52b2a7514406	1240	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1241
Ownasaurus	3:52b2a7514406	1242	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1243	assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
Ownasaurus	3:52b2a7514406	1244	assert_param(IS_OB_STOP_SOURCE(OB_STOP));
Ownasaurus	3:52b2a7514406	1245	assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
Ownasaurus	3:52b2a7514406	1246
Ownasaurus	3:52b2a7514406	1247	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	1248	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1249
Ownasaurus	3:52b2a7514406	1250	if(status == FLASH_COMPLETE2)
Ownasaurus	3:52b2a7514406	1251	{
Ownasaurus	3:52b2a7514406	1252	#if defined(STM32F427_437xx) \|\| defined(STM32F429_439xx) \|\| defined(STM32F469_479xx)
Ownasaurus	3:52b2a7514406	1253	/* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
Ownasaurus	3:52b2a7514406	1254	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
Ownasaurus	3:52b2a7514406	1255	#endif /* STM32F427_437xx \|\| STM32F429_439xx \|\| STM32F469_479xx */
Ownasaurus	3:52b2a7514406	1256
Ownasaurus	3:52b2a7514406	1257	#if defined(STM32F40_41xxx) \|\| defined(STM32F401xx) \|\| defined(STM32F410xx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
Ownasaurus	3:52b2a7514406	1258	/* Mask OPTLOCK, OPTSTRT and BOR_LEV bits */
Ownasaurus	3:52b2a7514406	1259	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0F);
Ownasaurus	3:52b2a7514406	1260	#endif /* STM32F40_41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
Ownasaurus	3:52b2a7514406	1261
Ownasaurus	3:52b2a7514406	1262	/* Update User Option Byte */
Ownasaurus	3:52b2a7514406	1263	(__IO uint8_t )OPTCR_BYTE0_ADDRESS = OB_IWDG \| (uint8_t)(OB_STDBY \| (uint8_t)(OB_STOP \| ((uint8_t)optiontmp)));
Ownasaurus	3:52b2a7514406	1264	}
Ownasaurus	3:52b2a7514406	1265	}
Ownasaurus	3:52b2a7514406	1266
Ownasaurus	3:52b2a7514406	1267	/**
Ownasaurus	3:52b2a7514406	1268	* @brief Configure the Dual Bank Boot.
Ownasaurus	3:52b2a7514406	1269	*
Ownasaurus	3:52b2a7514406	1270	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	1271	*
Ownasaurus	3:52b2a7514406	1272	* @param OB_BOOT: specifies the Dual Bank Boot Option byte.
Ownasaurus	3:52b2a7514406	1273	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1274	* @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
Ownasaurus	3:52b2a7514406	1275	* @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
Ownasaurus	3:52b2a7514406	1276	* @retval None
Ownasaurus	3:52b2a7514406	1277	*/
Ownasaurus	3:52b2a7514406	1278	void FLASH_OB_BootConfig(uint8_t OB_BOOT)
Ownasaurus	3:52b2a7514406	1279	{
Ownasaurus	3:52b2a7514406	1280	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1281	assert_param(IS_OB_BOOT(OB_BOOT));
Ownasaurus	3:52b2a7514406	1282
Ownasaurus	3:52b2a7514406	1283	/* Set Dual Bank Boot */
Ownasaurus	3:52b2a7514406	1284	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
Ownasaurus	3:52b2a7514406	1285	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= OB_BOOT;
Ownasaurus	3:52b2a7514406	1286
Ownasaurus	3:52b2a7514406	1287	}
Ownasaurus	3:52b2a7514406	1288
Ownasaurus	3:52b2a7514406	1289	/**
Ownasaurus	3:52b2a7514406	1290	* @brief Sets the BOR Level.
Ownasaurus	3:52b2a7514406	1291	* @param OB_BOR: specifies the Option Bytes BOR Reset Level.
Ownasaurus	3:52b2a7514406	1292	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1293	* @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
Ownasaurus	3:52b2a7514406	1294	* @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
Ownasaurus	3:52b2a7514406	1295	* @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
Ownasaurus	3:52b2a7514406	1296	* @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
Ownasaurus	3:52b2a7514406	1297	* @retval None
Ownasaurus	3:52b2a7514406	1298	*/
Ownasaurus	3:52b2a7514406	1299	void FLASH_OB_BORConfig(uint8_t OB_BOR)
Ownasaurus	3:52b2a7514406	1300	{
Ownasaurus	3:52b2a7514406	1301	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1302	assert_param(IS_OB_BOR(OB_BOR));
Ownasaurus	3:52b2a7514406	1303
Ownasaurus	3:52b2a7514406	1304	/* Set the BOR Level */
Ownasaurus	3:52b2a7514406	1305	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
Ownasaurus	3:52b2a7514406	1306	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= OB_BOR;
Ownasaurus	3:52b2a7514406	1307
Ownasaurus	3:52b2a7514406	1308	}
Ownasaurus	3:52b2a7514406	1309
Ownasaurus	3:52b2a7514406	1310	/**
Ownasaurus	3:52b2a7514406	1311	* @brief Launch the option byte loading.
Ownasaurus	3:52b2a7514406	1312	* @param None
Ownasaurus	3:52b2a7514406	1313	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	1314	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	1315	*/
Ownasaurus	3:52b2a7514406	1316	FLASH_Status FLASH_OB_Launch(void)
Ownasaurus	3:52b2a7514406	1317	{
Ownasaurus	3:52b2a7514406	1318	FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1319
Ownasaurus	3:52b2a7514406	1320	/* Set the OPTSTRT bit in OPTCR register */
Ownasaurus	3:52b2a7514406	1321	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= FLASH_OPTCR_OPTSTRT;
Ownasaurus	3:52b2a7514406	1322
Ownasaurus	3:52b2a7514406	1323	/* Wait for last operation to be completed */
Ownasaurus	3:52b2a7514406	1324	status = FLASH_WaitForLastOperation2();
Ownasaurus	3:52b2a7514406	1325
Ownasaurus	3:52b2a7514406	1326	return status;
Ownasaurus	3:52b2a7514406	1327	}
Ownasaurus	3:52b2a7514406	1328
Ownasaurus	3:52b2a7514406	1329	/**
Ownasaurus	3:52b2a7514406	1330	* @brief Returns the FLASH User Option Bytes values.
Ownasaurus	3:52b2a7514406	1331	* @param None
Ownasaurus	3:52b2a7514406	1332	* @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
Ownasaurus	3:52b2a7514406	1333	* and RST_STDBY(Bit2).
Ownasaurus	3:52b2a7514406	1334	*/
Ownasaurus	3:52b2a7514406	1335	uint8_t FLASH_OB_GetUser(void)
Ownasaurus	3:52b2a7514406	1336	{
Ownasaurus	3:52b2a7514406	1337	/* Return the User Option Byte */
Ownasaurus	3:52b2a7514406	1338	return (uint8_t)(FLASH->OPTCR >> 5);
Ownasaurus	3:52b2a7514406	1339	}
Ownasaurus	3:52b2a7514406	1340
Ownasaurus	3:52b2a7514406	1341	/**
Ownasaurus	3:52b2a7514406	1342	* @brief Returns the FLASH Write Protection Option Bytes value.
Ownasaurus	3:52b2a7514406	1343	* @param None
Ownasaurus	3:52b2a7514406	1344	* @retval The FLASH Write Protection Option Bytes value
Ownasaurus	3:52b2a7514406	1345	*/
Ownasaurus	3:52b2a7514406	1346	uint16_t FLASH_OB_GetWRP(void)
Ownasaurus	3:52b2a7514406	1347	{
Ownasaurus	3:52b2a7514406	1348	/* Return the FLASH write protection Register value */
Ownasaurus	3:52b2a7514406	1349	return ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
Ownasaurus	3:52b2a7514406	1350	}
Ownasaurus	3:52b2a7514406	1351
Ownasaurus	3:52b2a7514406	1352	/**
Ownasaurus	3:52b2a7514406	1353	* @brief Returns the FLASH Write Protection Option Bytes value.
Ownasaurus	3:52b2a7514406	1354	*
Ownasaurus	3:52b2a7514406	1355	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	1356	*
Ownasaurus	3:52b2a7514406	1357	* @param None
Ownasaurus	3:52b2a7514406	1358	* @retval The FLASH Write Protection Option Bytes value
Ownasaurus	3:52b2a7514406	1359	*/
Ownasaurus	3:52b2a7514406	1360	uint16_t FLASH_OB_GetWRP1(void)
Ownasaurus	3:52b2a7514406	1361	{
Ownasaurus	3:52b2a7514406	1362	/* Return the FLASH write protection Register value */
Ownasaurus	3:52b2a7514406	1363	return ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
Ownasaurus	3:52b2a7514406	1364	}
Ownasaurus	3:52b2a7514406	1365
Ownasaurus	3:52b2a7514406	1366	/**
Ownasaurus	3:52b2a7514406	1367	* @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
Ownasaurus	3:52b2a7514406	1368	*
Ownasaurus	3:52b2a7514406	1369	* @note This function can be used only for STM32F42xxx/43xxx devices and STM32F401xx/411xE devices.
Ownasaurus	3:52b2a7514406	1370	*
Ownasaurus	3:52b2a7514406	1371	* @param None
Ownasaurus	3:52b2a7514406	1372	* @retval The FLASH PC Read/Write Protection Option Bytes value
Ownasaurus	3:52b2a7514406	1373	*/
Ownasaurus	3:52b2a7514406	1374	uint16_t FLASH_OB_GetPCROP(void)
Ownasaurus	3:52b2a7514406	1375	{
Ownasaurus	3:52b2a7514406	1376	/* Return the FLASH PC Read/write protection Register value */
Ownasaurus	3:52b2a7514406	1377	return ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
Ownasaurus	3:52b2a7514406	1378	}
Ownasaurus	3:52b2a7514406	1379
Ownasaurus	3:52b2a7514406	1380	/**
Ownasaurus	3:52b2a7514406	1381	* @brief Returns the FLASH PC Read/Write Protection Option Bytes value.
Ownasaurus	3:52b2a7514406	1382	*
Ownasaurus	3:52b2a7514406	1383	* @note This function can be used only for STM32F42xxx/43xxx devices.
Ownasaurus	3:52b2a7514406	1384	*
Ownasaurus	3:52b2a7514406	1385	* @param None
Ownasaurus	3:52b2a7514406	1386	* @retval The FLASH PC Read/Write Protection Option Bytes value
Ownasaurus	3:52b2a7514406	1387	*/
Ownasaurus	3:52b2a7514406	1388	uint16_t FLASH_OB_GetPCROP1(void)
Ownasaurus	3:52b2a7514406	1389	{
Ownasaurus	3:52b2a7514406	1390	/* Return the FLASH write protection Register value */
Ownasaurus	3:52b2a7514406	1391	return ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
Ownasaurus	3:52b2a7514406	1392	}
Ownasaurus	3:52b2a7514406	1393
Ownasaurus	3:52b2a7514406	1394	/**
Ownasaurus	3:52b2a7514406	1395	* @brief Returns the FLASH Read Protection level.
Ownasaurus	3:52b2a7514406	1396	* @param None
Ownasaurus	3:52b2a7514406	1397	* @retval FLASH ReadOut Protection Status:
Ownasaurus	3:52b2a7514406	1398	* - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
Ownasaurus	3:52b2a7514406	1399	* - RESET, when OB_RDP_Level_0 is set
Ownasaurus	3:52b2a7514406	1400	*/
Ownasaurus	3:52b2a7514406	1401	FlagStatus FLASH_OB_GetRDP(void)
Ownasaurus	3:52b2a7514406	1402	{
Ownasaurus	3:52b2a7514406	1403	FlagStatus readstatus = RESET;
Ownasaurus	3:52b2a7514406	1404
Ownasaurus	3:52b2a7514406	1405	if (((__IO uint8_t)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_0))
Ownasaurus	3:52b2a7514406	1406	{
Ownasaurus	3:52b2a7514406	1407	readstatus = SET;
Ownasaurus	3:52b2a7514406	1408	}
Ownasaurus	3:52b2a7514406	1409	else
Ownasaurus	3:52b2a7514406	1410	{
Ownasaurus	3:52b2a7514406	1411	readstatus = RESET;
Ownasaurus	3:52b2a7514406	1412	}
Ownasaurus	3:52b2a7514406	1413	return readstatus;
Ownasaurus	3:52b2a7514406	1414	}
Ownasaurus	3:52b2a7514406	1415
Ownasaurus	3:52b2a7514406	1416	/**
Ownasaurus	3:52b2a7514406	1417	* @brief Returns the FLASH BOR level.
Ownasaurus	3:52b2a7514406	1418	* @param None
Ownasaurus	3:52b2a7514406	1419	* @retval The FLASH BOR level:
Ownasaurus	3:52b2a7514406	1420	* - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
Ownasaurus	3:52b2a7514406	1421	* - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
Ownasaurus	3:52b2a7514406	1422	* - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
Ownasaurus	3:52b2a7514406	1423	* - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
Ownasaurus	3:52b2a7514406	1424	*/
Ownasaurus	3:52b2a7514406	1425	uint8_t FLASH_OB_GetBOR(void)
Ownasaurus	3:52b2a7514406	1426	{
Ownasaurus	3:52b2a7514406	1427	/* Return the FLASH BOR level */
Ownasaurus	3:52b2a7514406	1428	return (uint8_t)((__IO uint8_t )(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
Ownasaurus	3:52b2a7514406	1429	}
Ownasaurus	3:52b2a7514406	1430
Ownasaurus	3:52b2a7514406	1431	/**
Ownasaurus	3:52b2a7514406	1432	* @}
Ownasaurus	3:52b2a7514406	1433	*/
Ownasaurus	3:52b2a7514406	1434
Ownasaurus	3:52b2a7514406	1435	/** @defgroup FLASH_Group4 Interrupts and flags management functions
Ownasaurus	3:52b2a7514406	1436	* @brief Interrupts and flags management functions
Ownasaurus	3:52b2a7514406	1437	*
Ownasaurus	3:52b2a7514406	1438	@verbatim
Ownasaurus	3:52b2a7514406	1439	===============================================================================
Ownasaurus	3:52b2a7514406	1440	##### Interrupts and flags management functions #####
Ownasaurus	3:52b2a7514406	1441	===============================================================================
Ownasaurus	3:52b2a7514406	1442	@endverbatim
Ownasaurus	3:52b2a7514406	1443	* @{
Ownasaurus	3:52b2a7514406	1444	*/
Ownasaurus	3:52b2a7514406	1445
Ownasaurus	3:52b2a7514406	1446	/**
Ownasaurus	3:52b2a7514406	1447	* @brief Enables or disables the specified FLASH interrupts.
Ownasaurus	3:52b2a7514406	1448	* @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled.
Ownasaurus	3:52b2a7514406	1449	* This parameter can be any combination of the following values:
Ownasaurus	3:52b2a7514406	1450	* @arg FLASH_IT_ERR: FLASH Error Interrupt
Ownasaurus	3:52b2a7514406	1451	* @arg FLASH_IT_EOP: FLASH end of operation Interrupt
Ownasaurus	3:52b2a7514406	1452	* @retval None
Ownasaurus	3:52b2a7514406	1453	*/
Ownasaurus	3:52b2a7514406	1454	void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
Ownasaurus	3:52b2a7514406	1455	{
Ownasaurus	3:52b2a7514406	1456	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1457	assert_param(IS_FLASH_IT(FLASH_IT));
Ownasaurus	3:52b2a7514406	1458	assert_param(IS_FUNCTIONAL_STATE(NewState));
Ownasaurus	3:52b2a7514406	1459
Ownasaurus	3:52b2a7514406	1460	if(NewState != DISABLE)
Ownasaurus	3:52b2a7514406	1461	{
Ownasaurus	3:52b2a7514406	1462	/* Enable the interrupt sources */
Ownasaurus	3:52b2a7514406	1463	FLASH->CR \|= FLASH_IT;
Ownasaurus	3:52b2a7514406	1464	}
Ownasaurus	3:52b2a7514406	1465	else
Ownasaurus	3:52b2a7514406	1466	{
Ownasaurus	3:52b2a7514406	1467	/* Disable the interrupt sources */
Ownasaurus	3:52b2a7514406	1468	FLASH->CR &= ~(uint32_t)FLASH_IT;
Ownasaurus	3:52b2a7514406	1469	}
Ownasaurus	3:52b2a7514406	1470	}
Ownasaurus	3:52b2a7514406	1471
Ownasaurus	3:52b2a7514406	1472	/**
Ownasaurus	3:52b2a7514406	1473	* @brief Checks whether the specified FLASH flag is set or not.
Ownasaurus	3:52b2a7514406	1474	* @param FLASH_FLAG: specifies the FLASH flag to check.
Ownasaurus	3:52b2a7514406	1475	* This parameter can be one of the following values:
Ownasaurus	3:52b2a7514406	1476	* @arg FLASH_FLAG_EOP: FLASH End of Operation flag
Ownasaurus	3:52b2a7514406	1477	* @arg FLASH_FLAG_OPERR: FLASH operation Error flag
Ownasaurus	3:52b2a7514406	1478	* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
Ownasaurus	3:52b2a7514406	1479	* @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
Ownasaurus	3:52b2a7514406	1480	* @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
Ownasaurus	3:52b2a7514406	1481	* @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
Ownasaurus	3:52b2a7514406	1482	* @arg FLASH_FLAG_RDERR: FLASH (PCROP) Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
Ownasaurus	3:52b2a7514406	1483	* @arg FLASH_FLAG_BSY: FLASH Busy flag
Ownasaurus	3:52b2a7514406	1484	* @retval The new state of FLASH_FLAG (SET or RESET).
Ownasaurus	3:52b2a7514406	1485	*/
Ownasaurus	3:52b2a7514406	1486	FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
Ownasaurus	3:52b2a7514406	1487	{
Ownasaurus	3:52b2a7514406	1488	FlagStatus bitstatus = RESET;
Ownasaurus	3:52b2a7514406	1489	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1490	assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG));
Ownasaurus	3:52b2a7514406	1491
Ownasaurus	3:52b2a7514406	1492	if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
Ownasaurus	3:52b2a7514406	1493	{
Ownasaurus	3:52b2a7514406	1494	bitstatus = SET;
Ownasaurus	3:52b2a7514406	1495	}
Ownasaurus	3:52b2a7514406	1496	else
Ownasaurus	3:52b2a7514406	1497	{
Ownasaurus	3:52b2a7514406	1498	bitstatus = RESET;
Ownasaurus	3:52b2a7514406	1499	}
Ownasaurus	3:52b2a7514406	1500	/* Return the new state of FLASH_FLAG (SET or RESET) */
Ownasaurus	3:52b2a7514406	1501	return bitstatus;
Ownasaurus	3:52b2a7514406	1502	}
Ownasaurus	3:52b2a7514406	1503
Ownasaurus	3:52b2a7514406	1504	/**
Ownasaurus	3:52b2a7514406	1505	* @brief Clears the FLASH's pending flags.
Ownasaurus	3:52b2a7514406	1506	* @param FLASH_FLAG: specifies the FLASH flags to clear.
Ownasaurus	3:52b2a7514406	1507	* This parameter can be any combination of the following values:
Ownasaurus	3:52b2a7514406	1508	* @arg FLASH_FLAG_EOP: FLASH End of Operation flag
Ownasaurus	3:52b2a7514406	1509	* @arg FLASH_FLAG_OPERR: FLASH operation Error flag
Ownasaurus	3:52b2a7514406	1510	* @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
Ownasaurus	3:52b2a7514406	1511	* @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
Ownasaurus	3:52b2a7514406	1512	* @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
Ownasaurus	3:52b2a7514406	1513	* @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
Ownasaurus	3:52b2a7514406	1514	* @arg FLASH_FLAG_RDERR: FLASH Read Protection error flag (STM32F42xx/43xxx and STM32F401xx/411xE devices)
Ownasaurus	3:52b2a7514406	1515	* @retval None
Ownasaurus	3:52b2a7514406	1516	*/
Ownasaurus	3:52b2a7514406	1517	void FLASH_ClearFlag(uint32_t FLASH_FLAG)
Ownasaurus	3:52b2a7514406	1518	{
Ownasaurus	3:52b2a7514406	1519	/* Check the parameters */
Ownasaurus	3:52b2a7514406	1520	assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG));
Ownasaurus	3:52b2a7514406	1521
Ownasaurus	3:52b2a7514406	1522	/* Clear the flags */
Ownasaurus	3:52b2a7514406	1523	FLASH->SR = FLASH_FLAG;
Ownasaurus	3:52b2a7514406	1524	}
Ownasaurus	3:52b2a7514406	1525
Ownasaurus	3:52b2a7514406	1526	/**
Ownasaurus	3:52b2a7514406	1527	* @brief Returns the FLASH Status.
Ownasaurus	3:52b2a7514406	1528	* @param None
Ownasaurus	3:52b2a7514406	1529	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	1530	* FLASH_ERROR_WRP2, FLASH_ERROR_RD2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	1531	*/
Ownasaurus	3:52b2a7514406	1532	FLASH_Status FLASH_GetStatus(void)
Ownasaurus	3:52b2a7514406	1533	{
Ownasaurus	3:52b2a7514406	1534	FLASH_Status flashstatus = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1535
Ownasaurus	3:52b2a7514406	1536	if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
Ownasaurus	3:52b2a7514406	1537	{
Ownasaurus	3:52b2a7514406	1538	flashstatus = FLASH_BUSY2;
Ownasaurus	3:52b2a7514406	1539	}
Ownasaurus	3:52b2a7514406	1540	else
Ownasaurus	3:52b2a7514406	1541	{
Ownasaurus	3:52b2a7514406	1542	if((FLASH->SR & FLASH_FLAG_WRPERR) != (uint32_t)0x00)
Ownasaurus	3:52b2a7514406	1543	{
Ownasaurus	3:52b2a7514406	1544	flashstatus = FLASH_ERROR_WRP2;
Ownasaurus	3:52b2a7514406	1545	}
Ownasaurus	3:52b2a7514406	1546	else
Ownasaurus	3:52b2a7514406	1547	{
Ownasaurus	3:52b2a7514406	1548	if((FLASH->SR & FLASH_FLAG_RDERR) != (uint32_t)0x00)
Ownasaurus	3:52b2a7514406	1549	{
Ownasaurus	3:52b2a7514406	1550	flashstatus = FLASH_ERROR_RD2;
Ownasaurus	3:52b2a7514406	1551	}
Ownasaurus	3:52b2a7514406	1552	else
Ownasaurus	3:52b2a7514406	1553	{
Ownasaurus	3:52b2a7514406	1554	if((FLASH->SR & (uint32_t)0xE0) != (uint32_t)0x00)
Ownasaurus	3:52b2a7514406	1555	{
Ownasaurus	3:52b2a7514406	1556	flashstatus = FLASH_ERROR_PROGRAM2;
Ownasaurus	3:52b2a7514406	1557	}
Ownasaurus	3:52b2a7514406	1558	else
Ownasaurus	3:52b2a7514406	1559	{
Ownasaurus	3:52b2a7514406	1560	if((FLASH->SR & FLASH_FLAG_OPERR) != (uint32_t)0x00)
Ownasaurus	3:52b2a7514406	1561	{
Ownasaurus	3:52b2a7514406	1562	flashstatus = FLASH_ERROR_OPERATION2;
Ownasaurus	3:52b2a7514406	1563	}
Ownasaurus	3:52b2a7514406	1564	else
Ownasaurus	3:52b2a7514406	1565	{
Ownasaurus	3:52b2a7514406	1566	flashstatus = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1567	}
Ownasaurus	3:52b2a7514406	1568	}
Ownasaurus	3:52b2a7514406	1569	}
Ownasaurus	3:52b2a7514406	1570	}
Ownasaurus	3:52b2a7514406	1571	}
Ownasaurus	3:52b2a7514406	1572	/* Return the FLASH Status */
Ownasaurus	3:52b2a7514406	1573	return flashstatus;
Ownasaurus	3:52b2a7514406	1574	}
Ownasaurus	3:52b2a7514406	1575
Ownasaurus	3:52b2a7514406	1576	/**
Ownasaurus	3:52b2a7514406	1577	* @brief Waits for a FLASH operation to complete.
Ownasaurus	3:52b2a7514406	1578	* @param None
Ownasaurus	3:52b2a7514406	1579	* @retval FLASH Status: The returned value can be: FLASH_BUSY2, FLASH_ERROR_PROGRAM2,
Ownasaurus	3:52b2a7514406	1580	* FLASH_ERROR_WRP2, FLASH_ERROR_OPERATION2 or FLASH_COMPLETE2.
Ownasaurus	3:52b2a7514406	1581	*/
Ownasaurus	3:52b2a7514406	1582	FLASH_Status FLASH_WaitForLastOperation2(void)
Ownasaurus	3:52b2a7514406	1583	{
Ownasaurus	3:52b2a7514406	1584	__IO FLASH_Status status = FLASH_COMPLETE2;
Ownasaurus	3:52b2a7514406	1585
Ownasaurus	3:52b2a7514406	1586	/* Check for the FLASH Status */
Ownasaurus	3:52b2a7514406	1587	status = FLASH_GetStatus();
Ownasaurus	3:52b2a7514406	1588
Ownasaurus	3:52b2a7514406	1589	/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Ownasaurus	3:52b2a7514406	1590	Even if the FLASH operation fails, the BUSY flag will be reset and an error
Ownasaurus	3:52b2a7514406	1591	flag will be set */
Ownasaurus	3:52b2a7514406	1592	while(status == FLASH_BUSY2)
Ownasaurus	3:52b2a7514406	1593	{
Ownasaurus	3:52b2a7514406	1594	status = FLASH_GetStatus();
Ownasaurus	3:52b2a7514406	1595	}
Ownasaurus	3:52b2a7514406	1596	/* Return the operation status */
Ownasaurus	3:52b2a7514406	1597	return status;
Ownasaurus	3:52b2a7514406	1598	}
Ownasaurus	3:52b2a7514406	1599
Ownasaurus	3:52b2a7514406	1600	/**
Ownasaurus	3:52b2a7514406	1601	* @}
Ownasaurus	3:52b2a7514406	1602	*/
Ownasaurus	3:52b2a7514406	1603
Ownasaurus	3:52b2a7514406	1604	/**
Ownasaurus	3:52b2a7514406	1605	* @}
Ownasaurus	3:52b2a7514406	1606	*/
Ownasaurus	3:52b2a7514406	1607
Ownasaurus	3:52b2a7514406	1608	/**
Ownasaurus	3:52b2a7514406	1609	* @}
Ownasaurus	3:52b2a7514406	1610	*/
Ownasaurus	3:52b2a7514406	1611
Ownasaurus	3:52b2a7514406	1612	/**
Ownasaurus	3:52b2a7514406	1613	* @}
Ownasaurus	3:52b2a7514406	1614	*/
Ownasaurus	3:52b2a7514406	1615
Ownasaurus	3:52b2a7514406	1616	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
Ownasaurus	3:52b2a7514406	1617

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Type:	Program
Mbed OS support:	Mbed 2 deprecated
Created:	05 Dec 2016
Imports:	20
Forks:	0
Commits:	14
Dependents:	0
Dependencies:	3
Followers:	1

stm32f4xx_flash.c@13:d7c1aae2b48f, 2017-04-15 (annotated)

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