Nirvana Jay / Mbed 2 deprecated F7DISCO_Demo

this repository aim to make the official ST DISCO F746NG demo from STM32Cube_FW_F7_V1.2.0 working on mbed.

Dependencies:   BSP_DISCO_F746NG_patch mbed-rtos mbed

Config/stm32f7xx_hal_conf.h@0:c00e6c923941, 2015-11-02 (annotated)

Committer:
NirT
Date:
Mon Nov 02 23:38:08 2015 +0000
Revision:
0:c00e6c923941
Error: Incomplete type is not allowed in "patch/LwIP/src/include/lwip/dhcp.h", Line: 83, Col: 4; ; and more like this.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
NirT 0:c00e6c923941 1 /**
NirT 0:c00e6c923941 2 ******************************************************************************
NirT 0:c00e6c923941 3 * @file stm32f7xx_hal_conf.h
NirT 0:c00e6c923941 4 * @author MCD Application Team
NirT 0:c00e6c923941 5 * @version V1.1.0
NirT 0:c00e6c923941 6 * @date 21-September-2015
NirT 0:c00e6c923941 7 * @brief HAL configuration file.
NirT 0:c00e6c923941 8 ******************************************************************************
NirT 0:c00e6c923941 9 * @attention
NirT 0:c00e6c923941 10 *
NirT 0:c00e6c923941 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
NirT 0:c00e6c923941 12 *
NirT 0:c00e6c923941 13 * Redistribution and use in source and binary forms, with or without modification,
NirT 0:c00e6c923941 14 * are permitted provided that the following conditions are met:
NirT 0:c00e6c923941 15 * 1. Redistributions of source code must retain the above copyright notice,
NirT 0:c00e6c923941 16 * this list of conditions and the following disclaimer.
NirT 0:c00e6c923941 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
NirT 0:c00e6c923941 18 * this list of conditions and the following disclaimer in the documentation
NirT 0:c00e6c923941 19 * and/or other materials provided with the distribution.
NirT 0:c00e6c923941 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
NirT 0:c00e6c923941 21 * may be used to endorse or promote products derived from this software
NirT 0:c00e6c923941 22 * without specific prior written permission.
NirT 0:c00e6c923941 23 *
NirT 0:c00e6c923941 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
NirT 0:c00e6c923941 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
NirT 0:c00e6c923941 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
NirT 0:c00e6c923941 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
NirT 0:c00e6c923941 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
NirT 0:c00e6c923941 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
NirT 0:c00e6c923941 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
NirT 0:c00e6c923941 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
NirT 0:c00e6c923941 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
NirT 0:c00e6c923941 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
NirT 0:c00e6c923941 34 *
NirT 0:c00e6c923941 35 ******************************************************************************
NirT 0:c00e6c923941 36 */
NirT 0:c00e6c923941 37
NirT 0:c00e6c923941 38 /* Define to prevent recursive inclusion -------------------------------------*/
NirT 0:c00e6c923941 39 #ifndef __STM32F7xx_HAL_CONF_H
NirT 0:c00e6c923941 40 #define __STM32F7xx_HAL_CONF_H
NirT 0:c00e6c923941 41
NirT 0:c00e6c923941 42 #ifdef __cplusplus
NirT 0:c00e6c923941 43 extern "C" {
NirT 0:c00e6c923941 44 #endif
NirT 0:c00e6c923941 45
NirT 0:c00e6c923941 46 /* Exported types ------------------------------------------------------------*/
NirT 0:c00e6c923941 47 /* Exported constants --------------------------------------------------------*/
NirT 0:c00e6c923941 48
NirT 0:c00e6c923941 49 /* ########################## Module Selection ############################## */
NirT 0:c00e6c923941 50 /**
NirT 0:c00e6c923941 51 * @brief This is the list of modules to be used in the HAL driver
NirT 0:c00e6c923941 52 */
NirT 0:c00e6c923941 53 #define HAL_MODULE_ENABLED
NirT 0:c00e6c923941 54 /* #define HAL_ADC_MODULE_ENABLED */
NirT 0:c00e6c923941 55 /* #define HAL_CAN_MODULE_ENABLED */
NirT 0:c00e6c923941 56 /* #define HAL_CEC_MODULE_ENABLED */
NirT 0:c00e6c923941 57 /* #define HAL_CRC_MODULE_ENABLED */
NirT 0:c00e6c923941 58 /* #define HAL_CRYP_MODULE_ENABLED */
NirT 0:c00e6c923941 59 /* #define HAL_DAC_MODULE_ENABLED */
NirT 0:c00e6c923941 60 #define HAL_DCMI_MODULE_ENABLED
NirT 0:c00e6c923941 61 #define HAL_DMA_MODULE_ENABLED
NirT 0:c00e6c923941 62 #define HAL_DMA2D_MODULE_ENABLED
NirT 0:c00e6c923941 63 #define HAL_ETH_MODULE_ENABLED
NirT 0:c00e6c923941 64 #define HAL_FLASH_MODULE_ENABLED
NirT 0:c00e6c923941 65 /* #define HAL_NAND_MODULE_ENABLED */
NirT 0:c00e6c923941 66 /* #define HAL_NOR_MODULE_ENABLED */
NirT 0:c00e6c923941 67 /* #define HAL_SRAM_MODULE_ENABLED */
NirT 0:c00e6c923941 68 #define HAL_SDRAM_MODULE_ENABLED
NirT 0:c00e6c923941 69 /* #define HAL_HASH_MODULE_ENABLED */
NirT 0:c00e6c923941 70 #define HAL_GPIO_MODULE_ENABLED
NirT 0:c00e6c923941 71 #define HAL_I2C_MODULE_ENABLED
NirT 0:c00e6c923941 72 #define HAL_I2S_MODULE_ENABLED
NirT 0:c00e6c923941 73 /* #define HAL_IWDG_MODULE_ENABLED */
NirT 0:c00e6c923941 74 /* #define HAL_LPTIM_MODULE_ENABLED */
NirT 0:c00e6c923941 75 #define HAL_LTDC_MODULE_ENABLED
NirT 0:c00e6c923941 76 #define HAL_PWR_MODULE_ENABLED
NirT 0:c00e6c923941 77 #define HAL_QSPI_MODULE_ENABLED
NirT 0:c00e6c923941 78 #define HAL_RCC_MODULE_ENABLED
NirT 0:c00e6c923941 79 #define HAL_RNG_MODULE_ENABLED
NirT 0:c00e6c923941 80 #define HAL_RTC_MODULE_ENABLED
NirT 0:c00e6c923941 81 #define HAL_SAI_MODULE_ENABLED
NirT 0:c00e6c923941 82 #define HAL_SD_MODULE_ENABLED
NirT 0:c00e6c923941 83 /* #define HAL_SPDIFRX_MODULE_ENABLED */
NirT 0:c00e6c923941 84 /* #define HAL_SPI_MODULE_ENABLED */
NirT 0:c00e6c923941 85 #define HAL_TIM_MODULE_ENABLED
NirT 0:c00e6c923941 86 #define HAL_UART_MODULE_ENABLED
NirT 0:c00e6c923941 87 /* #define HAL_USART_MODULE_ENABLED */
NirT 0:c00e6c923941 88 /* #define HAL_IRDA_MODULE_ENABLED */
NirT 0:c00e6c923941 89 /* #define HAL_SMARTCARD_MODULE_ENABLED */
NirT 0:c00e6c923941 90 /* #define HAL_WWDG_MODULE_ENABLED */
NirT 0:c00e6c923941 91 #define HAL_CORTEX_MODULE_ENABLED
NirT 0:c00e6c923941 92 /* #define HAL_PCD_MODULE_ENABLED */
NirT 0:c00e6c923941 93 #define HAL_HCD_MODULE_ENABLED
NirT 0:c00e6c923941 94
NirT 0:c00e6c923941 95
NirT 0:c00e6c923941 96 /* ########################## Timeout Configuration ######################### */
NirT 0:c00e6c923941 97 /**
NirT 0:c00e6c923941 98 * @brief This is the HAL configuration section
NirT 0:c00e6c923941 99 */
NirT 0:c00e6c923941 100 #define HAL_ACCURATE_TIMEOUT_ENABLED 0
NirT 0:c00e6c923941 101 #define HAL_TIMEOUT_VALUE 0x1FFFFFF
NirT 0:c00e6c923941 102
NirT 0:c00e6c923941 103 /* ########################## HSE/HSI Values adaptation ##################### */
NirT 0:c00e6c923941 104 /**
NirT 0:c00e6c923941 105 * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
NirT 0:c00e6c923941 106 * This value is used by the RCC HAL module to compute the system frequency
NirT 0:c00e6c923941 107 * (when HSE is used as system clock source, directly or through the PLL).
NirT 0:c00e6c923941 108 */
NirT 0:c00e6c923941 109 #if !defined (HSE_VALUE)
NirT 0:c00e6c923941 110 #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
NirT 0:c00e6c923941 111 #endif /* HSE_VALUE */
NirT 0:c00e6c923941 112
NirT 0:c00e6c923941 113 #if !defined (HSE_STARTUP_TIMEOUT)
NirT 0:c00e6c923941 114 #define HSE_STARTUP_TIMEOUT ((uint32_t)500) /*!< Time out for HSE start up, in ms */
NirT 0:c00e6c923941 115 #endif /* HSE_STARTUP_TIMEOUT */
NirT 0:c00e6c923941 116
NirT 0:c00e6c923941 117 /**
NirT 0:c00e6c923941 118 * @brief Internal High Speed oscillator (HSI) value.
NirT 0:c00e6c923941 119 * This value is used by the RCC HAL module to compute the system frequency
NirT 0:c00e6c923941 120 * (when HSI is used as system clock source, directly or through the PLL).
NirT 0:c00e6c923941 121 */
NirT 0:c00e6c923941 122 #if !defined (HSI_VALUE)
NirT 0:c00e6c923941 123 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
NirT 0:c00e6c923941 124 #endif /* HSI_VALUE */
NirT 0:c00e6c923941 125
NirT 0:c00e6c923941 126 /**
NirT 0:c00e6c923941 127 * @brief Internal Low Speed oscillator (LSI) value.
NirT 0:c00e6c923941 128 */
NirT 0:c00e6c923941 129 #if !defined (LSI_VALUE)
NirT 0:c00e6c923941 130 #define LSI_VALUE ((uint32_t)32000)
NirT 0:c00e6c923941 131 #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
NirT 0:c00e6c923941 132 The real value may vary depending on the variations
NirT 0:c00e6c923941 133 in voltage and temperature. */
NirT 0:c00e6c923941 134 /**
NirT 0:c00e6c923941 135 * @brief External Low Speed oscillator (LSE) value.
NirT 0:c00e6c923941 136 */
NirT 0:c00e6c923941 137 #if !defined (LSE_VALUE)
NirT 0:c00e6c923941 138 #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
NirT 0:c00e6c923941 139 #endif /* LSE_VALUE */
NirT 0:c00e6c923941 140
NirT 0:c00e6c923941 141 /**
NirT 0:c00e6c923941 142 * @brief External clock source for I2S peripheral
NirT 0:c00e6c923941 143 * This value is used by the I2S HAL module to compute the I2S clock source
NirT 0:c00e6c923941 144 * frequency, this source is inserted directly through I2S_CKIN pad.
NirT 0:c00e6c923941 145 */
NirT 0:c00e6c923941 146 #if !defined (EXTERNAL_CLOCK_VALUE)
NirT 0:c00e6c923941 147 #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the Internal oscillator in Hz*/
NirT 0:c00e6c923941 148 #endif /* EXTERNAL_CLOCK_VALUE */
NirT 0:c00e6c923941 149
NirT 0:c00e6c923941 150 /* Tip: To avoid modifying this file each time you need to use different HSE,
NirT 0:c00e6c923941 151 === you can define the HSE value in your toolchain compiler preprocessor. */
NirT 0:c00e6c923941 152
NirT 0:c00e6c923941 153 /* ########################### System Configuration ######################### */
NirT 0:c00e6c923941 154 /**
NirT 0:c00e6c923941 155 * @brief This is the HAL system configuration section
NirT 0:c00e6c923941 156 */
NirT 0:c00e6c923941 157 #define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
NirT 0:c00e6c923941 158 #define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
NirT 0:c00e6c923941 159 #define USE_RTOS 0
NirT 0:c00e6c923941 160 #define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */
NirT 0:c00e6c923941 161
NirT 0:c00e6c923941 162 /* ########################## Assert Selection ############################## */
NirT 0:c00e6c923941 163 /**
NirT 0:c00e6c923941 164 * @brief Uncomment the line below to expanse the "assert_param" macro in the
NirT 0:c00e6c923941 165 * HAL drivers code
NirT 0:c00e6c923941 166 */
NirT 0:c00e6c923941 167 /* #define USE_FULL_ASSERT 1 */
NirT 0:c00e6c923941 168
NirT 0:c00e6c923941 169 /* ################## Ethernet peripheral configuration ##################### */
NirT 0:c00e6c923941 170
NirT 0:c00e6c923941 171 /* Section 1 : Ethernet peripheral configuration */
NirT 0:c00e6c923941 172
NirT 0:c00e6c923941 173 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
NirT 0:c00e6c923941 174 #define MAC_ADDR0 2
NirT 0:c00e6c923941 175 #define MAC_ADDR1 0
NirT 0:c00e6c923941 176 #define MAC_ADDR2 0
NirT 0:c00e6c923941 177 #define MAC_ADDR3 0
NirT 0:c00e6c923941 178 #define MAC_ADDR4 0
NirT 0:c00e6c923941 179 #define MAC_ADDR5 0
NirT 0:c00e6c923941 180
NirT 0:c00e6c923941 181 /* Definition of the Ethernet driver buffers size and count */
NirT 0:c00e6c923941 182 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
NirT 0:c00e6c923941 183 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
NirT 0:c00e6c923941 184 #define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
NirT 0:c00e6c923941 185 #define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
NirT 0:c00e6c923941 186
NirT 0:c00e6c923941 187 /* Section 2: PHY configuration section */
NirT 0:c00e6c923941 188 /* LAN8742A PHY Address*/
NirT 0:c00e6c923941 189 #define LAN8742A_PHY_ADDRESS 0x00
NirT 0:c00e6c923941 190 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
NirT 0:c00e6c923941 191 #define PHY_RESET_DELAY ((uint32_t)0x00000FFF)
NirT 0:c00e6c923941 192 /* PHY Configuration delay */
NirT 0:c00e6c923941 193 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
NirT 0:c00e6c923941 194
NirT 0:c00e6c923941 195 #define PHY_READ_TO ((uint32_t)0x0000FFFF)
NirT 0:c00e6c923941 196 #define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
NirT 0:c00e6c923941 197
NirT 0:c00e6c923941 198 /* Section 3: Common PHY Registers */
NirT 0:c00e6c923941 199
NirT 0:c00e6c923941 200 #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
NirT 0:c00e6c923941 201 #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
NirT 0:c00e6c923941 202
NirT 0:c00e6c923941 203 #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
NirT 0:c00e6c923941 204 #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
NirT 0:c00e6c923941 205 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
NirT 0:c00e6c923941 206 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
NirT 0:c00e6c923941 207 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
NirT 0:c00e6c923941 208 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
NirT 0:c00e6c923941 209 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
NirT 0:c00e6c923941 210 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
NirT 0:c00e6c923941 211 #define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
NirT 0:c00e6c923941 212 #define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
NirT 0:c00e6c923941 213
NirT 0:c00e6c923941 214 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
NirT 0:c00e6c923941 215 #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
NirT 0:c00e6c923941 216 #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
NirT 0:c00e6c923941 217
NirT 0:c00e6c923941 218 /* Section 4: Extended PHY Registers */
NirT 0:c00e6c923941 219
NirT 0:c00e6c923941 220 #define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */
NirT 0:c00e6c923941 221
NirT 0:c00e6c923941 222 #define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */
NirT 0:c00e6c923941 223 #define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */
NirT 0:c00e6c923941 224
NirT 0:c00e6c923941 225
NirT 0:c00e6c923941 226 #define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */
NirT 0:c00e6c923941 227 #define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */
NirT 0:c00e6c923941 228
NirT 0:c00e6c923941 229 /* Includes ------------------------------------------------------------------*/
NirT 0:c00e6c923941 230 /**
NirT 0:c00e6c923941 231 * @brief Include module's header file
NirT 0:c00e6c923941 232 */
NirT 0:c00e6c923941 233
NirT 0:c00e6c923941 234 #ifdef HAL_RCC_MODULE_ENABLED
NirT 0:c00e6c923941 235 #include "stm32f7xx_hal_rcc.h"
NirT 0:c00e6c923941 236 #endif /* HAL_RCC_MODULE_ENABLED */
NirT 0:c00e6c923941 237
NirT 0:c00e6c923941 238 #ifdef HAL_GPIO_MODULE_ENABLED
NirT 0:c00e6c923941 239 #include "stm32f7xx_hal_gpio.h"
NirT 0:c00e6c923941 240 #endif /* HAL_GPIO_MODULE_ENABLED */
NirT 0:c00e6c923941 241
NirT 0:c00e6c923941 242 #ifdef HAL_DMA_MODULE_ENABLED
NirT 0:c00e6c923941 243 #include "stm32f7xx_hal_dma.h"
NirT 0:c00e6c923941 244 #endif /* HAL_DMA_MODULE_ENABLED */
NirT 0:c00e6c923941 245
NirT 0:c00e6c923941 246 #ifdef HAL_CORTEX_MODULE_ENABLED
NirT 0:c00e6c923941 247 #include "stm32f7xx_hal_cortex.h"
NirT 0:c00e6c923941 248 #endif /* HAL_CORTEX_MODULE_ENABLED */
NirT 0:c00e6c923941 249
NirT 0:c00e6c923941 250 #ifdef HAL_ADC_MODULE_ENABLED
NirT 0:c00e6c923941 251 #include "stm32f7xx_hal_adc.h"
NirT 0:c00e6c923941 252 #endif /* HAL_ADC_MODULE_ENABLED */
NirT 0:c00e6c923941 253
NirT 0:c00e6c923941 254 #ifdef HAL_CAN_MODULE_ENABLED
NirT 0:c00e6c923941 255 #include "stm32f7xx_hal_can.h"
NirT 0:c00e6c923941 256 #endif /* HAL_CAN_MODULE_ENABLED */
NirT 0:c00e6c923941 257
NirT 0:c00e6c923941 258 #ifdef HAL_CEC_MODULE_ENABLED
NirT 0:c00e6c923941 259 #include "stm32f7xx_hal_cec.h"
NirT 0:c00e6c923941 260 #endif /* HAL_CEC_MODULE_ENABLED */
NirT 0:c00e6c923941 261
NirT 0:c00e6c923941 262 #ifdef HAL_CRC_MODULE_ENABLED
NirT 0:c00e6c923941 263 #include "stm32f7xx_hal_crc.h"
NirT 0:c00e6c923941 264 #endif /* HAL_CRC_MODULE_ENABLED */
NirT 0:c00e6c923941 265
NirT 0:c00e6c923941 266 #ifdef HAL_CRYP_MODULE_ENABLED
NirT 0:c00e6c923941 267 #include "stm32f7xx_hal_cryp.h"
NirT 0:c00e6c923941 268 #endif /* HAL_CRYP_MODULE_ENABLED */
NirT 0:c00e6c923941 269
NirT 0:c00e6c923941 270 #ifdef HAL_DMA2D_MODULE_ENABLED
NirT 0:c00e6c923941 271 #include "stm32f7xx_hal_dma2d.h"
NirT 0:c00e6c923941 272 #endif /* HAL_DMA2D_MODULE_ENABLED */
NirT 0:c00e6c923941 273
NirT 0:c00e6c923941 274 #ifdef HAL_DAC_MODULE_ENABLED
NirT 0:c00e6c923941 275 #include "stm32f7xx_hal_dac.h"
NirT 0:c00e6c923941 276 #endif /* HAL_DAC_MODULE_ENABLED */
NirT 0:c00e6c923941 277
NirT 0:c00e6c923941 278 #ifdef HAL_DCMI_MODULE_ENABLED
NirT 0:c00e6c923941 279 #include "stm32f7xx_hal_dcmi.h"
NirT 0:c00e6c923941 280 #endif /* HAL_DCMI_MODULE_ENABLED */
NirT 0:c00e6c923941 281
NirT 0:c00e6c923941 282 #ifdef HAL_ETH_MODULE_ENABLED
NirT 0:c00e6c923941 283 #include "stm32f7xx_hal_eth.h"
NirT 0:c00e6c923941 284 #endif /* HAL_ETH_MODULE_ENABLED */
NirT 0:c00e6c923941 285
NirT 0:c00e6c923941 286 #ifdef HAL_FLASH_MODULE_ENABLED
NirT 0:c00e6c923941 287 #include "stm32f7xx_hal_flash.h"
NirT 0:c00e6c923941 288 #endif /* HAL_FLASH_MODULE_ENABLED */
NirT 0:c00e6c923941 289
NirT 0:c00e6c923941 290 #ifdef HAL_SRAM_MODULE_ENABLED
NirT 0:c00e6c923941 291 #include "stm32f7xx_hal_sram.h"
NirT 0:c00e6c923941 292 #endif /* HAL_SRAM_MODULE_ENABLED */
NirT 0:c00e6c923941 293
NirT 0:c00e6c923941 294 #ifdef HAL_NOR_MODULE_ENABLED
NirT 0:c00e6c923941 295 #include "stm32f7xx_hal_nor.h"
NirT 0:c00e6c923941 296 #endif /* HAL_NOR_MODULE_ENABLED */
NirT 0:c00e6c923941 297
NirT 0:c00e6c923941 298 #ifdef HAL_NAND_MODULE_ENABLED
NirT 0:c00e6c923941 299 #include "stm32f7xx_hal_nand.h"
NirT 0:c00e6c923941 300 #endif /* HAL_NAND_MODULE_ENABLED */
NirT 0:c00e6c923941 301
NirT 0:c00e6c923941 302 #ifdef HAL_SDRAM_MODULE_ENABLED
NirT 0:c00e6c923941 303 #include "stm32f7xx_hal_sdram.h"
NirT 0:c00e6c923941 304 #endif /* HAL_SDRAM_MODULE_ENABLED */
NirT 0:c00e6c923941 305
NirT 0:c00e6c923941 306 #ifdef HAL_HASH_MODULE_ENABLED
NirT 0:c00e6c923941 307 #include "stm32f7xx_hal_hash.h"
NirT 0:c00e6c923941 308 #endif /* HAL_HASH_MODULE_ENABLED */
NirT 0:c00e6c923941 309
NirT 0:c00e6c923941 310 #ifdef HAL_I2C_MODULE_ENABLED
NirT 0:c00e6c923941 311 #include "stm32f7xx_hal_i2c.h"
NirT 0:c00e6c923941 312 #endif /* HAL_I2C_MODULE_ENABLED */
NirT 0:c00e6c923941 313
NirT 0:c00e6c923941 314 #ifdef HAL_I2S_MODULE_ENABLED
NirT 0:c00e6c923941 315 #include "stm32f7xx_hal_i2s.h"
NirT 0:c00e6c923941 316 #endif /* HAL_I2S_MODULE_ENABLED */
NirT 0:c00e6c923941 317
NirT 0:c00e6c923941 318 #ifdef HAL_IWDG_MODULE_ENABLED
NirT 0:c00e6c923941 319 #include "stm32f7xx_hal_iwdg.h"
NirT 0:c00e6c923941 320 #endif /* HAL_IWDG_MODULE_ENABLED */
NirT 0:c00e6c923941 321
NirT 0:c00e6c923941 322 #ifdef HAL_LPTIM_MODULE_ENABLED
NirT 0:c00e6c923941 323 #include "stm32f7xx_hal_lptim.h"
NirT 0:c00e6c923941 324 #endif /* HAL_LPTIM_MODULE_ENABLED */
NirT 0:c00e6c923941 325
NirT 0:c00e6c923941 326 #ifdef HAL_LTDC_MODULE_ENABLED
NirT 0:c00e6c923941 327 #include "stm32f7xx_hal_ltdc.h"
NirT 0:c00e6c923941 328 #endif /* HAL_LTDC_MODULE_ENABLED */
NirT 0:c00e6c923941 329
NirT 0:c00e6c923941 330 #ifdef HAL_PWR_MODULE_ENABLED
NirT 0:c00e6c923941 331 #include "stm32f7xx_hal_pwr.h"
NirT 0:c00e6c923941 332 #endif /* HAL_PWR_MODULE_ENABLED */
NirT 0:c00e6c923941 333
NirT 0:c00e6c923941 334 #ifdef HAL_QSPI_MODULE_ENABLED
NirT 0:c00e6c923941 335 #include "stm32f7xx_hal_qspi.h"
NirT 0:c00e6c923941 336 #endif /* HAL_QSPI_MODULE_ENABLED */
NirT 0:c00e6c923941 337
NirT 0:c00e6c923941 338 #ifdef HAL_RNG_MODULE_ENABLED
NirT 0:c00e6c923941 339 #include "stm32f7xx_hal_rng.h"
NirT 0:c00e6c923941 340 #endif /* HAL_RNG_MODULE_ENABLED */
NirT 0:c00e6c923941 341
NirT 0:c00e6c923941 342 #ifdef HAL_RTC_MODULE_ENABLED
NirT 0:c00e6c923941 343 #include "stm32f7xx_hal_rtc.h"
NirT 0:c00e6c923941 344 #endif /* HAL_RTC_MODULE_ENABLED */
NirT 0:c00e6c923941 345
NirT 0:c00e6c923941 346 #ifdef HAL_SAI_MODULE_ENABLED
NirT 0:c00e6c923941 347 #include "stm32f7xx_hal_sai.h"
NirT 0:c00e6c923941 348 #endif /* HAL_SAI_MODULE_ENABLED */
NirT 0:c00e6c923941 349
NirT 0:c00e6c923941 350 #ifdef HAL_SD_MODULE_ENABLED
NirT 0:c00e6c923941 351 #include "stm32f7xx_hal_sd.h"
NirT 0:c00e6c923941 352 #endif /* HAL_SD_MODULE_ENABLED */
NirT 0:c00e6c923941 353
NirT 0:c00e6c923941 354 #ifdef HAL_SPDIFRX_MODULE_ENABLED
NirT 0:c00e6c923941 355 #include "stm32f7xx_hal_spdifrx.h"
NirT 0:c00e6c923941 356 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
NirT 0:c00e6c923941 357
NirT 0:c00e6c923941 358 #ifdef HAL_SPI_MODULE_ENABLED
NirT 0:c00e6c923941 359 #include "stm32f7xx_hal_spi.h"
NirT 0:c00e6c923941 360 #endif /* HAL_SPI_MODULE_ENABLED */
NirT 0:c00e6c923941 361
NirT 0:c00e6c923941 362 #ifdef HAL_TIM_MODULE_ENABLED
NirT 0:c00e6c923941 363 #include "stm32f7xx_hal_tim.h"
NirT 0:c00e6c923941 364 #endif /* HAL_TIM_MODULE_ENABLED */
NirT 0:c00e6c923941 365
NirT 0:c00e6c923941 366 #ifdef HAL_UART_MODULE_ENABLED
NirT 0:c00e6c923941 367 #include "stm32f7xx_hal_uart.h"
NirT 0:c00e6c923941 368 #endif /* HAL_UART_MODULE_ENABLED */
NirT 0:c00e6c923941 369
NirT 0:c00e6c923941 370 #ifdef HAL_USART_MODULE_ENABLED
NirT 0:c00e6c923941 371 #include "stm32f7xx_hal_usart.h"
NirT 0:c00e6c923941 372 #endif /* HAL_USART_MODULE_ENABLED */
NirT 0:c00e6c923941 373
NirT 0:c00e6c923941 374 #ifdef HAL_IRDA_MODULE_ENABLED
NirT 0:c00e6c923941 375 #include "stm32f7xx_hal_irda.h"
NirT 0:c00e6c923941 376 #endif /* HAL_IRDA_MODULE_ENABLED */
NirT 0:c00e6c923941 377
NirT 0:c00e6c923941 378 #ifdef HAL_SMARTCARD_MODULE_ENABLED
NirT 0:c00e6c923941 379 #include "stm32f7xx_hal_smartcard.h"
NirT 0:c00e6c923941 380 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
NirT 0:c00e6c923941 381
NirT 0:c00e6c923941 382 #ifdef HAL_WWDG_MODULE_ENABLED
NirT 0:c00e6c923941 383 #include "stm32f7xx_hal_wwdg.h"
NirT 0:c00e6c923941 384 #endif /* HAL_WWDG_MODULE_ENABLED */
NirT 0:c00e6c923941 385
NirT 0:c00e6c923941 386 #ifdef HAL_PCD_MODULE_ENABLED
NirT 0:c00e6c923941 387 #include "stm32f7xx_hal_pcd.h"
NirT 0:c00e6c923941 388 #endif /* HAL_PCD_MODULE_ENABLED */
NirT 0:c00e6c923941 389
NirT 0:c00e6c923941 390 #ifdef HAL_HCD_MODULE_ENABLED
NirT 0:c00e6c923941 391 #include "stm32f7xx_hal_hcd.h"
NirT 0:c00e6c923941 392 #endif /* HAL_HCD_MODULE_ENABLED */
NirT 0:c00e6c923941 393
NirT 0:c00e6c923941 394 /* Exported macro ------------------------------------------------------------*/
NirT 0:c00e6c923941 395 #ifdef USE_FULL_ASSERT
NirT 0:c00e6c923941 396 /**
NirT 0:c00e6c923941 397 * @brief The assert_param macro is used for function's parameters check.
NirT 0:c00e6c923941 398 * @param expr: If expr is false, it calls assert_failed function
NirT 0:c00e6c923941 399 * which reports the name of the source file and the source
NirT 0:c00e6c923941 400 * line number of the call that failed.
NirT 0:c00e6c923941 401 * If expr is true, it returns no value.
NirT 0:c00e6c923941 402 * @retval None
NirT 0:c00e6c923941 403 */
NirT 0:c00e6c923941 404 #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
NirT 0:c00e6c923941 405 /* Exported functions ------------------------------------------------------- */
NirT 0:c00e6c923941 406 void assert_failed(uint8_t* file, uint32_t line);
NirT 0:c00e6c923941 407 #else
NirT 0:c00e6c923941 408 #define assert_param(expr) ((void)0)
NirT 0:c00e6c923941 409 #endif /* USE_FULL_ASSERT */
NirT 0:c00e6c923941 410
NirT 0:c00e6c923941 411 /**
NirT 0:c00e6c923941 412 * @}
NirT 0:c00e6c923941 413 */
NirT 0:c00e6c923941 414
NirT 0:c00e6c923941 415 /**
NirT 0:c00e6c923941 416 * @}
NirT 0:c00e6c923941 417 */
NirT 0:c00e6c923941 418
NirT 0:c00e6c923941 419 #ifdef __cplusplus
NirT 0:c00e6c923941 420 }
NirT 0:c00e6c923941 421 #endif
NirT 0:c00e6c923941 422
NirT 0:c00e6c923941 423 #endif /* __STM32F7xx_HAL_CONF_H */
NirT 0:c00e6c923941 424
NirT 0:c00e6c923941 425
NirT 0:c00e6c923941 426 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/