Toyomasa Watarai / SPI_TFT

Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Fork of SPI_TFT by Peter Drescher

SPI_TFT.cpp@19:33b5a7d74e66, 2017-02-21 (annotated)

Committer:
MACRUM
Date:
Tue Feb 21 13:49:57 2017 +0000
Revision:
19:33b5a7d74e66
Parent:
18:52cbeede86f0 
Change SPI speed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 8:65a4de035c3c 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 8:65a4de035c3c 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 8:65a4de035c3c 3 *
dreschpe 8:65a4de035c3c 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 8:65a4de035c3c 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 8:65a4de035c3c 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 8:65a4de035c3c 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 8:65a4de035c3c 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 8:65a4de035c3c 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 8:65a4de035c3c 10 * THE SOFTWARE.
dreschpe 8:65a4de035c3c 11 */
dreschpe 8:65a4de035c3c 12
dreschpe 8:65a4de035c3c 13
dreschpe 8:65a4de035c3c 14 // fix bmp padding for Bitmap function
dreschpe 8:65a4de035c3c 15 // speed up pixel
dreschpe 8:65a4de035c3c 16 // 30.12.11 fix cls
dreschpe 8:65a4de035c3c 17 // 11.03.12 use DMA to speed up
dreschpe 8:65a4de035c3c 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 8:65a4de035c3c 19 // 06.04.12 fix SSEL CS problem
dreschpe 8:65a4de035c3c 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 8:65a4de035c3c 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 13:2c91cb947161 22 // 21.09.12 fix Bug in BMP_16
dreschpe 8:65a4de035c3c 23 // 11.10.12 patch from Hans Bergles to get SPI1 working again
dreschpe 8:65a4de035c3c 24 // 03.02.13 add a switch to switch off DMA use for LPC11U24
dreschpe 13:2c91cb947161 25 // 04.03.13 add support for new Kinetis board
dreschpe 16:2efcbb2814fa 26 // 25.03.13 fix Bug in bitmap for Kinetis board
dreschpe 18:52cbeede86f0 27 // 18.10.13 Better Circle function from Michael Ammann
dreschpe 8:65a4de035c3c 28
dreschpe 8:65a4de035c3c 29 #include "SPI_TFT.h"
dreschpe 8:65a4de035c3c 30 #include "mbed.h"
dreschpe 8:65a4de035c3c 31
dreschpe 8:65a4de035c3c 32 #define BPP 16 // Bits per pixel
dreschpe 13:2c91cb947161 33
dreschpe 13:2c91cb947161 34 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 35 #define USE_DMA // we use dma to speed up
dreschpe 14:ea3206e8e3bd 36 #define NO_MBED_LIB // we write direct to the SPI register to speed up
dreschpe 8:65a4de035c3c 37 #endif
dreschpe 8:65a4de035c3c 38
dreschpe 13:2c91cb947161 39 #if defined NO_DMA // if LPC1768 user want no DMA
dreschpe 8:65a4de035c3c 40 #undef USE_DMA
dreschpe 8:65a4de035c3c 41 #endif
dreschpe 13:2c91cb947161 42
dreschpe 8:65a4de035c3c 43
dreschpe 8:65a4de035c3c 44 //extern Serial pc;
dreschpe 8:65a4de035c3c 45 //extern DigitalOut xx; // debug !!
dreschpe 8:65a4de035c3c 46
dreschpe 8:65a4de035c3c 47 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 8:65a4de035c3c 48 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 8:65a4de035c3c 49 {
dreschpe 8:65a4de035c3c 50 orientation = 0;
dreschpe 8:65a4de035c3c 51 char_x = 0;
dreschpe 14:ea3206e8e3bd 52 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 53 if (mosi == p11 || mosi == P0_18){
dreschpe 14:ea3206e8e3bd 54 spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 14:ea3206e8e3bd 55 }
dreschpe 14:ea3206e8e3bd 56 else {
dreschpe 14:ea3206e8e3bd 57 spi_port = 1;
dreschpe 14:ea3206e8e3bd 58 }
dreschpe 14:ea3206e8e3bd 59 #endif
dreschpe 8:65a4de035c3c 60 tft_reset();
dreschpe 8:65a4de035c3c 61 }
dreschpe 8:65a4de035c3c 62
dreschpe 8:65a4de035c3c 63 int SPI_TFT::width()
dreschpe 8:65a4de035c3c 64 {
dreschpe 8:65a4de035c3c 65 if (orientation == 0 || orientation == 2) return 240;
dreschpe 8:65a4de035c3c 66 else return 320;
dreschpe 8:65a4de035c3c 67 }
dreschpe 8:65a4de035c3c 68
dreschpe 8:65a4de035c3c 69
dreschpe 8:65a4de035c3c 70 int SPI_TFT::height()
dreschpe 8:65a4de035c3c 71 {
dreschpe 8:65a4de035c3c 72 if (orientation == 0 || orientation == 2) return 320;
dreschpe 8:65a4de035c3c 73 else return 240;
dreschpe 8:65a4de035c3c 74 }
dreschpe 8:65a4de035c3c 75
dreschpe 8:65a4de035c3c 76
dreschpe 8:65a4de035c3c 77 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 8:65a4de035c3c 78 {
dreschpe 8:65a4de035c3c 79 orientation = o;
dreschpe 8:65a4de035c3c 80 switch (orientation) {
dreschpe 8:65a4de035c3c 81 case 0:
dreschpe 8:65a4de035c3c 82 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 83 break;
dreschpe 8:65a4de035c3c 84 case 1:
dreschpe 8:65a4de035c3c 85 wr_reg(0x16, 0x68);
dreschpe 8:65a4de035c3c 86 break;
dreschpe 8:65a4de035c3c 87 case 2:
dreschpe 8:65a4de035c3c 88 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 89 break;
dreschpe 8:65a4de035c3c 90 case 3:
dreschpe 8:65a4de035c3c 91 wr_reg(0x16, 0xA8);
dreschpe 8:65a4de035c3c 92 break;
dreschpe 8:65a4de035c3c 93 }
dreschpe 8:65a4de035c3c 94 WindowMax();
dreschpe 8:65a4de035c3c 95 }
dreschpe 8:65a4de035c3c 96
dreschpe 8:65a4de035c3c 97
dreschpe 8:65a4de035c3c 98 // write command to tft register
dreschpe 8:65a4de035c3c 99
dreschpe 8:65a4de035c3c 100 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 8:65a4de035c3c 101 {
dreschpe 8:65a4de035c3c 102 _cs = 0;
dreschpe 14:ea3206e8e3bd 103 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 104 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 105 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 106 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 107 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 108 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 109 do {
dreschpe 14:ea3206e8e3bd 110 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 111 } else {
dreschpe 14:ea3206e8e3bd 112 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 113 do {
dreschpe 14:ea3206e8e3bd 114 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 115 }
dreschpe 14:ea3206e8e3bd 116 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 117 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 118 _spi.write(0x70);
dreschpe 14:ea3206e8e3bd 119 _spi.write(cmd);
dreschpe 14:ea3206e8e3bd 120 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 121 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 122 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 123 _spi.write(spi_d); // mbed lib
dreschpe 14:ea3206e8e3bd 124 #endif
dreschpe 14:ea3206e8e3bd 125 #endif
dreschpe 8:65a4de035c3c 126 _cs = 1;
dreschpe 8:65a4de035c3c 127 }
dreschpe 8:65a4de035c3c 128
dreschpe 8:65a4de035c3c 129
dreschpe 13:2c91cb947161 130 // write data to tft register
dreschpe 8:65a4de035c3c 131 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 8:65a4de035c3c 132 {
dreschpe 14:ea3206e8e3bd 133 _cs = 0;
dreschpe 14:ea3206e8e3bd 134 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 135 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 136 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 137 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 138 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 139 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 140 do {
dreschpe 14:ea3206e8e3bd 141 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 142 } else {
dreschpe 14:ea3206e8e3bd 143 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 144 do {
dreschpe 14:ea3206e8e3bd 145 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 146 }
dreschpe 14:ea3206e8e3bd 147 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 148 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 149 _spi.write(0x72);
dreschpe 14:ea3206e8e3bd 150 _spi.write(dat);
dreschpe 14:ea3206e8e3bd 151 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 152 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 153 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 154 _spi.write(spi_d);
dreschpe 14:ea3206e8e3bd 155 #endif
dreschpe 14:ea3206e8e3bd 156 #endif
dreschpe 8:65a4de035c3c 157 _cs = 1;
dreschpe 8:65a4de035c3c 158 }
dreschpe 8:65a4de035c3c 159
dreschpe 8:65a4de035c3c 160
dreschpe 8:65a4de035c3c 161
dreschpe 8:65a4de035c3c 162 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 8:65a4de035c3c 163 // This is a bug - ?
dreschpe 14:ea3206e8e3bd 164 // A read will return 0 at the moment
dreschpe 8:65a4de035c3c 165
dreschpe 8:65a4de035c3c 166 unsigned short SPI_TFT::rd_dat (void)
dreschpe 8:65a4de035c3c 167 {
dreschpe 8:65a4de035c3c 168 unsigned short val = 0;
dreschpe 8:65a4de035c3c 169
dreschpe 8:65a4de035c3c 170 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 8:65a4de035c3c 171 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 8:65a4de035c3c 172 return (val);
dreschpe 8:65a4de035c3c 173 }
dreschpe 8:65a4de035c3c 174
dreschpe 13:2c91cb947161 175 // write to a TFT register
dreschpe 8:65a4de035c3c 176 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 8:65a4de035c3c 177 {
MACRUM 19:33b5a7d74e66 178 //wr_cmd(reg);
MACRUM 19:33b5a7d74e66 179 //wr_dat(val);
MACRUM 19:33b5a7d74e66 180 _cs = 0;
MACRUM 19:33b5a7d74e66 181 _spi.write(0x7000 | reg);
MACRUM 19:33b5a7d74e66 182 _cs = 1;
MACRUM 19:33b5a7d74e66 183 _cs = 0;
MACRUM 19:33b5a7d74e66 184 _spi.write(0x7200 | val);
MACRUM 19:33b5a7d74e66 185 _cs = 1;
dreschpe 8:65a4de035c3c 186 }
dreschpe 8:65a4de035c3c 187
dreschpe 13:2c91cb947161 188 // read from a TFT register
dreschpe 8:65a4de035c3c 189 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 8:65a4de035c3c 190 {
dreschpe 8:65a4de035c3c 191 wr_cmd(reg);
dreschpe 8:65a4de035c3c 192 return(rd_dat());
dreschpe 8:65a4de035c3c 193 }
dreschpe 8:65a4de035c3c 194
dreschpe 13:2c91cb947161 195 // setup TFT controller - this is called by constructor
dreschpe 8:65a4de035c3c 196 void SPI_TFT::tft_reset()
dreschpe 8:65a4de035c3c 197 {
dreschpe 13:2c91cb947161 198 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 199 _spi.format(8,3);
dreschpe 13:2c91cb947161 200 #else // 16 Bit SPI
dreschpe 8:65a4de035c3c 201 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 13:2c91cb947161 202 #endif
MACRUM 19:33b5a7d74e66 203 //_spi.frequency(48000000); // 48 Mhz SPI clock
MACRUM 19:33b5a7d74e66 204 _spi.frequency(25000000);
dreschpe 8:65a4de035c3c 205 _cs = 1; // cs high
dreschpe 8:65a4de035c3c 206 _reset = 0; // display reset
dreschpe 8:65a4de035c3c 207
dreschpe 8:65a4de035c3c 208 wait_us(50);
dreschpe 8:65a4de035c3c 209 _reset = 1; // end reset
dreschpe 8:65a4de035c3c 210 wait_ms(5);
dreschpe 8:65a4de035c3c 211
dreschpe 8:65a4de035c3c 212 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 8:65a4de035c3c 213 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 8:65a4de035c3c 214 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 8:65a4de035c3c 215 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 8:65a4de035c3c 216 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 8:65a4de035c3c 217 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 8:65a4de035c3c 218 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 8:65a4de035c3c 219 wr_reg(0xF1, 0x01); /* */
dreschpe 8:65a4de035c3c 220 wr_reg(0xF2, 0x10); /* */
dreschpe 8:65a4de035c3c 221 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 8:65a4de035c3c 222
dreschpe 8:65a4de035c3c 223 /* Power On sequence ---------------------------------------------------------*/
dreschpe 8:65a4de035c3c 224 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 8:65a4de035c3c 225 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 8:65a4de035c3c 226 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 8:65a4de035c3c 227 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 8:65a4de035c3c 228 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 8:65a4de035c3c 229
dreschpe 8:65a4de035c3c 230 /* Gamma settings -----------------------------------------------------------*/
dreschpe 13:2c91cb947161 231 wr_reg(0x40,0x00); // default setup
dreschpe 8:65a4de035c3c 232 wr_reg(0x41,0x00); //
dreschpe 8:65a4de035c3c 233 wr_reg(0x42,0x01); //
dreschpe 8:65a4de035c3c 234 wr_reg(0x43,0x13); //
dreschpe 8:65a4de035c3c 235 wr_reg(0x44,0x10); //
dreschpe 8:65a4de035c3c 236 wr_reg(0x45,0x26); //
dreschpe 8:65a4de035c3c 237 wr_reg(0x46,0x08); //
dreschpe 8:65a4de035c3c 238 wr_reg(0x47,0x51); //
dreschpe 8:65a4de035c3c 239 wr_reg(0x48,0x02); //
dreschpe 8:65a4de035c3c 240 wr_reg(0x49,0x12); //
dreschpe 8:65a4de035c3c 241 wr_reg(0x4A,0x18); //
dreschpe 8:65a4de035c3c 242 wr_reg(0x4B,0x19); //
dreschpe 8:65a4de035c3c 243 wr_reg(0x4C,0x14); //
dreschpe 8:65a4de035c3c 244 wr_reg(0x50,0x19); //
dreschpe 8:65a4de035c3c 245 wr_reg(0x51,0x2F); //
dreschpe 8:65a4de035c3c 246 wr_reg(0x52,0x2C); //
dreschpe 8:65a4de035c3c 247 wr_reg(0x53,0x3E); //
dreschpe 8:65a4de035c3c 248 wr_reg(0x54,0x3F); //
dreschpe 8:65a4de035c3c 249 wr_reg(0x55,0x3F); //
dreschpe 8:65a4de035c3c 250 wr_reg(0x56,0x2E); //
dreschpe 8:65a4de035c3c 251 wr_reg(0x57,0x77); //
dreschpe 8:65a4de035c3c 252 wr_reg(0x58,0x0B); //
dreschpe 8:65a4de035c3c 253 wr_reg(0x59,0x06); //
dreschpe 8:65a4de035c3c 254 wr_reg(0x5A,0x07); //
dreschpe 8:65a4de035c3c 255 wr_reg(0x5B,0x0D); //
dreschpe 8:65a4de035c3c 256 wr_reg(0x5C,0x1D); //
dreschpe 8:65a4de035c3c 257 wr_reg(0x5D,0xCC); //
dreschpe 8:65a4de035c3c 258
dreschpe 8:65a4de035c3c 259 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 14:ea3206e8e3bd 260 wr_reg(0x18, 0x36); /* OSC Control 1 */
dreschpe 14:ea3206e8e3bd 261 wr_reg(0x19, 0x01); /* OSC Control 2 */
dreschpe 14:ea3206e8e3bd 262 wr_reg(0x01, 0x00); /* Display Mode Control */
dreschpe 14:ea3206e8e3bd 263 wr_reg(0x1F, 0x88); /* Power Control 6 */
dreschpe 8:65a4de035c3c 264 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 265 wr_reg(0x1F, 0x80); /* Power Control 6 */
dreschpe 14:ea3206e8e3bd 266 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 267 wr_reg(0x1F, 0x90); /* Power Control 6 */
dreschpe 8:65a4de035c3c 268 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 269 wr_reg(0x1F, 0xD0); /* Power Control 6 */
dreschpe 8:65a4de035c3c 270 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 271
dreschpe 14:ea3206e8e3bd 272 wr_reg(0x17, 0x05); /* Colmod 16Bit/Pixel */
dreschpe 8:65a4de035c3c 273
dreschpe 14:ea3206e8e3bd 274 wr_reg(0x36, 0x00); /* Panel Characteristic */
dreschpe 14:ea3206e8e3bd 275 wr_reg(0x28, 0x38); /* Display Control 3 */
dreschpe 8:65a4de035c3c 276 wait_ms(40);
dreschpe 14:ea3206e8e3bd 277 wr_reg(0x28, 0x3C); /* Display Control 3 */
dreschpe 8:65a4de035c3c 278 switch (orientation) {
dreschpe 8:65a4de035c3c 279 case 0:
dreschpe 14:ea3206e8e3bd 280 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 281 break;
dreschpe 8:65a4de035c3c 282 case 2:
dreschpe 14:ea3206e8e3bd 283 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 284 break;
dreschpe 8:65a4de035c3c 285 case 3:
dreschpe 14:ea3206e8e3bd 286 wr_reg(0x16, 0xA8);
dreschpe 14:ea3206e8e3bd 287 break;
dreschpe 14:ea3206e8e3bd 288 case 1:
dreschpe 14:ea3206e8e3bd 289 default:
dreschpe 14:ea3206e8e3bd 290 wr_reg(0x16, 0x68);
dreschpe 14:ea3206e8e3bd 291 break;
dreschpe 14:ea3206e8e3bd 292
dreschpe 8:65a4de035c3c 293 }
dreschpe 13:2c91cb947161 294 #if defined USE_DMA // setup DMA channel 0
dreschpe 13:2c91cb947161 295 LPC_SC->PCONP |= (1UL << 29); // Power up the GPDMA.
dreschpe 8:65a4de035c3c 296 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 13:2c91cb947161 297 LPC_GPDMA->DMACIntTCClear = 0x1; // Reset the Interrupt status
dreschpe 8:65a4de035c3c 298 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 299 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 8:65a4de035c3c 300 #endif
dreschpe 8:65a4de035c3c 301 WindowMax ();
dreschpe 8:65a4de035c3c 302 }
dreschpe 8:65a4de035c3c 303
dreschpe 13:2c91cb947161 304 // Set one pixel
dreschpe 8:65a4de035c3c 305 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 8:65a4de035c3c 306 {
dreschpe 8:65a4de035c3c 307 wr_reg(0x03, (x >> 0));
dreschpe 8:65a4de035c3c 308 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 309 wr_reg(0x07, (y >> 0));
dreschpe 8:65a4de035c3c 310 wr_reg(0x06, (y >> 8));
dreschpe 8:65a4de035c3c 311 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 312 _cs = 0;
dreschpe 14:ea3206e8e3bd 313 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 314 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 315 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 316 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 317 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 318 LPC_SSP0->DR = color; // Pixel
dreschpe 14:ea3206e8e3bd 319 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 320 do {
dreschpe 14:ea3206e8e3bd 321 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 322 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 323 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 324 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 325 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 326 LPC_SSP1->DR = color;
dreschpe 14:ea3206e8e3bd 327 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 328 do {
dreschpe 14:ea3206e8e3bd 329 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 330 }
dreschpe 14:ea3206e8e3bd 331 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 332
dreschpe 14:ea3206e8e3bd 333 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 334 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 335 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 336 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 337 #else
dreschpe 14:ea3206e8e3bd 338 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 339 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 340 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 341 _spi.write(color); // Write D0..D15
dreschpe 14:ea3206e8e3bd 342 #endif
dreschpe 14:ea3206e8e3bd 343 #endif
dreschpe 8:65a4de035c3c 344 _cs = 1;
dreschpe 8:65a4de035c3c 345 }
dreschpe 8:65a4de035c3c 346
dreschpe 13:2c91cb947161 347 // define draw area
dreschpe 8:65a4de035c3c 348 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 8:65a4de035c3c 349 {
dreschpe 8:65a4de035c3c 350 wr_reg(0x03, x );
dreschpe 8:65a4de035c3c 351 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 352 wr_reg(0x05, x+w-1 );
dreschpe 8:65a4de035c3c 353 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 8:65a4de035c3c 354 wr_reg(0x07, y );
dreschpe 8:65a4de035c3c 355 wr_reg(0x06, ( y >> 8));
dreschpe 8:65a4de035c3c 356 wr_reg(0x09, ( y+h-1 ));
dreschpe 8:65a4de035c3c 357 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 8:65a4de035c3c 358 }
dreschpe 8:65a4de035c3c 359
dreschpe 13:2c91cb947161 360 // set draw area to max
dreschpe 8:65a4de035c3c 361 void SPI_TFT::WindowMax (void)
dreschpe 8:65a4de035c3c 362 {
dreschpe 8:65a4de035c3c 363 window (0, 0, width(), height());
dreschpe 8:65a4de035c3c 364 }
dreschpe 8:65a4de035c3c 365
dreschpe 8:65a4de035c3c 366
dreschpe 13:2c91cb947161 367 // clear screen
dreschpe 8:65a4de035c3c 368 void SPI_TFT::cls (void)
dreschpe 8:65a4de035c3c 369 {
MACRUM 19:33b5a7d74e66 370 // fprintf(stderr, "CLS \n\r");
dreschpe 8:65a4de035c3c 371 int pixel = ( width() * height());
dreschpe 14:ea3206e8e3bd 372 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 373 int dma_count;
dreschpe 14:ea3206e8e3bd 374 int color = _background;
dreschpe 14:ea3206e8e3bd 375 #endif
dreschpe 8:65a4de035c3c 376 WindowMax();
dreschpe 8:65a4de035c3c 377 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 378
dreschpe 14:ea3206e8e3bd 379 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 380 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 381 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 382 #endif
dreschpe 14:ea3206e8e3bd 383 _cs = 0;
dreschpe 14:ea3206e8e3bd 384 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 385 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 386 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 387 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 388 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 389 #endif
dreschpe 14:ea3206e8e3bd 390 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 391 LPC_SSP0->DR = 0x72; // start byte
dreschpe 14:ea3206e8e3bd 392 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 393 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 394 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 395 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 396 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 397 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 398 #endif
dreschpe 14:ea3206e8e3bd 399 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 400 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 401 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 402 }
dreschpe 8:65a4de035c3c 403
dreschpe 14:ea3206e8e3bd 404 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 405 // start DMA
dreschpe 14:ea3206e8e3bd 406 do {
dreschpe 14:ea3206e8e3bd 407 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 408 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 409 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 410 } else {
dreschpe 14:ea3206e8e3bd 411 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 412 pixel = 0;
dreschpe 14:ea3206e8e3bd 413 }
dreschpe 14:ea3206e8e3bd 414 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 415 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 416 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 417 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 418 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 14:ea3206e8e3bd 419 do {
dreschpe 14:ea3206e8e3bd 420 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 421 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 422 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 423 do {
dreschpe 14:ea3206e8e3bd 424 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 425 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 426 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 427 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 428 do {
dreschpe 14:ea3206e8e3bd 429 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 430 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 431 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 432 }
dreschpe 13:2c91cb947161 433
dreschpe 14:ea3206e8e3bd 434 #else // no DMA
dreschpe 14:ea3206e8e3bd 435 unsigned int i;
dreschpe 14:ea3206e8e3bd 436 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 437 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 438 #endif
dreschpe 14:ea3206e8e3bd 439
dreschpe 14:ea3206e8e3bd 440 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 441 _cs = 0;
dreschpe 14:ea3206e8e3bd 442 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 443 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 444 unsigned int i;
dreschpe 14:ea3206e8e3bd 445 for (i = 0; i < ( width() * height()); i++) {
dreschpe 14:ea3206e8e3bd 446 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 447 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 448 }
dreschpe 14:ea3206e8e3bd 449 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 450 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 451 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 452 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 453 unsigned int i;
dreschpe 14:ea3206e8e3bd 454 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 455 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 456 #endif
dreschpe 14:ea3206e8e3bd 457 #endif
dreschpe 8:65a4de035c3c 458 _cs = 1;
dreschpe 8:65a4de035c3c 459 }
dreschpe 8:65a4de035c3c 460
dreschpe 8:65a4de035c3c 461 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 18:52cbeede86f0 462 {
dreschpe 18:52cbeede86f0 463 int x = -r, y = 0, err = 2-2*r, e2;
dreschpe 18:52cbeede86f0 464 do {
dreschpe 18:52cbeede86f0 465 pixel(x0-x, y0+y,color);
dreschpe 18:52cbeede86f0 466 pixel(x0+x, y0+y,color);
dreschpe 18:52cbeede86f0 467 pixel(x0+x, y0-y,color);
dreschpe 18:52cbeede86f0 468 pixel(x0-x, y0-y,color);
dreschpe 18:52cbeede86f0 469 e2 = err;
dreschpe 18:52cbeede86f0 470 if (e2 <= y) {
dreschpe 18:52cbeede86f0 471 err += ++y*2+1;
dreschpe 18:52cbeede86f0 472 if (-x == y && e2 <= x) e2 = 0;
dreschpe 18:52cbeede86f0 473 }
dreschpe 18:52cbeede86f0 474 if (e2 > x) err += ++x*2+1;
dreschpe 18:52cbeede86f0 475 } while (x <= 0);
dreschpe 18:52cbeede86f0 476
dreschpe 18:52cbeede86f0 477 }
dreschpe 18:52cbeede86f0 478
dreschpe 18:52cbeede86f0 479 void SPI_TFT::fillcircle(int x0, int y0, int r, int color)
dreschpe 8:65a4de035c3c 480 {
dreschpe 18:52cbeede86f0 481 int x = -r, y = 0, err = 2-2*r, e2;
dreschpe 18:52cbeede86f0 482 do {
dreschpe 18:52cbeede86f0 483 vline(x0-x, y0-y, y0+y, color);
dreschpe 18:52cbeede86f0 484 vline(x0+x, y0-y, y0+y, color);
dreschpe 18:52cbeede86f0 485 e2 = err;
dreschpe 18:52cbeede86f0 486 if (e2 <= y) {
dreschpe 18:52cbeede86f0 487 err += ++y*2+1;
dreschpe 18:52cbeede86f0 488 if (-x == y && e2 <= x) e2 = 0;
dreschpe 8:65a4de035c3c 489 }
dreschpe 18:52cbeede86f0 490 if (e2 > x) err += ++x*2+1;
dreschpe 18:52cbeede86f0 491 } while (x <= 0);
dreschpe 8:65a4de035c3c 492 }
dreschpe 8:65a4de035c3c 493
dreschpe 8:65a4de035c3c 494
dreschpe 13:2c91cb947161 495 // draw horizontal line
dreschpe 8:65a4de035c3c 496 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 8:65a4de035c3c 497 {
dreschpe 11:9bb71766cafc 498 int w;
dreschpe 8:65a4de035c3c 499 w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 500 window(x0,y,w,1);
dreschpe 8:65a4de035c3c 501 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 502 _cs = 0;
dreschpe 14:ea3206e8e3bd 503 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 504 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 505 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 506 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 507 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 508 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 509 #endif
dreschpe 14:ea3206e8e3bd 510 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 511 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 512 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 513 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 514 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 515 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 516 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 517 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 518 #endif
dreschpe 14:ea3206e8e3bd 519 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 520 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 521 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 522 }
dreschpe 14:ea3206e8e3bd 523 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 524 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 525 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 526 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 527 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 528 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 529 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 14:ea3206e8e3bd 530 do {
dreschpe 14:ea3206e8e3bd 531 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 532 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 533 do {
dreschpe 14:ea3206e8e3bd 534 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 535 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 536 do {
dreschpe 14:ea3206e8e3bd 537 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 538 }
dreschpe 14:ea3206e8e3bd 539 #else // no DMA
dreschpe 14:ea3206e8e3bd 540 int i;
dreschpe 14:ea3206e8e3bd 541 for (i=0; i<w; i++) {
dreschpe 14:ea3206e8e3bd 542 _spi.write(color);
dreschpe 14:ea3206e8e3bd 543 }
dreschpe 14:ea3206e8e3bd 544 #endif
dreschpe 14:ea3206e8e3bd 545 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 546 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 547 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 548 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 549 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 550 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 551 }
dreschpe 14:ea3206e8e3bd 552 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 553 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 554 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 555 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 556 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 557 _spi.write(color);
dreschpe 14:ea3206e8e3bd 558 }
dreschpe 14:ea3206e8e3bd 559 #endif
dreschpe 14:ea3206e8e3bd 560 #endif
dreschpe 8:65a4de035c3c 561 _cs = 1;
dreschpe 8:65a4de035c3c 562 WindowMax();
dreschpe 8:65a4de035c3c 563 return;
dreschpe 8:65a4de035c3c 564 }
dreschpe 8:65a4de035c3c 565
dreschpe 13:2c91cb947161 566 // draw vertical line
dreschpe 8:65a4de035c3c 567 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 8:65a4de035c3c 568 {
dreschpe 8:65a4de035c3c 569 int h;
dreschpe 8:65a4de035c3c 570 h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 571 window(x,y0,1,h);
dreschpe 8:65a4de035c3c 572 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 573 _cs = 0;
dreschpe 14:ea3206e8e3bd 574 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 575 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 576 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 577 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 578 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 579 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 580 #endif
dreschpe 14:ea3206e8e3bd 581 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 582 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 583 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 584 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 585 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 586 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 587 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 588 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 589 #endif
dreschpe 14:ea3206e8e3bd 590 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 591 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 592 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 593 }
dreschpe 14:ea3206e8e3bd 594 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 595 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 596 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 597 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 598 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 599 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 600 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 601 do {
dreschpe 14:ea3206e8e3bd 602 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 603
dreschpe 14:ea3206e8e3bd 604 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 605 do {
dreschpe 14:ea3206e8e3bd 606 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 607 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 608 do {
dreschpe 14:ea3206e8e3bd 609 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 610 }
dreschpe 14:ea3206e8e3bd 611 #else // no DMA
dreschpe 14:ea3206e8e3bd 612 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 613 _spi.write(color);
dreschpe 14:ea3206e8e3bd 614 }
dreschpe 14:ea3206e8e3bd 615 #endif
dreschpe 14:ea3206e8e3bd 616 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 617 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 618 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 619 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 620 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 621 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 622 }
dreschpe 14:ea3206e8e3bd 623 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 624 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 625 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 626 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 627 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 628 _spi.write(color);
dreschpe 14:ea3206e8e3bd 629 }
dreschpe 14:ea3206e8e3bd 630 #endif
dreschpe 14:ea3206e8e3bd 631 #endif
dreschpe 8:65a4de035c3c 632 _cs = 1;
dreschpe 8:65a4de035c3c 633 WindowMax();
dreschpe 8:65a4de035c3c 634 return;
dreschpe 8:65a4de035c3c 635 }
dreschpe 8:65a4de035c3c 636
dreschpe 8:65a4de035c3c 637
dreschpe 13:2c91cb947161 638 // draw line
dreschpe 8:65a4de035c3c 639 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 640 {
dreschpe 8:65a4de035c3c 641 //WindowMax();
dreschpe 8:65a4de035c3c 642 int dx = 0, dy = 0;
dreschpe 8:65a4de035c3c 643 int dx_sym = 0, dy_sym = 0;
dreschpe 8:65a4de035c3c 644 int dx_x2 = 0, dy_x2 = 0;
dreschpe 8:65a4de035c3c 645 int di = 0;
dreschpe 8:65a4de035c3c 646
dreschpe 8:65a4de035c3c 647 dx = x1-x0;
dreschpe 8:65a4de035c3c 648 dy = y1-y0;
dreschpe 8:65a4de035c3c 649
dreschpe 8:65a4de035c3c 650 if (dx == 0) { /* vertical line */
dreschpe 8:65a4de035c3c 651 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 652 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 653 return;
dreschpe 8:65a4de035c3c 654 }
dreschpe 8:65a4de035c3c 655
dreschpe 8:65a4de035c3c 656 if (dx > 0) {
dreschpe 8:65a4de035c3c 657 dx_sym = 1;
dreschpe 8:65a4de035c3c 658 } else {
dreschpe 8:65a4de035c3c 659 dx_sym = -1;
dreschpe 8:65a4de035c3c 660 }
dreschpe 8:65a4de035c3c 661 if (dy == 0) { /* horizontal line */
dreschpe 8:65a4de035c3c 662 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 663 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 664 return;
dreschpe 8:65a4de035c3c 665 }
dreschpe 8:65a4de035c3c 666
dreschpe 8:65a4de035c3c 667 if (dy > 0) {
dreschpe 8:65a4de035c3c 668 dy_sym = 1;
dreschpe 8:65a4de035c3c 669 } else {
dreschpe 8:65a4de035c3c 670 dy_sym = -1;
dreschpe 8:65a4de035c3c 671 }
dreschpe 8:65a4de035c3c 672
dreschpe 8:65a4de035c3c 673 dx = dx_sym*dx;
dreschpe 8:65a4de035c3c 674 dy = dy_sym*dy;
dreschpe 8:65a4de035c3c 675
dreschpe 8:65a4de035c3c 676 dx_x2 = dx*2;
dreschpe 8:65a4de035c3c 677 dy_x2 = dy*2;
dreschpe 8:65a4de035c3c 678
dreschpe 8:65a4de035c3c 679 if (dx >= dy) {
dreschpe 8:65a4de035c3c 680 di = dy_x2 - dx;
dreschpe 8:65a4de035c3c 681 while (x0 != x1) {
dreschpe 8:65a4de035c3c 682
dreschpe 8:65a4de035c3c 683 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 684 x0 += dx_sym;
dreschpe 8:65a4de035c3c 685 if (di<0) {
dreschpe 8:65a4de035c3c 686 di += dy_x2;
dreschpe 8:65a4de035c3c 687 } else {
dreschpe 8:65a4de035c3c 688 di += dy_x2 - dx_x2;
dreschpe 8:65a4de035c3c 689 y0 += dy_sym;
dreschpe 8:65a4de035c3c 690 }
dreschpe 8:65a4de035c3c 691 }
dreschpe 8:65a4de035c3c 692 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 693 } else {
dreschpe 8:65a4de035c3c 694 di = dx_x2 - dy;
dreschpe 8:65a4de035c3c 695 while (y0 != y1) {
dreschpe 8:65a4de035c3c 696 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 697 y0 += dy_sym;
dreschpe 8:65a4de035c3c 698 if (di < 0) {
dreschpe 8:65a4de035c3c 699 di += dx_x2;
dreschpe 8:65a4de035c3c 700 } else {
dreschpe 8:65a4de035c3c 701 di += dx_x2 - dy_x2;
dreschpe 8:65a4de035c3c 702 x0 += dx_sym;
dreschpe 8:65a4de035c3c 703 }
dreschpe 8:65a4de035c3c 704 }
dreschpe 8:65a4de035c3c 705 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 706 }
dreschpe 8:65a4de035c3c 707 return;
dreschpe 8:65a4de035c3c 708 }
dreschpe 8:65a4de035c3c 709
dreschpe 13:2c91cb947161 710 // draw rect
dreschpe 8:65a4de035c3c 711 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 712 {
dreschpe 8:65a4de035c3c 713
dreschpe 8:65a4de035c3c 714 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 715 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 716
dreschpe 8:65a4de035c3c 717 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 718 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 719
dreschpe 8:65a4de035c3c 720 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 8:65a4de035c3c 721 else hline(x1,x0,y1,color);
dreschpe 8:65a4de035c3c 722
dreschpe 8:65a4de035c3c 723 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 8:65a4de035c3c 724 else vline(x1,y1,y0,color);
dreschpe 8:65a4de035c3c 725
dreschpe 8:65a4de035c3c 726 return;
dreschpe 8:65a4de035c3c 727 }
dreschpe 8:65a4de035c3c 728
dreschpe 8:65a4de035c3c 729
dreschpe 13:2c91cb947161 730 // fill rect
dreschpe 8:65a4de035c3c 731 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 732 {
dreschpe 8:65a4de035c3c 733
dreschpe 8:65a4de035c3c 734 int h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 735 int w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 736 int pixel = h * w;
dreschpe 14:ea3206e8e3bd 737 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 738 int dma_count;
dreschpe 14:ea3206e8e3bd 739 #endif
dreschpe 8:65a4de035c3c 740 window(x0,y0,w,h);
dreschpe 8:65a4de035c3c 741 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 742 _cs = 0;
dreschpe 14:ea3206e8e3bd 743 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 744 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 745 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 746 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 747 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 748 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 749 #endif
dreschpe 14:ea3206e8e3bd 750 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 751 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 752 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 753 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 754 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 755 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 756 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 757 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 758 #endif
dreschpe 14:ea3206e8e3bd 759 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 760 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 761 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 762 }
dreschpe 14:ea3206e8e3bd 763 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 764 do {
dreschpe 14:ea3206e8e3bd 765 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 766 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 767 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 768 } else {
dreschpe 14:ea3206e8e3bd 769 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 770 pixel = 0;
dreschpe 14:ea3206e8e3bd 771 }
dreschpe 14:ea3206e8e3bd 772 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 773 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 774 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 775 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 776 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 777 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 778 do {
dreschpe 14:ea3206e8e3bd 779 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 780
dreschpe 14:ea3206e8e3bd 781 } while (pixel > 0);
dreschpe 13:2c91cb947161 782
dreschpe 14:ea3206e8e3bd 783 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 784 do {
dreschpe 14:ea3206e8e3bd 785 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 786 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 787 do {
dreschpe 14:ea3206e8e3bd 788 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 789 }
dreschpe 14:ea3206e8e3bd 790
dreschpe 14:ea3206e8e3bd 791 #else // no DMA
dreschpe 14:ea3206e8e3bd 792 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 793 _spi.write(color);
dreschpe 14:ea3206e8e3bd 794 }
dreschpe 14:ea3206e8e3bd 795 #endif
dreschpe 13:2c91cb947161 796
dreschpe 14:ea3206e8e3bd 797 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 798 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 799 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 800 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 801 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 802 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 803 }
dreschpe 13:2c91cb947161 804
dreschpe 14:ea3206e8e3bd 805 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 806 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 807 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 808 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 809 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 810 _spi.write(color);
dreschpe 14:ea3206e8e3bd 811 }
dreschpe 14:ea3206e8e3bd 812 #endif
dreschpe 14:ea3206e8e3bd 813 #endif
dreschpe 8:65a4de035c3c 814 _cs = 1;
dreschpe 8:65a4de035c3c 815 WindowMax();
dreschpe 8:65a4de035c3c 816 return;
dreschpe 8:65a4de035c3c 817 }
dreschpe 8:65a4de035c3c 818
dreschpe 13:2c91cb947161 819 // set cursor position
dreschpe 8:65a4de035c3c 820 void SPI_TFT::locate(int x, int y)
dreschpe 8:65a4de035c3c 821 {
dreschpe 8:65a4de035c3c 822 char_x = x;
dreschpe 8:65a4de035c3c 823 char_y = y;
dreschpe 8:65a4de035c3c 824 }
dreschpe 8:65a4de035c3c 825
dreschpe 8:65a4de035c3c 826
dreschpe 13:2c91cb947161 827 // calculate num of chars in a row
dreschpe 8:65a4de035c3c 828 int SPI_TFT::columns()
dreschpe 8:65a4de035c3c 829 {
dreschpe 8:65a4de035c3c 830 return width() / font[1];
dreschpe 8:65a4de035c3c 831 }
dreschpe 8:65a4de035c3c 832
dreschpe 13:2c91cb947161 833 // calculate num of rows on the screen
dreschpe 8:65a4de035c3c 834 int SPI_TFT::rows()
dreschpe 8:65a4de035c3c 835 {
dreschpe 8:65a4de035c3c 836 return height() / font[2];
dreschpe 8:65a4de035c3c 837 }
dreschpe 8:65a4de035c3c 838
dreschpe 13:2c91cb947161 839 // print a char on the screen
dreschpe 8:65a4de035c3c 840 int SPI_TFT::_putc(int value)
dreschpe 8:65a4de035c3c 841 {
dreschpe 8:65a4de035c3c 842 if (value == '\n') { // new line
dreschpe 8:65a4de035c3c 843 char_x = 0;
dreschpe 8:65a4de035c3c 844 char_y = char_y + font[2];
dreschpe 8:65a4de035c3c 845 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 846 char_y = 0;
dreschpe 8:65a4de035c3c 847 }
dreschpe 8:65a4de035c3c 848 } else {
dreschpe 8:65a4de035c3c 849 character(char_x, char_y, value);
dreschpe 8:65a4de035c3c 850 }
dreschpe 8:65a4de035c3c 851 return value;
dreschpe 8:65a4de035c3c 852 }
dreschpe 8:65a4de035c3c 853
dreschpe 13:2c91cb947161 854 // consrtuct the char out of the font
dreschpe 8:65a4de035c3c 855 void SPI_TFT::character(int x, int y, int c)
dreschpe 8:65a4de035c3c 856 {
dreschpe 9:a63fd1ad41b0 857 unsigned int hor,vert,offset,bpl,j,i,b;
dreschpe 8:65a4de035c3c 858 unsigned char* zeichen;
dreschpe 8:65a4de035c3c 859 unsigned char z,w;
dreschpe 14:ea3206e8e3bd 860 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 861 unsigned int pixel;
dreschpe 14:ea3206e8e3bd 862 unsigned int p;
dreschpe 14:ea3206e8e3bd 863 unsigned int dma_count,dma_off;
dreschpe 14:ea3206e8e3bd 864 uint16_t *buffer;
dreschpe 14:ea3206e8e3bd 865 #endif
dreschpe 8:65a4de035c3c 866
dreschpe 8:65a4de035c3c 867 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 8:65a4de035c3c 868
dreschpe 8:65a4de035c3c 869 // read font parameter from start of array
dreschpe 8:65a4de035c3c 870 offset = font[0]; // bytes / char
dreschpe 8:65a4de035c3c 871 hor = font[1]; // get hor size of font
dreschpe 8:65a4de035c3c 872 vert = font[2]; // get vert size of font
dreschpe 8:65a4de035c3c 873 bpl = font[3]; // bytes per line
dreschpe 8:65a4de035c3c 874
dreschpe 8:65a4de035c3c 875 if (char_x + hor > width()) {
dreschpe 8:65a4de035c3c 876 char_x = 0;
dreschpe 8:65a4de035c3c 877 char_y = char_y + vert;
dreschpe 8:65a4de035c3c 878 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 879 char_y = 0;
dreschpe 8:65a4de035c3c 880 }
dreschpe 8:65a4de035c3c 881 }
dreschpe 8:65a4de035c3c 882 window(char_x, char_y,hor,vert); // char box
dreschpe 8:65a4de035c3c 883 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 884
dreschpe 14:ea3206e8e3bd 885 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 886 pixel = hor * vert; // calculate buffer size
dreschpe 8:65a4de035c3c 887
dreschpe 14:ea3206e8e3bd 888 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 14:ea3206e8e3bd 889 if (buffer == NULL) {
dreschpe 14:ea3206e8e3bd 890 //led = 1;
dreschpe 14:ea3206e8e3bd 891 //pc.printf("Malloc error !\n\r");
dreschpe 14:ea3206e8e3bd 892 return; // error no memory
dreschpe 8:65a4de035c3c 893 }
dreschpe 8:65a4de035c3c 894
dreschpe 14:ea3206e8e3bd 895 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 896 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 897 p = 0;
dreschpe 14:ea3206e8e3bd 898 // construct the char into the buffer
dreschpe 14:ea3206e8e3bd 899 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 900 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 901 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 902 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 903 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 904 buffer[p] = _background;
dreschpe 14:ea3206e8e3bd 905 } else {
dreschpe 14:ea3206e8e3bd 906 buffer[p] = _foreground;
dreschpe 14:ea3206e8e3bd 907 }
dreschpe 14:ea3206e8e3bd 908 p++;
dreschpe 8:65a4de035c3c 909 }
dreschpe 8:65a4de035c3c 910 }
dreschpe 14:ea3206e8e3bd 911
dreschpe 14:ea3206e8e3bd 912 // copy the buffer with DMA SPI to display
dreschpe 14:ea3206e8e3bd 913 dma_off = 0; // offset for DMA transfer
dreschpe 14:ea3206e8e3bd 914 _cs = 0;
dreschpe 14:ea3206e8e3bd 915 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 916 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 917 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 918 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 919 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 920 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 921 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 922 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 923 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 924 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 925 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 926 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 927 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 928 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 929 }
dreschpe 14:ea3206e8e3bd 930
dreschpe 14:ea3206e8e3bd 931 // start DMA
dreschpe 14:ea3206e8e3bd 932 do {
dreschpe 14:ea3206e8e3bd 933 if (pixel > 4095) { // this is a giant font !
dreschpe 14:ea3206e8e3bd 934 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 935 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 936 } else {
dreschpe 14:ea3206e8e3bd 937 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 938 pixel = 0;
dreschpe 14:ea3206e8e3bd 939 }
dreschpe 14:ea3206e8e3bd 940 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 941 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 942 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 14:ea3206e8e3bd 943 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 14:ea3206e8e3bd 944 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 945 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 946 do {
dreschpe 14:ea3206e8e3bd 947 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 948 dma_off = dma_off + dma_count;
dreschpe 14:ea3206e8e3bd 949 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 950
dreschpe 14:ea3206e8e3bd 951 free ((uint16_t *) buffer);
dreschpe 14:ea3206e8e3bd 952
dreschpe 14:ea3206e8e3bd 953 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 954 do {
dreschpe 14:ea3206e8e3bd 955 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 956 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 957 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 958 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 959 do {
dreschpe 14:ea3206e8e3bd 960 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 961 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 962 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 963 }
dreschpe 14:ea3206e8e3bd 964
dreschpe 14:ea3206e8e3bd 965 #else // no dma
dreschpe 14:ea3206e8e3bd 966 _cs = 0;
dreschpe 14:ea3206e8e3bd 967 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 968 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 969 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 970 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 971 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 972 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 973 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 974 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 975 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 976 }
dreschpe 14:ea3206e8e3bd 977 #else // mbed lib
dreschpe 14:ea3206e8e3bd 978 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 979 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 980 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 981 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 982 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 983 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 984 #endif
dreschpe 14:ea3206e8e3bd 985 #endif
dreschpe 14:ea3206e8e3bd 986
dreschpe 14:ea3206e8e3bd 987 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 988 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 989 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 990 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 991 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 992 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 993 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 994 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 995 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 996 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 997 #else
dreschpe 14:ea3206e8e3bd 998 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 999 #endif
dreschpe 14:ea3206e8e3bd 1000 } else {
dreschpe 14:ea3206e8e3bd 1001 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1002 _spi.write(_foreground >> 8);
dreschpe 14:ea3206e8e3bd 1003 _spi.write(_foreground & 0xff);
dreschpe 14:ea3206e8e3bd 1004 #else
dreschpe 14:ea3206e8e3bd 1005 _spi.write(_foreground);
dreschpe 14:ea3206e8e3bd 1006 #endif
dreschpe 14:ea3206e8e3bd 1007 }
dreschpe 14:ea3206e8e3bd 1008 }
dreschpe 14:ea3206e8e3bd 1009 }
dreschpe 14:ea3206e8e3bd 1010 #endif // no DMA
dreschpe 8:65a4de035c3c 1011 _cs = 1;
dreschpe 8:65a4de035c3c 1012 WindowMax();
dreschpe 8:65a4de035c3c 1013 if ((w + 2) < hor) { // x offset to next char
dreschpe 8:65a4de035c3c 1014 char_x += w + 2;
dreschpe 8:65a4de035c3c 1015 } else char_x += hor;
dreschpe 8:65a4de035c3c 1016 }
dreschpe 8:65a4de035c3c 1017
dreschpe 8:65a4de035c3c 1018
dreschpe 8:65a4de035c3c 1019 void SPI_TFT::set_font(unsigned char* f)
dreschpe 8:65a4de035c3c 1020 {
dreschpe 8:65a4de035c3c 1021 font = f;
dreschpe 8:65a4de035c3c 1022 }
dreschpe 8:65a4de035c3c 1023
dreschpe 8:65a4de035c3c 1024
dreschpe 8:65a4de035c3c 1025 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 8:65a4de035c3c 1026 {
dreschpe 8:65a4de035c3c 1027 unsigned int j;
dreschpe 8:65a4de035c3c 1028 int padd;
dreschpe 16:2efcbb2814fa 1029
dreschpe 16:2efcbb2814fa 1030 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 14:ea3206e8e3bd 1031 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 16:2efcbb2814fa 1032 unsigned short pix_temp;
dreschpe 14:ea3206e8e3bd 1033 #endif
dreschpe 16:2efcbb2814fa 1034
dreschpe 8:65a4de035c3c 1035 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 8:65a4de035c3c 1036 padd = -1;
dreschpe 8:65a4de035c3c 1037 do {
dreschpe 8:65a4de035c3c 1038 padd ++;
dreschpe 8:65a4de035c3c 1039 } while (2*(w + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1040 window(x, y, w, h);
dreschpe 8:65a4de035c3c 1041 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1042 _cs = 0;
dreschpe 13:2c91cb947161 1043 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1044 if (spi_port == 0) { // TFT on SSP0
dreschpe 16:2efcbb2814fa 1045 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1046 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1047 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1048 LPC_SSP0->DMACR = 0x2;
dreschpe 16:2efcbb2814fa 1049 #endif
dreschpe 16:2efcbb2814fa 1050 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 16:2efcbb2814fa 1051 LPC_SSP0->DR = 0x72; // start Data
dreschpe 16:2efcbb2814fa 1052 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1053
dreschpe 8:65a4de035c3c 1054 } else {
dreschpe 16:2efcbb2814fa 1055 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1056 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1057 /* Enable SSP1 for DMA. */
dreschpe 13:2c91cb947161 1058 LPC_SSP1->DMACR = 0x2;
dreschpe 16:2efcbb2814fa 1059 #endif
dreschpe 16:2efcbb2814fa 1060 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 16:2efcbb2814fa 1061 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 16:2efcbb2814fa 1062 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1063 }
dreschpe 8:65a4de035c3c 1064
dreschpe 8:65a4de035c3c 1065 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 16:2efcbb2814fa 1066 #if defined USE_DMA
dreschpe 16:2efcbb2814fa 1067 for (j = 0; j < h; j++) { //Lines
dreschpe 16:2efcbb2814fa 1068 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 16:2efcbb2814fa 1069 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 16:2efcbb2814fa 1070 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 16:2efcbb2814fa 1071 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 16:2efcbb2814fa 1072 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 16:2efcbb2814fa 1073 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 16:2efcbb2814fa 1074 do {
dreschpe 16:2efcbb2814fa 1075 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1076
dreschpe 16:2efcbb2814fa 1077 bitmap_ptr -= w;
dreschpe 16:2efcbb2814fa 1078 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 1079 }
dreschpe 16:2efcbb2814fa 1080 #else
dreschpe 16:2efcbb2814fa 1081 unsigned int i;
dreschpe 16:2efcbb2814fa 1082 for (j = 0; j < h; j++) { //Lines
dreschpe 16:2efcbb2814fa 1083 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 16:2efcbb2814fa 1084 _spi.write(*bitmap_ptr); // one line
dreschpe 16:2efcbb2814fa 1085 bitmap_ptr++;
dreschpe 16:2efcbb2814fa 1086 }
dreschpe 16:2efcbb2814fa 1087 bitmap_ptr -= 2*w;
dreschpe 16:2efcbb2814fa 1088 bitmap_ptr -= padd;
dreschpe 16:2efcbb2814fa 1089 }
dreschpe 16:2efcbb2814fa 1090 #endif
dreschpe 8:65a4de035c3c 1091 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1092 do {
dreschpe 8:65a4de035c3c 1093 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1094 } else {
dreschpe 8:65a4de035c3c 1095 do {
dreschpe 8:65a4de035c3c 1096 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1097 }
dreschpe 9:a63fd1ad41b0 1098 #else // use mbed lib
dreschpe 16:2efcbb2814fa 1099 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 16:2efcbb2814fa 1100 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 16:2efcbb2814fa 1101 #else
dreschpe 16:2efcbb2814fa 1102 _spi.format(8,3); // 8 bit Mode 3
dreschpe 16:2efcbb2814fa 1103 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 16:2efcbb2814fa 1104 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 16:2efcbb2814fa 1105 #endif
dreschpe 16:2efcbb2814fa 1106 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 9:a63fd1ad41b0 1107 unsigned int i;
dreschpe 9:a63fd1ad41b0 1108 for (j = 0; j < h; j++) { //Lines
dreschpe 9:a63fd1ad41b0 1109 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 16:2efcbb2814fa 1110 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 16:2efcbb2814fa 1111 pix_temp = *bitmap_ptr;
dreschpe 16:2efcbb2814fa 1112 _spi.write(pix_temp >> 8);
dreschpe 16:2efcbb2814fa 1113 _spi.write(pix_temp);
dreschpe 16:2efcbb2814fa 1114 bitmap_ptr++;
dreschpe 16:2efcbb2814fa 1115 #else
dreschpe 16:2efcbb2814fa 1116 _spi.write(*bitmap_ptr); // one line
dreschpe 16:2efcbb2814fa 1117 bitmap_ptr++;
dreschpe 16:2efcbb2814fa 1118 #endif
dreschpe 9:a63fd1ad41b0 1119 }
dreschpe 9:a63fd1ad41b0 1120 bitmap_ptr -= 2*w;
dreschpe 9:a63fd1ad41b0 1121 bitmap_ptr -= padd;
dreschpe 16:2efcbb2814fa 1122 }
dreschpe 16:2efcbb2814fa 1123 #endif // USE MBED LIB
dreschpe 8:65a4de035c3c 1124 _cs = 1;
dreschpe 8:65a4de035c3c 1125 WindowMax();
dreschpe 8:65a4de035c3c 1126 }
dreschpe 8:65a4de035c3c 1127
dreschpe 8:65a4de035c3c 1128
dreschpe 13:2c91cb947161 1129 // local filesystem is not implemented in kinetis board
dreschpe 13:2c91cb947161 1130 #if defined TARGET_LPC1768 || defined TARGET_LPC11U24
dreschpe 13:2c91cb947161 1131
dreschpe 13:2c91cb947161 1132
dreschpe 8:65a4de035c3c 1133 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 8:65a4de035c3c 1134 {
dreschpe 8:65a4de035c3c 1135
dreschpe 8:65a4de035c3c 1136 #define OffsetPixelWidth 18
dreschpe 8:65a4de035c3c 1137 #define OffsetPixelHeigh 22
dreschpe 8:65a4de035c3c 1138 #define OffsetFileSize 34
dreschpe 8:65a4de035c3c 1139 #define OffsetPixData 10
dreschpe 8:65a4de035c3c 1140 #define OffsetBPP 28
dreschpe 8:65a4de035c3c 1141
dreschpe 8:65a4de035c3c 1142 char filename[50];
dreschpe 8:65a4de035c3c 1143 unsigned char BMP_Header[54];
dreschpe 8:65a4de035c3c 1144 unsigned short BPP_t;
dreschpe 8:65a4de035c3c 1145 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 8:65a4de035c3c 1146 unsigned int i,off;
dreschpe 8:65a4de035c3c 1147 int padd,j;
dreschpe 8:65a4de035c3c 1148 unsigned short *line;
dreschpe 8:65a4de035c3c 1149
dreschpe 8:65a4de035c3c 1150 // get the filename
dreschpe 8:65a4de035c3c 1151 LocalFileSystem local("local");
dreschpe 8:65a4de035c3c 1152 sprintf(&filename[0],"/local/");
dreschpe 8:65a4de035c3c 1153 i=7;
dreschpe 8:65a4de035c3c 1154 while (*Name_BMP!='\0') {
dreschpe 8:65a4de035c3c 1155 filename[i++]=*Name_BMP++;
dreschpe 8:65a4de035c3c 1156 }
dreschpe 8:65a4de035c3c 1157
dreschpe 8:65a4de035c3c 1158 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 8:65a4de035c3c 1159
dreschpe 8:65a4de035c3c 1160 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 8:65a4de035c3c 1161 if (!Image) {
dreschpe 8:65a4de035c3c 1162 return(0); // error file not found !
dreschpe 8:65a4de035c3c 1163 }
dreschpe 8:65a4de035c3c 1164
dreschpe 8:65a4de035c3c 1165 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 8:65a4de035c3c 1166
dreschpe 8:65a4de035c3c 1167 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 8:65a4de035c3c 1168 fclose(Image);
dreschpe 8:65a4de035c3c 1169 return(-1); // error no BMP file
dreschpe 8:65a4de035c3c 1170 }
dreschpe 8:65a4de035c3c 1171
dreschpe 8:65a4de035c3c 1172 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 8:65a4de035c3c 1173 if (BPP_t != 0x0010) {
dreschpe 8:65a4de035c3c 1174 fclose(Image);
dreschpe 8:65a4de035c3c 1175 return(-2); // error no 16 bit BMP
dreschpe 8:65a4de035c3c 1176 }
dreschpe 8:65a4de035c3c 1177
dreschpe 8:65a4de035c3c 1178 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 8:65a4de035c3c 1179 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 8:65a4de035c3c 1180 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 8:65a4de035c3c 1181 fclose(Image);
dreschpe 8:65a4de035c3c 1182 return(-3); // to big
dreschpe 8:65a4de035c3c 1183 }
dreschpe 8:65a4de035c3c 1184
dreschpe 8:65a4de035c3c 1185 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 8:65a4de035c3c 1186
dreschpe 8:65a4de035c3c 1187 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 8:65a4de035c3c 1188 if (line == NULL) {
dreschpe 8:65a4de035c3c 1189 return(-4); // error no memory
dreschpe 8:65a4de035c3c 1190 }
dreschpe 8:65a4de035c3c 1191
dreschpe 8:65a4de035c3c 1192 // the bmp lines are padded to multiple of 4 bytes
dreschpe 8:65a4de035c3c 1193 padd = -1;
dreschpe 8:65a4de035c3c 1194 do {
dreschpe 8:65a4de035c3c 1195 padd ++;
dreschpe 8:65a4de035c3c 1196 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1197
dreschpe 8:65a4de035c3c 1198
dreschpe 8:65a4de035c3c 1199 //fseek(Image, 70 ,SEEK_SET);
dreschpe 8:65a4de035c3c 1200 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 8:65a4de035c3c 1201 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1202 _cs = 0;
dreschpe 13:2c91cb947161 1203 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1204 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1205 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1206 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1207 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1208 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1209 #endif
dreschpe 8:65a4de035c3c 1210 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1211 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1212 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1213
dreschpe 8:65a4de035c3c 1214 } else {
dreschpe 13:2c91cb947161 1215 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1216 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1217 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1218 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1219 #endif
dreschpe 8:65a4de035c3c 1220 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1221 LPC_SSP1->DR = 0x72; // start Data
dreschpe 13:2c91cb947161 1222 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1223 }
dreschpe 8:65a4de035c3c 1224 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 8:65a4de035c3c 1225 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 8:65a4de035c3c 1226 fseek(Image, off ,SEEK_SET);
dreschpe 8:65a4de035c3c 1227 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 8:65a4de035c3c 1228 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1229 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1230 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1231 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 8:65a4de035c3c 1232 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1233 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1234 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1235 do {
dreschpe 8:65a4de035c3c 1236 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1237 #else
dreschpe 13:2c91cb947161 1238 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1239 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1240 }
dreschpe 13:2c91cb947161 1241 #endif
dreschpe 8:65a4de035c3c 1242 }
dreschpe 8:65a4de035c3c 1243 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1244 do {
dreschpe 8:65a4de035c3c 1245 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1246 } else {
dreschpe 8:65a4de035c3c 1247 do {
dreschpe 8:65a4de035c3c 1248 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1249 }
dreschpe 13:2c91cb947161 1250
dreschpe 9:a63fd1ad41b0 1251 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1252 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1253 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1254 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1255 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 9:a63fd1ad41b0 1256 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 9:a63fd1ad41b0 1257 fseek(Image, off ,SEEK_SET);
dreschpe 9:a63fd1ad41b0 1258 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 9:a63fd1ad41b0 1259 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1260 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1261 }
dreschpe 13:2c91cb947161 1262 }
dreschpe 13:2c91cb947161 1263 #endif
dreschpe 8:65a4de035c3c 1264 _cs = 1;
dreschpe 8:65a4de035c3c 1265 free (line);
dreschpe 8:65a4de035c3c 1266 fclose(Image);
dreschpe 8:65a4de035c3c 1267 WindowMax();
dreschpe 8:65a4de035c3c 1268 return(1);
dreschpe 13:2c91cb947161 1269 }
dreschpe 13:2c91cb947161 1270
dreschpe 13:2c91cb947161 1271 #endif