Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/core_cmSecureAccess.h@147:ba84b7dc41a7, 2016-09-10 (annotated)

Committer:
JojoS
Date:
Sat Sep 10 15:32:04 2016 +0000
Revision:
147:ba84b7dc41a7
Parent:
144:ef7eb2e8f9f7 
added prescaler for 16 bit timers (solution as in LPC11xx), default prescaler 31 for max 28 ms period time

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file core_cmSecureAccess.h
<> 144:ef7eb2e8f9f7 3 * @brief CMSIS Cortex-M Core Secure Access Header File
<> 144:ef7eb2e8f9f7 4 * @version XXX
<> 144:ef7eb2e8f9f7 5 * @date 10. June 2016
<> 144:ef7eb2e8f9f7 6 *
<> 144:ef7eb2e8f9f7 7 * @note
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 ******************************************************************************/
<> 144:ef7eb2e8f9f7 10 /* Copyright (c) 2016 ARM LIMITED
<> 144:ef7eb2e8f9f7 11
<> 144:ef7eb2e8f9f7 12 All rights reserved.
<> 144:ef7eb2e8f9f7 13 Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 14 modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 - Redistributions of source code must retain the above copyright
<> 144:ef7eb2e8f9f7 16 notice, this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 - Redistributions in binary form must reproduce the above copyright
<> 144:ef7eb2e8f9f7 18 notice, this list of conditions and the following disclaimer in the
<> 144:ef7eb2e8f9f7 19 documentation and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 - Neither the name of ARM nor the names of its contributors may be used
<> 144:ef7eb2e8f9f7 21 to endorse or promote products derived from this software without
<> 144:ef7eb2e8f9f7 22 specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
<> 144:ef7eb2e8f9f7 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
<> 144:ef7eb2e8f9f7 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
<> 144:ef7eb2e8f9f7 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
<> 144:ef7eb2e8f9f7 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
<> 144:ef7eb2e8f9f7 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
<> 144:ef7eb2e8f9f7 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
<> 144:ef7eb2e8f9f7 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
<> 144:ef7eb2e8f9f7 34 POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 35 ---------------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #ifndef __CORE_CM_SECURE_ACCESS_H
<> 144:ef7eb2e8f9f7 39 #define __CORE_CM_SECURE_ACCESS_H
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /* ########################### Core Secure Access ########################### */
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #ifdef FEATURE_UVISOR
<> 144:ef7eb2e8f9f7 45 #include "uvisor-lib.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /* Secure uVisor implementation. */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** Set the value at the target address.
<> 144:ef7eb2e8f9f7 50 *
<> 144:ef7eb2e8f9f7 51 * Equivalent to: `*address = value`.
<> 144:ef7eb2e8f9f7 52 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 53 * @param value[in] Value to write at the address location.
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55 #define SECURE_WRITE(address, value) \
<> 144:ef7eb2e8f9f7 56 uvisor_write(main, UVISOR_RGW_SHARED, address, value, UVISOR_RGW_OP_WRITE, 0xFFFFFFFFUL)
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /** Get the value at the target address.
<> 144:ef7eb2e8f9f7 59 *
<> 144:ef7eb2e8f9f7 60 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 61 * @returns The value `*address`.
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63 #define SECURE_READ(address) \
<> 144:ef7eb2e8f9f7 64 uvisor_read(main, UVISOR_RGW_SHARED, address, UVISOR_RGW_OP_READ, 0xFFFFFFFFUL)
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 /** Get the selected bits at the target address.
<> 144:ef7eb2e8f9f7 67 *
<> 144:ef7eb2e8f9f7 68 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 69 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 70 * @returns The value `*address & mask`.
<> 144:ef7eb2e8f9f7 71 */
<> 144:ef7eb2e8f9f7 72 #define SECURE_BITS_GET(address, mask) \
<> 144:ef7eb2e8f9f7 73 UVISOR_BITS_GET(main, UVISOR_RGW_SHARED, address, mask)
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /** Check the selected bits at the target address.
<> 144:ef7eb2e8f9f7 76 *
<> 144:ef7eb2e8f9f7 77 * @param address[in] Address at which to check the bits
<> 144:ef7eb2e8f9f7 78 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 79 * @returns The value `((*address & mask) == mask)`.
<> 144:ef7eb2e8f9f7 80 */
<> 144:ef7eb2e8f9f7 81 #define SECURE_BITS_CHECK(address, mask) \
<> 144:ef7eb2e8f9f7 82 UVISOR_BITS_CHECK(main, UVISOR_RGW_SHARED, address, mask)
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /** Set the selected bits to 1 at the target address.
<> 144:ef7eb2e8f9f7 85 *
<> 144:ef7eb2e8f9f7 86 * Equivalent to: `*address |= mask`.
<> 144:ef7eb2e8f9f7 87 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 88 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 89 */
<> 144:ef7eb2e8f9f7 90 #define SECURE_BITS_SET(address, mask) \
<> 144:ef7eb2e8f9f7 91 UVISOR_BITS_SET(main, UVISOR_RGW_SHARED, address, mask)
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /** Clear the selected bits at the target address.
<> 144:ef7eb2e8f9f7 94 *
<> 144:ef7eb2e8f9f7 95 * Equivalent to: `*address &= ~mask`.
<> 144:ef7eb2e8f9f7 96 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 97 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 98 */
<> 144:ef7eb2e8f9f7 99 #define SECURE_BITS_CLEAR(address, mask) \
<> 144:ef7eb2e8f9f7 100 UVISOR_BITS_CLEAR(main, UVISOR_RGW_SHARED, address, mask)
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /** Set the selected bits at the target address to the given value.
<> 144:ef7eb2e8f9f7 103 *
<> 144:ef7eb2e8f9f7 104 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 144:ef7eb2e8f9f7 105 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 106 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 107 * @param value[in] Value to write at the address location. Note: The value
<> 144:ef7eb2e8f9f7 108 * must be already shifted to the correct bit position
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 144:ef7eb2e8f9f7 111 UVISOR_BITS_SET_VALUE(main, UVISOR_RGW_SHARED, address, mask, value)
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /** Toggle the selected bits at the target address.
<> 144:ef7eb2e8f9f7 114 *
<> 144:ef7eb2e8f9f7 115 * Equivalent to: `*address ^= mask`.
<> 144:ef7eb2e8f9f7 116 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 117 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119 #define SECURE_BITS_TOGGLE(address, mask) \
<> 144:ef7eb2e8f9f7 120 UVISOR_BITS_TOGGLE(main, UVISOR_RGW_SHARED, address, mask)
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 #else
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /* Insecure fallback implementation. */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /** Set the value at the target address.
<> 144:ef7eb2e8f9f7 127 *
<> 144:ef7eb2e8f9f7 128 * Equivalent to: `*address = value`.
<> 144:ef7eb2e8f9f7 129 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 130 * @param value[in] Value to write at the address location.
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132 #define SECURE_WRITE(address, value) \
<> 144:ef7eb2e8f9f7 133 *(address) = (value)
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /** Get the value at the target address.
<> 144:ef7eb2e8f9f7 136 *
<> 144:ef7eb2e8f9f7 137 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 138 * @returns The value `*address`.
<> 144:ef7eb2e8f9f7 139 */
<> 144:ef7eb2e8f9f7 140 #define SECURE_READ(address) \
<> 144:ef7eb2e8f9f7 141 (*(address))
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 /** Get the selected bits at the target address.
<> 144:ef7eb2e8f9f7 144 *
<> 144:ef7eb2e8f9f7 145 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 146 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 147 * @returns The value `*address & mask`.
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149 #define SECURE_BITS_GET(address, mask) \
<> 144:ef7eb2e8f9f7 150 (*(address) & (mask))
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /** Check the selected bits at the target address.
<> 144:ef7eb2e8f9f7 153 *
<> 144:ef7eb2e8f9f7 154 * @param address[in] Address at which to check the bits
<> 144:ef7eb2e8f9f7 155 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 156 * @returns The value `((*address & mask) == mask)`.
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 #define SECURE_BITS_CHECK(address, mask) \
<> 144:ef7eb2e8f9f7 159 ((*(address) & (mask)) == (mask))
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /** Set the selected bits to 1 at the target address.
<> 144:ef7eb2e8f9f7 162 *
<> 144:ef7eb2e8f9f7 163 * Equivalent to: `*address |= mask`.
<> 144:ef7eb2e8f9f7 164 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 165 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 #define SECURE_BITS_SET(address, mask) \
<> 144:ef7eb2e8f9f7 168 *(address) |= (mask)
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /** Clear the selected bits at the target address.
<> 144:ef7eb2e8f9f7 171 *
<> 144:ef7eb2e8f9f7 172 * Equivalent to: `*address &= ~mask`.
<> 144:ef7eb2e8f9f7 173 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 174 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176 #define SECURE_BITS_CLEAR(address, mask) \
<> 144:ef7eb2e8f9f7 177 *(address) &= ~(mask)
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /** Set the selected bits at the target address to the given value.
<> 144:ef7eb2e8f9f7 180 *
<> 144:ef7eb2e8f9f7 181 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 144:ef7eb2e8f9f7 182 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 183 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 184 * @param value[in] Value to write at the address location. Note: The value
<> 144:ef7eb2e8f9f7 185 * must be already shifted to the correct bit position
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 144:ef7eb2e8f9f7 188 *(address) = (*(address) & ~(mask)) | ((value) & (mask))
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /** Toggle the selected bits at the target address.
<> 144:ef7eb2e8f9f7 191 *
<> 144:ef7eb2e8f9f7 192 * Equivalent to: `*address ^= mask`.
<> 144:ef7eb2e8f9f7 193 * @param address[in] Target address
<> 144:ef7eb2e8f9f7 194 * @param mask[in] Bits to select out of the target address
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 #define SECURE_BITS_TOGGLE(address, mask) \
<> 144:ef7eb2e8f9f7 197 *(address) ^= (mask)
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 #endif
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 #endif /* __CORE_CM_SECURE_ACCESS_H */